1295016Sjkim/*
2280304Sjkim * Copyright (c) 2008-2011 Atheros Communications Inc.
3280304Sjkim *
4280304Sjkim * Permission to use, copy, modify, and/or distribute this software for any
5109998Smarkm * purpose with or without fee is hereby granted, provided that the above
6109998Smarkm * copyright notice and this permission notice appear in all copies.
7109998Smarkm *
8109998Smarkm * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9109998Smarkm * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10109998Smarkm * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11109998Smarkm * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12109998Smarkm * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13109998Smarkm * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14280304Sjkim * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15109998Smarkm */
16109998Smarkm
17109998Smarkm#ifndef PHY_H
18109998Smarkm#define PHY_H
19109998Smarkm
20109998Smarkm#define CHANSEL_DIV		15
21109998Smarkm#define CHANSEL_2G(_freq)	(((_freq) * 0x10000) / CHANSEL_DIV)
22109998Smarkm#define CHANSEL_5G(_freq)	(((_freq) * 0x8000) / CHANSEL_DIV)
23109998Smarkm
24109998Smarkm#define AR_PHY_BASE     0x9800
25109998Smarkm#define AR_PHY(_n)      (AR_PHY_BASE + ((_n)<<2))
26109998Smarkm
27109998Smarkm#define AR_PHY_TX_PWRCTRL_TX_GAIN_TAB_MAX   0x0007E000
28109998Smarkm#define AR_PHY_TX_PWRCTRL_TX_GAIN_TAB_MAX_S 13
29109998Smarkm#define AR_PHY_TX_GAIN_CLC       0x0000001E
30109998Smarkm#define AR_PHY_TX_GAIN_CLC_S     1
31109998Smarkm#define AR_PHY_TX_GAIN           0x0007F000
32109998Smarkm#define AR_PHY_TX_GAIN_S         12
33109998Smarkm
34109998Smarkm#define AR_PHY_CLC_TBL1      0xa35c
35109998Smarkm#define AR_PHY_CLC_I0        0x07ff0000
36109998Smarkm#define AR_PHY_CLC_I0_S      16
37109998Smarkm#define AR_PHY_CLC_Q0        0x0000ffd0
38109998Smarkm#define AR_PHY_CLC_Q0_S      5
39109998Smarkm
40109998Smarkm#define ANTSWAP_AB 0x0001
41109998Smarkm#define REDUCE_CHAIN_0 0x00000050
42109998Smarkm#define REDUCE_CHAIN_1 0x00000051
43109998Smarkm#define AR_PHY_CHIP_ID 0x9818
44109998Smarkm
45109998Smarkm#define	AR_PHY_TIMING11_SPUR_FREQ_SD		0x3FF00000
46109998Smarkm#define	AR_PHY_TIMING11_SPUR_FREQ_SD_S		20
47109998Smarkm
48109998Smarkm#define AR_PHY_PLL_CONTROL 0x16180
49109998Smarkm#define AR_PHY_PLL_MODE 0x16184
50109998Smarkm
51109998Smarkmenum ath9k_ant_div_comb_lna_conf {
52109998Smarkm	ATH_ANT_DIV_COMB_LNA1_MINUS_LNA2,
53109998Smarkm	ATH_ANT_DIV_COMB_LNA2,
54109998Smarkm	ATH_ANT_DIV_COMB_LNA1,
55109998Smarkm	ATH_ANT_DIV_COMB_LNA1_PLUS_LNA2,
56109998Smarkm};
57109998Smarkm
58109998Smarkm#endif
59109998Smarkm