11590Srgrimes/*  Generic MTRR (Memory Type Range Register) ioctls.
21590Srgrimes
31590Srgrimes    Copyright (C) 1997-1999  Richard Gooch
41590Srgrimes
51590Srgrimes    This library is free software; you can redistribute it and/or
61590Srgrimes    modify it under the terms of the GNU Library General Public
71590Srgrimes    License as published by the Free Software Foundation; either
81590Srgrimes    version 2 of the License, or (at your option) any later version.
91590Srgrimes
101590Srgrimes    This library is distributed in the hope that it will be useful,
111590Srgrimes    but WITHOUT ANY WARRANTY; without even the implied warranty of
121590Srgrimes    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
131590Srgrimes    Library General Public License for more details.
141590Srgrimes
151590Srgrimes    You should have received a copy of the GNU Library General Public
161590Srgrimes    License along with this library; if not, write to the Free
171590Srgrimes    Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
181590Srgrimes
191590Srgrimes    Richard Gooch may be reached by email at  rgooch@atnf.csiro.au
201590Srgrimes    The postal address is:
211590Srgrimes      Richard Gooch, c/o ATNF, P. O. Box 76, Epping, N.S.W., 2121, Australia.
221590Srgrimes*/
231590Srgrimes#ifndef _ASM_X86_MTRR_H
241590Srgrimes#define _ASM_X86_MTRR_H
251590Srgrimes
261590Srgrimes#include <linux/bits.h>
271590Srgrimes#include <uapi/asm/mtrr.h>
2827605Scharnier
2950477Speter/* Defines for hardware MTRR registers. */
301590Srgrimes#define MTRR_CAP_VCNT		GENMASK(7, 0)
31162286Sjoel#define MTRR_CAP_FIX		BIT_MASK(8)
321590Srgrimes#define MTRR_CAP_WC		BIT_MASK(10)
3379535Sru
341590Srgrimes#define MTRR_DEF_TYPE_TYPE	GENMASK(7, 0)
351590Srgrimes#define MTRR_DEF_TYPE_FE	BIT_MASK(10)
361590Srgrimes#define MTRR_DEF_TYPE_E		BIT_MASK(11)
371590Srgrimes
3827605Scharnier#define MTRR_DEF_TYPE_ENABLE	(MTRR_DEF_TYPE_FE | MTRR_DEF_TYPE_E)
391590Srgrimes#define MTRR_DEF_TYPE_DISABLE	~(MTRR_DEF_TYPE_TYPE | MTRR_DEF_TYPE_ENABLE)
401590Srgrimes
411590Srgrimes#define MTRR_PHYSBASE_TYPE	GENMASK(7, 0)
421590Srgrimes#define MTRR_PHYSBASE_RSVD	GENMASK(11, 8)
431590Srgrimes
4427605Scharnier#define MTRR_PHYSMASK_RSVD	GENMASK(10, 0)
451590Srgrimes#define MTRR_PHYSMASK_V		BIT_MASK(11)
461590Srgrimes
471590Srgrimesstruct mtrr_state_type {
481590Srgrimes	struct mtrr_var_range var_ranges[MTRR_MAX_VAR_RANGES];
4927605Scharnier	mtrr_type fixed_ranges[MTRR_NUM_FIXED_RANGES];
501590Srgrimes	unsigned char enabled;
51117333Sdannyboy	bool have_fixed;
52117333Sdannyboy	mtrr_type def_type;
53117333Sdannyboy};
541590Srgrimes
55105254Scharnier/*
56105254Scharnier * The following functions are for use by other drivers that cannot use
571590Srgrimes * arch_phys_wc_add and arch_phys_wc_del.
58105254Scharnier */
591590Srgrimes# ifdef CONFIG_MTRR
601590Srgrimesvoid mtrr_bp_init(void);
611590Srgrimesvoid mtrr_overwrite_state(struct mtrr_var_range *var, unsigned int num_var,
621590Srgrimes			  mtrr_type def_type);
631590Srgrimesextern u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform);
64105254Scharnierextern void mtrr_save_fixed_ranges(void *);
651590Srgrimesextern void mtrr_save_state(void);
66131507Sruextern int mtrr_add(unsigned long base, unsigned long size,
671590Srgrimes		    unsigned int type, bool increment);
681590Srgrimesextern int mtrr_add_page(unsigned long base, unsigned long size,
691590Srgrimes			 unsigned int type, bool increment);
7027605Scharnierextern int mtrr_del(int reg, unsigned long base, unsigned long size);
711590Srgrimesextern int mtrr_del_page(int reg, unsigned long base, unsigned long size);
721590Srgrimesextern void mtrr_bp_restore(void);
731590Srgrimesextern int mtrr_trim_uncached_memory(unsigned long end_pfn);
741590Srgrimesextern int amd_special_default_mtrr(void);
751590Srgrimesvoid mtrr_disable(void);
761590Srgrimesvoid mtrr_enable(void);
77156349Syarvoid mtrr_generic_set_state(void);
78156349Syar#  else
79156349Syarstatic inline void mtrr_overwrite_state(struct mtrr_var_range *var,
80156349Syar					unsigned int num_var,
81156349Syar					mtrr_type def_type)
8221942Sdavidn{
8316929Smpp}
8416929Smpp
852224Sguidostatic inline u8 mtrr_type_lookup(u64 addr, u64 end, u8 *uniform)
862224Sguido{
8727605Scharnier	/*
882224Sguido	 * Return the default MTRR type, without any known other types in
892224Sguido	 * that range.
902224Sguido	 */
911590Srgrimes	*uniform = 1;
9227605Scharnier
931590Srgrimes	return MTRR_TYPE_UNCACHABLE;
941590Srgrimes}
951590Srgrimes#define mtrr_save_fixed_ranges(arg) do {} while (0)
96105254Scharnier#define mtrr_save_state() do {} while (0)
971590Srgrimesstatic inline int mtrr_add(unsigned long base, unsigned long size,
981590Srgrimes			   unsigned int type, bool increment)
991590Srgrimes{
1001590Srgrimes    return -ENODEV;
10195124Scharnier}
10295124Scharnierstatic inline int mtrr_add_page(unsigned long base, unsigned long size,
10395124Scharnier				unsigned int type, bool increment)
1041590Srgrimes{
1051590Srgrimes    return -ENODEV;
1061590Srgrimes}
1071590Srgrimesstatic inline int mtrr_del(int reg, unsigned long base, unsigned long size)
10821942Sdavidn{
10921942Sdavidn    return -ENODEV;
11021942Sdavidn}
11121942Sdavidnstatic inline int mtrr_del_page(int reg, unsigned long base, unsigned long size)
11221942Sdavidn{
11321942Sdavidn    return -ENODEV;
1141590Srgrimes}
11551090Ssheldonhstatic inline int mtrr_trim_uncached_memory(unsigned long end_pfn)
11627605Scharnier{
11751275Ssheldonh	return 0;
11851275Ssheldonh}
11951090Ssheldonh#define mtrr_bp_init() do {} while (0)
12051090Ssheldonh#define mtrr_bp_restore() do {} while (0)
121155312Swsalamon#define mtrr_disable() do {} while (0)
122162792Sru#define mtrr_enable() do {} while (0)
123155312Swsalamon#define mtrr_generic_set_state() do {} while (0)
124155312Swsalamon#  endif
125155312Swsalamon
126155312Swsalamon#ifdef CONFIG_COMPAT
127155312Swsalamon#include <linux/compat.h>
1281590Srgrimes
129162792Srustruct mtrr_sentry32 {
1302224Sguido    compat_ulong_t base;    /*  Base address     */
1312224Sguido    compat_uint_t size;    /*  Size of region   */
13221942Sdavidn    compat_uint_t type;     /*  Type of region   */
13321942Sdavidn};
1341590Srgrimes
1351590Srgrimesstruct mtrr_gentry32 {
1361590Srgrimes    compat_ulong_t regnum;   /*  Register number  */
1371590Srgrimes    compat_uint_t base;    /*  Base address     */
1381590Srgrimes    compat_uint_t size;    /*  Size of region   */
1391590Srgrimes    compat_uint_t type;     /*  Type of region   */
140136570Sbrueffer};
141136570Sbrueffer
142136570Sbrueffer#define MTRR_IOCTL_BASE 'M'
143155312Swsalamon
144155312Swsalamon#define MTRRIOC32_ADD_ENTRY      _IOW(MTRR_IOCTL_BASE,  0, struct mtrr_sentry32)
145155312Swsalamon#define MTRRIOC32_SET_ENTRY      _IOW(MTRR_IOCTL_BASE,  1, struct mtrr_sentry32)
146155312Swsalamon#define MTRRIOC32_DEL_ENTRY      _IOW(MTRR_IOCTL_BASE,  2, struct mtrr_sentry32)
1471590Srgrimes#define MTRRIOC32_GET_ENTRY      _IOWR(MTRR_IOCTL_BASE, 3, struct mtrr_gentry32)
1481590Srgrimes#define MTRRIOC32_KILL_ENTRY     _IOW(MTRR_IOCTL_BASE,  4, struct mtrr_sentry32)
14951090Ssheldonh#define MTRRIOC32_ADD_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE,  5, struct mtrr_sentry32)
1501590Srgrimes#define MTRRIOC32_SET_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE,  6, struct mtrr_sentry32)
15151090Ssheldonh#define MTRRIOC32_DEL_PAGE_ENTRY _IOW(MTRR_IOCTL_BASE,  7, struct mtrr_sentry32)
152174105Sphilip#define MTRRIOC32_GET_PAGE_ENTRY _IOWR(MTRR_IOCTL_BASE, 8, struct mtrr_gentry32)
1531590Srgrimes#define MTRRIOC32_KILL_PAGE_ENTRY		\
1541590Srgrimes				 _IOW(MTRR_IOCTL_BASE,  9, struct mtrr_sentry32)
1551590Srgrimes#endif /* CONFIG_COMPAT */
1562224Sguido
15716929Smpp/* Bit fields for enabled in struct mtrr_state_type */
15821942Sdavidn#define MTRR_STATE_SHIFT		10
159162286Sjoel#define MTRR_STATE_MTRR_FIXED_ENABLED	(MTRR_DEF_TYPE_FE >> MTRR_STATE_SHIFT)
1601590Srgrimes#define MTRR_STATE_MTRR_ENABLED		(MTRR_DEF_TYPE_E >> MTRR_STATE_SHIFT)
1611590Srgrimes
16227605Scharnier#endif /* _ASM_X86_MTRR_H */
16327605Scharnier