1/*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * All advertising materials mentioning features or use of this software 12 * must display the following acknowledgement: 13 * This product includes software developed by the University of 14 * California, Lawrence Berkeley Laboratory. 15 * 16 * Redistribution and use in source and binary forms, with or without 17 * modification, are permitted provided that the following conditions 18 * are met: 19 * 1. Redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer. 21 * 2. Redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution. 24 * 3. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * @(#)fpu_compare.c 8.1 (Berkeley) 6/11/93 41 * $NetBSD: fpu_compare.c,v 1.3 2001/08/26 05:46:31 eeh Exp $ 42 */ 43 44#include <sys/cdefs.h> 45 46/* 47 * CMP and CMPE instructions. 48 * 49 * These rely on the fact that our internal wide format is achieved by 50 * adding zero bits to the end of narrower mantissas. 51 */ 52 53#include <sys/types.h> 54 55#include "fsr.h" 56 57#include "fpu_arith.h" 58#include "fpu_emu.h" 59#include "fpu_extern.h" 60 61static u_long fcc_nmask[] = { 62 ~FSR_FCC0_MASK, 63 ~FSR_FCC1_MASK, 64 ~FSR_FCC2_MASK, 65 ~FSR_FCC3_MASK 66}; 67 68/* XXX: we don't use the FSR_FCCx macros here; it's much easier this way. */ 69static int fcc_shift[] = { 70 FSR_FCC0_SHIFT, 71 FSR_FCC1_SHIFT, 72 FSR_FCC2_SHIFT, 73 FSR_FCC3_SHIFT 74}; 75 76/* 77 * Perform a compare instruction (with or without unordered exception). 78 * This updates the fcc field in the fsr. 79 * 80 * If either operand is NaN, the result is unordered. For cmpe, this 81 * causes an NV exception. Everything else is ordered: 82 * |Inf| > |numbers| > |0|. 83 * We already arranged for fp_class(Inf) > fp_class(numbers) > fp_class(0), 84 * so we get this directly. Note, however, that two zeros compare equal 85 * regardless of sign, while everything else depends on sign. 86 * 87 * Incidentally, two Infs of the same sign compare equal (per the 80387 88 * manual---it would be nice if the SPARC documentation were more 89 * complete). 90 */ 91void 92__fpu_compare(struct fpemu *fe, int cmpe, int fcc) 93{ 94 struct fpn *a, *b; 95 int cc; 96 FPU_DECL_CARRY 97 98 a = &fe->fe_f1; 99 b = &fe->fe_f2; 100 101 if (ISNAN(a) || ISNAN(b)) { 102 /* 103 * In any case, we already got an exception for signalling 104 * NaNs; here we may replace that one with an identical 105 * exception, but so what?. 106 */ 107 if (cmpe) 108 fe->fe_cx = FSR_NV; 109 cc = FSR_CC_UO; 110 goto done; 111 } 112 113 /* 114 * Must handle both-zero early to avoid sign goofs. Otherwise, 115 * at most one is 0, and if the signs differ we are done. 116 */ 117 if (ISZERO(a) && ISZERO(b)) { 118 cc = FSR_CC_EQ; 119 goto done; 120 } 121 if (a->fp_sign) { /* a < 0 (or -0) */ 122 if (!b->fp_sign) { /* b >= 0 (or if a = -0, b > 0) */ 123 cc = FSR_CC_LT; 124 goto done; 125 } 126 } else { /* a > 0 (or +0) */ 127 if (b->fp_sign) { /* b <= -0 (or if a = +0, b < 0) */ 128 cc = FSR_CC_GT; 129 goto done; 130 } 131 } 132 133 /* 134 * Now the signs are the same (but may both be negative). All 135 * we have left are these cases: 136 * 137 * |a| < |b| [classes or values differ] 138 * |a| > |b| [classes or values differ] 139 * |a| == |b| [classes and values identical] 140 * 141 * We define `diff' here to expand these as: 142 * 143 * |a| < |b|, a,b >= 0: a < b => FSR_CC_LT 144 * |a| < |b|, a,b < 0: a > b => FSR_CC_GT 145 * |a| > |b|, a,b >= 0: a > b => FSR_CC_GT 146 * |a| > |b|, a,b < 0: a < b => FSR_CC_LT 147 */ 148#define opposite_cc(cc) ((cc) == FSR_CC_LT ? FSR_CC_GT : FSR_CC_LT) 149#define diff(magnitude) (a->fp_sign ? opposite_cc(magnitude) : (magnitude)) 150 if (a->fp_class < b->fp_class) { /* |a| < |b| */ 151 cc = diff(FSR_CC_LT); 152 goto done; 153 } 154 if (a->fp_class > b->fp_class) { /* |a| > |b| */ 155 cc = diff(FSR_CC_GT); 156 goto done; 157 } 158 /* now none can be 0: only Inf and numbers remain */ 159 if (ISINF(a)) { /* |Inf| = |Inf| */ 160 cc = FSR_CC_EQ; 161 goto done; 162 } 163 /* 164 * Only numbers remain. To compare two numbers in magnitude, we 165 * simply subtract them. 166 */ 167 a = __fpu_sub(fe); 168 if (a->fp_class == FPC_ZERO) 169 cc = FSR_CC_EQ; 170 else 171 cc = diff(FSR_CC_GT); 172 173done: 174 fe->fe_fsr = (fe->fe_fsr & fcc_nmask[fcc]) | 175 ((u_long)cc << fcc_shift[fcc]); 176} 177