1/*-
2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD$");
29
30#include "opt_wlan.h"
31
32#include <sys/param.h>
33#include <sys/lock.h>
34#include <sys/mutex.h>
35#include <sys/mbuf.h>
36#include <sys/kernel.h>
37#include <sys/socket.h>
38#include <sys/systm.h>
39#include <sys/malloc.h>
40#include <sys/queue.h>
41#include <sys/taskqueue.h>
42#include <sys/bus.h>
43#include <sys/endian.h>
44#include <sys/linker.h>
45
46#include <net/if.h>
47#include <net/ethernet.h>
48#include <net/if_media.h>
49
50#include <net80211/ieee80211_var.h>
51#include <net80211/ieee80211_radiotap.h>
52
53#include <dev/rtwn/if_rtwnreg.h>
54#include <dev/rtwn/if_rtwnvar.h>
55
56#include <dev/rtwn/if_rtwn_debug.h>
57
58#include <dev/rtwn/rtl8812a/r12a.h>
59#include <dev/rtwn/rtl8812a/r12a_var.h>
60#include <dev/rtwn/rtl8812a/r12a_rom_image.h>
61
62void
63r12a_parse_rom_common(struct rtwn_softc *sc, uint8_t *buf)
64{
65	struct r12a_softc *rs = sc->sc_priv;
66	struct r12a_rom *rom = (struct r12a_rom *)buf;
67	int i, j, k;
68
69	sc->thermal_meter = rom->thermal_meter;
70	rs->crystalcap = RTWN_GET_ROM_VAR(rom->crystalcap,
71	    R12A_ROM_CRYSTALCAP_DEF);
72	rs->tx_bbswing_2g = RTWN_GET_ROM_VAR(rom->tx_bbswing_2g, 0);
73	rs->tx_bbswing_5g = RTWN_GET_ROM_VAR(rom->tx_bbswing_5g, 0);
74
75	for (i = 0; i < sc->ntxchains; i++) {
76		struct r12a_tx_pwr_2g *pwr_2g = &rom->tx_pwr[i].pwr_2g;
77		struct r12a_tx_pwr_5g *pwr_5g = &rom->tx_pwr[i].pwr_5g;
78		struct r12a_tx_pwr_diff_2g *pwr_diff_2g =
79		    &rom->tx_pwr[i].pwr_diff_2g;
80		struct r12a_tx_pwr_diff_5g *pwr_diff_5g =
81		    &rom->tx_pwr[i].pwr_diff_5g;
82
83		for (j = 0; j < R12A_GROUP_2G - 1; j++) {
84			rs->cck_tx_pwr[i][j] =
85			    RTWN_GET_ROM_VAR(pwr_2g->cck[j],
86				R12A_DEF_TX_PWR_2G);
87			rs->ht40_tx_pwr_2g[i][j] =
88			    RTWN_GET_ROM_VAR(pwr_2g->ht40[j],
89				R12A_DEF_TX_PWR_2G);
90		}
91		rs->cck_tx_pwr[i][j] = RTWN_GET_ROM_VAR(pwr_2g->cck[j],
92		    R12A_DEF_TX_PWR_2G);
93
94		rs->cck_tx_pwr_diff_2g[i][0] = 0;
95		rs->ofdm_tx_pwr_diff_2g[i][0] = RTWN_SIGN4TO8(
96		    MS(pwr_diff_2g->ht20_ofdm, LOW_PART));
97		rs->bw20_tx_pwr_diff_2g[i][0] = RTWN_SIGN4TO8(
98		    MS(pwr_diff_2g->ht20_ofdm, HIGH_PART));
99		rs->bw40_tx_pwr_diff_2g[i][0] = 0;
100
101		for (j = 1, k = 0; k < nitems(pwr_diff_2g->diff123); j++, k++) {
102			rs->cck_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8(
103			    MS(pwr_diff_2g->diff123[k].ofdm_cck, LOW_PART));
104			rs->ofdm_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8(
105			    MS(pwr_diff_2g->diff123[k].ofdm_cck, HIGH_PART));
106			rs->bw20_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8(
107			    MS(pwr_diff_2g->diff123[k].ht40_ht20, LOW_PART));
108			rs->bw40_tx_pwr_diff_2g[i][j] = RTWN_SIGN4TO8(
109			    MS(pwr_diff_2g->diff123[k].ht40_ht20, HIGH_PART));
110		}
111
112		for (j = 0; j < R12A_GROUP_5G; j++) {
113			rs->ht40_tx_pwr_5g[i][j] =
114			    RTWN_GET_ROM_VAR(pwr_5g->ht40[j],
115				R12A_DEF_TX_PWR_5G);
116		}
117
118		rs->ofdm_tx_pwr_diff_5g[i][0] = RTWN_SIGN4TO8(
119		    MS(pwr_diff_5g->ht20_ofdm, LOW_PART));
120		rs->ofdm_tx_pwr_diff_5g[i][1] = RTWN_SIGN4TO8(
121		    MS(pwr_diff_5g->ofdm_ofdm[0], HIGH_PART));
122		rs->ofdm_tx_pwr_diff_5g[i][2] = RTWN_SIGN4TO8(
123		    MS(pwr_diff_5g->ofdm_ofdm[0], LOW_PART));
124		rs->ofdm_tx_pwr_diff_5g[i][3] = RTWN_SIGN4TO8(
125		    MS(pwr_diff_5g->ofdm_ofdm[1], LOW_PART));
126
127		rs->bw20_tx_pwr_diff_5g[i][0] = RTWN_SIGN4TO8(
128		    MS(pwr_diff_5g->ht20_ofdm, HIGH_PART));
129		rs->bw40_tx_pwr_diff_5g[i][0] = 0;
130		for (j = 1, k = 0; k < nitems(pwr_diff_5g->ht40_ht20);
131		    j++, k++) {
132			rs->bw20_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8(
133			    MS(pwr_diff_5g->ht40_ht20[k], LOW_PART));
134			rs->bw40_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8(
135			    MS(pwr_diff_5g->ht40_ht20[k], HIGH_PART));
136		}
137
138		for (j = 0; j < nitems(pwr_diff_5g->ht80_ht160); j++) {
139			rs->bw80_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8(
140			    MS(pwr_diff_5g->ht80_ht160[j], HIGH_PART));
141			rs->bw160_tx_pwr_diff_5g[i][j] = RTWN_SIGN4TO8(
142			    MS(pwr_diff_5g->ht80_ht160[j], LOW_PART));
143		}
144	}
145
146	rs->regulatory = MS(rom->rf_board_opt, R92C_ROM_RF1_REGULATORY);
147	rs->board_type =
148	    MS(RTWN_GET_ROM_VAR(rom->rf_board_opt, R92C_BOARD_TYPE_DONGLE),
149		R92C_ROM_RF1_BOARD_TYPE);
150	RTWN_DPRINTF(sc, RTWN_DEBUG_ROM, "%s: regulatory type=%d\n",
151	    __func__, rs->regulatory);
152}
153
154void
155r12a_parse_rom(struct rtwn_softc *sc, uint8_t *buf)
156{
157	struct r12a_softc *rs = sc->sc_priv;
158	struct r12a_rom *rom = (struct r12a_rom *)buf;
159	uint8_t pa_type, lna_type_2g, lna_type_5g;
160
161	/* Read PA/LNA types. */
162	pa_type = RTWN_GET_ROM_VAR(rom->pa_type, 0);
163	lna_type_2g = RTWN_GET_ROM_VAR(rom->lna_type_2g, 0);
164	lna_type_5g = RTWN_GET_ROM_VAR(rom->lna_type_5g, 0);
165
166	rs->ext_pa_2g = R12A_ROM_IS_PA_EXT_2GHZ(pa_type);
167	rs->ext_pa_5g = R12A_ROM_IS_PA_EXT_5GHZ(pa_type);
168	rs->ext_lna_2g = R21A_ROM_IS_LNA_EXT(lna_type_2g);
169	rs->ext_lna_5g = R21A_ROM_IS_LNA_EXT(lna_type_5g);
170	rs->bt_coex = (MS(rom->rf_board_opt, R92C_ROM_RF1_BOARD_TYPE) ==
171	    R92C_BOARD_TYPE_HIGHPA);
172	rs->bt_ant_num = (rom->rf_bt_opt & R12A_RF_BT_OPT_ANT_NUM);
173
174	if (rs->ext_pa_2g) {
175		rs->type_pa_2g =
176		    R12A_GET_ROM_PA_TYPE(lna_type_2g, 0) |
177		    (R12A_GET_ROM_PA_TYPE(lna_type_2g, 1) << 2);
178	}
179	if (rs->ext_pa_5g) {
180		rs->type_pa_5g =
181		    R12A_GET_ROM_PA_TYPE(lna_type_5g, 0) |
182		    (R12A_GET_ROM_PA_TYPE(lna_type_5g, 1) << 2);
183	}
184	if (rs->ext_lna_2g) {
185		rs->type_lna_2g =
186		    R12A_GET_ROM_LNA_TYPE(lna_type_2g, 0) |
187		    (R12A_GET_ROM_LNA_TYPE(lna_type_2g, 1) << 2);
188	}
189	if (rs->ext_lna_5g) {
190		rs->type_lna_5g =
191		    R12A_GET_ROM_LNA_TYPE(lna_type_5g, 0) |
192		    (R12A_GET_ROM_LNA_TYPE(lna_type_5g, 1) << 2);
193	}
194
195	if (rom->rfe_option & 0x80) {
196		if (rs->ext_lna_5g) {
197			if (rs->ext_pa_5g) {
198				if (rs->ext_pa_2g && rs->ext_lna_2g)
199					rs->rfe_type = 3;
200				else
201					rs->rfe_type = 0;
202			} else
203				rs->rfe_type = 2;
204		} else
205			rs->rfe_type = 4;
206	} else {
207		rs->rfe_type = rom->rfe_option & 0x3f;
208
209		/* workaround for incorrect EFUSE map */
210		if (rs->rfe_type == 4 &&
211		    rs->ext_pa_2g && rs->ext_lna_2g &&
212		    rs->ext_pa_5g && rs->ext_lna_5g)
213			rs->rfe_type = 0;
214	}
215
216	/* Read MAC address. */
217	IEEE80211_ADDR_COPY(sc->sc_ic.ic_macaddr, rom->macaddr_12a);
218
219	/* Execute common part of initialization. */
220	r12a_parse_rom_common(sc, buf);
221}
222