1/*-
2 * Copyright (c) 2010 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2015-2016 Andriy Voskoboinyk <avos@FreeBSD.org>
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $OpenBSD: if_urtwnreg.h,v 1.3 2010/11/16 18:02:59 damien Exp $
18 * $FreeBSD$
19 */
20
21#ifndef R92C_VAR_H
22#define R92C_VAR_H
23
24#include <dev/rtwn/rtl8192c/r92c_rom_defs.h>
25
26struct r92c_softc {
27	uint8_t		rs_flags;
28#define R92C_FLAG_ASSOCIATED	0x01
29
30	uint8_t		chip;
31#define R92C_CHIP_92C		0x01
32#define R92C_CHIP_92C_1T2R	0x02
33#define R92C_CHIP_UMC_A_CUT	0x04
34
35#ifndef RTWN_WITHOUT_UCODE
36	struct callout	rs_c2h_report;
37	int		rs_c2h_timeout;
38	int		rs_c2h_pending;
39	int		rs_c2h_paused;
40#endif
41#define R92C_TX_PAUSED_THRESHOLD	20
42
43	void		*rs_txpwr;
44	const void	*rs_txagc;
45
46	uint8_t		board_type;
47	uint8_t		regulatory;
48	uint8_t		crystalcap;
49	uint8_t		pa_setting;
50
51	void		(*rs_scan_start)(struct ieee80211com *);
52	void		(*rs_scan_end)(struct ieee80211com *);
53
54	void		(*rs_set_bw20)(struct rtwn_softc *, uint8_t);
55	void		(*rs_get_txpower)(struct rtwn_softc *, int,
56			    struct ieee80211_channel *, uint8_t[]);
57	void		(*rs_set_gain)(struct rtwn_softc *, uint8_t);
58	void		(*rs_tx_enable_ampdu)(void *, int);
59	void		(*rs_tx_setup_hwseq)(void *);
60	void		(*rs_tx_setup_macid)(void *, int);
61	void		(*rs_set_rom_opts)(struct rtwn_softc *, uint8_t *);
62
63	int		rf_read_delay[3];
64	uint32_t	rf_chnlbw[R92C_MAX_CHAINS];
65};
66#define R92C_SOFTC(_sc)	((struct r92c_softc *)((_sc)->sc_priv))
67
68#define rtwn_r92c_set_bw20(_sc, _chan) \
69	((R92C_SOFTC(_sc)->rs_set_bw20)((_sc), (_chan)))
70#define rtwn_r92c_get_txpower(_sc, _chain, _c, _power) \
71	((R92C_SOFTC(_sc)->rs_get_txpower)((_sc), (_chain), (_c), (_power)))
72#define rtwn_r92c_set_gain(_sc, _gain) \
73	((R92C_SOFTC(_sc)->rs_set_gain)((_sc), (_gain)))
74#define rtwn_r92c_tx_enable_ampdu(_sc, _buf, _enable) \
75	((R92C_SOFTC(_sc)->rs_tx_enable_ampdu)((_buf), (_enable)))
76#define rtwn_r92c_tx_setup_hwseq(_sc, _buf) \
77	((R92C_SOFTC(_sc)->rs_tx_setup_hwseq)((_buf)))
78#define rtwn_r92c_tx_setup_macid(_sc, _buf, _id) \
79	((R92C_SOFTC(_sc)->rs_tx_setup_macid)((_buf), (_id)))
80#define rtwn_r92c_set_rom_opts(_sc, _buf) \
81	((R92C_SOFTC(_sc)->rs_set_rom_opts)((_sc), (_buf)))
82
83#endif	/* R92C_VAR_H */
84