1/*- 2 * SPDX-License-Identifier: ISC 3 * 4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting 5 * Copyright (c) 2002-2008 Atheros Communications, Inc. 6 * 7 * Permission to use, copy, modify, and/or distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 * 19 * $FreeBSD: releng/12.0/sys/dev/ath/ath_hal/ar5416/ar5416_cal_adcgain.c 326695 2017-12-08 15:57:29Z pfg $ 20 */ 21#include "opt_ah.h" 22 23#include "ah.h" 24#include "ah_internal.h" 25#include "ah_devid.h" 26 27#include "ar5416/ar5416.h" 28#include "ar5416/ar5416reg.h" 29#include "ar5416/ar5416phy.h" 30 31/* Adc Gain Cal aliases */ 32#define totalAdcIOddPhase(i) caldata[0][i].u 33#define totalAdcIEvenPhase(i) caldata[1][i].u 34#define totalAdcQOddPhase(i) caldata[2][i].u 35#define totalAdcQEvenPhase(i) caldata[3][i].u 36 37/* 38 * Collect data from HW to later perform ADC Gain Calibration 39 */ 40void 41ar5416AdcGainCalCollect(struct ath_hal *ah) 42{ 43 struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; 44 int i; 45 46 /* 47 * Accumulate ADC Gain cal measures for active chains 48 */ 49 for (i = 0; i < AR5416_MAX_CHAINS; i++) { 50 cal->totalAdcIOddPhase(i) += 51 OS_REG_READ(ah, AR_PHY_CAL_MEAS_0(i)); 52 cal->totalAdcIEvenPhase(i) += 53 OS_REG_READ(ah, AR_PHY_CAL_MEAS_1(i)); 54 cal->totalAdcQOddPhase(i) += 55 OS_REG_READ(ah, AR_PHY_CAL_MEAS_2(i)); 56 cal->totalAdcQEvenPhase(i) += 57 OS_REG_READ(ah, AR_PHY_CAL_MEAS_3(i)); 58 59 HALDEBUG(ah, HAL_DEBUG_PERCAL, 60 "%d: Chn %d oddi=0x%08x; eveni=0x%08x; oddq=0x%08x; evenq=0x%08x;\n", 61 cal->calSamples, i, cal->totalAdcIOddPhase(i), 62 cal->totalAdcIEvenPhase(i), cal->totalAdcQOddPhase(i), 63 cal->totalAdcQEvenPhase(i)); 64 } 65} 66 67/* 68 * Use HW data to do ADC Gain Calibration 69 */ 70void 71ar5416AdcGainCalibration(struct ath_hal *ah, uint8_t numChains) 72{ 73 struct ar5416PerCal *cal = &AH5416(ah)->ah_cal; 74 uint32_t i; 75 76 for (i = 0; i < numChains; i++) { 77 uint32_t iOddMeasOffset = cal->totalAdcIOddPhase(i); 78 uint32_t iEvenMeasOffset = cal->totalAdcIEvenPhase(i); 79 uint32_t qOddMeasOffset = cal->totalAdcQOddPhase(i); 80 uint32_t qEvenMeasOffset = cal->totalAdcQEvenPhase(i); 81 82 HALDEBUG(ah, HAL_DEBUG_PERCAL, 83 "Start ADC Gain Cal for Chain %d\n", i); 84 HALDEBUG(ah, HAL_DEBUG_PERCAL, 85 " pwr_meas_odd_i = 0x%08x\n", iOddMeasOffset); 86 HALDEBUG(ah, HAL_DEBUG_PERCAL, 87 " pwr_meas_even_i = 0x%08x\n", iEvenMeasOffset); 88 HALDEBUG(ah, HAL_DEBUG_PERCAL, 89 " pwr_meas_odd_q = 0x%08x\n", qOddMeasOffset); 90 HALDEBUG(ah, HAL_DEBUG_PERCAL, 91 " pwr_meas_even_q = 0x%08x\n", qEvenMeasOffset); 92 93 if (iOddMeasOffset != 0 && qEvenMeasOffset != 0) { 94 uint32_t iGainMismatch = 95 ((iEvenMeasOffset*32)/iOddMeasOffset) & 0x3f; 96 uint32_t qGainMismatch = 97 ((qOddMeasOffset*32)/qEvenMeasOffset) & 0x3f; 98 uint32_t val; 99 100 HALDEBUG(ah, HAL_DEBUG_PERCAL, 101 " gain_mismatch_i = 0x%08x\n", 102 iGainMismatch); 103 HALDEBUG(ah, HAL_DEBUG_PERCAL, 104 " gain_mismatch_q = 0x%08x\n", 105 qGainMismatch); 106 107 val = OS_REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i)); 108 val &= 0xfffff000; 109 val |= (qGainMismatch) | (iGainMismatch << 6); 110 OS_REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val); 111 112 HALDEBUG(ah, HAL_DEBUG_PERCAL, 113 "ADC Gain Cal done for Chain %d\n", i); 114 } 115 } 116 OS_REG_SET_BIT(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0), 117 AR_PHY_NEW_ADC_GAIN_CORR_ENABLE); 118} 119