1/*
2 * Copyright 2014, Pawe�� Dziepak, pdziepak@quarnos.org.
3 * Distributed under the terms of the MIT License.
4 *
5 * Authors:
6 *		Fran��ois Revol <revol@free.fr>
7 */
8#ifndef _KERNEL_ARCH_RISCV64_ATOMIC_H
9#define _KERNEL_ARCH_RISCV64_ATOMIC_H
10
11
12static inline void
13memory_read_barrier_inline(void)
14{
15	asm volatile("fence ir, ir" : : : "memory");
16}
17
18
19static inline void
20memory_write_barrier_inline(void)
21{
22	asm volatile("fence ow, ow" : : : "memory");
23}
24
25
26static inline void
27memory_full_barrier_inline(void)
28{
29	asm volatile("fence iorw, iorw" : : : "memory");
30}
31
32
33#define memory_read_barrier memory_read_barrier_inline
34#define memory_write_barrier memory_write_barrier_inline
35#define memory_full_barrier memory_full_barrier_inline
36
37
38#endif	// _KERNEL_ARCH_RISCV64_ATOMIC_H
39