1/* 2 * Copyright 2008 Advanced Micro Devices, Inc. 3 * Copyright 2008 Red Hat Inc. 4 * Copyright 2009 Jerome Glisse. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: Dave Airlie 25 * Alex Deucher 26 * Jerome Glisse 27 */ 28#ifndef __R500_REG_H__ 29#define __R500_REG_H__ 30 31 32/* pipe config regs */ 33#define R300_GA_POLY_MODE 0x4288 34# define R300_FRONT_PTYPE_POINT (0 << 4) 35# define R300_FRONT_PTYPE_LINE (1 << 4) 36# define R300_FRONT_PTYPE_TRIANGE (2 << 4) 37# define R300_BACK_PTYPE_POINT (0 << 7) 38# define R300_BACK_PTYPE_LINE (1 << 7) 39# define R300_BACK_PTYPE_TRIANGE (2 << 7) 40#define R300_GA_ROUND_MODE 0x428c 41# define R300_GEOMETRY_ROUND_TRUNC (0 << 0) 42# define R300_GEOMETRY_ROUND_NEAREST (1 << 0) 43# define R300_COLOR_ROUND_TRUNC (0 << 2) 44# define R300_COLOR_ROUND_NEAREST (1 << 2) 45#define R300_GB_MSPOS0 0x4010 46# define R300_MS_X0_SHIFT 0 47# define R300_MS_Y0_SHIFT 4 48# define R300_MS_X1_SHIFT 8 49# define R300_MS_Y1_SHIFT 12 50# define R300_MS_X2_SHIFT 16 51# define R300_MS_Y2_SHIFT 20 52# define R300_MSBD0_Y_SHIFT 24 53# define R300_MSBD0_X_SHIFT 28 54#define R300_GB_MSPOS1 0x4014 55# define R300_MS_X3_SHIFT 0 56# define R300_MS_Y3_SHIFT 4 57# define R300_MS_X4_SHIFT 8 58# define R300_MS_Y4_SHIFT 12 59# define R300_MS_X5_SHIFT 16 60# define R300_MS_Y5_SHIFT 20 61# define R300_MSBD1_SHIFT 24 62 63#define R300_GA_ENHANCE 0x4274 64# define R300_GA_DEADLOCK_CNTL (1 << 0) 65# define R300_GA_FASTSYNC_CNTL (1 << 1) 66#define R300_RB3D_DSTCACHE_CTLSTAT 0x4e4c 67# define R300_RB3D_DC_FLUSH (2 << 0) 68# define R300_RB3D_DC_FREE (2 << 2) 69# define R300_RB3D_DC_FINISH (1 << 4) 70#define R300_RB3D_ZCACHE_CTLSTAT 0x4f18 71# define R300_ZC_FLUSH (1 << 0) 72# define R300_ZC_FREE (1 << 1) 73# define R300_ZC_FLUSH_ALL 0x3 74#define R400_GB_PIPE_SELECT 0x402c 75#define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */ 76#define R500_SU_REG_DEST 0x42c8 77#define R300_GB_TILE_CONFIG 0x4018 78# define R300_ENABLE_TILING (1 << 0) 79# define R300_PIPE_COUNT_RV350 (0 << 1) 80# define R300_PIPE_COUNT_R300 (3 << 1) 81# define R300_PIPE_COUNT_R420_3P (6 << 1) 82# define R300_PIPE_COUNT_R420 (7 << 1) 83# define R300_TILE_SIZE_8 (0 << 4) 84# define R300_TILE_SIZE_16 (1 << 4) 85# define R300_TILE_SIZE_32 (2 << 4) 86# define R300_SUBPIXEL_1_12 (0 << 16) 87# define R300_SUBPIXEL_1_16 (1 << 16) 88#define R300_DST_PIPE_CONFIG 0x170c 89# define R300_PIPE_AUTO_CONFIG (1 << 31) 90#define R300_RB2D_DSTCACHE_MODE 0x3428 91# define R300_DC_AUTOFLUSH_ENABLE (1 << 8) 92# define R300_DC_DC_DISABLE_IGNORE_PE (1 << 17) 93 94#define RADEON_CP_STAT 0x7C0 95#define RADEON_RBBM_CMDFIFO_ADDR 0xE70 96#define RADEON_RBBM_CMDFIFO_DATA 0xE74 97#define RADEON_ISYNC_CNTL 0x1724 98# define RADEON_ISYNC_ANY2D_IDLE3D (1 << 0) 99# define RADEON_ISYNC_ANY3D_IDLE2D (1 << 1) 100# define RADEON_ISYNC_TRIG2D_IDLE3D (1 << 2) 101# define RADEON_ISYNC_TRIG3D_IDLE2D (1 << 3) 102# define RADEON_ISYNC_WAIT_IDLEGUI (1 << 4) 103# define RADEON_ISYNC_CPSCRATCH_IDLEGUI (1 << 5) 104 105#define RS480_NB_MC_INDEX 0x168 106# define RS480_NB_MC_IND_WR_EN (1 << 8) 107#define RS480_NB_MC_DATA 0x16c 108 109/* 110 * RS690 111 */ 112#define RS690_MCCFG_FB_LOCATION 0x100 113#define RS690_MC_FB_START_MASK 0x0000FFFF 114#define RS690_MC_FB_START_SHIFT 0 115#define RS690_MC_FB_TOP_MASK 0xFFFF0000 116#define RS690_MC_FB_TOP_SHIFT 16 117#define RS690_MCCFG_AGP_LOCATION 0x101 118#define RS690_MC_AGP_START_MASK 0x0000FFFF 119#define RS690_MC_AGP_START_SHIFT 0 120#define RS690_MC_AGP_TOP_MASK 0xFFFF0000 121#define RS690_MC_AGP_TOP_SHIFT 16 122#define RS690_MCCFG_AGP_BASE 0x102 123#define RS690_MCCFG_AGP_BASE_2 0x103 124#define RS690_MC_INIT_MISC_LAT_TIMER 0x104 125#define RS690_HDP_FB_LOCATION 0x0134 126#define RS690_MC_INDEX 0x78 127# define RS690_MC_INDEX_MASK 0x1ff 128# define RS690_MC_INDEX_WR_EN (1 << 9) 129# define RS690_MC_INDEX_WR_ACK 0x7f 130#define RS690_MC_DATA 0x7c 131#define RS690_MC_STATUS 0x90 132#define RS690_MC_STATUS_IDLE (1 << 0) 133#define RS480_AGP_BASE_2 0x0164 134#define RS480_MC_MISC_CNTL 0x18 135# define RS480_DISABLE_GTW (1 << 1) 136# define RS480_GART_INDEX_REG_EN (1 << 12) 137# define RS690_BLOCK_GFX_D3_EN (1 << 14) 138#define RS480_GART_FEATURE_ID 0x2b 139# define RS480_HANG_EN (1 << 11) 140# define RS480_TLB_ENABLE (1 << 18) 141# define RS480_P2P_ENABLE (1 << 19) 142# define RS480_GTW_LAC_EN (1 << 25) 143# define RS480_2LEVEL_GART (0 << 30) 144# define RS480_1LEVEL_GART (1 << 30) 145# define RS480_PDC_EN (1 << 31) 146#define RS480_GART_BASE 0x2c 147#define RS480_GART_CACHE_CNTRL 0x2e 148# define RS480_GART_CACHE_INVALIDATE (1 << 0) /* wait for it to clear */ 149#define RS480_AGP_ADDRESS_SPACE_SIZE 0x38 150# define RS480_GART_EN (1 << 0) 151# define RS480_VA_SIZE_32MB (0 << 1) 152# define RS480_VA_SIZE_64MB (1 << 1) 153# define RS480_VA_SIZE_128MB (2 << 1) 154# define RS480_VA_SIZE_256MB (3 << 1) 155# define RS480_VA_SIZE_512MB (4 << 1) 156# define RS480_VA_SIZE_1GB (5 << 1) 157# define RS480_VA_SIZE_2GB (6 << 1) 158#define RS480_AGP_MODE_CNTL 0x39 159# define RS480_POST_GART_Q_SIZE (1 << 18) 160# define RS480_NONGART_SNOOP (1 << 19) 161# define RS480_AGP_RD_BUF_SIZE (1 << 20) 162# define RS480_REQ_TYPE_SNOOP_SHIFT 22 163# define RS480_REQ_TYPE_SNOOP_MASK 0x3 164# define RS480_REQ_TYPE_SNOOP_DIS (1 << 24) 165 166#define RS690_AIC_CTRL_SCRATCH 0x3A 167# define RS690_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) 168 169/* 170 * RS600 171 */ 172#define RS600_MC_STATUS 0x0 173#define RS600_MC_STATUS_IDLE (1 << 0) 174#define RS600_MC_INDEX 0x70 175# define RS600_MC_ADDR_MASK 0xffff 176# define RS600_MC_IND_SEQ_RBS_0 (1 << 16) 177# define RS600_MC_IND_SEQ_RBS_1 (1 << 17) 178# define RS600_MC_IND_SEQ_RBS_2 (1 << 18) 179# define RS600_MC_IND_SEQ_RBS_3 (1 << 19) 180# define RS600_MC_IND_AIC_RBS (1 << 20) 181# define RS600_MC_IND_CITF_ARB0 (1 << 21) 182# define RS600_MC_IND_CITF_ARB1 (1 << 22) 183# define RS600_MC_IND_WR_EN (1 << 23) 184#define RS600_MC_DATA 0x74 185#define RS600_MC_STATUS 0x0 186# define RS600_MC_IDLE (1 << 1) 187#define RS600_MC_FB_LOCATION 0x4 188#define RS600_MC_FB_START_MASK 0x0000FFFF 189#define RS600_MC_FB_START_SHIFT 0 190#define RS600_MC_FB_TOP_MASK 0xFFFF0000 191#define RS600_MC_FB_TOP_SHIFT 16 192#define RS600_MC_AGP_LOCATION 0x5 193#define RS600_MC_AGP_START_MASK 0x0000FFFF 194#define RS600_MC_AGP_START_SHIFT 0 195#define RS600_MC_AGP_TOP_MASK 0xFFFF0000 196#define RS600_MC_AGP_TOP_SHIFT 16 197#define RS600_MC_AGP_BASE 0x6 198#define RS600_MC_AGP_BASE_2 0x7 199#define RS600_MC_CNTL1 0x9 200# define RS600_ENABLE_PAGE_TABLES (1 << 26) 201#define RS600_MC_PT0_CNTL 0x100 202# define RS600_ENABLE_PT (1 << 0) 203# define RS600_EFFECTIVE_L2_CACHE_SIZE(x) ((x) << 15) 204# define RS600_EFFECTIVE_L2_QUEUE_SIZE(x) ((x) << 21) 205# define RS600_INVALIDATE_ALL_L1_TLBS (1 << 28) 206# define RS600_INVALIDATE_L2_CACHE (1 << 29) 207#define RS600_MC_PT0_CONTEXT0_CNTL 0x102 208# define RS600_ENABLE_PAGE_TABLE (1 << 0) 209# define RS600_PAGE_TABLE_TYPE_FLAT (0 << 1) 210#define RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR 0x112 211#define RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR 0x114 212#define RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR 0x11c 213#define RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR 0x12c 214#define RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR 0x13c 215#define RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR 0x14c 216#define RS600_MC_PT0_CLIENT0_CNTL 0x16c 217# define RS600_ENABLE_TRANSLATION_MODE_OVERRIDE (1 << 0) 218# define RS600_TRANSLATION_MODE_OVERRIDE (1 << 1) 219# define RS600_SYSTEM_ACCESS_MODE_MASK (3 << 8) 220# define RS600_SYSTEM_ACCESS_MODE_PA_ONLY (0 << 8) 221# define RS600_SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 8) 222# define RS600_SYSTEM_ACCESS_MODE_IN_SYS (2 << 8) 223# define RS600_SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 8) 224# define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH (0 << 10) 225# define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE (1 << 10) 226# define RS600_EFFECTIVE_L1_CACHE_SIZE(x) ((x) << 11) 227# define RS600_ENABLE_FRAGMENT_PROCESSING (1 << 14) 228# define RS600_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15) 229# define RS600_INVALIDATE_L1_TLB (1 << 20) 230/* rs600/rs690/rs740 */ 231# define RS600_BUS_MASTER_DIS (1 << 14) 232# define RS600_MSI_REARM (1 << 20) 233/* see RS400_MSI_REARM in AIC_CNTL for rs480 */ 234 235 236 237#define RV515_MC_FB_LOCATION 0x01 238#define RV515_MC_FB_START_MASK 0x0000FFFF 239#define RV515_MC_FB_START_SHIFT 0 240#define RV515_MC_FB_TOP_MASK 0xFFFF0000 241#define RV515_MC_FB_TOP_SHIFT 16 242#define RV515_MC_AGP_LOCATION 0x02 243#define RV515_MC_AGP_START_MASK 0x0000FFFF 244#define RV515_MC_AGP_START_SHIFT 0 245#define RV515_MC_AGP_TOP_MASK 0xFFFF0000 246#define RV515_MC_AGP_TOP_SHIFT 16 247#define RV515_MC_AGP_BASE 0x03 248#define RV515_MC_AGP_BASE_2 0x04 249 250#define R520_MC_FB_LOCATION 0x04 251#define R520_MC_FB_START_MASK 0x0000FFFF 252#define R520_MC_FB_START_SHIFT 0 253#define R520_MC_FB_TOP_MASK 0xFFFF0000 254#define R520_MC_FB_TOP_SHIFT 16 255#define R520_MC_AGP_LOCATION 0x05 256#define R520_MC_AGP_START_MASK 0x0000FFFF 257#define R520_MC_AGP_START_SHIFT 0 258#define R520_MC_AGP_TOP_MASK 0xFFFF0000 259#define R520_MC_AGP_TOP_SHIFT 16 260#define R520_MC_AGP_BASE 0x06 261#define R520_MC_AGP_BASE_2 0x07 262 263 264#define R520_MC_STATUS 0x00 265#define R520_MC_STATUS_IDLE (1<<1) 266#define RV515_MC_STATUS 0x08 267#define RV515_MC_STATUS_IDLE (1<<4) 268#define RV515_MC_INIT_MISC_LAT_TIMER 0x09 269#define R520_MC_IND_INDEX 0x70 270#define R520_MC_IND_WR_EN (1 << 24) 271#define R520_MC_IND_DATA 0x74 272 273#define RV515_MC_CNTL 0x5 274# define RV515_MEM_NUM_CHANNELS_MASK 0x3 275#define R520_MC_CNTL0 0x8 276# define R520_MEM_NUM_CHANNELS_MASK (0x3 << 24) 277# define R520_MEM_NUM_CHANNELS_SHIFT 24 278# define R520_MC_CHANNEL_SIZE (1 << 23) 279 280 281#endif