1/* Move registers around to reduce number of move instructions needed. 2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc. 3 4This file is part of GNU CC. 5 6GNU CC is free software; you can redistribute it and/or modify 7it under the terms of the GNU General Public License as published by 8the Free Software Foundation; either version 2, or (at your option) 9any later version. 10 11GNU CC is distributed in the hope that it will be useful, 12but WITHOUT ANY WARRANTY; without even the implied warranty of 13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14GNU General Public License for more details. 15 16You should have received a copy of the GNU General Public License 17along with GNU CC; see the file COPYING. If not, write to 18the Free Software Foundation, 59 Temple Place - Suite 330, 19Boston, MA 02111-1307, USA. */ 20 21 22/* This module looks for cases where matching constraints would force 23 an instruction to need a reload, and this reload would be a register 24 to register move. It then attempts to change the registers used by the 25 instruction to avoid the move instruction. */ 26 27#include "config.h" 28#include "system.h" 29#include "rtl.h" /* stdio.h must precede rtl.h for FFS. */ 30#include "insn-config.h" 31#include "recog.h" 32#include "output.h" 33#include "reload.h" 34#include "regs.h" 35#include "hard-reg-set.h" 36#include "flags.h" 37#include "expr.h" 38#include "insn-flags.h" 39#include "basic-block.h" 40#include "toplev.h" 41 42static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx)); 43static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx)); 44static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx)); 45static rtx gen_add3_insn PROTO((rtx, rtx, rtx)); 46static void copy_src_to_dest PROTO((rtx, rtx, rtx, int, int)); 47static int *regmove_bb_head; 48 49struct match { 50 int with[MAX_RECOG_OPERANDS]; 51 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS]; 52 int commutative[MAX_RECOG_OPERANDS]; 53 int early_clobber[MAX_RECOG_OPERANDS]; 54}; 55 56static rtx discover_flags_reg PROTO((void)); 57static void mark_flags_life_zones PROTO((rtx)); 58static void flags_set_1 PROTO((rtx, rtx)); 59 60static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int)); 61static int find_matches PROTO((rtx, struct match *)); 62static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *)) 63; 64static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx)); 65static int stable_and_no_regs_but_for_p PROTO((rtx, rtx, rtx)); 66static int regclass_compatible_p PROTO((int, int)); 67static int loop_depth; 68 69/* Return non-zero if registers with CLASS1 and CLASS2 can be merged without 70 causing too much register allocation problems. */ 71static int 72regclass_compatible_p (class0, class1) 73 int class0, class1; 74{ 75 return (class0 == class1 76 || (reg_class_subset_p (class0, class1) 77 && ! CLASS_LIKELY_SPILLED_P (class0)) 78 || (reg_class_subset_p (class1, class0) 79 && ! CLASS_LIKELY_SPILLED_P (class1))); 80} 81 82/* Generate and return an insn body to add r1 and c, 83 storing the result in r0. */ 84static rtx 85gen_add3_insn (r0, r1, c) 86 rtx r0, r1, c; 87{ 88 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code; 89 90 if (icode == CODE_FOR_nothing 91 || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0]) 92 || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1]) 93 || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2])) 94 return NULL_RTX; 95 96 return (GEN_FCN (icode) (r0, r1, c)); 97} 98 99 100/* INC_INSN is an instruction that adds INCREMENT to REG. 101 Try to fold INC_INSN as a post/pre in/decrement into INSN. 102 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src. 103 Return nonzero for success. */ 104static int 105try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre) 106 rtx reg, insn, inc_insn ,inc_insn_set; 107 HOST_WIDE_INT increment; 108 int pre; 109{ 110 enum rtx_code inc_code; 111 112 rtx pset = single_set (insn); 113 if (pset) 114 { 115 /* Can't use the size of SET_SRC, we might have something like 116 (sign_extend:SI (mem:QI ... */ 117 rtx use = find_use_as_address (pset, reg, 0); 118 if (use != 0 && use != (rtx) 1) 119 { 120 int size = GET_MODE_SIZE (GET_MODE (use)); 121 if (0 122 || (HAVE_POST_INCREMENT 123 && pre == 0 && (inc_code = POST_INC, increment == size)) 124 || (HAVE_PRE_INCREMENT 125 && pre == 1 && (inc_code = PRE_INC, increment == size)) 126 || (HAVE_POST_DECREMENT 127 && pre == 0 && (inc_code = POST_DEC, increment == -size)) 128 || (HAVE_PRE_DECREMENT 129 && pre == 1 && (inc_code = PRE_DEC, increment == -size)) 130 ) 131 { 132 if (inc_insn_set) 133 validate_change 134 (inc_insn, 135 &SET_SRC (inc_insn_set), 136 XEXP (SET_SRC (inc_insn_set), 0), 1); 137 validate_change (insn, &XEXP (use, 0), 138 gen_rtx_fmt_e (inc_code, Pmode, reg), 1); 139 if (apply_change_group ()) 140 { 141 REG_NOTES (insn) 142 = gen_rtx_EXPR_LIST (REG_INC, 143 reg, REG_NOTES (insn)); 144 if (! inc_insn_set) 145 { 146 PUT_CODE (inc_insn, NOTE); 147 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED; 148 NOTE_SOURCE_FILE (inc_insn) = 0; 149 } 150 return 1; 151 } 152 } 153 } 154 } 155 return 0; 156} 157 158/* Determine if the pattern generated by add_optab has a clobber, 159 such as might be issued for a flags hard register. To make the 160 code elsewhere simpler, we handle cc0 in this same framework. 161 162 Return the register if one was discovered. Return NULL_RTX if 163 if no flags were found. Return pc_rtx if we got confused. */ 164 165static rtx 166discover_flags_reg () 167{ 168 rtx tmp; 169 tmp = gen_rtx_REG (word_mode, 10000); 170 tmp = gen_add3_insn (tmp, tmp, GEN_INT (2)); 171 172 /* If we get something that isn't a simple set, or a 173 [(set ..) (clobber ..)], this whole function will go wrong. */ 174 if (GET_CODE (tmp) == SET) 175 return NULL_RTX; 176 else if (GET_CODE (tmp) == PARALLEL) 177 { 178 int found; 179 180 if (XVECLEN (tmp, 0) != 2) 181 return pc_rtx; 182 tmp = XVECEXP (tmp, 0, 1); 183 if (GET_CODE (tmp) != CLOBBER) 184 return pc_rtx; 185 tmp = XEXP (tmp, 0); 186 187 /* Don't do anything foolish if the md wanted to clobber a 188 scratch or something. We only care about hard regs. 189 Moreover we don't like the notion of subregs of hard regs. */ 190 if (GET_CODE (tmp) == SUBREG 191 && GET_CODE (SUBREG_REG (tmp)) == REG 192 && REGNO (SUBREG_REG (tmp)) < FIRST_PSEUDO_REGISTER) 193 return pc_rtx; 194 found = (GET_CODE (tmp) == REG && REGNO (tmp) < FIRST_PSEUDO_REGISTER); 195 196 return (found ? tmp : NULL_RTX); 197 } 198 199 return pc_rtx; 200} 201 202/* It is a tedious task identifying when the flags register is live and 203 when it is safe to optimize. Since we process the instruction stream 204 multiple times, locate and record these live zones by marking the 205 mode of the instructions -- 206 207 QImode is used on the instruction at which the flags becomes live. 208 209 HImode is used within the range (exclusive) that the flags are 210 live. Thus the user of the flags is not marked. 211 212 All other instructions are cleared to VOIDmode. */ 213 214/* Used to communicate with flags_set_1. */ 215static rtx flags_set_1_rtx; 216static int flags_set_1_set; 217 218static void 219mark_flags_life_zones (flags) 220 rtx flags; 221{ 222 int flags_regno; 223 int flags_nregs; 224 int block; 225 226#ifdef HAVE_cc0 227 /* If we found a flags register on a cc0 host, bail. */ 228 if (flags == NULL_RTX) 229 flags = cc0_rtx; 230 else if (flags != cc0_rtx) 231 flags = pc_rtx; 232#endif 233 234 /* Simple cases first: if no flags, clear all modes. If confusing, 235 mark the entire function as being in a flags shadow. */ 236 if (flags == NULL_RTX || flags == pc_rtx) 237 { 238 enum machine_mode mode = (flags ? HImode : VOIDmode); 239 rtx insn; 240 for (insn = get_insns(); insn; insn = NEXT_INSN (insn)) 241 PUT_MODE (insn, mode); 242 return; 243 } 244 245#ifdef HAVE_cc0 246 flags_regno = -1; 247 flags_nregs = 1; 248#else 249 flags_regno = REGNO (flags); 250 flags_nregs = HARD_REGNO_NREGS (flags_regno, GET_MODE (flags)); 251#endif 252 flags_set_1_rtx = flags; 253 254 /* Process each basic block. */ 255 for (block = n_basic_blocks - 1; block >= 0; block--) 256 { 257 rtx insn, end; 258 int live; 259 260 insn = BLOCK_HEAD (block); 261 end = BLOCK_END (block); 262 263 /* Look out for the (unlikely) case of flags being live across 264 basic block boundaries. */ 265 live = 0; 266#ifndef HAVE_cc0 267 { 268 int i; 269 for (i = 0; i < flags_nregs; ++i) 270 live |= REGNO_REG_SET_P (BASIC_BLOCK (block)->global_live_at_start, 271 flags_regno + i); 272 } 273#endif 274 275 while (1) 276 { 277 /* Process liveness in reverse order of importance -- 278 alive, death, birth. This lets more important info 279 overwrite the mode of lesser info. */ 280 281 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') 282 { 283#ifdef HAVE_cc0 284 /* In the cc0 case, death is not marked in reg notes, 285 but is instead the mere use of cc0 when it is alive. */ 286 if (live && reg_mentioned_p (cc0_rtx, PATTERN (insn))) 287 live = 0; 288#else 289 /* In the hard reg case, we watch death notes. */ 290 if (live && find_regno_note (insn, REG_DEAD, flags_regno)) 291 live = 0; 292#endif 293 PUT_MODE (insn, (live ? HImode : VOIDmode)); 294 295 /* In either case, birth is denoted simply by it's presence 296 as the destination of a set. */ 297 flags_set_1_set = 0; 298 note_stores (PATTERN (insn), flags_set_1); 299 if (flags_set_1_set) 300 { 301 live = 1; 302 PUT_MODE (insn, QImode); 303 } 304 } 305 else 306 PUT_MODE (insn, (live ? HImode : VOIDmode)); 307 308 if (insn == end) 309 break; 310 insn = NEXT_INSN (insn); 311 } 312 } 313} 314 315/* A subroutine of mark_flags_life_zones, called through note_stores. */ 316 317static void 318flags_set_1 (x, pat) 319 rtx x, pat; 320{ 321 if (GET_CODE (pat) == SET 322 && reg_overlap_mentioned_p (x, flags_set_1_rtx)) 323 flags_set_1_set = 1; 324} 325 326static int *regno_src_regno; 327 328/* Indicate how good a choice REG (which appears as a source) is to replace 329 a destination register with. The higher the returned value, the better 330 the choice. The main objective is to avoid using a register that is 331 a candidate for tying to a hard register, since the output might in 332 turn be a candidate to be tied to a different hard register. */ 333int 334replacement_quality(reg) 335 rtx reg; 336{ 337 int src_regno; 338 339 /* Bad if this isn't a register at all. */ 340 if (GET_CODE (reg) != REG) 341 return 0; 342 343 /* If this register is not meant to get a hard register, 344 it is a poor choice. */ 345 if (REG_LIVE_LENGTH (REGNO (reg)) < 0) 346 return 0; 347 348 src_regno = regno_src_regno[REGNO (reg)]; 349 350 /* If it was not copied from another register, it is fine. */ 351 if (src_regno < 0) 352 return 3; 353 354 /* Copied from a hard register? */ 355 if (src_regno < FIRST_PSEUDO_REGISTER) 356 return 1; 357 358 /* Copied from a pseudo register - not as bad as from a hard register, 359 yet still cumbersome, since the register live length will be lengthened 360 when the registers get tied. */ 361 return 2; 362} 363 364/* INSN is a copy from SRC to DEST, both registers, and SRC does not die 365 in INSN. 366 367 Search forward to see if SRC dies before either it or DEST is modified, 368 but don't scan past the end of a basic block. If so, we can replace SRC 369 with DEST and let SRC die in INSN. 370 371 This will reduce the number of registers live in that range and may enable 372 DEST to be tied to SRC, thus often saving one register in addition to a 373 register-register copy. */ 374 375static int 376optimize_reg_copy_1 (insn, dest, src) 377 rtx insn; 378 rtx dest; 379 rtx src; 380{ 381 rtx p, q; 382 rtx note; 383 rtx dest_death = 0; 384 int sregno = REGNO (src); 385 int dregno = REGNO (dest); 386 387 /* We don't want to mess with hard regs if register classes are small. */ 388 if (sregno == dregno 389 || (SMALL_REGISTER_CLASSES 390 && (sregno < FIRST_PSEUDO_REGISTER 391 || dregno < FIRST_PSEUDO_REGISTER)) 392 /* We don't see all updates to SP if they are in an auto-inc memory 393 reference, so we must disallow this optimization on them. */ 394 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM) 395 return 0; 396 397 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) 398 { 399 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN 400 || (GET_CODE (p) == NOTE 401 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 402 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 403 break; 404 405 /* ??? We can't scan past the end of a basic block without updating 406 the register lifetime info (REG_DEAD/basic_block_live_at_start). 407 A CALL_INSN might be the last insn of a basic block, if it is inside 408 an EH region. There is no easy way to tell, so we just always break 409 when we see a CALL_INSN if flag_exceptions is nonzero. */ 410 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 411 break; 412 413 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 414 continue; 415 416 if (reg_set_p (src, p) || reg_set_p (dest, p) 417 /* Don't change a USE of a register. */ 418 || (GET_CODE (PATTERN (p)) == USE 419 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0)))) 420 break; 421 422 /* See if all of SRC dies in P. This test is slightly more 423 conservative than it needs to be. */ 424 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0 425 && GET_MODE (XEXP (note, 0)) == GET_MODE (src)) 426 { 427 int failed = 0; 428 int d_length = 0; 429 int s_length = 0; 430 int d_n_calls = 0; 431 int s_n_calls = 0; 432 433 /* We can do the optimization. Scan forward from INSN again, 434 replacing regs as we go. Set FAILED if a replacement can't 435 be done. In that case, we can't move the death note for SRC. 436 This should be rare. */ 437 438 /* Set to stop at next insn. */ 439 for (q = next_real_insn (insn); 440 q != next_real_insn (p); 441 q = next_real_insn (q)) 442 { 443 if (reg_overlap_mentioned_p (src, PATTERN (q))) 444 { 445 /* If SRC is a hard register, we might miss some 446 overlapping registers with validate_replace_rtx, 447 so we would have to undo it. We can't if DEST is 448 present in the insn, so fail in that combination 449 of cases. */ 450 if (sregno < FIRST_PSEUDO_REGISTER 451 && reg_mentioned_p (dest, PATTERN (q))) 452 failed = 1; 453 454 /* Replace all uses and make sure that the register 455 isn't still present. */ 456 else if (validate_replace_rtx (src, dest, q) 457 && (sregno >= FIRST_PSEUDO_REGISTER 458 || ! reg_overlap_mentioned_p (src, 459 PATTERN (q)))) 460 { 461 /* We assume that a register is used exactly once per 462 insn in the REG_N_REFS updates below. If this is not 463 correct, no great harm is done. 464 465 Since we do not know if we will change the lifetime of 466 SREGNO or DREGNO, we must not update REG_LIVE_LENGTH 467 or REG_N_CALLS_CROSSED at this time. */ 468 if (sregno >= FIRST_PSEUDO_REGISTER) 469 REG_N_REFS (sregno) -= loop_depth; 470 471 if (dregno >= FIRST_PSEUDO_REGISTER) 472 REG_N_REFS (dregno) += loop_depth; 473 } 474 else 475 { 476 validate_replace_rtx (dest, src, q); 477 failed = 1; 478 } 479 } 480 481 /* For SREGNO, count the total number of insns scanned. 482 For DREGNO, count the total number of insns scanned after 483 passing the death note for DREGNO. */ 484 s_length++; 485 if (dest_death) 486 d_length++; 487 488 /* If the insn in which SRC dies is a CALL_INSN, don't count it 489 as a call that has been crossed. Otherwise, count it. */ 490 if (q != p && GET_CODE (q) == CALL_INSN) 491 { 492 /* Similarly, total calls for SREGNO, total calls beyond 493 the death note for DREGNO. */ 494 s_n_calls++; 495 if (dest_death) 496 d_n_calls++; 497 } 498 499 /* If DEST dies here, remove the death note and save it for 500 later. Make sure ALL of DEST dies here; again, this is 501 overly conservative. */ 502 if (dest_death == 0 503 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0) 504 { 505 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest)) 506 failed = 1, dest_death = 0; 507 else 508 remove_note (q, dest_death); 509 } 510 } 511 512 if (! failed) 513 { 514 /* These counters need to be updated if and only if we are 515 going to move the REG_DEAD note. */ 516 if (sregno >= FIRST_PSEUDO_REGISTER) 517 { 518 if (REG_LIVE_LENGTH (sregno) >= 0) 519 { 520 REG_LIVE_LENGTH (sregno) -= s_length; 521 /* REG_LIVE_LENGTH is only an approximation after 522 combine if sched is not run, so make sure that we 523 still have a reasonable value. */ 524 if (REG_LIVE_LENGTH (sregno) < 2) 525 REG_LIVE_LENGTH (sregno) = 2; 526 } 527 528 REG_N_CALLS_CROSSED (sregno) -= s_n_calls; 529 } 530 531 /* Move death note of SRC from P to INSN. */ 532 remove_note (p, note); 533 XEXP (note, 1) = REG_NOTES (insn); 534 REG_NOTES (insn) = note; 535 } 536 537 /* Put death note of DEST on P if we saw it die. */ 538 if (dest_death) 539 { 540 XEXP (dest_death, 1) = REG_NOTES (p); 541 REG_NOTES (p) = dest_death; 542 543 if (dregno >= FIRST_PSEUDO_REGISTER) 544 { 545 /* If and only if we are moving the death note for DREGNO, 546 then we need to update its counters. */ 547 if (REG_LIVE_LENGTH (dregno) >= 0) 548 REG_LIVE_LENGTH (dregno) += d_length; 549 REG_N_CALLS_CROSSED (dregno) += d_n_calls; 550 } 551 } 552 553 return ! failed; 554 } 555 556 /* If SRC is a hard register which is set or killed in some other 557 way, we can't do this optimization. */ 558 else if (sregno < FIRST_PSEUDO_REGISTER 559 && dead_or_set_p (p, src)) 560 break; 561 } 562 return 0; 563} 564 565/* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have 566 a sequence of insns that modify DEST followed by an insn that sets 567 SRC to DEST in which DEST dies, with no prior modification of DEST. 568 (There is no need to check if the insns in between actually modify 569 DEST. We should not have cases where DEST is not modified, but 570 the optimization is safe if no such modification is detected.) 571 In that case, we can replace all uses of DEST, starting with INSN and 572 ending with the set of SRC to DEST, with SRC. We do not do this 573 optimization if a CALL_INSN is crossed unless SRC already crosses a 574 call or if DEST dies before the copy back to SRC. 575 576 It is assumed that DEST and SRC are pseudos; it is too complicated to do 577 this for hard registers since the substitutions we may make might fail. */ 578 579static void 580optimize_reg_copy_2 (insn, dest, src) 581 rtx insn; 582 rtx dest; 583 rtx src; 584{ 585 rtx p, q; 586 rtx set; 587 int sregno = REGNO (src); 588 int dregno = REGNO (dest); 589 590 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) 591 { 592 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN 593 || (GET_CODE (p) == NOTE 594 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 595 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 596 break; 597 598 /* ??? We can't scan past the end of a basic block without updating 599 the register lifetime info (REG_DEAD/basic_block_live_at_start). 600 A CALL_INSN might be the last insn of a basic block, if it is inside 601 an EH region. There is no easy way to tell, so we just always break 602 when we see a CALL_INSN if flag_exceptions is nonzero. */ 603 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 604 break; 605 606 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 607 continue; 608 609 set = single_set (p); 610 if (set && SET_SRC (set) == dest && SET_DEST (set) == src 611 && find_reg_note (p, REG_DEAD, dest)) 612 { 613 /* We can do the optimization. Scan forward from INSN again, 614 replacing regs as we go. */ 615 616 /* Set to stop at next insn. */ 617 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q)) 618 if (GET_RTX_CLASS (GET_CODE (q)) == 'i') 619 { 620 if (reg_mentioned_p (dest, PATTERN (q))) 621 { 622 PATTERN (q) = replace_rtx (PATTERN (q), dest, src); 623 624 /* We assume that a register is used exactly once per 625 insn in the updates below. If this is not correct, 626 no great harm is done. */ 627 REG_N_REFS (dregno) -= loop_depth; 628 REG_N_REFS (sregno) += loop_depth; 629 } 630 631 632 if (GET_CODE (q) == CALL_INSN) 633 { 634 REG_N_CALLS_CROSSED (dregno)--; 635 REG_N_CALLS_CROSSED (sregno)++; 636 } 637 } 638 639 remove_note (p, find_reg_note (p, REG_DEAD, dest)); 640 REG_N_DEATHS (dregno)--; 641 remove_note (insn, find_reg_note (insn, REG_DEAD, src)); 642 REG_N_DEATHS (sregno)--; 643 return; 644 } 645 646 if (reg_set_p (src, p) 647 || find_reg_note (p, REG_DEAD, dest) 648 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0)) 649 break; 650 } 651} 652/* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST. 653 Look if SRC dies there, and if it is only set once, by loading 654 it from memory. If so, try to encorporate the zero/sign extension 655 into the memory read, change SRC to the mode of DEST, and alter 656 the remaining accesses to use the appropriate SUBREG. This allows 657 SRC and DEST to be tied later. */ 658static void 659optimize_reg_copy_3 (insn, dest, src) 660 rtx insn; 661 rtx dest; 662 rtx src; 663{ 664 rtx src_reg = XEXP (src, 0); 665 int src_no = REGNO (src_reg); 666 int dst_no = REGNO (dest); 667 rtx p, set, subreg; 668 enum machine_mode old_mode; 669 670 if (src_no < FIRST_PSEUDO_REGISTER 671 || dst_no < FIRST_PSEUDO_REGISTER 672 || ! find_reg_note (insn, REG_DEAD, src_reg) 673 || REG_N_SETS (src_no) != 1) 674 return; 675 for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p)) 676 { 677 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN 678 || (GET_CODE (p) == NOTE 679 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 680 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 681 return; 682 683 /* ??? We can't scan past the end of a basic block without updating 684 the register lifetime info (REG_DEAD/basic_block_live_at_start). 685 A CALL_INSN might be the last insn of a basic block, if it is inside 686 an EH region. There is no easy way to tell, so we just always break 687 when we see a CALL_INSN if flag_exceptions is nonzero. */ 688 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 689 return; 690 691 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 692 continue; 693 } 694 if (! (set = single_set (p)) 695 || GET_CODE (SET_SRC (set)) != MEM 696 /* If there's a REG_EQUIV note, this must be an insn that loads an 697 argument. Prefer keeping the note over doing this optimization. */ 698 || find_reg_note (p, REG_EQUIV, NULL_RTX) 699 || SET_DEST (set) != src_reg) 700 return; 701 702 /* Be conserative: although this optimization is also valid for 703 volatile memory references, that could cause trouble in later passes. */ 704 if (MEM_VOLATILE_P (SET_SRC (set))) 705 return; 706 707 /* Do not use a SUBREG to truncate from one mode to another if truncation 708 is not a nop. */ 709 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src)) 710 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)), 711 GET_MODE_BITSIZE (GET_MODE (src_reg)))) 712 return; 713 714 old_mode = GET_MODE (src_reg); 715 PUT_MODE (src_reg, GET_MODE (src)); 716 XEXP (src, 0) = SET_SRC (set); 717 718 /* Include this change in the group so that it's easily undone if 719 one of the changes in the group is invalid. */ 720 validate_change (p, &SET_SRC (set), src, 1); 721 722 /* Now walk forward making additional replacements. We want to be able 723 to undo all the changes if a later substitution fails. */ 724 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0); 725 while (p = NEXT_INSN (p), p != insn) 726 { 727 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 728 continue; 729 730 /* Make a tenative change. */ 731 validate_replace_rtx_group (src_reg, subreg, p); 732 } 733 734 validate_replace_rtx_group (src, src_reg, insn); 735 736 /* Now see if all the changes are valid. */ 737 if (! apply_change_group ()) 738 { 739 /* One or more changes were no good. Back out everything. */ 740 PUT_MODE (src_reg, old_mode); 741 XEXP (src, 0) = src_reg; 742 } 743 else 744 { 745 rtx note = find_reg_note (p, REG_EQUAL, NULL_RTX); 746 if (note) 747 remove_note (p, note); 748 } 749} 750 751 752/* If we were not able to update the users of src to use dest directly, try 753 instead moving the value to dest directly before the operation. */ 754 755static void 756copy_src_to_dest (insn, src, dest, loop_depth, old_max_uid) 757 rtx insn; 758 rtx src; 759 rtx dest; 760 int loop_depth; 761 int old_max_uid; 762{ 763 rtx seq; 764 rtx link; 765 rtx next; 766 rtx set; 767 rtx move_insn; 768 rtx *p_insn_notes; 769 rtx *p_move_notes; 770 int src_regno; 771 int dest_regno; 772 int bb; 773 int insn_uid; 774 int move_uid; 775 776 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant 777 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is 778 parameter when there is no frame pointer that is not allocated a register. 779 For now, we just reject them, rather than incrementing the live length. */ 780 781 if (GET_CODE (src) == REG 782 && REG_LIVE_LENGTH (REGNO (src)) > 0 783 && GET_CODE (dest) == REG 784 && REG_LIVE_LENGTH (REGNO (dest)) > 0 785 && (set = single_set (insn)) != NULL_RTX 786 && !reg_mentioned_p (dest, SET_SRC (set)) 787 && GET_MODE (src) == GET_MODE (dest)) 788 { 789 int old_num_regs = reg_rtx_no; 790 791 /* Generate the src->dest move. */ 792 start_sequence (); 793 emit_move_insn (dest, src); 794 seq = gen_sequence (); 795 end_sequence (); 796 /* If this sequence uses new registers, we may not use it. */ 797 if (old_num_regs != reg_rtx_no 798 || ! validate_replace_rtx (src, dest, insn)) 799 { 800 /* We have to restore reg_rtx_no to its old value, lest 801 recompute_reg_usage will try to compute the usage of the 802 new regs, yet reg_n_info is not valid for them. */ 803 reg_rtx_no = old_num_regs; 804 return; 805 } 806 emit_insn_before (seq, insn); 807 move_insn = PREV_INSN (insn); 808 p_move_notes = ®_NOTES (move_insn); 809 p_insn_notes = ®_NOTES (insn); 810 811 /* Move any notes mentioning src to the move instruction */ 812 for (link = REG_NOTES (insn); link != NULL_RTX; link = next) 813 { 814 next = XEXP (link, 1); 815 if (XEXP (link, 0) == src) 816 { 817 *p_move_notes = link; 818 p_move_notes = &XEXP (link, 1); 819 } 820 else 821 { 822 *p_insn_notes = link; 823 p_insn_notes = &XEXP (link, 1); 824 } 825 } 826 827 *p_move_notes = NULL_RTX; 828 *p_insn_notes = NULL_RTX; 829 830 /* Is the insn the head of a basic block? If so extend it */ 831 insn_uid = INSN_UID (insn); 832 move_uid = INSN_UID (move_insn); 833 if (insn_uid < old_max_uid) 834 { 835 bb = regmove_bb_head[insn_uid]; 836 if (bb >= 0) 837 { 838 BLOCK_HEAD (bb) = move_insn; 839 regmove_bb_head[insn_uid] = -1; 840 } 841 } 842 843 /* Update the various register tables. */ 844 dest_regno = REGNO (dest); 845 REG_N_SETS (dest_regno) += loop_depth; 846 REG_N_REFS (dest_regno) += loop_depth; 847 REG_LIVE_LENGTH (dest_regno)++; 848 if (REGNO_FIRST_UID (dest_regno) == insn_uid) 849 REGNO_FIRST_UID (dest_regno) = move_uid; 850 851 src_regno = REGNO (src); 852 if (! find_reg_note (move_insn, REG_DEAD, src)) 853 REG_LIVE_LENGTH (src_regno)++; 854 855 if (REGNO_FIRST_UID (src_regno) == insn_uid) 856 REGNO_FIRST_UID (src_regno) = move_uid; 857 858 if (REGNO_LAST_UID (src_regno) == insn_uid) 859 REGNO_LAST_UID (src_regno) = move_uid; 860 861 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid) 862 REGNO_LAST_NOTE_UID (src_regno) = move_uid; 863 } 864} 865 866 867/* Return whether REG is set in only one location, and is set to a 868 constant, but is set in a different basic block from INSN (an 869 instructions which uses REG). In this case REG is equivalent to a 870 constant, and we don't want to break that equivalence, because that 871 may increase register pressure and make reload harder. If REG is 872 set in the same basic block as INSN, we don't worry about it, 873 because we'll probably need a register anyhow (??? but what if REG 874 is used in a different basic block as well as this one?). FIRST is 875 the first insn in the function. */ 876 877static int 878reg_is_remote_constant_p (reg, insn, first) 879 rtx reg; 880 rtx insn; 881 rtx first; 882{ 883 register rtx p; 884 885 if (REG_N_SETS (REGNO (reg)) != 1) 886 return 0; 887 888 /* Look for the set. */ 889 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1)) 890 { 891 rtx s; 892 893 if (REG_NOTE_KIND (p) != 0) 894 continue; 895 s = single_set (XEXP (p, 0)); 896 if (s != 0 897 && GET_CODE (SET_DEST (s)) == REG 898 && REGNO (SET_DEST (s)) == REGNO (reg)) 899 { 900 /* The register is set in the same basic block. */ 901 return 0; 902 } 903 } 904 905 for (p = first; p && p != insn; p = NEXT_INSN (p)) 906 { 907 rtx s; 908 909 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 910 continue; 911 s = single_set (p); 912 if (s != 0 913 && GET_CODE (SET_DEST (s)) == REG 914 && REGNO (SET_DEST (s)) == REGNO (reg)) 915 { 916 /* This is the instruction which sets REG. If there is a 917 REG_EQUAL note, then REG is equivalent to a constant. */ 918 if (find_reg_note (p, REG_EQUAL, NULL_RTX)) 919 return 1; 920 return 0; 921 } 922 } 923 924 return 0; 925} 926 927/* INSN is adding a CONST_INT to a REG. We search backwards looking for 928 another add immediate instruction with the same source and dest registers, 929 and if we find one, we change INSN to an increment, and return 1. If 930 no changes are made, we return 0. 931 932 This changes 933 (set (reg100) (plus reg1 offset1)) 934 ... 935 (set (reg100) (plus reg1 offset2)) 936 to 937 (set (reg100) (plus reg1 offset1)) 938 ... 939 (set (reg100) (plus reg100 offset2-offset1)) */ 940 941/* ??? What does this comment mean? */ 942/* cse disrupts preincrement / postdecrement squences when it finds a 943 hard register as ultimate source, like the frame pointer. */ 944 945int 946fixup_match_2 (insn, dst, src, offset, regmove_dump_file) 947 rtx insn, dst, src, offset; 948 FILE *regmove_dump_file; 949{ 950 rtx p, dst_death = 0; 951 int length, num_calls = 0; 952 953 /* If SRC dies in INSN, we'd have to move the death note. This is 954 considered to be very unlikely, so we just skip the optimization 955 in this case. */ 956 if (find_regno_note (insn, REG_DEAD, REGNO (src))) 957 return 0; 958 959 /* Scan backward to find the first instruction that sets DST. */ 960 961 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p)) 962 { 963 rtx pset; 964 965 if (GET_CODE (p) == CODE_LABEL 966 || GET_CODE (p) == JUMP_INSN 967 || (GET_CODE (p) == NOTE 968 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 969 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 970 break; 971 972 /* ??? We can't scan past the end of a basic block without updating 973 the register lifetime info (REG_DEAD/basic_block_live_at_start). 974 A CALL_INSN might be the last insn of a basic block, if it is inside 975 an EH region. There is no easy way to tell, so we just always break 976 when we see a CALL_INSN if flag_exceptions is nonzero. */ 977 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 978 break; 979 980 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 981 continue; 982 983 if (find_regno_note (p, REG_DEAD, REGNO (dst))) 984 dst_death = p; 985 if (! dst_death) 986 length++; 987 988 pset = single_set (p); 989 if (pset && SET_DEST (pset) == dst 990 && GET_CODE (SET_SRC (pset)) == PLUS 991 && XEXP (SET_SRC (pset), 0) == src 992 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT) 993 { 994 HOST_WIDE_INT newconst 995 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1)); 996 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst)); 997 998 if (add && validate_change (insn, &PATTERN (insn), add, 0)) 999 { 1000 /* Remove the death note for DST from DST_DEATH. */ 1001 if (dst_death) 1002 { 1003 remove_death (REGNO (dst), dst_death); 1004 REG_LIVE_LENGTH (REGNO (dst)) += length; 1005 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls; 1006 } 1007 1008 REG_N_REFS (REGNO (dst)) += loop_depth; 1009 REG_N_REFS (REGNO (src)) -= loop_depth; 1010 1011 if (regmove_dump_file) 1012 fprintf (regmove_dump_file, 1013 "Fixed operand of insn %d.\n", 1014 INSN_UID (insn)); 1015 1016#ifdef AUTO_INC_DEC 1017 for (p = PREV_INSN (insn); p; p = PREV_INSN (p)) 1018 { 1019 if (GET_CODE (p) == CODE_LABEL 1020 || GET_CODE (p) == JUMP_INSN 1021 || (GET_CODE (p) == NOTE 1022 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 1023 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 1024 break; 1025 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 1026 continue; 1027 if (reg_overlap_mentioned_p (dst, PATTERN (p))) 1028 { 1029 if (try_auto_increment (p, insn, 0, dst, newconst, 0)) 1030 return 1; 1031 break; 1032 } 1033 } 1034 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) 1035 { 1036 if (GET_CODE (p) == CODE_LABEL 1037 || GET_CODE (p) == JUMP_INSN 1038 || (GET_CODE (p) == NOTE 1039 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 1040 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 1041 break; 1042 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 1043 continue; 1044 if (reg_overlap_mentioned_p (dst, PATTERN (p))) 1045 { 1046 try_auto_increment (p, insn, 0, dst, newconst, 1); 1047 break; 1048 } 1049 } 1050#endif 1051 return 1; 1052 } 1053 } 1054 1055 if (reg_set_p (dst, PATTERN (p))) 1056 break; 1057 1058 /* If we have passed a call instruction, and the 1059 pseudo-reg SRC is not already live across a call, 1060 then don't perform the optimization. */ 1061 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all 1062 hard regs are clobbered. Thus, we only use it for src for 1063 non-call insns. */ 1064 if (GET_CODE (p) == CALL_INSN) 1065 { 1066 if (! dst_death) 1067 num_calls++; 1068 1069 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0) 1070 break; 1071 1072 if (call_used_regs [REGNO (dst)] 1073 || find_reg_fusage (p, CLOBBER, dst)) 1074 break; 1075 } 1076 else if (reg_set_p (src, PATTERN (p))) 1077 break; 1078 } 1079 1080 return 0; 1081} 1082 1083void 1084regmove_optimize (f, nregs, regmove_dump_file) 1085 rtx f; 1086 int nregs; 1087 FILE *regmove_dump_file; 1088{ 1089 int old_max_uid = get_max_uid (); 1090 rtx insn; 1091 struct match match; 1092 int pass; 1093 int i; 1094 rtx copy_src, copy_dst; 1095 1096 /* Find out where a potential flags register is live, and so that we 1097 can supress some optimizations in those zones. */ 1098 mark_flags_life_zones (discover_flags_reg ()); 1099 1100 regno_src_regno = (int *)alloca (sizeof *regno_src_regno * nregs); 1101 for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1; 1102 1103 regmove_bb_head = (int *)alloca (sizeof (int) * (old_max_uid + 1)); 1104 for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1; 1105 for (i = 0; i < n_basic_blocks; i++) 1106 regmove_bb_head[INSN_UID (BLOCK_HEAD (i))] = i; 1107 1108 /* A forward/backward pass. Replace output operands with input operands. */ 1109 1110 loop_depth = 1; 1111 1112 for (pass = 0; pass <= 2; pass++) 1113 { 1114 if (! flag_regmove && pass >= flag_expensive_optimizations) 1115 return; 1116 1117 if (regmove_dump_file) 1118 fprintf (regmove_dump_file, "Starting %s pass...\n", 1119 pass ? "backward" : "forward"); 1120 1121 for (insn = pass ? get_last_insn () : f; insn; 1122 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn)) 1123 { 1124 rtx set; 1125 int op_no, match_no; 1126 1127 if (GET_CODE (insn) == NOTE) 1128 { 1129 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) 1130 loop_depth++; 1131 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) 1132 loop_depth--; 1133 } 1134 1135 set = single_set (insn); 1136 if (! set) 1137 continue; 1138 1139 if (flag_expensive_optimizations && ! pass 1140 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND 1141 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND) 1142 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG 1143 && GET_CODE (SET_DEST(set)) == REG) 1144 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set)); 1145 1146 if (flag_expensive_optimizations && ! pass 1147 && GET_CODE (SET_SRC (set)) == REG 1148 && GET_CODE (SET_DEST(set)) == REG) 1149 { 1150 /* If this is a register-register copy where SRC is not dead, 1151 see if we can optimize it. If this optimization succeeds, 1152 it will become a copy where SRC is dead. */ 1153 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set)) 1154 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set))) 1155 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER) 1156 { 1157 /* Similarly for a pseudo-pseudo copy when SRC is dead. */ 1158 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER) 1159 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set)); 1160 if (regno_src_regno[REGNO (SET_DEST (set))] < 0 1161 && SET_SRC (set) != SET_DEST (set)) 1162 { 1163 int srcregno = REGNO (SET_SRC(set)); 1164 if (regno_src_regno[srcregno] >= 0) 1165 srcregno = regno_src_regno[srcregno]; 1166 regno_src_regno[REGNO (SET_DEST (set))] = srcregno; 1167 } 1168 } 1169 } 1170 if (! flag_regmove) 1171 continue; 1172 1173#ifdef REGISTER_CONSTRAINTS 1174 if (! find_matches (insn, &match)) 1175 continue; 1176 1177 /* Now scan through the operands looking for a source operand 1178 which is supposed to match the destination operand. 1179 Then scan forward for an instruction which uses the dest 1180 operand. 1181 If it dies there, then replace the dest in both operands with 1182 the source operand. */ 1183 1184 for (op_no = 0; op_no < recog_n_operands; op_no++) 1185 { 1186 rtx src, dst, src_subreg; 1187 enum reg_class src_class, dst_class; 1188 1189 match_no = match.with[op_no]; 1190 1191 /* Nothing to do if the two operands aren't supposed to match. */ 1192 if (match_no < 0) 1193 continue; 1194 1195 src = recog_operand[op_no]; 1196 dst = recog_operand[match_no]; 1197 1198 if (GET_CODE (src) != REG) 1199 continue; 1200 1201 src_subreg = src; 1202 if (GET_CODE (dst) == SUBREG 1203 && GET_MODE_SIZE (GET_MODE (dst)) 1204 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst)))) 1205 { 1206 src_subreg 1207 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)), 1208 src, SUBREG_WORD (dst)); 1209 dst = SUBREG_REG (dst); 1210 } 1211 if (GET_CODE (dst) != REG 1212 || REGNO (dst) < FIRST_PSEUDO_REGISTER) 1213 continue; 1214 1215 if (REGNO (src) < FIRST_PSEUDO_REGISTER) 1216 { 1217 if (match.commutative[op_no] < op_no) 1218 regno_src_regno[REGNO (dst)] = REGNO (src); 1219 continue; 1220 } 1221 1222 if (REG_LIVE_LENGTH (REGNO (src)) < 0) 1223 continue; 1224 1225 /* op_no/src must be a read-only operand, and 1226 match_operand/dst must be a write-only operand. */ 1227 if (match.use[op_no] != READ 1228 || match.use[match_no] != WRITE) 1229 continue; 1230 1231 if (match.early_clobber[match_no] 1232 && count_occurrences (PATTERN (insn), src) > 1) 1233 continue; 1234 1235 /* Make sure match_operand is the destination. */ 1236 if (recog_operand[match_no] != SET_DEST (set)) 1237 continue; 1238 1239 /* If the operands already match, then there is nothing to do. */ 1240 /* But in the commutative case, we might find a better match. */ 1241 if (operands_match_p (src, dst) 1242 || (match.commutative[op_no] >= 0 1243 && operands_match_p (recog_operand[match.commutative 1244 [op_no]], dst) 1245 && (replacement_quality (recog_operand[match.commutative 1246 [op_no]]) 1247 >= replacement_quality (src)))) 1248 continue; 1249 1250 src_class = reg_preferred_class (REGNO (src)); 1251 dst_class = reg_preferred_class (REGNO (dst)); 1252 if (! regclass_compatible_p (src_class, dst_class)) 1253 continue; 1254 1255 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass, 1256 op_no, match_no, 1257 regmove_dump_file)) 1258 break; 1259 } 1260 } 1261 } 1262 1263 /* A backward pass. Replace input operands with output operands. */ 1264 1265 if (regmove_dump_file) 1266 fprintf (regmove_dump_file, "Starting backward pass...\n"); 1267 1268 loop_depth = 1; 1269 1270 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn)) 1271 { 1272 if (GET_CODE (insn) == NOTE) 1273 { 1274 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) 1275 loop_depth++; 1276 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) 1277 loop_depth--; 1278 } 1279 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') 1280 { 1281 int op_no, match_no; 1282 int success = 0; 1283 1284 if (! find_matches (insn, &match)) 1285 continue; 1286 1287 /* Now scan through the operands looking for a destination operand 1288 which is supposed to match a source operand. 1289 Then scan backward for an instruction which sets the source 1290 operand. If safe, then replace the source operand with the 1291 dest operand in both instructions. */ 1292 1293 copy_src = NULL_RTX; 1294 copy_dst = NULL_RTX; 1295 for (op_no = 0; op_no < recog_n_operands; op_no++) 1296 { 1297 rtx set, p, src, dst; 1298 rtx src_note, dst_note; 1299 int num_calls = 0; 1300 enum reg_class src_class, dst_class; 1301 int length; 1302 1303 match_no = match.with[op_no]; 1304 1305 /* Nothing to do if the two operands aren't supposed to match. */ 1306 if (match_no < 0) 1307 continue; 1308 1309 dst = recog_operand[match_no]; 1310 src = recog_operand[op_no]; 1311 1312 if (GET_CODE (src) != REG) 1313 continue; 1314 1315 if (GET_CODE (dst) != REG 1316 || REGNO (dst) < FIRST_PSEUDO_REGISTER 1317 || REG_LIVE_LENGTH (REGNO (dst)) < 0) 1318 continue; 1319 1320 /* If the operands already match, then there is nothing to do. */ 1321 if (operands_match_p (src, dst) 1322 || (match.commutative[op_no] >= 0 1323 && operands_match_p (recog_operand[match.commutative[op_no]], dst))) 1324 continue; 1325 1326 set = single_set (insn); 1327 if (! set) 1328 continue; 1329 1330 /* match_no/dst must be a write-only operand, and 1331 operand_operand/src must be a read-only operand. */ 1332 if (match.use[op_no] != READ 1333 || match.use[match_no] != WRITE) 1334 continue; 1335 1336 if (match.early_clobber[match_no] 1337 && count_occurrences (PATTERN (insn), src) > 1) 1338 continue; 1339 1340 /* Make sure match_no is the destination. */ 1341 if (recog_operand[match_no] != SET_DEST (set)) 1342 continue; 1343 1344 if (REGNO (src) < FIRST_PSEUDO_REGISTER) 1345 { 1346 if (GET_CODE (SET_SRC (set)) == PLUS 1347 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT 1348 && XEXP (SET_SRC (set), 0) == src 1349 && fixup_match_2 (insn, dst, src, 1350 XEXP (SET_SRC (set), 1), 1351 regmove_dump_file)) 1352 break; 1353 continue; 1354 } 1355 src_class = reg_preferred_class (REGNO (src)); 1356 dst_class = reg_preferred_class (REGNO (dst)); 1357 if (! regclass_compatible_p (src_class, dst_class)) 1358 { 1359 if (!copy_src) 1360 { 1361 copy_src = src; 1362 copy_dst = dst; 1363 } 1364 continue; 1365 } 1366 1367 /* Can not modify an earlier insn to set dst if this insn 1368 uses an old value in the source. */ 1369 if (reg_overlap_mentioned_p (dst, SET_SRC (set))) 1370 { 1371 if (!copy_src) 1372 { 1373 copy_src = src; 1374 copy_dst = dst; 1375 } 1376 continue; 1377 } 1378 1379 if (! (src_note = find_reg_note (insn, REG_DEAD, src))) 1380 { 1381 if (!copy_src) 1382 { 1383 copy_src = src; 1384 copy_dst = dst; 1385 } 1386 continue; 1387 } 1388 1389 1390 /* If src is set once in a different basic block, 1391 and is set equal to a constant, then do not use 1392 it for this optimization, as this would make it 1393 no longer equivalent to a constant. */ 1394 1395 if (reg_is_remote_constant_p (src, insn, f)) 1396 { 1397 if (!copy_src) 1398 { 1399 copy_src = src; 1400 copy_dst = dst; 1401 } 1402 continue; 1403 } 1404 1405 1406 if (regmove_dump_file) 1407 fprintf (regmove_dump_file, 1408 "Could fix operand %d of insn %d matching operand %d.\n", 1409 op_no, INSN_UID (insn), match_no); 1410 1411 /* Scan backward to find the first instruction that uses 1412 the input operand. If the operand is set here, then 1413 replace it in both instructions with match_no. */ 1414 1415 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p)) 1416 { 1417 rtx pset; 1418 1419 if (GET_CODE (p) == CODE_LABEL 1420 || GET_CODE (p) == JUMP_INSN 1421 || (GET_CODE (p) == NOTE 1422 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 1423 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 1424 break; 1425 1426 /* ??? We can't scan past the end of a basic block without 1427 updating the register lifetime info 1428 (REG_DEAD/basic_block_live_at_start). 1429 A CALL_INSN might be the last insn of a basic block, if 1430 it is inside an EH region. There is no easy way to tell, 1431 so we just always break when we see a CALL_INSN if 1432 flag_exceptions is nonzero. */ 1433 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 1434 break; 1435 1436 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 1437 continue; 1438 1439 length++; 1440 1441 /* ??? See if all of SRC is set in P. This test is much 1442 more conservative than it needs to be. */ 1443 pset = single_set (p); 1444 if (pset && SET_DEST (pset) == src) 1445 { 1446 /* We use validate_replace_rtx, in case there 1447 are multiple identical source operands. All of 1448 them have to be changed at the same time. */ 1449 if (validate_replace_rtx (src, dst, insn)) 1450 { 1451 if (validate_change (p, &SET_DEST (pset), 1452 dst, 0)) 1453 success = 1; 1454 else 1455 { 1456 /* Change all source operands back. 1457 This modifies the dst as a side-effect. */ 1458 validate_replace_rtx (dst, src, insn); 1459 /* Now make sure the dst is right. */ 1460 validate_change (insn, 1461 recog_operand_loc[match_no], 1462 dst, 0); 1463 } 1464 } 1465 break; 1466 } 1467 1468 if (reg_overlap_mentioned_p (src, PATTERN (p)) 1469 || reg_overlap_mentioned_p (dst, PATTERN (p))) 1470 break; 1471 1472 /* If we have passed a call instruction, and the 1473 pseudo-reg DST is not already live across a call, 1474 then don't perform the optimization. */ 1475 if (GET_CODE (p) == CALL_INSN) 1476 { 1477 num_calls++; 1478 1479 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0) 1480 break; 1481 } 1482 } 1483 1484 if (success) 1485 { 1486 int dstno, srcno; 1487 1488 /* Remove the death note for SRC from INSN. */ 1489 remove_note (insn, src_note); 1490 /* Move the death note for SRC to P if it is used 1491 there. */ 1492 if (reg_overlap_mentioned_p (src, PATTERN (p))) 1493 { 1494 XEXP (src_note, 1) = REG_NOTES (p); 1495 REG_NOTES (p) = src_note; 1496 } 1497 /* If there is a REG_DEAD note for DST on P, then remove 1498 it, because DST is now set there. */ 1499 if ((dst_note = find_reg_note (p, REG_DEAD, dst))) 1500 remove_note (p, dst_note); 1501 1502 dstno = REGNO (dst); 1503 srcno = REGNO (src); 1504 1505 REG_N_SETS (dstno)++; 1506 REG_N_SETS (srcno)--; 1507 1508 REG_N_CALLS_CROSSED (dstno) += num_calls; 1509 REG_N_CALLS_CROSSED (srcno) -= num_calls; 1510 1511 REG_LIVE_LENGTH (dstno) += length; 1512 if (REG_LIVE_LENGTH (srcno) >= 0) 1513 { 1514 REG_LIVE_LENGTH (srcno) -= length; 1515 /* REG_LIVE_LENGTH is only an approximation after 1516 combine if sched is not run, so make sure that we 1517 still have a reasonable value. */ 1518 if (REG_LIVE_LENGTH (srcno) < 2) 1519 REG_LIVE_LENGTH (srcno) = 2; 1520 } 1521 1522 /* We assume that a register is used exactly once per 1523 insn in the updates above. If this is not correct, 1524 no great harm is done. */ 1525 1526 REG_N_REFS (dstno) += 2 * loop_depth; 1527 REG_N_REFS (srcno) -= 2 * loop_depth; 1528 1529 /* If that was the only time src was set, 1530 and src was not live at the start of the 1531 function, we know that we have no more 1532 references to src; clear REG_N_REFS so it 1533 won't make reload do any work. */ 1534 if (REG_N_SETS (REGNO (src)) == 0 1535 && ! regno_uninitialized (REGNO (src))) 1536 REG_N_REFS (REGNO (src)) = 0; 1537 1538 if (regmove_dump_file) 1539 fprintf (regmove_dump_file, 1540 "Fixed operand %d of insn %d matching operand %d.\n", 1541 op_no, INSN_UID (insn), match_no); 1542 1543 break; 1544 } 1545 } 1546 1547 /* If we weren't able to replace any of the alternatives, try an 1548 alternative appoach of copying the source to the destination. */ 1549 if (!success && copy_src != NULL_RTX) 1550 copy_src_to_dest (insn, copy_src, copy_dst, loop_depth, 1551 old_max_uid); 1552 1553 } 1554 } 1555#endif /* REGISTER_CONSTRAINTS */ 1556 1557 /* In fixup_match_1, some insns may have been inserted after basic block 1558 ends. Fix that here. */ 1559 for (i = 0; i < n_basic_blocks; i++) 1560 { 1561 rtx end = BLOCK_END (i); 1562 rtx new = end; 1563 rtx next = NEXT_INSN (new); 1564 while (next != 0 && INSN_UID (next) >= old_max_uid 1565 && (i == n_basic_blocks - 1 || BLOCK_HEAD (i + 1) != next)) 1566 new = next, next = NEXT_INSN (new); 1567 BLOCK_END (i) = new; 1568 } 1569} 1570 1571/* Returns nonzero if INSN's pattern has matching constraints for any operand. 1572 Returns 0 if INSN can't be recognized, or if the alternative can't be 1573 determined. 1574 1575 Initialize the info in MATCHP based on the constraints. */ 1576 1577static int 1578find_matches (insn, matchp) 1579 rtx insn; 1580 struct match *matchp; 1581{ 1582 int likely_spilled[MAX_RECOG_OPERANDS]; 1583 int op_no; 1584 int any_matches = 0; 1585 1586 extract_insn (insn); 1587 if (! constrain_operands (0)) 1588 return 0; 1589 1590 /* Must initialize this before main loop, because the code for 1591 the commutative case may set matches for operands other than 1592 the current one. */ 1593 for (op_no = recog_n_operands; --op_no >= 0; ) 1594 matchp->with[op_no] = matchp->commutative[op_no] = -1; 1595 1596 for (op_no = 0; op_no < recog_n_operands; op_no++) 1597 { 1598 const char *p; 1599 char c; 1600 int i = 0; 1601 1602 p = recog_constraints[op_no]; 1603 1604 likely_spilled[op_no] = 0; 1605 matchp->use[op_no] = READ; 1606 matchp->early_clobber[op_no] = 0; 1607 if (*p == '=') 1608 matchp->use[op_no] = WRITE; 1609 else if (*p == '+') 1610 matchp->use[op_no] = READWRITE; 1611 1612 for (;*p && i < which_alternative; p++) 1613 if (*p == ',') 1614 i++; 1615 1616 while ((c = *p++) != '\0' && c != ',') 1617 switch (c) 1618 { 1619 case '=': 1620 break; 1621 case '+': 1622 break; 1623 case '&': 1624 matchp->early_clobber[op_no] = 1; 1625 break; 1626 case '%': 1627 matchp->commutative[op_no] = op_no + 1; 1628 matchp->commutative[op_no + 1] = op_no; 1629 break; 1630 case '0': case '1': case '2': case '3': case '4': 1631 case '5': case '6': case '7': case '8': case '9': 1632 c -= '0'; 1633 if (c < op_no && likely_spilled[(unsigned char) c]) 1634 break; 1635 matchp->with[op_no] = c; 1636 any_matches = 1; 1637 if (matchp->commutative[op_no] >= 0) 1638 matchp->with[matchp->commutative[op_no]] = c; 1639 break; 1640 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h': 1641 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u': 1642 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B': 1643 case 'C': case 'D': case 'W': case 'Y': case 'Z': 1644 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c))) 1645 likely_spilled[op_no] = 1; 1646 break; 1647 } 1648 } 1649 return any_matches; 1650} 1651 1652/* Try to replace output operand DST in SET, with input operand SRC. SET is 1653 the only set in INSN. INSN has just been recgnized and constrained. 1654 SRC is operand number OPERAND_NUMBER in INSN. 1655 DST is operand number MATCH_NUMBER in INSN. 1656 If BACKWARD is nonzero, we have been called in a backward pass. 1657 Return nonzero for success. */ 1658static int 1659fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number, 1660 match_number, regmove_dump_file) 1661 rtx insn, set, src, src_subreg, dst; 1662 int backward, operand_number, match_number; 1663 FILE *regmove_dump_file; 1664{ 1665 rtx p; 1666 rtx post_inc = 0, post_inc_set = 0, search_end = 0; 1667 int success = 0; 1668 int num_calls = 0, s_num_calls = 0; 1669 enum rtx_code code = NOTE; 1670 HOST_WIDE_INT insn_const, newconst; 1671 rtx overlap = 0; /* need to move insn ? */ 1672 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note; 1673 int length, s_length, true_loop_depth; 1674 1675 /* If SRC is marked as unchanging, we may not change it. 1676 ??? Maybe we could get better code by removing the unchanging bit 1677 instead, and changing it back if we don't succeed? */ 1678 if (RTX_UNCHANGING_P (src)) 1679 return 0; 1680 1681 if (! src_note) 1682 { 1683 /* Look for (set (regX) (op regA constX)) 1684 (set (regY) (op regA constY)) 1685 and change that to 1686 (set (regA) (op regA constX)). 1687 (set (regY) (op regA constY-constX)). 1688 This works for add and shift operations, if 1689 regA is dead after or set by the second insn. */ 1690 1691 code = GET_CODE (SET_SRC (set)); 1692 if ((code == PLUS || code == LSHIFTRT 1693 || code == ASHIFT || code == ASHIFTRT) 1694 && XEXP (SET_SRC (set), 0) == src 1695 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT) 1696 insn_const = INTVAL (XEXP (SET_SRC (set), 1)); 1697 else if (! stable_and_no_regs_but_for_p (SET_SRC (set), src, dst)) 1698 return 0; 1699 else 1700 /* We might find a src_note while scanning. */ 1701 code = NOTE; 1702 } 1703 1704 if (regmove_dump_file) 1705 fprintf (regmove_dump_file, 1706 "Could fix operand %d of insn %d matching operand %d.\n", 1707 operand_number, INSN_UID (insn), match_number); 1708 1709 /* If SRC is equivalent to a constant set in a different basic block, 1710 then do not use it for this optimization. We want the equivalence 1711 so that if we have to reload this register, we can reload the 1712 constant, rather than extending the lifespan of the register. */ 1713 if (reg_is_remote_constant_p (src, insn, get_insns ())) 1714 return 0; 1715 1716 /* Scan forward to find the next instruction that 1717 uses the output operand. If the operand dies here, 1718 then replace it in both instructions with 1719 operand_number. */ 1720 1721 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p)) 1722 { 1723 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN 1724 || (GET_CODE (p) == NOTE 1725 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG 1726 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END))) 1727 break; 1728 1729 /* ??? We can't scan past the end of a basic block without updating 1730 the register lifetime info (REG_DEAD/basic_block_live_at_start). 1731 A CALL_INSN might be the last insn of a basic block, if it is 1732 inside an EH region. There is no easy way to tell, so we just 1733 always break when we see a CALL_INSN if flag_exceptions is nonzero. */ 1734 if (flag_exceptions && GET_CODE (p) == CALL_INSN) 1735 break; 1736 1737 if (GET_RTX_CLASS (GET_CODE (p)) != 'i') 1738 continue; 1739 1740 length++; 1741 if (src_note) 1742 s_length++; 1743 1744 if (reg_set_p (src, p) || reg_set_p (dst, p) 1745 || (GET_CODE (PATTERN (p)) == USE 1746 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0)))) 1747 break; 1748 1749 /* See if all of DST dies in P. This test is 1750 slightly more conservative than it needs to be. */ 1751 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst))) 1752 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst))) 1753 { 1754 if (! src_note) 1755 { 1756 rtx q; 1757 rtx set2; 1758 1759 /* If an optimization is done, the value of SRC while P 1760 is executed will be changed. Check that this is OK. */ 1761 if (reg_overlap_mentioned_p (src, PATTERN (p))) 1762 break; 1763 for (q = p; q; q = NEXT_INSN (q)) 1764 { 1765 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN 1766 || (GET_CODE (q) == NOTE 1767 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG 1768 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) 1769 { 1770 q = 0; 1771 break; 1772 } 1773 1774 /* ??? We can't scan past the end of a basic block without 1775 updating the register lifetime info 1776 (REG_DEAD/basic_block_live_at_start). 1777 A CALL_INSN might be the last insn of a basic block, if 1778 it is inside an EH region. There is no easy way to tell, 1779 so we just always break when we see a CALL_INSN if 1780 flag_exceptions is nonzero. */ 1781 if (flag_exceptions && GET_CODE (q) == CALL_INSN) 1782 { 1783 q = 0; 1784 break; 1785 } 1786 1787 if (GET_RTX_CLASS (GET_CODE (q)) != 'i') 1788 continue; 1789 if (reg_overlap_mentioned_p (src, PATTERN (q)) 1790 || reg_set_p (src, q)) 1791 break; 1792 } 1793 if (q) 1794 set2 = single_set (q); 1795 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code 1796 || XEXP (SET_SRC (set2), 0) != src 1797 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT 1798 || (SET_DEST (set2) != src 1799 && ! find_reg_note (q, REG_DEAD, src))) 1800 { 1801 /* If this is a PLUS, we can still save a register by doing 1802 src += insn_const; 1803 P; 1804 src -= insn_const; . 1805 This also gives opportunities for subsequent 1806 optimizations in the backward pass, so do it there. */ 1807 if (code == PLUS && backward 1808 /* Don't do this if we can likely tie DST to SET_DEST 1809 of P later; we can't do this tying here if we got a 1810 hard register. */ 1811 && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst)) 1812 && single_set (p) 1813 && GET_CODE (SET_DEST (single_set (p))) == REG 1814 && (REGNO (SET_DEST (single_set (p))) 1815 < FIRST_PSEUDO_REGISTER)) 1816 /* We may only emit an insn directly after P if we 1817 are not in the shadow of a live flags register. */ 1818 && GET_MODE (p) == VOIDmode) 1819 { 1820 search_end = q; 1821 q = insn; 1822 set2 = set; 1823 newconst = -insn_const; 1824 code = MINUS; 1825 } 1826 else 1827 break; 1828 } 1829 else 1830 { 1831 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const; 1832 /* Reject out of range shifts. */ 1833 if (code != PLUS 1834 && (newconst < 0 1835 || (newconst 1836 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2)))))) 1837 break; 1838 if (code == PLUS) 1839 { 1840 post_inc = q; 1841 if (SET_DEST (set2) != src) 1842 post_inc_set = set2; 1843 } 1844 } 1845 /* We use 1 as last argument to validate_change so that all 1846 changes are accepted or rejected together by apply_change_group 1847 when it is called by validate_replace_rtx . */ 1848 validate_change (q, &XEXP (SET_SRC (set2), 1), 1849 GEN_INT (newconst), 1); 1850 } 1851 validate_change (insn, recog_operand_loc[match_number], src, 1); 1852 if (validate_replace_rtx (dst, src_subreg, p)) 1853 success = 1; 1854 break; 1855 } 1856 1857 if (reg_overlap_mentioned_p (dst, PATTERN (p))) 1858 break; 1859 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p))) 1860 { 1861 /* INSN was already checked to be movable when 1862 we found no REG_DEAD note for src on it. */ 1863 overlap = p; 1864 src_note = find_reg_note (p, REG_DEAD, src); 1865 } 1866 1867 /* If we have passed a call instruction, and the pseudo-reg SRC is not 1868 already live across a call, then don't perform the optimization. */ 1869 if (GET_CODE (p) == CALL_INSN) 1870 { 1871 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0) 1872 break; 1873 1874 num_calls++; 1875 1876 if (src_note) 1877 s_num_calls++; 1878 1879 } 1880 } 1881 1882 if (! success) 1883 return 0; 1884 1885 true_loop_depth = backward ? 2 - loop_depth : loop_depth; 1886 1887 /* Remove the death note for DST from P. */ 1888 remove_note (p, dst_note); 1889 if (code == MINUS) 1890 { 1891 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p); 1892 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT) 1893 && search_end 1894 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1)) 1895 post_inc = 0; 1896 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0); 1897 REG_N_SETS (REGNO (src))++; 1898 REG_N_REFS (REGNO (src)) += true_loop_depth; 1899 REG_LIVE_LENGTH (REGNO (src))++; 1900 } 1901 if (overlap) 1902 { 1903 /* The lifetime of src and dest overlap, 1904 but we can change this by moving insn. */ 1905 rtx pat = PATTERN (insn); 1906 if (src_note) 1907 remove_note (overlap, src_note); 1908 if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT) 1909 && code == PLUS 1910 && try_auto_increment (overlap, insn, 0, src, insn_const, 0)) 1911 insn = overlap; 1912 else 1913 { 1914 rtx notes = REG_NOTES (insn); 1915 1916 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn); 1917 PUT_CODE (insn, NOTE); 1918 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; 1919 NOTE_SOURCE_FILE (insn) = 0; 1920 /* emit_insn_after_with_line_notes has no 1921 return value, so search for the new insn. */ 1922 for (insn = p; PATTERN (insn) != pat; ) 1923 insn = PREV_INSN (insn); 1924 1925 REG_NOTES (insn) = notes; 1926 } 1927 } 1928 /* Sometimes we'd generate src = const; src += n; 1929 if so, replace the instruction that set src 1930 in the first place. */ 1931 1932 if (! overlap && (code == PLUS || code == MINUS)) 1933 { 1934 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX); 1935 rtx q, set2; 1936 int num_calls2 = 0, s_length2 = 0; 1937 1938 if (note && CONSTANT_P (XEXP (note, 0))) 1939 { 1940 for (q = PREV_INSN (insn); q; q = PREV_INSN(q)) 1941 { 1942 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN 1943 || (GET_CODE (q) == NOTE 1944 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG 1945 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) 1946 { 1947 q = 0; 1948 break; 1949 } 1950 1951 /* ??? We can't scan past the end of a basic block without 1952 updating the register lifetime info 1953 (REG_DEAD/basic_block_live_at_start). 1954 A CALL_INSN might be the last insn of a basic block, if 1955 it is inside an EH region. There is no easy way to tell, 1956 so we just always break when we see a CALL_INSN if 1957 flag_exceptions is nonzero. */ 1958 if (flag_exceptions && GET_CODE (q) == CALL_INSN) 1959 { 1960 q = 0; 1961 break; 1962 } 1963 1964 if (GET_RTX_CLASS (GET_CODE (q)) != 'i') 1965 continue; 1966 s_length2++; 1967 if (reg_set_p (src, q)) 1968 { 1969 set2 = single_set (q); 1970 break; 1971 } 1972 if (reg_overlap_mentioned_p (src, PATTERN (q))) 1973 { 1974 q = 0; 1975 break; 1976 } 1977 if (GET_CODE (p) == CALL_INSN) 1978 num_calls2++; 1979 } 1980 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2)) 1981 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0)) 1982 { 1983 PUT_CODE (q, NOTE); 1984 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED; 1985 NOTE_SOURCE_FILE (q) = 0; 1986 REG_N_SETS (REGNO (src))--; 1987 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2; 1988 REG_N_REFS (REGNO (src)) -= true_loop_depth; 1989 REG_LIVE_LENGTH (REGNO (src)) -= s_length2; 1990 insn_const = 0; 1991 } 1992 } 1993 } 1994 1995 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT) 1996 && (code == PLUS || code == MINUS) && insn_const 1997 && try_auto_increment (p, insn, 0, src, insn_const, 1)) 1998 insn = p; 1999 else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT) 2000 && post_inc 2001 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0)) 2002 post_inc = 0; 2003 /* If post_inc still prevails, try to find an 2004 insn where it can be used as a pre-in/decrement. 2005 If code is MINUS, this was already tried. */ 2006 if (post_inc && code == PLUS 2007 /* Check that newconst is likely to be usable 2008 in a pre-in/decrement before starting the search. */ 2009 && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX) 2010 || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX)) 2011 && exact_log2 (newconst)) 2012 { 2013 rtx q, inc_dest; 2014 2015 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src; 2016 for (q = post_inc; (q = NEXT_INSN (q)); ) 2017 { 2018 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN 2019 || (GET_CODE (q) == NOTE 2020 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG 2021 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END))) 2022 break; 2023 2024 /* ??? We can't scan past the end of a basic block without updating 2025 the register lifetime info (REG_DEAD/basic_block_live_at_start). 2026 A CALL_INSN might be the last insn of a basic block, if it 2027 is inside an EH region. There is no easy way to tell so we 2028 just always break when we see a CALL_INSN if flag_exceptions 2029 is nonzero. */ 2030 if (flag_exceptions && GET_CODE (q) == CALL_INSN) 2031 break; 2032 2033 if (GET_RTX_CLASS (GET_CODE (q)) != 'i') 2034 continue; 2035 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q)) 2036 || reg_set_p (src, q))) 2037 break; 2038 if (reg_set_p (inc_dest, q)) 2039 break; 2040 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q))) 2041 { 2042 try_auto_increment (q, post_inc, 2043 post_inc_set, inc_dest, newconst, 1); 2044 break; 2045 } 2046 } 2047 } 2048 /* Move the death note for DST to INSN if it is used 2049 there. */ 2050 if (reg_overlap_mentioned_p (dst, PATTERN (insn))) 2051 { 2052 XEXP (dst_note, 1) = REG_NOTES (insn); 2053 REG_NOTES (insn) = dst_note; 2054 } 2055 2056 if (src_note) 2057 { 2058 /* Move the death note for SRC from INSN to P. */ 2059 if (! overlap) 2060 remove_note (insn, src_note); 2061 XEXP (src_note, 1) = REG_NOTES (p); 2062 REG_NOTES (p) = src_note; 2063 2064 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls; 2065 } 2066 2067 REG_N_SETS (REGNO (src))++; 2068 REG_N_SETS (REGNO (dst))--; 2069 2070 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls; 2071 2072 REG_LIVE_LENGTH (REGNO (src)) += s_length; 2073 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0) 2074 { 2075 REG_LIVE_LENGTH (REGNO (dst)) -= length; 2076 /* REG_LIVE_LENGTH is only an approximation after 2077 combine if sched is not run, so make sure that we 2078 still have a reasonable value. */ 2079 if (REG_LIVE_LENGTH (REGNO (dst)) < 2) 2080 REG_LIVE_LENGTH (REGNO (dst)) = 2; 2081 } 2082 2083 /* We assume that a register is used exactly once per 2084 insn in the updates above. If this is not correct, 2085 no great harm is done. */ 2086 2087 REG_N_REFS (REGNO (src)) += 2 * true_loop_depth; 2088 REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth; 2089 2090 /* If that was the only time dst was set, 2091 and dst was not live at the start of the 2092 function, we know that we have no more 2093 references to dst; clear REG_N_REFS so it 2094 won't make reload do any work. */ 2095 if (REG_N_SETS (REGNO (dst)) == 0 2096 && ! regno_uninitialized (REGNO (dst))) 2097 REG_N_REFS (REGNO (dst)) = 0; 2098 2099 if (regmove_dump_file) 2100 fprintf (regmove_dump_file, 2101 "Fixed operand %d of insn %d matching operand %d.\n", 2102 operand_number, INSN_UID (insn), match_number); 2103 return 1; 2104} 2105 2106 2107/* return nonzero if X is stable and mentions no regsiters but for 2108 mentioning SRC or mentioning / changing DST . If in doubt, presume 2109 it is unstable. 2110 The rationale is that we want to check if we can move an insn easily 2111 while just paying attention to SRC and DST. A register is considered 2112 stable if it has the RTX_UNCHANGING_P bit set, but that would still 2113 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't 2114 want any registers but SRC and DST. */ 2115static int 2116stable_and_no_regs_but_for_p (x, src, dst) 2117 rtx x, src, dst; 2118{ 2119 RTX_CODE code = GET_CODE (x); 2120 switch (GET_RTX_CLASS (code)) 2121 { 2122 case '<': case '1': case 'c': case '2': case 'b': case '3': 2123 { 2124 int i; 2125 char *fmt = GET_RTX_FORMAT (code); 2126 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2127 if (fmt[i] == 'e' 2128 && ! stable_and_no_regs_but_for_p (XEXP (x, i), src, dst)) 2129 return 0; 2130 return 1; 2131 } 2132 case 'o': 2133 if (code == REG) 2134 return x == src || x == dst; 2135 /* If this is a MEM, look inside - there might be a register hidden in 2136 the address of an unchanging MEM. */ 2137 if (code == MEM 2138 && ! stable_and_no_regs_but_for_p (XEXP (x, 0), src, dst)) 2139 return 0; 2140 /* fall through */ 2141 default: 2142 return ! rtx_unstable_p (x); 2143 } 2144} 2145 2146/* Test if regmove seems profitable for this target. Regmove is useful only 2147 if some common patterns are two address, i.e. require matching constraints, 2148 so we check that condition here. */ 2149 2150int 2151regmove_profitable_p () 2152{ 2153#ifdef REGISTER_CONSTRAINTS 2154 struct match match; 2155 enum machine_mode mode; 2156 optab tstoptab = add_optab; 2157 do /* check add_optab and ashl_optab */ 2158 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; 2159 mode = GET_MODE_WIDER_MODE (mode)) 2160 { 2161 int icode = (int) tstoptab->handlers[(int) mode].insn_code; 2162 rtx reg0, reg1, reg2, pat; 2163 int i; 2164 2165 if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing) 2166 continue; 2167 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 2168 if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i)) 2169 break; 2170 if (i + 2 >= FIRST_PSEUDO_REGISTER) 2171 break; 2172 reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i); 2173 reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1); 2174 reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2); 2175 if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode) 2176 || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode) 2177 || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode)) 2178 break; 2179 pat = GEN_FCN (icode) (reg0, reg1, reg2); 2180 if (! pat) 2181 continue; 2182 if (GET_CODE (pat) == SEQUENCE) 2183 pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1); 2184 else 2185 pat = make_insn_raw (pat); 2186 if (! single_set (pat) 2187 || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code) 2188 /* Unexpected complexity; don't need to handle this unless 2189 we find a machine where this occurs and regmove should 2190 be enabled. */ 2191 break; 2192 if (find_matches (pat, &match)) 2193 return 1; 2194 break; 2195 } 2196 while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1)); 2197#endif /* REGISTER_CONSTRAINTS */ 2198 return 0; 2199} 2200