1157248Sscottl/* Subroutines used for code generation on IBM RS/6000. 2157248Sscottl Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001 3157248Sscottl Free Software Foundation, Inc. 4157248Sscottl Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) 5157248Sscottl 6157248SscottlThis file is part of GNU CC. 7157248Sscottl 8157248SscottlGNU CC is free software; you can redistribute it and/or modify 9157248Sscottlit under the terms of the GNU General Public License as published by 10157248Sscottlthe Free Software Foundation; either version 2, or (at your option) 11157248Sscottlany later version. 12157248Sscottl 13157248SscottlGNU CC is distributed in the hope that it will be useful, 14157248Sscottlbut WITHOUT ANY WARRANTY; without even the implied warranty of 15157248SscottlMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16157248SscottlGNU General Public License for more details. 17157248Sscottl 18157248SscottlYou should have received a copy of the GNU General Public License 19157248Sscottlalong with GNU CC; see the file COPYING. If not, write to 20157248Sscottlthe Free Software Foundation, 59 Temple Place - Suite 330, 21157248SscottlBoston, MA 02111-1307, USA. */ 22157248Sscottl 23157248Sscottl#include "config.h" 24157248Sscottl#include "system.h" 25157248Sscottl#include "rtl.h" 26157248Sscottl#include "regs.h" 27253362Spluknet#include "hard-reg-set.h" 28157248Sscottl#include "real.h" 29157248Sscottl#include "insn-config.h" 30157248Sscottl#include "conditions.h" 31157248Sscottl#include "insn-flags.h" 32157248Sscottl#include "insn-attr.h" 33157248Sscottl#include "flags.h" 34157355Sbrueffer#include "recog.h" 35157355Sbrueffer#include "expr.h" 36157355Sbrueffer#include "obstack.h" 37157355Sbrueffer#include "tree.h" 38157248Sscottl#include "except.h" 39157248Sscottl#include "function.h" 40157355Sbrueffer#include "output.h" 41157355Sbrueffer#include "toplev.h" 42157355Sbrueffer 43157355Sbrueffer#ifndef TARGET_NO_PROTOTYPE 44157355Sbrueffer#define TARGET_NO_PROTOTYPE 0 45157355Sbrueffer#endif 46157355Sbrueffer 47157355Sbruefferextern char *language_string; 48157248Sscottlextern int profile_block_flag; 49157248Sscottl 50157248Sscottl#define min(A,B) ((A) < (B) ? (A) : (B)) 51157248Sscottl#define max(A,B) ((A) > (B) ? (A) : (B)) 52157248Sscottl 53157248Sscottl/* Target cpu type */ 54157248Sscottl 55157248Sscottlenum processor_type rs6000_cpu; 56157248Sscottlstruct rs6000_cpu_select rs6000_select[3] = 57157248Sscottl{ 58157248Sscottl /* switch name, tune arch */ 59157248Sscottl { (const char *)0, "--with-cpu=", 1, 1 }, 60157248Sscottl { (const char *)0, "-mcpu=", 1, 1 }, 61157248Sscottl { (const char *)0, "-mtune=", 1, 0 }, 62157248Sscottl}; 63157270Sbrueffer 64157270Sbrueffer/* Set to non-zero by "fix" operation to indicate that itrunc and 65157270Sbrueffer uitrunc must be defined. */ 66171821Sjhb 67171821Sjhbint rs6000_trunc_used; 68171821Sjhb 69171821Sjhb/* Set to non-zero once they have been defined. */ 70171821Sjhb 71171821Sjhbstatic int trunc_defined; 72171821Sjhb 73171821Sjhb/* Set to non-zero once AIX common-mode calls have been defined. */ 74171821Sjhbstatic int common_mode_defined; 75270732Smarkj 76270732Smarkj/* Save information from a "cmpxx" operation until the branch or scc is 77270732Smarkj emitted. */ 78270732Smarkjrtx rs6000_compare_op0, rs6000_compare_op1; 79270732Smarkjint rs6000_compare_fp_p; 80270732Smarkj 81270732Smarkj#ifdef USING_SVR4_H 82270732Smarkj/* Label number of label created for -mrelocatable, to call to so we can 83270732Smarkj get the address of the GOT section */ 84270732Smarkjint rs6000_pic_labelno; 85270732Smarkjint rs6000_pic_func_labelno; 86157248Sscottl 87157248Sscottl/* Which abi to adhere to */ 88157248Sscottlconst char *rs6000_abi_name = RS6000_ABI_NAME; 89157248Sscottl 90157248Sscottl/* Semantics of the small data area */ 91157248Sscottlenum rs6000_sdata_type rs6000_sdata = SDATA_DATA; 92157248Sscottl 93199739Sbrueffer/* Which small data model to use */ 94199739Sbruefferconst char *rs6000_sdata_name = (char *)0; 95157248Sscottl#endif 96157248Sscottl 97157248Sscottl/* Whether a System V.4 varargs area was created. */ 98157248Sscottlint rs6000_sysv_varargs_p; 99245872Seadler 100245872Seadler/* ABI enumeration available for subtarget to use. */ 101199739Sbruefferenum rs6000_abi rs6000_current_abi; 102175408Sambrisko 103175408Sambrisko/* Offset & size for fpmem stack locations used for converting between 104175408Sambrisko float and integral types. */ 105175408Sambriskoint rs6000_fpmem_offset; 106199825Sbruefferint rs6000_fpmem_size; 107245872Seadler 108245872Seadler/* Debug flags */ 109245872Seadlerconst char *rs6000_debug_name; 110245872Seadlerint rs6000_debug_stack; /* debug stack applications */ 111207975Sbruefferint rs6000_debug_arg; /* debug argument handling */ 112207975Sbrueffer 113253362Spluknet/* Flag to say the TOC is initialized */ 114253362Spluknetint toc_initialized; 115199825Sbrueffer 116201397Sbrueffer 117245872Seadler/* Default register names. */ 118245872Seadlerchar rs6000_reg_names[][8] = 119201397Sbrueffer{ 120157248Sscottl "0", "1", "2", "3", "4", "5", "6", "7", 121157248Sscottl "8", "9", "10", "11", "12", "13", "14", "15", 122157248Sscottl "16", "17", "18", "19", "20", "21", "22", "23", 123157248Sscottl "24", "25", "26", "27", "28", "29", "30", "31", 124157248Sscottl "0", "1", "2", "3", "4", "5", "6", "7", 125157248Sscottl "8", "9", "10", "11", "12", "13", "14", "15", 126157248Sscottl "16", "17", "18", "19", "20", "21", "22", "23", 127157248Sscottl "24", "25", "26", "27", "28", "29", "30", "31", 128171821Sjhb "mq", "lr", "ctr","ap", 129171821Sjhb "0", "1", "2", "3", "4", "5", "6", "7", 130171821Sjhb "fpmem" 131171821Sjhb}; 132171821Sjhb 133157248Sscottl#ifdef TARGET_REGNAMES 134157270Sbruefferstatic char alt_reg_names[][8] = 135196700Strasz{ 136196700Strasz "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", 137157248Sscottl "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", 138157248Sscottl "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", 139157248Sscottl "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", 140157270Sbrueffer "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", 141157465Sscottl "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15", 142157248Sscottl "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23", 143157270Sbrueffer "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31", 144157270Sbrueffer "mq", "lr", "ctr", "ap", 145157270Sbrueffer "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7", 146157248Sscottl "fpmem" 147157248Sscottl}; 148157248Sscottl#endif 149 150#ifndef MASK_STRICT_ALIGN 151#define MASK_STRICT_ALIGN 0 152#endif 153 154/* Override command line options. Mostly we process the processor 155 type and sometimes adjust other TARGET_ options. */ 156 157void 158rs6000_override_options (default_cpu) 159 const char *default_cpu; 160{ 161 size_t i, j; 162 struct rs6000_cpu_select *ptr; 163 164 /* Simplify the entries below by making a mask for any POWER 165 variant and any PowerPC variant. */ 166 167#define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING) 168#define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \ 169 | MASK_PPC_GFXOPT | MASK_POWERPC64) 170#define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT) 171 172 static struct ptt 173 { 174 const char *name; /* Canonical processor name. */ 175 enum processor_type processor; /* Processor type enum value. */ 176 int target_enable; /* Target flags to enable. */ 177 int target_disable; /* Target flags to disable. */ 178 } processor_target_table[] 179 = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS, 180 POWER_MASKS | POWERPC_MASKS}, 181 {"power", PROCESSOR_POWER, 182 MASK_POWER | MASK_MULTIPLE | MASK_STRING, 183 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, 184 {"power2", PROCESSOR_POWER, 185 MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING, 186 POWERPC_MASKS | MASK_NEW_MNEMONICS}, 187 {"powerpc", PROCESSOR_POWERPC, 188 MASK_POWERPC | MASK_NEW_MNEMONICS, 189 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, 190 {"rios", PROCESSOR_RIOS1, 191 MASK_POWER | MASK_MULTIPLE | MASK_STRING, 192 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, 193 {"rios1", PROCESSOR_RIOS1, 194 MASK_POWER | MASK_MULTIPLE | MASK_STRING, 195 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, 196 {"rsc", PROCESSOR_PPC601, 197 MASK_POWER | MASK_MULTIPLE | MASK_STRING, 198 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, 199 {"rsc1", PROCESSOR_PPC601, 200 MASK_POWER | MASK_MULTIPLE | MASK_STRING, 201 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS}, 202 {"rios2", PROCESSOR_RIOS2, 203 MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2, 204 POWERPC_MASKS | MASK_NEW_MNEMONICS}, 205 {"401", PROCESSOR_PPC403, 206 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, 207 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, 208 {"403", PROCESSOR_PPC403, 209 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN, 210 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, 211 {"505", PROCESSOR_MPCCORE, 212 MASK_POWERPC | MASK_NEW_MNEMONICS, 213 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, 214 {"601", PROCESSOR_PPC601, 215 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING, 216 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64}, 217 {"602", PROCESSOR_PPC603, 218 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, 219 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 220 {"603", PROCESSOR_PPC603, 221 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, 222 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 223 {"603e", PROCESSOR_PPC603, 224 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, 225 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 226 {"ec603e", PROCESSOR_PPC603, 227 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, 228 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, 229 {"604", PROCESSOR_PPC604, 230 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, 231 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 232 {"604e", PROCESSOR_PPC604e, 233 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, 234 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 235 {"620", PROCESSOR_PPC620, 236 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, 237 POWER_MASKS | MASK_PPC_GPOPT}, 238 {"740", PROCESSOR_PPC750, 239 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, 240 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 241 {"750", PROCESSOR_PPC750, 242 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS, 243 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}, 244 {"801", PROCESSOR_MPCCORE, 245 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, 246 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, 247 {"821", PROCESSOR_MPCCORE, 248 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, 249 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, 250 {"823", PROCESSOR_MPCCORE, 251 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, 252 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}, 253 {"860", PROCESSOR_MPCCORE, 254 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS, 255 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}}; 256 257 size_t ptt_size = sizeof (processor_target_table) / sizeof (struct ptt); 258 259 int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */ 260 int string = TARGET_STRING; /* save current -mstring/-mno-string status */ 261 262 profile_block_flag = 0; 263 264 /* Identify the processor type */ 265 rs6000_select[0].string = default_cpu; 266 rs6000_cpu = PROCESSOR_DEFAULT; 267 268 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) 269 { 270 ptr = &rs6000_select[i]; 271 if (ptr->string != (char *)0 && ptr->string[0] != '\0') 272 { 273 for (j = 0; j < ptt_size; j++) 274 if (! strcmp (ptr->string, processor_target_table[j].name)) 275 { 276 if (ptr->set_tune_p) 277 rs6000_cpu = processor_target_table[j].processor; 278 279 if (ptr->set_arch_p) 280 { 281 target_flags |= processor_target_table[j].target_enable; 282 target_flags &= ~processor_target_table[j].target_disable; 283 } 284 break; 285 } 286 287 if (i == ptt_size) 288 error ("bad value (%s) for %s switch", ptr->string, ptr->name); 289 } 290 } 291 292 /* If we are optimizing big endian systems for space, use the 293 store multiple instructions. */ 294 if (BYTES_BIG_ENDIAN && optimize_size) 295 target_flags |= MASK_MULTIPLE; 296 297 /* If -mmultiple or -mno-multiple was explicitly used, don't 298 override with the processor default */ 299 if (TARGET_MULTIPLE_SET) 300 target_flags = (target_flags & ~MASK_MULTIPLE) | multiple; 301 302 /* If -mstring or -mno-string was explicitly used, don't 303 override with the processor default */ 304 if (TARGET_STRING_SET) 305 target_flags = (target_flags & ~MASK_STRING) | string; 306 307 /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu 308 is a 750, because the hardware doesn't support the instructions used in 309 little endian mode, and causes an alignment trap. The 750 does not cause 310 an alignment trap (except when the target is unaligned). */ 311 312 if (! BYTES_BIG_ENDIAN && rs6000_cpu != PROCESSOR_PPC750) 313 { 314 if (TARGET_MULTIPLE) 315 { 316 target_flags &= ~MASK_MULTIPLE; 317 if (TARGET_MULTIPLE_SET) 318 warning ("-mmultiple is not supported on little endian systems"); 319 } 320 321 if (TARGET_STRING) 322 { 323 target_flags &= ~MASK_STRING; 324 if (TARGET_STRING_SET) 325 warning ("-mstring is not supported on little endian systems"); 326 } 327 } 328 329 if (flag_pic && (DEFAULT_ABI == ABI_AIX)) 330 { 331 warning ("-f%s ignored for AIX (all code is position independent)", 332 (flag_pic > 1) ? "PIC" : "pic"); 333 flag_pic = 0; 334 } 335 336 /* Set debug flags */ 337 if (rs6000_debug_name) 338 { 339 if (! strcmp (rs6000_debug_name, "all")) 340 rs6000_debug_stack = rs6000_debug_arg = 1; 341 else if (! strcmp (rs6000_debug_name, "stack")) 342 rs6000_debug_stack = 1; 343 else if (! strcmp (rs6000_debug_name, "arg")) 344 rs6000_debug_arg = 1; 345 else 346 error ("Unknown -mdebug-%s switch", rs6000_debug_name); 347 } 348 349#ifdef TARGET_REGNAMES 350 /* If the user desires alternate register names, copy in the alternate names 351 now. */ 352 if (TARGET_REGNAMES) 353 bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, 354 sizeof (rs6000_reg_names)); 355#endif 356 357#ifdef SUBTARGET_OVERRIDE_OPTIONS 358 SUBTARGET_OVERRIDE_OPTIONS; 359#endif 360} 361 362void 363optimization_options (level, size) 364 int level; 365 int size ATTRIBUTE_UNUSED; 366{ 367#ifdef HAVE_decrement_and_branch_on_count 368 /* When optimizing, enable use of BCT instruction. */ 369 if (level >= 1) 370 flag_branch_on_count_reg = 1; 371#endif 372} 373 374/* Do anything needed at the start of the asm file. */ 375 376void 377rs6000_file_start (file, default_cpu) 378 FILE *file; 379 const char *default_cpu; 380{ 381 size_t i; 382 char buffer[80]; 383 const char *start = buffer; 384 struct rs6000_cpu_select *ptr; 385 386 if (flag_verbose_asm) 387 { 388 sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START); 389 rs6000_select[0].string = default_cpu; 390 391 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++) 392 { 393 ptr = &rs6000_select[i]; 394 if (ptr->string != (char *)0 && ptr->string[0] != '\0') 395 { 396 fprintf (file, "%s %s%s", start, ptr->name, ptr->string); 397 start = ""; 398 } 399 } 400 401#ifdef USING_SVR4_H 402 switch (rs6000_sdata) 403 { 404 case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break; 405 case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break; 406 case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break; 407 case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break; 408 } 409 410 if (rs6000_sdata && g_switch_value) 411 { 412 fprintf (file, "%s -G %d", start, g_switch_value); 413 start = ""; 414 } 415#endif 416 417 if (*start == '\0') 418 fputs ("\n", file); 419 } 420} 421 422 423/* Create a CONST_DOUBLE from a string. */ 424 425struct rtx_def * 426rs6000_float_const (string, mode) 427 const char *string; 428 enum machine_mode mode; 429{ 430 REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode); 431 return immed_real_const_1 (value, mode); 432} 433 434/* Return non-zero if this function is known to have a null epilogue. */ 435 436int 437direct_return () 438{ 439 if (reload_completed) 440 { 441 rs6000_stack_t *info = rs6000_stack_info (); 442 443 if (info->first_gp_reg_save == 32 444 && info->first_fp_reg_save == 64 445 && !info->lr_save_p 446 && !info->cr_save_p 447 && !info->push_p) 448 return 1; 449 } 450 451 return 0; 452} 453 454/* Returns 1 always. */ 455 456int 457any_operand (op, mode) 458 register rtx op ATTRIBUTE_UNUSED; 459 enum machine_mode mode ATTRIBUTE_UNUSED; 460{ 461 return 1; 462} 463 464/* Returns 1 if op is the count register */ 465int 466count_register_operand(op, mode) 467 register rtx op; 468 enum machine_mode mode ATTRIBUTE_UNUSED; 469{ 470 if (GET_CODE (op) != REG) 471 return 0; 472 473 if (REGNO (op) == COUNT_REGISTER_REGNUM) 474 return 1; 475 476 if (REGNO (op) > FIRST_PSEUDO_REGISTER) 477 return 1; 478 479 return 0; 480} 481 482/* Returns 1 if op is memory location for float/int conversions that masquerades 483 as a register. */ 484int 485fpmem_operand(op, mode) 486 register rtx op; 487 enum machine_mode mode ATTRIBUTE_UNUSED; 488{ 489 if (GET_CODE (op) != REG) 490 return 0; 491 492 if (FPMEM_REGNO_P (REGNO (op))) 493 return 1; 494 495#if 0 496 if (REGNO (op) > FIRST_PSEUDO_REGISTER) 497 return 1; 498#endif 499 500 return 0; 501} 502 503/* Return 1 if OP is a constant that can fit in a D field. */ 504 505int 506short_cint_operand (op, mode) 507 register rtx op; 508 enum machine_mode mode ATTRIBUTE_UNUSED; 509{ 510 return ((GET_CODE (op) == CONST_INT 511 && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) < 0x10000)); 512} 513 514/* Similar for a unsigned D field. */ 515 516int 517u_short_cint_operand (op, mode) 518 register rtx op; 519 enum machine_mode mode ATTRIBUTE_UNUSED; 520{ 521 return (GET_CODE (op) == CONST_INT 522 && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff)) == 0); 523} 524 525/* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */ 526 527int 528non_short_cint_operand (op, mode) 529 register rtx op; 530 enum machine_mode mode ATTRIBUTE_UNUSED; 531{ 532 return (GET_CODE (op) == CONST_INT 533 && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000); 534} 535 536/* Returns 1 if OP is a register that is not special (i.e., not MQ, 537 ctr, or lr). */ 538 539int 540gpc_reg_operand (op, mode) 541 register rtx op; 542 enum machine_mode mode; 543{ 544 return (register_operand (op, mode) 545 && (GET_CODE (op) != REG 546 || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op))) 547 || REGNO (op) < 64)); 548} 549 550/* Returns 1 if OP is either a pseudo-register or a register denoting a 551 CR field. */ 552 553int 554cc_reg_operand (op, mode) 555 register rtx op; 556 enum machine_mode mode; 557{ 558 return (register_operand (op, mode) 559 && (GET_CODE (op) != REG 560 || REGNO (op) >= FIRST_PSEUDO_REGISTER 561 || CR_REGNO_P (REGNO (op)))); 562} 563 564/* Returns 1 if OP is either a pseudo-register or a register denoting a 565 CR field that isn't CR0. */ 566 567int 568cc_reg_not_cr0_operand (op, mode) 569 register rtx op; 570 enum machine_mode mode; 571{ 572 return (register_operand (op, mode) 573 && (GET_CODE (op) != REG 574 || REGNO (op) >= FIRST_PSEUDO_REGISTER 575 || CR_REGNO_NOT_CR0_P (REGNO (op)))); 576} 577 578/* Returns 1 if OP is either a constant integer valid for a D-field or a 579 non-special register. If a register, it must be in the proper mode unless 580 MODE is VOIDmode. */ 581 582int 583reg_or_short_operand (op, mode) 584 register rtx op; 585 enum machine_mode mode; 586{ 587 return short_cint_operand (op, mode) || gpc_reg_operand (op, mode); 588} 589 590/* Similar, except check if the negation of the constant would be valid for 591 a D-field. */ 592 593int 594reg_or_neg_short_operand (op, mode) 595 register rtx op; 596 enum machine_mode mode; 597{ 598 if (GET_CODE (op) == CONST_INT) 599 return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P'); 600 601 return gpc_reg_operand (op, mode); 602} 603 604/* Return 1 if the operand is either a register or an integer whose high-order 605 16 bits are zero. */ 606 607int 608reg_or_u_short_operand (op, mode) 609 register rtx op; 610 enum machine_mode mode; 611{ 612 return u_short_cint_operand (op, mode) || gpc_reg_operand (op, mode); 613} 614 615/* Return 1 is the operand is either a non-special register or ANY 616 constant integer. */ 617 618int 619reg_or_cint_operand (op, mode) 620 register rtx op; 621 enum machine_mode mode; 622{ 623 return (GET_CODE (op) == CONST_INT 624 || gpc_reg_operand (op, mode)); 625} 626 627/* Return 1 is the operand is either a non-special register or ANY 628 32-bit unsigned constant integer. */ 629 630int 631reg_or_u_cint_operand (op, mode) 632 register rtx op; 633 enum machine_mode mode; 634{ 635 return (gpc_reg_operand (op, mode) 636 || (GET_CODE (op) == CONST_INT 637#if HOST_BITS_PER_WIDE_INT != 32 638 && INTVAL (op) < ((HOST_WIDE_INT) 1 << 32) 639#endif 640 && INTVAL (op) > 0) 641#if HOST_BITS_PER_WIDE_INT == 32 642 || (GET_CODE (op) == CONST_DOUBLE 643 && CONST_DOUBLE_HIGH (op) == 0) 644#endif 645 ); 646} 647 648/* Return 1 if the operand is an operand that can be loaded via the GOT */ 649 650int 651got_operand (op, mode) 652 register rtx op; 653 enum machine_mode mode ATTRIBUTE_UNUSED; 654{ 655 return (GET_CODE (op) == SYMBOL_REF 656 || GET_CODE (op) == CONST 657 || GET_CODE (op) == LABEL_REF); 658} 659 660/* Return 1 if the operand is a simple references that can be loaded via 661 the GOT (labels involving addition aren't allowed). */ 662 663int 664got_no_const_operand (op, mode) 665 register rtx op; 666 enum machine_mode mode ATTRIBUTE_UNUSED; 667{ 668 return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF); 669} 670 671/* Return the number of instructions it takes to form a constant in an 672 integer register. */ 673 674static int 675num_insns_constant_wide (value) 676 HOST_WIDE_INT value; 677{ 678 /* signed constant loadable with {cal|addi} */ 679 if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000) 680 return 1; 681 682#if HOST_BITS_PER_WIDE_INT == 32 683 /* constant loadable with {cau|addis} */ 684 else if ((value & 0xffff) == 0) 685 return 1; 686 687#else 688 /* constant loadable with {cau|addis} */ 689 else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0) 690 return 1; 691 692 else if (TARGET_64BIT) 693 { 694 HOST_WIDE_INT low = value & 0xffffffff; 695 HOST_WIDE_INT high = value >> 32; 696 697 if (high == 0 && (low & 0x80000000) == 0) 698 return 2; 699 700 else if (high == 0xffffffff && (low & 0x80000000) != 0) 701 return 2; 702 703 else if (!low) 704 return num_insns_constant_wide (high) + 1; 705 706 else 707 return (num_insns_constant_wide (high) 708 + num_insns_constant_wide (low) + 1); 709 } 710#endif 711 712 else 713 return 2; 714} 715 716int 717num_insns_constant (op, mode) 718 rtx op; 719 enum machine_mode mode; 720{ 721 if (GET_CODE (op) == CONST_INT) 722 return num_insns_constant_wide (INTVAL (op)); 723 724 else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode) 725 { 726 long l; 727 REAL_VALUE_TYPE rv; 728 729 REAL_VALUE_FROM_CONST_DOUBLE (rv, op); 730 REAL_VALUE_TO_TARGET_SINGLE (rv, l); 731 return num_insns_constant_wide ((HOST_WIDE_INT)l); 732 } 733 734 else if (GET_CODE (op) == CONST_DOUBLE) 735 { 736 HOST_WIDE_INT low; 737 HOST_WIDE_INT high; 738 long l[2]; 739 REAL_VALUE_TYPE rv; 740 int endian = (WORDS_BIG_ENDIAN == 0); 741 742 if (mode == VOIDmode || mode == DImode) 743 { 744 high = CONST_DOUBLE_HIGH (op); 745 low = CONST_DOUBLE_LOW (op); 746 } 747 else 748 { 749 REAL_VALUE_FROM_CONST_DOUBLE (rv, op); 750 REAL_VALUE_TO_TARGET_DOUBLE (rv, l); 751 high = l[endian]; 752 low = l[1 - endian]; 753 } 754 755 if (TARGET_32BIT) 756 return (num_insns_constant_wide (low) 757 + num_insns_constant_wide (high)); 758 759 else 760 { 761 if (high == 0 && (low & 0x80000000) == 0) 762 return num_insns_constant_wide (low); 763 764 else if (((high & 0xffffffff) == 0xffffffff) 765 && ((low & 0x80000000) != 0)) 766 return num_insns_constant_wide (low); 767 768 else if (mask64_operand (op, mode)) 769 return 2; 770 771 else if (low == 0) 772 return num_insns_constant_wide (high) + 1; 773 774 else 775 return (num_insns_constant_wide (high) 776 + num_insns_constant_wide (low) + 1); 777 } 778 } 779 780 else 781 abort (); 782} 783 784/* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register 785 with one instruction per word. We only do this if we can safely read 786 CONST_DOUBLE_{LOW,HIGH}. */ 787 788int 789easy_fp_constant (op, mode) 790 register rtx op; 791 register enum machine_mode mode; 792{ 793 if (GET_CODE (op) != CONST_DOUBLE 794 || GET_MODE (op) != mode 795 || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode)) 796 return 0; 797 798 /* Consider all constants with -msoft-float to be easy */ 799 if (TARGET_SOFT_FLOAT && mode != DImode) 800 return 1; 801 802 /* If we are using V.4 style PIC, consider all constants to be hard */ 803 if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) 804 return 0; 805 806#ifdef TARGET_RELOCATABLE 807 /* Similarly if we are using -mrelocatable, consider all constants to be hard */ 808 if (TARGET_RELOCATABLE) 809 return 0; 810#endif 811 812 if (mode == DFmode) 813 { 814 long k[2]; 815 REAL_VALUE_TYPE rv; 816 817 REAL_VALUE_FROM_CONST_DOUBLE (rv, op); 818 REAL_VALUE_TO_TARGET_DOUBLE (rv, k); 819 820 return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1 821 && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1); 822 } 823 824 else if (mode == SFmode) 825 { 826 long l; 827 REAL_VALUE_TYPE rv; 828 829 REAL_VALUE_FROM_CONST_DOUBLE (rv, op); 830 REAL_VALUE_TO_TARGET_SINGLE (rv, l); 831 832 return num_insns_constant_wide (l) == 1; 833 } 834 835 else if (mode == DImode) 836 return ((TARGET_64BIT 837 && GET_CODE (op) == CONST_DOUBLE && CONST_DOUBLE_LOW (op) == 0) 838 || (num_insns_constant (op, DImode) <= 2)); 839 840 else 841 abort (); 842} 843 844/* Return 1 if the operand is in volatile memory. Note that during the 845 RTL generation phase, memory_operand does not return TRUE for 846 volatile memory references. So this function allows us to 847 recognize volatile references where its safe. */ 848 849int 850volatile_mem_operand (op, mode) 851 register rtx op; 852 enum machine_mode mode; 853{ 854 if (GET_CODE (op) != MEM) 855 return 0; 856 857 if (!MEM_VOLATILE_P (op)) 858 return 0; 859 860 if (mode != GET_MODE (op)) 861 return 0; 862 863 if (reload_completed) 864 return memory_operand (op, mode); 865 866 if (reload_in_progress) 867 return strict_memory_address_p (mode, XEXP (op, 0)); 868 869 return memory_address_p (mode, XEXP (op, 0)); 870} 871 872/* Return 1 if the operand is an offsettable memory operand. */ 873 874int 875offsettable_mem_operand (op, mode) 876 register rtx op; 877 enum machine_mode mode; 878{ 879 return ((GET_CODE (op) == MEM) 880 && offsettable_address_p (reload_completed || reload_in_progress, 881 mode, XEXP (op, 0))); 882} 883 884/* Return 1 if the operand is either an easy FP constant (see above) or 885 memory. */ 886 887int 888mem_or_easy_const_operand (op, mode) 889 register rtx op; 890 enum machine_mode mode; 891{ 892 return memory_operand (op, mode) || easy_fp_constant (op, mode); 893} 894 895/* Return 1 if the operand is either a non-special register or an item 896 that can be used as the operand of an SI add insn. */ 897 898int 899add_operand (op, mode) 900 register rtx op; 901 enum machine_mode mode; 902{ 903 return (reg_or_short_operand (op, mode) 904 || (GET_CODE (op) == CONST_INT 905 && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0)); 906} 907 908/* Return 1 if OP is a constant but not a valid add_operand. */ 909 910int 911non_add_cint_operand (op, mode) 912 register rtx op; 913 enum machine_mode mode ATTRIBUTE_UNUSED; 914{ 915 return (GET_CODE (op) == CONST_INT 916 && (unsigned HOST_WIDE_INT) (INTVAL (op) + 0x8000) >= 0x10000 917 && (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0); 918} 919 920/* Return 1 if the operand is a non-special register or a constant that 921 can be used as the operand of an OR or XOR insn on the RS/6000. */ 922 923int 924logical_operand (op, mode) 925 register rtx op; 926 enum machine_mode mode; 927{ 928 return (gpc_reg_operand (op, mode) 929 || (GET_CODE (op) == CONST_INT 930#if HOST_BITS_PER_WIDE_INT != 32 931 && INTVAL (op) > 0 932 && INTVAL (op) < ((HOST_WIDE_INT) 1 << 32) 933#endif 934 && ((INTVAL (op) & GET_MODE_MASK (mode) 935 & (~ (HOST_WIDE_INT) 0xffff)) == 0 936 || (INTVAL (op) & GET_MODE_MASK (mode) 937 & (~ (unsigned HOST_WIDE_INT) 0xffff0000u)) == 0))); 938} 939 940/* Return 1 if the operand is a non-special register or a 32-bit constant 941 that can be used as the operand of an OR or XOR insn on the RS/6000. */ 942 943int 944logical_u_operand (op, mode) 945 register rtx op; 946 enum machine_mode mode; 947{ 948 return (gpc_reg_operand (op, mode) 949 || (GET_CODE (op) == CONST_INT 950 && INTVAL (op) > 0 951#if HOST_BITS_PER_WIDE_INT != 32 952 && INTVAL (op) < ((HOST_WIDE_INT) 1 << 32) 953#endif 954 && ((INTVAL (op) & GET_MODE_MASK (mode) 955 & (~ (HOST_WIDE_INT) 0xffff)) == 0 956 || (INTVAL (op) & GET_MODE_MASK (mode) 957 & (~ (unsigned HOST_WIDE_INT) 0xffff0000u)) == 0)) 958#if HOST_BITS_PER_WIDE_INT == 32 959 || (GET_CODE (op) == CONST_DOUBLE 960 && CONST_DOUBLE_HIGH (op) == 0 961 && ((CONST_DOUBLE_LOW (op) 962 & (~ (unsigned HOST_WIDE_INT) 0xffff0000u)) == 0)) 963#endif 964 ); 965} 966 967/* Return 1 if C is a constant that is not a logical operand (as 968 above). */ 969 970int 971non_logical_cint_operand (op, mode) 972 register rtx op; 973 enum machine_mode mode ATTRIBUTE_UNUSED; 974{ 975 return (GET_CODE (op) == CONST_INT 976#if HOST_BITS_PER_WIDE_INT != 32 977 && INTVAL (op) < ((HOST_WIDE_INT) 1 << 32) 978#endif 979 && (INTVAL (op) & GET_MODE_MASK (mode) & 980 (~ (HOST_WIDE_INT) 0xffff)) != 0 981 && (INTVAL (op) & GET_MODE_MASK (mode) & 982 (~ (unsigned HOST_WIDE_INT) 0xffff0000u)) != 0); 983} 984 985/* Return 1 if C is an unsigned 32-bit constant that is not a 986 logical operand (as above). */ 987 988int 989non_logical_u_cint_operand (op, mode) 990 register rtx op; 991 enum machine_mode mode ATTRIBUTE_UNUSED; 992{ 993 return ((GET_CODE (op) == CONST_INT 994 && INTVAL (op) > 0 995#if HOST_BITS_PER_WIDE_INT != 32 996 && INTVAL (op) < ((HOST_WIDE_INT) 1 << 32) 997#endif 998 && (INTVAL (op) & GET_MODE_MASK (mode) 999 & (~ (HOST_WIDE_INT) 0xffff)) != 0 1000 && (INTVAL (op) & GET_MODE_MASK (mode) 1001 & (~ (unsigned HOST_WIDE_INT) 0xffff0000u)) != 0) 1002#if HOST_BITS_PER_WIDE_INT == 32 1003 || (GET_CODE (op) == CONST_DOUBLE 1004 && CONST_DOUBLE_HIGH (op) == 0 1005 && (CONST_DOUBLE_LOW (op) & (~ (HOST_WIDE_INT) 0xffff)) != 0 1006 && (CONST_DOUBLE_LOW (op) 1007 & (~ (unsigned HOST_WIDE_INT) 0xffff0000u)) != 0)); 1008#endif 1009} 1010 1011/* Return 1 if C is a constant that can be encoded in a 32-bit mask on the 1012 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions. 1013 Reject all ones and all zeros, since these should have been optimized 1014 away and confuse the making of MB and ME. */ 1015 1016int 1017mask_operand (op, mode) 1018 register rtx op; 1019 enum machine_mode mode ATTRIBUTE_UNUSED; 1020{ 1021 HOST_WIDE_INT c; 1022 int i; 1023 int last_bit_value; 1024 int transitions = 0; 1025 1026 if (GET_CODE (op) != CONST_INT) 1027 return 0; 1028 1029 c = INTVAL (op); 1030 1031 if (c == 0 || c == ~0) 1032 return 0; 1033 1034 last_bit_value = c & 1; 1035 1036 for (i = 1; i < 32; i++) 1037 if (((c >>= 1) & 1) != last_bit_value) 1038 last_bit_value ^= 1, transitions++; 1039 1040 return transitions <= 2; 1041} 1042 1043/* Return 1 if the operand is a constant that is a PowerPC64 mask. 1044 It is if there are no more than one 1->0 or 0->1 transitions. 1045 Reject all ones and all zeros, since these should have been optimized 1046 away and confuse the making of MB and ME. */ 1047 1048int 1049mask64_operand (op, mode) 1050 register rtx op; 1051 enum machine_mode mode; 1052{ 1053 if (GET_CODE (op) == CONST_INT) 1054 { 1055 HOST_WIDE_INT c = INTVAL (op); 1056 int i; 1057 int last_bit_value; 1058 int transitions = 0; 1059 1060 if (c == 0 || c == ~0) 1061 return 0; 1062 1063 last_bit_value = c & 1; 1064 1065 for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) 1066 if (((c >>= 1) & 1) != last_bit_value) 1067 last_bit_value ^= 1, transitions++; 1068 1069#if HOST_BITS_PER_WIDE_INT == 32 1070 /* Consider CONST_INT sign-extended. */ 1071 transitions += (last_bit_value != 1); 1072#endif 1073 1074 return transitions <= 1; 1075 } 1076 else if (GET_CODE (op) == CONST_DOUBLE 1077 && (mode == VOIDmode || mode == DImode)) 1078 { 1079 HOST_WIDE_INT low = CONST_DOUBLE_LOW (op); 1080#if HOST_BITS_PER_WIDE_INT == 32 1081 HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op); 1082#endif 1083 int i; 1084 int last_bit_value; 1085 int transitions = 0; 1086 1087 if ((low == 0 1088#if HOST_BITS_PER_WIDE_INT == 32 1089 && high == 0 1090#endif 1091 ) 1092 || (low == ~0 1093#if HOST_BITS_PER_WIDE_INT == 32 1094 && high == ~0 1095#endif 1096 )) 1097 return 0; 1098 1099 last_bit_value = low & 1; 1100 1101 for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) 1102 if (((low >>= 1) & 1) != last_bit_value) 1103 last_bit_value ^= 1, transitions++; 1104 1105#if HOST_BITS_PER_WIDE_INT == 32 1106 if ((high & 1) != last_bit_value) 1107 last_bit_value ^= 1, transitions++; 1108 1109 for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++) 1110 if (((high >>= 1) & 1) != last_bit_value) 1111 last_bit_value ^= 1, transitions++; 1112#endif 1113 1114 return transitions <= 1; 1115 } 1116 else 1117 return 0; 1118} 1119 1120/* Return 1 if the operand is either a non-special register or a constant 1121 that can be used as the operand of a PowerPC64 logical AND insn. */ 1122 1123int 1124and64_operand (op, mode) 1125 register rtx op; 1126 enum machine_mode mode; 1127{ 1128 if (fixed_regs[68]) /* CR0 not available, don't do andi./andis. */ 1129 return (gpc_reg_operand (op, mode) || mask64_operand (op, mode)); 1130 1131 return (logical_operand (op, mode) || mask64_operand (op, mode)); 1132} 1133 1134/* Return 1 if the operand is either a non-special register or a 1135 constant that can be used as the operand of an RS/6000 logical AND insn. */ 1136 1137int 1138and_operand (op, mode) 1139 register rtx op; 1140 enum machine_mode mode; 1141{ 1142 if (fixed_regs[68]) /* CR0 not available, don't do andi./andis. */ 1143 return (gpc_reg_operand (op, mode) || mask_operand (op, mode)); 1144 1145 return (logical_operand (op, mode) || mask_operand (op, mode)); 1146} 1147 1148/* Return 1 if the operand is a general register or memory operand. */ 1149 1150int 1151reg_or_mem_operand (op, mode) 1152 register rtx op; 1153 register enum machine_mode mode; 1154{ 1155 return (gpc_reg_operand (op, mode) 1156 || memory_operand (op, mode) 1157 || volatile_mem_operand (op, mode)); 1158} 1159 1160/* Return 1 if the operand is a general register or memory operand without 1161 pre-inc or pre_dec which produces invalid form of PowerPC lwa 1162 instruction. */ 1163 1164int 1165lwa_operand (op, mode) 1166 register rtx op; 1167 register enum machine_mode mode; 1168{ 1169 rtx inner = op; 1170 1171 if (reload_completed && GET_CODE (inner) == SUBREG) 1172 inner = SUBREG_REG (inner); 1173 1174 return gpc_reg_operand (inner, mode) 1175 || (memory_operand (inner, mode) 1176 && GET_CODE (XEXP (inner, 0)) != PRE_INC 1177 && GET_CODE (XEXP (inner, 0)) != PRE_DEC); 1178} 1179 1180/* Return 1 if the operand, used inside a MEM, is a valid first argument 1181 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be 1182 forced to lr. */ 1183 1184int 1185call_operand (op, mode) 1186 register rtx op; 1187 enum machine_mode mode; 1188{ 1189 if (mode != VOIDmode && GET_MODE (op) != mode) 1190 return 0; 1191 1192 return (GET_CODE (op) == SYMBOL_REF 1193 || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER)); 1194} 1195 1196 1197/* Return 1 if the operand is a SYMBOL_REF for a function known to be in 1198 this file and the function is not weakly defined. */ 1199 1200int 1201current_file_function_operand (op, mode) 1202 register rtx op; 1203 enum machine_mode mode ATTRIBUTE_UNUSED; 1204{ 1205 return (GET_CODE (op) == SYMBOL_REF 1206 && (SYMBOL_REF_FLAG (op) 1207 || (op == XEXP (DECL_RTL (current_function_decl), 0) 1208 && !DECL_WEAK (current_function_decl)))); 1209} 1210 1211 1212/* Return 1 if this operand is a valid input for a move insn. */ 1213 1214int 1215input_operand (op, mode) 1216 register rtx op; 1217 enum machine_mode mode; 1218{ 1219 /* Memory is always valid. */ 1220 if (memory_operand (op, mode)) 1221 return 1; 1222 1223 /* Only a tiny bit of handling for CONSTANT_P_RTX is necessary. */ 1224 if (GET_CODE (op) == CONSTANT_P_RTX) 1225 return 1; 1226 1227 /* For floating-point, easy constants are valid. */ 1228 if (GET_MODE_CLASS (mode) == MODE_FLOAT 1229 && CONSTANT_P (op) 1230 && easy_fp_constant (op, mode)) 1231 return 1; 1232 1233 /* Allow any integer constant. */ 1234 if (GET_MODE_CLASS (mode) == MODE_INT 1235 && (GET_CODE (op) == CONST_INT 1236 || GET_CODE (op) == CONST_DOUBLE)) 1237 return 1; 1238 1239 /* For floating-point or multi-word mode, the only remaining valid type 1240 is a register. */ 1241 if (GET_MODE_CLASS (mode) == MODE_FLOAT 1242 || GET_MODE_SIZE (mode) > UNITS_PER_WORD) 1243 return register_operand (op, mode); 1244 1245 /* The only cases left are integral modes one word or smaller (we 1246 do not get called for MODE_CC values). These can be in any 1247 register. */ 1248 if (register_operand (op, mode)) 1249 return 1; 1250 1251 /* A SYMBOL_REF referring to the TOC is valid. */ 1252 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op)) 1253 return 1; 1254 1255 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC 1256 directly in the instruction stream */ 1257 if (DEFAULT_ABI == ABI_NT 1258 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)) 1259 return 1; 1260 1261 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region 1262 to be valid. */ 1263 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 1264 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST) 1265 && small_data_operand (op, Pmode)) 1266 return 1; 1267 1268 return 0; 1269} 1270 1271/* Return 1 for an operand in small memory on V.4/eabi */ 1272 1273int 1274small_data_operand (op, mode) 1275 rtx op ATTRIBUTE_UNUSED; 1276 enum machine_mode mode ATTRIBUTE_UNUSED; 1277{ 1278#if TARGET_ELF 1279 rtx sym_ref, const_part; 1280 1281 if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA) 1282 return 0; 1283 1284 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) 1285 return 0; 1286 1287 if (GET_CODE (op) == SYMBOL_REF) 1288 sym_ref = op; 1289 1290 else if (GET_CODE (op) != CONST 1291 || GET_CODE (XEXP (op, 0)) != PLUS 1292 || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF 1293 || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT) 1294 return 0; 1295 1296 else 1297 { 1298 rtx sum = XEXP (op, 0); 1299 HOST_WIDE_INT summand; 1300 1301 /* We have to be careful here, because it is the referenced address 1302 that must be 32k from _SDA_BASE_, not just the symbol. */ 1303 summand = INTVAL (XEXP (sum, 1)); 1304 if (summand < 0 || summand > g_switch_value) 1305 return 0; 1306 1307 sym_ref = XEXP (sum, 0); 1308 } 1309 1310 if (*XSTR (sym_ref, 0) != '@') 1311 return 0; 1312 1313 return 1; 1314 1315#else 1316 return 0; 1317#endif 1318} 1319 1320 1321/* Initialize a variable CUM of type CUMULATIVE_ARGS 1322 for a call to a function whose data type is FNTYPE. 1323 For a library call, FNTYPE is 0. 1324 1325 For incoming args we set the number of arguments in the prototype large 1326 so we never return a PARALLEL. */ 1327 1328void 1329init_cumulative_args (cum, fntype, libname, incoming) 1330 CUMULATIVE_ARGS *cum; 1331 tree fntype; 1332 rtx libname ATTRIBUTE_UNUSED; 1333 int incoming; 1334{ 1335 static CUMULATIVE_ARGS zero_cumulative; 1336 enum rs6000_abi abi = DEFAULT_ABI; 1337 1338 *cum = zero_cumulative; 1339 cum->words = 0; 1340 cum->fregno = FP_ARG_MIN_REG; 1341 cum->prototype = (fntype && TYPE_ARG_TYPES (fntype)); 1342 cum->call_cookie = CALL_NORMAL; 1343 cum->sysv_gregno = GP_ARG_MIN_REG; 1344 1345 if (incoming) 1346 cum->nargs_prototype = 1000; /* don't return a PARALLEL */ 1347 1348 else if (cum->prototype) 1349 cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1 1350 + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode 1351 || RETURN_IN_MEMORY (TREE_TYPE (fntype)))); 1352 1353 else 1354 cum->nargs_prototype = 0; 1355 1356 cum->orig_nargs = cum->nargs_prototype; 1357 1358 /* Check for DLL import functions */ 1359 if (abi == ABI_NT 1360 && fntype 1361 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype))) 1362 cum->call_cookie = CALL_NT_DLLIMPORT; 1363 1364 /* Also check for longcall's */ 1365 else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype))) 1366 cum->call_cookie = CALL_LONG; 1367 1368 if (TARGET_DEBUG_ARG) 1369 { 1370 fprintf (stderr, "\ninit_cumulative_args:"); 1371 if (fntype) 1372 { 1373 tree ret_type = TREE_TYPE (fntype); 1374 fprintf (stderr, " ret code = %s,", 1375 tree_code_name[ (int)TREE_CODE (ret_type) ]); 1376 } 1377 1378 if (cum->call_cookie & CALL_NT_DLLIMPORT) 1379 fprintf (stderr, " dllimport,"); 1380 1381 if (cum->call_cookie & CALL_LONG) 1382 fprintf (stderr, " longcall,"); 1383 1384 fprintf (stderr, " proto = %d, nargs = %d\n", 1385 cum->prototype, cum->nargs_prototype); 1386 } 1387} 1388 1389/* If defined, a C expression which determines whether, and in which 1390 direction, to pad out an argument with extra space. The value 1391 should be of type `enum direction': either `upward' to pad above 1392 the argument, `downward' to pad below, or `none' to inhibit 1393 padding. 1394 1395 For the AIX ABI structs are always stored left shifted in their 1396 argument slot. */ 1397 1398int 1399function_arg_padding (mode, type) 1400 enum machine_mode mode; 1401 tree type; 1402{ 1403 if (type != 0 && AGGREGATE_TYPE_P (type)) 1404 return (int)upward; 1405 1406 /* This is the default definition. */ 1407 return (! BYTES_BIG_ENDIAN 1408 ? (int)upward 1409 : ((mode == BLKmode 1410 ? (type && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST 1411 && int_size_in_bytes (type) < (PARM_BOUNDARY / BITS_PER_UNIT)) 1412 : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) 1413 ? (int)downward : (int)upward)); 1414} 1415 1416/* If defined, a C expression that gives the alignment boundary, in bits, 1417 of an argument with the specified mode and type. If it is not defined, 1418 PARM_BOUNDARY is used for all arguments. 1419 1420 Windows NT wants anything >= 8 bytes to be double word aligned. 1421 1422 V.4 wants long longs to be double word aligned. */ 1423 1424int 1425function_arg_boundary (mode, type) 1426 enum machine_mode mode; 1427 tree type; 1428{ 1429 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 1430 && (mode == DImode || mode == DFmode)) 1431 return 64; 1432 1433 if (DEFAULT_ABI != ABI_NT || TARGET_64BIT) 1434 return PARM_BOUNDARY; 1435 1436 if (mode != BLKmode) 1437 return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32; 1438 1439 return (int_size_in_bytes (type) >= 8) ? 64 : 32; 1440} 1441 1442/* Update the data in CUM to advance over an argument 1443 of mode MODE and data type TYPE. 1444 (TYPE is null for libcalls where that information may not be available.) */ 1445 1446void 1447function_arg_advance (cum, mode, type, named) 1448 CUMULATIVE_ARGS *cum; 1449 enum machine_mode mode; 1450 tree type; 1451 int named; 1452{ 1453 cum->nargs_prototype--; 1454 1455 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 1456 { 1457 if (TARGET_HARD_FLOAT 1458 && (mode == SFmode || mode == DFmode)) 1459 { 1460 if (cum->fregno <= FP_ARG_V4_MAX_REG) 1461 cum->fregno++; 1462 else 1463 { 1464 if (mode == DFmode) 1465 cum->words += cum->words & 1; 1466 cum->words += RS6000_ARG_SIZE (mode, type, 1); 1467 } 1468 } 1469 else 1470 { 1471 int n_words; 1472 int gregno = cum->sysv_gregno; 1473 1474 /* Aggregates and IEEE quad get passed by reference. */ 1475 if ((type && AGGREGATE_TYPE_P (type)) 1476 || mode == TFmode) 1477 n_words = 1; 1478 else 1479 n_words = RS6000_ARG_SIZE (mode, type, 1); 1480 1481 /* Long long is put in odd registers. */ 1482 if (n_words == 2 && (gregno & 1) == 0) 1483 gregno += 1; 1484 1485 /* Long long is not split between registers and stack. */ 1486 if (gregno + n_words - 1 > GP_ARG_MAX_REG) 1487 { 1488 /* Long long is aligned on the stack. */ 1489 if (n_words == 2) 1490 cum->words += cum->words & 1; 1491 cum->words += n_words; 1492 } 1493 1494 /* Note: continuing to accumulate gregno past when we've started 1495 spilling to the stack indicates the fact that we've started 1496 spilling to the stack to expand_builtin_saveregs. */ 1497 cum->sysv_gregno = gregno + n_words; 1498 } 1499 1500 if (TARGET_DEBUG_ARG) 1501 { 1502 fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ", 1503 cum->words, cum->fregno); 1504 fprintf (stderr, "gregno = %2d, nargs = %4d, proto = %d, ", 1505 cum->sysv_gregno, cum->nargs_prototype, cum->prototype); 1506 fprintf (stderr, "mode = %4s, named = %d\n", 1507 GET_MODE_NAME (mode), named); 1508 } 1509 } 1510 else 1511 { 1512 int align = (TARGET_32BIT && (cum->words & 1) != 0 1513 && function_arg_boundary (mode, type) == 64) ? 1 : 0; 1514 cum->words += align; 1515 1516 if (named) 1517 { 1518 cum->words += RS6000_ARG_SIZE (mode, type, named); 1519 if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT) 1520 cum->fregno++; 1521 } 1522 1523 if (TARGET_DEBUG_ARG) 1524 { 1525 fprintf (stderr, "function_adv: words = %2d, fregno = %2d, ", 1526 cum->words, cum->fregno); 1527 fprintf (stderr, "nargs = %4d, proto = %d, mode = %4s, ", 1528 cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode)); 1529 fprintf (stderr, "named = %d, align = %d\n", named, align); 1530 } 1531 } 1532} 1533 1534/* Determine where to put an argument to a function. 1535 Value is zero to push the argument on the stack, 1536 or a hard register in which to store the argument. 1537 1538 MODE is the argument's machine mode. 1539 TYPE is the data type of the argument (as a tree). 1540 This is null for libcalls where that information may 1541 not be available. 1542 CUM is a variable of type CUMULATIVE_ARGS which gives info about 1543 the preceding args and about the function being called. 1544 NAMED is nonzero if this argument is a named parameter 1545 (otherwise it is an extra parameter matching an ellipsis). 1546 1547 On RS/6000 the first eight words of non-FP are normally in registers 1548 and the rest are pushed. Under AIX, the first 13 FP args are in registers. 1549 Under V.4, the first 8 FP args are in registers. 1550 1551 If this is floating-point and no prototype is specified, we use 1552 both an FP and integer register (or possibly FP reg and stack). Library 1553 functions (when TYPE is zero) always have the proper types for args, 1554 so we can pass the FP value just in one register. emit_library_function 1555 doesn't support PARALLEL anyway. */ 1556 1557struct rtx_def * 1558function_arg (cum, mode, type, named) 1559 CUMULATIVE_ARGS *cum; 1560 enum machine_mode mode; 1561 tree type; 1562 int named; 1563{ 1564 enum rs6000_abi abi = DEFAULT_ABI; 1565 1566 /* Return a marker to indicate whether CR1 needs to set or clear the bit 1567 that V.4 uses to say fp args were passed in registers. Assume that we 1568 don't need the marker for software floating point, or compiler generated 1569 library calls. */ 1570 if (mode == VOIDmode) 1571 { 1572 if ((abi == ABI_V4 || abi == ABI_SOLARIS) 1573 && TARGET_HARD_FLOAT 1574 && cum->nargs_prototype < 0 1575 && type && (cum->prototype || TARGET_NO_PROTOTYPE)) 1576 { 1577 return GEN_INT (cum->call_cookie 1578 | ((cum->fregno == FP_ARG_MIN_REG) 1579 ? CALL_V4_SET_FP_ARGS 1580 : CALL_V4_CLEAR_FP_ARGS)); 1581 } 1582 1583 return GEN_INT (cum->call_cookie); 1584 } 1585 1586 if (abi == ABI_V4 || abi == ABI_SOLARIS) 1587 { 1588 if (TARGET_HARD_FLOAT 1589 && (mode == SFmode || mode == DFmode)) 1590 { 1591 if (cum->fregno <= FP_ARG_V4_MAX_REG) 1592 return gen_rtx_REG (mode, cum->fregno); 1593 else 1594 return NULL; 1595 } 1596 else 1597 { 1598 int n_words; 1599 int gregno = cum->sysv_gregno; 1600 1601 /* Aggregates and IEEE quad get passed by reference. */ 1602 if ((type && AGGREGATE_TYPE_P (type)) 1603 || mode == TFmode) 1604 n_words = 1; 1605 else 1606 n_words = RS6000_ARG_SIZE (mode, type, 1); 1607 1608 /* Long long is put in odd registers. */ 1609 if (n_words == 2 && (gregno & 1) == 0) 1610 gregno += 1; 1611 1612 /* Long long is not split between registers and stack. */ 1613 if (gregno + n_words - 1 <= GP_ARG_MAX_REG) 1614 return gen_rtx_REG (mode, gregno); 1615 else 1616 return NULL; 1617 } 1618 } 1619 else 1620 { 1621 int align = (TARGET_32BIT && (cum->words & 1) != 0 1622 && function_arg_boundary (mode, type) == 64) ? 1 : 0; 1623 int align_words = cum->words + align; 1624 1625 if (!named) 1626 return NULL_RTX; 1627 1628 if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST) 1629 return NULL_RTX; 1630 1631 if (USE_FP_FOR_ARG_P (*cum, mode, type)) 1632 { 1633 if (! type 1634 || ((cum->nargs_prototype > 0) 1635 /* IBM AIX extended its linkage convention definition always 1636 to require FP args after register save area hole on the 1637 stack. */ 1638 && (DEFAULT_ABI != ABI_AIX 1639 || ! TARGET_XL_CALL 1640 || (align_words < GP_ARG_NUM_REG)))) 1641 return gen_rtx_REG (mode, cum->fregno); 1642 1643 return gen_rtx_PARALLEL (mode, 1644 gen_rtvec (2, 1645 gen_rtx_EXPR_LIST (VOIDmode, 1646 ((align_words >= GP_ARG_NUM_REG) 1647 ? NULL_RTX 1648 : (align_words 1649 + RS6000_ARG_SIZE (mode, type, named) 1650 > GP_ARG_NUM_REG 1651 /* If this is partially on the stack, then 1652 we only include the portion actually 1653 in registers here. */ 1654 ? gen_rtx_REG (SImode, 1655 GP_ARG_MIN_REG + align_words) 1656 : gen_rtx_REG (mode, 1657 GP_ARG_MIN_REG + align_words))), 1658 const0_rtx), 1659 gen_rtx_EXPR_LIST (VOIDmode, 1660 gen_rtx_REG (mode, cum->fregno), 1661 const0_rtx))); 1662 } 1663 else if (align_words < GP_ARG_NUM_REG) 1664 return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words); 1665 else 1666 return NULL_RTX; 1667 } 1668} 1669 1670/* For an arg passed partly in registers and partly in memory, 1671 this is the number of registers used. 1672 For args passed entirely in registers or entirely in memory, zero. */ 1673 1674int 1675function_arg_partial_nregs (cum, mode, type, named) 1676 CUMULATIVE_ARGS *cum; 1677 enum machine_mode mode; 1678 tree type; 1679 int named; 1680{ 1681 if (! named) 1682 return 0; 1683 1684 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 1685 return 0; 1686 1687 if (USE_FP_FOR_ARG_P (*cum, mode, type)) 1688 { 1689 if (cum->nargs_prototype >= 0) 1690 return 0; 1691 } 1692 1693 if (cum->words < GP_ARG_NUM_REG 1694 && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named))) 1695 { 1696 int ret = GP_ARG_NUM_REG - cum->words; 1697 if (ret && TARGET_DEBUG_ARG) 1698 fprintf (stderr, "function_arg_partial_nregs: %d\n", ret); 1699 1700 return ret; 1701 } 1702 1703 return 0; 1704} 1705 1706/* A C expression that indicates when an argument must be passed by 1707 reference. If nonzero for an argument, a copy of that argument is 1708 made in memory and a pointer to the argument is passed instead of 1709 the argument itself. The pointer is passed in whatever way is 1710 appropriate for passing a pointer to that type. 1711 1712 Under V.4, structures and unions are passed by reference. */ 1713 1714int 1715function_arg_pass_by_reference (cum, mode, type, named) 1716 CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED; 1717 enum machine_mode mode ATTRIBUTE_UNUSED; 1718 tree type; 1719 int named ATTRIBUTE_UNUSED; 1720{ 1721 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 1722 && ((type && AGGREGATE_TYPE_P (type)) 1723 || mode == TFmode)) 1724 { 1725 if (TARGET_DEBUG_ARG) 1726 fprintf (stderr, "function_arg_pass_by_reference: aggregate\n"); 1727 1728 return 1; 1729 } 1730 1731 return 0; 1732} 1733 1734 1735/* Perform any needed actions needed for a function that is receiving a 1736 variable number of arguments. 1737 1738 CUM is as above. 1739 1740 MODE and TYPE are the mode and type of the current parameter. 1741 1742 PRETEND_SIZE is a variable that should be set to the amount of stack 1743 that must be pushed by the prolog to pretend that our caller pushed 1744 it. 1745 1746 Normally, this macro will push all remaining incoming registers on the 1747 stack and set PRETEND_SIZE to the length of the registers pushed. */ 1748 1749void 1750setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl) 1751 CUMULATIVE_ARGS *cum; 1752 enum machine_mode mode; 1753 tree type; 1754 int *pretend_size; 1755 int no_rtl; 1756 1757{ 1758 CUMULATIVE_ARGS next_cum; 1759 int reg_size = TARGET_32BIT ? 4 : 8; 1760 rtx save_area; 1761 int first_reg_offset; 1762 1763 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 1764 { 1765 tree fntype; 1766 int stdarg_p; 1767 1768 fntype = TREE_TYPE (current_function_decl); 1769 stdarg_p = (TYPE_ARG_TYPES (fntype) != 0 1770 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype))) 1771 != void_type_node)); 1772 1773 /* For varargs, we do not want to skip the dummy va_dcl argument. 1774 For stdargs, we do want to skip the last named argument. */ 1775 next_cum = *cum; 1776 if (stdarg_p) 1777 function_arg_advance (&next_cum, mode, type, 1); 1778 1779 /* Indicate to allocate space on the stack for varargs save area. */ 1780 /* ??? Does this really have to be located at a magic spot on the 1781 stack, or can we allocate this with assign_stack_local instead. */ 1782 rs6000_sysv_varargs_p = 1; 1783 if (! no_rtl) 1784 save_area = plus_constant (virtual_stack_vars_rtx, 1785 - RS6000_VARARGS_SIZE); 1786 1787 first_reg_offset = next_cum.sysv_gregno - GP_ARG_MIN_REG; 1788 } 1789 else 1790 { 1791 save_area = virtual_incoming_args_rtx; 1792 rs6000_sysv_varargs_p = 0; 1793 1794 first_reg_offset = cum->words; 1795 if (MUST_PASS_IN_STACK (mode, type)) 1796 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1); 1797 } 1798 1799 if (!no_rtl && first_reg_offset < GP_ARG_NUM_REG) 1800 { 1801 move_block_from_reg 1802 (GP_ARG_MIN_REG + first_reg_offset, 1803 gen_rtx_MEM (BLKmode, 1804 plus_constant (save_area, first_reg_offset * reg_size)), 1805 GP_ARG_NUM_REG - first_reg_offset, 1806 (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD); 1807 1808 /* ??? Does ABI_V4 need this at all? */ 1809 *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD; 1810 } 1811 1812 /* Save FP registers if needed. */ 1813 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 1814 && TARGET_HARD_FLOAT && !no_rtl 1815 && next_cum.fregno <= FP_ARG_V4_MAX_REG) 1816 { 1817 int fregno = next_cum.fregno; 1818 rtx cr1 = gen_rtx_REG (CCmode, 69); 1819 rtx lab = gen_label_rtx (); 1820 int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8); 1821 1822 emit_jump_insn (gen_rtx_SET (VOIDmode, 1823 pc_rtx, 1824 gen_rtx_IF_THEN_ELSE (VOIDmode, 1825 gen_rtx_NE (VOIDmode, cr1, 1826 const0_rtx), 1827 gen_rtx_LABEL_REF (VOIDmode, lab), 1828 pc_rtx))); 1829 1830 while (fregno <= FP_ARG_V4_MAX_REG) 1831 { 1832 emit_move_insn (gen_rtx_MEM (DFmode, plus_constant (save_area, off)), 1833 gen_rtx_REG (DFmode, fregno)); 1834 fregno++; 1835 off += 8; 1836 } 1837 1838 emit_label (lab); 1839 } 1840} 1841 1842/* If defined, is a C expression that produces the machine-specific 1843 code for a call to `__builtin_saveregs'. This code will be moved 1844 to the very beginning of the function, before any parameter access 1845 are made. The return value of this function should be an RTX that 1846 contains the value to use as the return of `__builtin_saveregs'. 1847 1848 The argument ARGS is a `tree_list' containing the arguments that 1849 were passed to `__builtin_saveregs'. 1850 1851 If this macro is not defined, the compiler will output an ordinary 1852 call to the library function `__builtin_saveregs'. 1853 1854 On the Power/PowerPC return the address of the area on the stack 1855 used to hold arguments. Under AIX, this includes the 8 word register 1856 save area. 1857 1858 Under V.4, things are more complicated. We do not have access to 1859 all of the virtual registers required for va_start to do its job, 1860 so we construct the va_list in its entirity here, and reduce va_start 1861 to a block copy. This is similar to the way we do things on Alpha. */ 1862 1863struct rtx_def * 1864expand_builtin_saveregs (args) 1865 tree args ATTRIBUTE_UNUSED; 1866{ 1867 rtx block, mem_gpr_fpr, mem_reg_save_area, mem_overflow, tmp; 1868 tree fntype; 1869 int stdarg_p; 1870 HOST_WIDE_INT words, gpr, fpr; 1871 1872 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) 1873 return virtual_incoming_args_rtx; 1874 1875 fntype = TREE_TYPE (current_function_decl); 1876 stdarg_p = (TYPE_ARG_TYPES (fntype) != 0 1877 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype))) 1878 != void_type_node)); 1879 1880 /* Allocate the va_list constructor. */ 1881 block = assign_stack_local (BLKmode, 3 * UNITS_PER_WORD, BITS_PER_WORD); 1882 RTX_UNCHANGING_P (block) = 1; 1883 RTX_UNCHANGING_P (XEXP (block, 0)) = 1; 1884 1885 mem_gpr_fpr = change_address (block, word_mode, XEXP (block, 0)); 1886 mem_overflow = change_address (block, ptr_mode, 1887 plus_constant (XEXP (block, 0), 1888 UNITS_PER_WORD)); 1889 mem_reg_save_area = change_address (block, ptr_mode, 1890 plus_constant (XEXP (block, 0), 1891 2 * UNITS_PER_WORD)); 1892 1893 /* Construct the two characters of `gpr' and `fpr' as a unit. */ 1894 words = current_function_args_info.words; 1895 gpr = current_function_args_info.sysv_gregno - GP_ARG_MIN_REG; 1896 fpr = current_function_args_info.fregno - FP_ARG_MIN_REG; 1897 1898 /* Varargs has the va_dcl argument, but we don't count it. */ 1899 if (!stdarg_p) 1900 { 1901 if (gpr > GP_ARG_NUM_REG) 1902 words -= 1; 1903 else 1904 gpr -= 1; 1905 } 1906 1907 if (BYTES_BIG_ENDIAN) 1908 { 1909 HOST_WIDE_INT bits = gpr << 8 | fpr; 1910 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD) 1911 tmp = GEN_INT (bits << (BITS_PER_WORD - 16)); 1912 else 1913 { 1914 bits <<= BITS_PER_WORD - HOST_BITS_PER_WIDE_INT - 16; 1915 tmp = immed_double_const (0, bits, word_mode); 1916 } 1917 } 1918 else 1919 tmp = GEN_INT (fpr << 8 | gpr); 1920 1921 emit_move_insn (mem_gpr_fpr, tmp); 1922 1923 /* Find the overflow area. */ 1924 tmp = expand_binop (Pmode, add_optab, virtual_incoming_args_rtx, 1925 GEN_INT (words * UNITS_PER_WORD), 1926 mem_overflow, 0, OPTAB_WIDEN); 1927 if (tmp != mem_overflow) 1928 emit_move_insn (mem_overflow, tmp); 1929 1930 /* Find the register save area. */ 1931 tmp = expand_binop (Pmode, add_optab, virtual_stack_vars_rtx, 1932 GEN_INT (-RS6000_VARARGS_SIZE), 1933 mem_reg_save_area, 0, OPTAB_WIDEN); 1934 if (tmp != mem_reg_save_area) 1935 emit_move_insn (mem_reg_save_area, tmp); 1936 1937 /* Return the address of the va_list constructor. */ 1938 return XEXP (block, 0); 1939} 1940 1941/* Generate a memory reference for expand_block_move, copying volatile, 1942 and other bits from an original memory reference. */ 1943 1944static rtx 1945expand_block_move_mem (mode, addr, orig_mem) 1946 enum machine_mode mode; 1947 rtx addr; 1948 rtx orig_mem; 1949{ 1950 rtx mem = gen_rtx_MEM (mode, addr); 1951 1952 RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem); 1953 MEM_COPY_ATTRIBUTES (mem, orig_mem); 1954#ifdef MEM_UNALIGNED_P 1955 MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem); 1956#endif 1957 return mem; 1958} 1959 1960/* Expand a block move operation, and return 1 if successful. Return 0 1961 if we should let the compiler generate normal code. 1962 1963 operands[0] is the destination 1964 operands[1] is the source 1965 operands[2] is the length 1966 operands[3] is the alignment */ 1967 1968#define MAX_MOVE_REG 4 1969 1970int 1971expand_block_move (operands) 1972 rtx operands[]; 1973{ 1974 rtx orig_dest = operands[0]; 1975 rtx orig_src = operands[1]; 1976 rtx bytes_rtx = operands[2]; 1977 rtx align_rtx = operands[3]; 1978 int constp = (GET_CODE (bytes_rtx) == CONST_INT); 1979 int align = XINT (align_rtx, 0); 1980 int bytes; 1981 int offset; 1982 int num_reg; 1983 int i; 1984 rtx src_reg; 1985 rtx dest_reg; 1986 rtx src_addr; 1987 rtx dest_addr; 1988 rtx tmp_reg; 1989 rtx stores[MAX_MOVE_REG]; 1990 int move_bytes; 1991 1992 /* If this is not a fixed size move, just call memcpy */ 1993 if (! constp) 1994 return 0; 1995 1996 /* Anything to move? */ 1997 bytes = INTVAL (bytes_rtx); 1998 if (bytes <= 0) 1999 return 1; 2000 2001 /* Don't support real large moves. If string instructions are not used, 2002 then don't generate more than 8 loads. */ 2003 if (TARGET_STRING) 2004 { 2005 if (bytes > 8*4) 2006 return 0; 2007 } 2008 else if (! STRICT_ALIGNMENT) 2009 { 2010 if (TARGET_POWERPC64 && align >= 4) 2011 { 2012 if (bytes > 8*8) 2013 return 0; 2014 } 2015 else 2016 if (bytes > 8*4) 2017 return 0; 2018 } 2019 else if (bytes > 8*align) 2020 return 0; 2021 2022 /* Move the address into scratch registers. */ 2023 dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0)); 2024 src_reg = copy_addr_to_reg (XEXP (orig_src, 0)); 2025 2026 if (TARGET_STRING) /* string instructions are available */ 2027 { 2028 for ( ; bytes > 0; bytes -= move_bytes) 2029 { 2030 if (bytes > 24 /* move up to 32 bytes at a time */ 2031 && ! fixed_regs[5] 2032 && ! fixed_regs[6] 2033 && ! fixed_regs[7] 2034 && ! fixed_regs[8] 2035 && ! fixed_regs[9] 2036 && ! fixed_regs[10] 2037 && ! fixed_regs[11] 2038 && ! fixed_regs[12]) 2039 { 2040 move_bytes = (bytes > 32) ? 32 : bytes; 2041 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, 2042 dest_reg, 2043 orig_dest), 2044 expand_block_move_mem (BLKmode, 2045 src_reg, 2046 orig_src), 2047 GEN_INT ((move_bytes == 32) 2048 ? 0 : move_bytes), 2049 align_rtx)); 2050 } 2051 else if (bytes > 16 /* move up to 24 bytes at a time */ 2052 && ! fixed_regs[7] 2053 && ! fixed_regs[8] 2054 && ! fixed_regs[9] 2055 && ! fixed_regs[10] 2056 && ! fixed_regs[11] 2057 && ! fixed_regs[12]) 2058 { 2059 move_bytes = (bytes > 24) ? 24 : bytes; 2060 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, 2061 dest_reg, 2062 orig_dest), 2063 expand_block_move_mem (BLKmode, 2064 src_reg, 2065 orig_src), 2066 GEN_INT (move_bytes), 2067 align_rtx)); 2068 } 2069 else if (bytes > 8 /* move up to 16 bytes at a time */ 2070 && ! fixed_regs[9] 2071 && ! fixed_regs[10] 2072 && ! fixed_regs[11] 2073 && ! fixed_regs[12]) 2074 { 2075 move_bytes = (bytes > 16) ? 16 : bytes; 2076 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, 2077 dest_reg, 2078 orig_dest), 2079 expand_block_move_mem (BLKmode, 2080 src_reg, 2081 orig_src), 2082 GEN_INT (move_bytes), 2083 align_rtx)); 2084 } 2085 else if (bytes > 4 && ! TARGET_POWERPC64) 2086 { /* move up to 8 bytes at a time */ 2087 move_bytes = (bytes > 8) ? 8 : bytes; 2088 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, 2089 dest_reg, 2090 orig_dest), 2091 expand_block_move_mem (BLKmode, 2092 src_reg, 2093 orig_src), 2094 GEN_INT (move_bytes), 2095 align_rtx)); 2096 } 2097 else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT)) 2098 { /* move 4 bytes */ 2099 move_bytes = 4; 2100 tmp_reg = gen_reg_rtx (SImode); 2101 emit_move_insn (tmp_reg, 2102 expand_block_move_mem (SImode, 2103 src_reg, orig_src)); 2104 emit_move_insn (expand_block_move_mem (SImode, 2105 dest_reg, orig_dest), 2106 tmp_reg); 2107 } 2108 else if (bytes == 2 && (align >= 2 || ! STRICT_ALIGNMENT)) 2109 { /* move 2 bytes */ 2110 move_bytes = 2; 2111 tmp_reg = gen_reg_rtx (HImode); 2112 emit_move_insn (tmp_reg, 2113 expand_block_move_mem (HImode, 2114 src_reg, orig_src)); 2115 emit_move_insn (expand_block_move_mem (HImode, 2116 dest_reg, orig_dest), 2117 tmp_reg); 2118 } 2119 else if (bytes == 1) /* move 1 byte */ 2120 { 2121 move_bytes = 1; 2122 tmp_reg = gen_reg_rtx (QImode); 2123 emit_move_insn (tmp_reg, 2124 expand_block_move_mem (QImode, 2125 src_reg, orig_src)); 2126 emit_move_insn (expand_block_move_mem (QImode, 2127 dest_reg, orig_dest), 2128 tmp_reg); 2129 } 2130 else 2131 { /* move up to 4 bytes at a time */ 2132 move_bytes = (bytes > 4) ? 4 : bytes; 2133 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, 2134 dest_reg, 2135 orig_dest), 2136 expand_block_move_mem (BLKmode, 2137 src_reg, 2138 orig_src), 2139 GEN_INT (move_bytes), 2140 align_rtx)); 2141 } 2142 2143 if (bytes > move_bytes) 2144 { 2145 if (! TARGET_POWERPC64) 2146 { 2147 emit_insn (gen_addsi3 (src_reg, src_reg, 2148 GEN_INT (move_bytes))); 2149 emit_insn (gen_addsi3 (dest_reg, dest_reg, 2150 GEN_INT (move_bytes))); 2151 } 2152 else 2153 { 2154 emit_insn (gen_adddi3 (src_reg, src_reg, 2155 GEN_INT (move_bytes))); 2156 emit_insn (gen_adddi3 (dest_reg, dest_reg, 2157 GEN_INT (move_bytes))); 2158 } 2159 } 2160 } 2161 } 2162 2163 else /* string instructions not available */ 2164 { 2165 num_reg = offset = 0; 2166 for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes)) 2167 { 2168 /* Calculate the correct offset for src/dest */ 2169 if (offset == 0) 2170 { 2171 src_addr = src_reg; 2172 dest_addr = dest_reg; 2173 } 2174 else 2175 { 2176 src_addr = gen_rtx_PLUS (Pmode, src_reg, GEN_INT (offset)); 2177 dest_addr = gen_rtx_PLUS (Pmode, dest_reg, GEN_INT (offset)); 2178 } 2179 2180 /* Generate the appropriate load and store, saving the stores 2181 for later. */ 2182 if (bytes >= 8 && TARGET_POWERPC64 2183 /* 64-bit loads and stores require word-aligned displacements. */ 2184 && (align >= 8 || (! STRICT_ALIGNMENT && align >= 4))) 2185 { 2186 move_bytes = 8; 2187 tmp_reg = gen_reg_rtx (DImode); 2188 emit_insn (gen_movdi (tmp_reg, 2189 expand_block_move_mem (DImode, 2190 src_addr, 2191 orig_src))); 2192 stores[num_reg++] = gen_movdi (expand_block_move_mem (DImode, 2193 dest_addr, 2194 orig_dest), 2195 tmp_reg); 2196 } 2197 else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT)) 2198 { 2199 move_bytes = 4; 2200 tmp_reg = gen_reg_rtx (SImode); 2201 emit_insn (gen_movsi (tmp_reg, 2202 expand_block_move_mem (SImode, 2203 src_addr, 2204 orig_src))); 2205 stores[num_reg++] = gen_movsi (expand_block_move_mem (SImode, 2206 dest_addr, 2207 orig_dest), 2208 tmp_reg); 2209 } 2210 else if (bytes >= 2 && (align >= 2 || ! STRICT_ALIGNMENT)) 2211 { 2212 move_bytes = 2; 2213 tmp_reg = gen_reg_rtx (HImode); 2214 emit_insn (gen_movhi (tmp_reg, 2215 expand_block_move_mem (HImode, 2216 src_addr, 2217 orig_src))); 2218 stores[num_reg++] = gen_movhi (expand_block_move_mem (HImode, 2219 dest_addr, 2220 orig_dest), 2221 tmp_reg); 2222 } 2223 else 2224 { 2225 move_bytes = 1; 2226 tmp_reg = gen_reg_rtx (QImode); 2227 emit_insn (gen_movqi (tmp_reg, 2228 expand_block_move_mem (QImode, 2229 src_addr, 2230 orig_src))); 2231 stores[num_reg++] = gen_movqi (expand_block_move_mem (QImode, 2232 dest_addr, 2233 orig_dest), 2234 tmp_reg); 2235 } 2236 2237 if (num_reg >= MAX_MOVE_REG) 2238 { 2239 for (i = 0; i < num_reg; i++) 2240 emit_insn (stores[i]); 2241 num_reg = 0; 2242 } 2243 } 2244 2245 for (i = 0; i < num_reg; i++) 2246 emit_insn (stores[i]); 2247 } 2248 2249 return 1; 2250} 2251 2252 2253/* Return 1 if OP is a load multiple operation. It is known to be a 2254 PARALLEL and the first section will be tested. */ 2255 2256int 2257load_multiple_operation (op, mode) 2258 rtx op; 2259 enum machine_mode mode ATTRIBUTE_UNUSED; 2260{ 2261 int count = XVECLEN (op, 0); 2262 int dest_regno; 2263 rtx src_addr; 2264 int i; 2265 2266 /* Perform a quick check so we don't blow up below. */ 2267 if (count <= 1 2268 || GET_CODE (XVECEXP (op, 0, 0)) != SET 2269 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG 2270 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM) 2271 return 0; 2272 2273 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0))); 2274 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0); 2275 2276 for (i = 1; i < count; i++) 2277 { 2278 rtx elt = XVECEXP (op, 0, i); 2279 2280 if (GET_CODE (elt) != SET 2281 || GET_CODE (SET_DEST (elt)) != REG 2282 || GET_MODE (SET_DEST (elt)) != SImode 2283 || REGNO (SET_DEST (elt)) != dest_regno + i 2284 || GET_CODE (SET_SRC (elt)) != MEM 2285 || GET_MODE (SET_SRC (elt)) != SImode 2286 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS 2287 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr) 2288 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT 2289 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4) 2290 return 0; 2291 } 2292 2293 return 1; 2294} 2295 2296/* Similar, but tests for store multiple. Here, the second vector element 2297 is a CLOBBER. It will be tested later. */ 2298 2299int 2300store_multiple_operation (op, mode) 2301 rtx op; 2302 enum machine_mode mode ATTRIBUTE_UNUSED; 2303{ 2304 int count = XVECLEN (op, 0) - 1; 2305 int src_regno; 2306 rtx dest_addr; 2307 int i; 2308 2309 /* Perform a quick check so we don't blow up below. */ 2310 if (count <= 1 2311 || GET_CODE (XVECEXP (op, 0, 0)) != SET 2312 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM 2313 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG) 2314 return 0; 2315 2316 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0))); 2317 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0); 2318 2319 for (i = 1; i < count; i++) 2320 { 2321 rtx elt = XVECEXP (op, 0, i + 1); 2322 2323 if (GET_CODE (elt) != SET 2324 || GET_CODE (SET_SRC (elt)) != REG 2325 || GET_MODE (SET_SRC (elt)) != SImode 2326 || REGNO (SET_SRC (elt)) != src_regno + i 2327 || GET_CODE (SET_DEST (elt)) != MEM 2328 || GET_MODE (SET_DEST (elt)) != SImode 2329 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS 2330 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr) 2331 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT 2332 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4) 2333 return 0; 2334 } 2335 2336 return 1; 2337} 2338 2339/* Return 1 if OP is a comparison operation that is valid for a branch insn. 2340 We only check the opcode against the mode of the CC value here. */ 2341 2342int 2343branch_comparison_operator (op, mode) 2344 register rtx op; 2345 enum machine_mode mode ATTRIBUTE_UNUSED; 2346{ 2347 enum rtx_code code = GET_CODE (op); 2348 enum machine_mode cc_mode; 2349 2350 if (GET_RTX_CLASS (code) != '<') 2351 return 0; 2352 2353 cc_mode = GET_MODE (XEXP (op, 0)); 2354 if (GET_MODE_CLASS (cc_mode) != MODE_CC) 2355 return 0; 2356 2357 if ((code == GT || code == LT || code == GE || code == LE) 2358 && cc_mode == CCUNSmode) 2359 return 0; 2360 2361 if ((code == GTU || code == LTU || code == GEU || code == LEU) 2362 && (cc_mode != CCUNSmode)) 2363 return 0; 2364 2365 return 1; 2366} 2367 2368/* Return 1 if OP is a comparison operation that is valid for an scc insn. 2369 We check the opcode against the mode of the CC value and disallow EQ or 2370 NE comparisons for integers. */ 2371 2372int 2373scc_comparison_operator (op, mode) 2374 register rtx op; 2375 enum machine_mode mode; 2376{ 2377 enum rtx_code code = GET_CODE (op); 2378 enum machine_mode cc_mode; 2379 2380 if (GET_MODE (op) != mode && mode != VOIDmode) 2381 return 0; 2382 2383 if (GET_RTX_CLASS (code) != '<') 2384 return 0; 2385 2386 cc_mode = GET_MODE (XEXP (op, 0)); 2387 if (GET_MODE_CLASS (cc_mode) != MODE_CC) 2388 return 0; 2389 2390 if (code == NE && cc_mode != CCFPmode) 2391 return 0; 2392 2393 if ((code == GT || code == LT || code == GE || code == LE) 2394 && cc_mode == CCUNSmode) 2395 return 0; 2396 2397 if ((code == GTU || code == LTU || code == GEU || code == LEU) 2398 && (cc_mode != CCUNSmode)) 2399 return 0; 2400 2401 if (cc_mode == CCEQmode && code != EQ && code != NE) 2402 return 0; 2403 2404 return 1; 2405} 2406 2407int 2408trap_comparison_operator (op, mode) 2409 rtx op; 2410 enum machine_mode mode; 2411{ 2412 if (mode != VOIDmode && mode != GET_MODE (op)) 2413 return 0; 2414 return (GET_RTX_CLASS (GET_CODE (op)) == '<' 2415 || GET_CODE (op) == EQ || GET_CODE (op) == NE); 2416} 2417 2418/* Return 1 if ANDOP is a mask that has no bits on that are not in the 2419 mask required to convert the result of a rotate insn into a shift 2420 left insn of SHIFTOP bits. Both are known to be CONST_INT. */ 2421 2422int 2423includes_lshift_p (shiftop, andop) 2424 register rtx shiftop; 2425 register rtx andop; 2426{ 2427 int shift_mask = (~0 << INTVAL (shiftop)); 2428 2429 return (INTVAL (andop) & ~shift_mask) == 0; 2430} 2431 2432/* Similar, but for right shift. */ 2433 2434int 2435includes_rshift_p (shiftop, andop) 2436 register rtx shiftop; 2437 register rtx andop; 2438{ 2439 unsigned HOST_WIDE_INT shift_mask = ~(unsigned HOST_WIDE_INT) 0; 2440 2441 shift_mask >>= INTVAL (shiftop); 2442 2443 return (INTVAL (andop) & ~ shift_mask) == 0; 2444} 2445 2446/* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates 2447 for lfq and stfq insns. 2448 2449 Note reg1 and reg2 *must* be hard registers. To be sure we will 2450 abort if we are passed pseudo registers. */ 2451 2452int 2453registers_ok_for_quad_peep (reg1, reg2) 2454 rtx reg1, reg2; 2455{ 2456 /* We might have been passed a SUBREG. */ 2457 if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG) 2458 return 0; 2459 2460 return (REGNO (reg1) == REGNO (reg2) - 1); 2461} 2462 2463/* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and 2464 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */ 2465 2466int 2467addrs_ok_for_quad_peep (addr1, addr2) 2468 register rtx addr1; 2469 register rtx addr2; 2470{ 2471 int reg1; 2472 int offset1; 2473 2474 /* Extract an offset (if used) from the first addr. */ 2475 if (GET_CODE (addr1) == PLUS) 2476 { 2477 /* If not a REG, return zero. */ 2478 if (GET_CODE (XEXP (addr1, 0)) != REG) 2479 return 0; 2480 else 2481 { 2482 reg1 = REGNO (XEXP (addr1, 0)); 2483 /* The offset must be constant! */ 2484 if (GET_CODE (XEXP (addr1, 1)) != CONST_INT) 2485 return 0; 2486 offset1 = INTVAL (XEXP (addr1, 1)); 2487 } 2488 } 2489 else if (GET_CODE (addr1) != REG) 2490 return 0; 2491 else 2492 { 2493 reg1 = REGNO (addr1); 2494 /* This was a simple (mem (reg)) expression. Offset is 0. */ 2495 offset1 = 0; 2496 } 2497 2498 /* Make sure the second address is a (mem (plus (reg) (const_int). */ 2499 if (GET_CODE (addr2) != PLUS) 2500 return 0; 2501 2502 if (GET_CODE (XEXP (addr2, 0)) != REG 2503 || GET_CODE (XEXP (addr2, 1)) != CONST_INT) 2504 return 0; 2505 2506 if (reg1 != REGNO (XEXP (addr2, 0))) 2507 return 0; 2508 2509 /* The offset for the second addr must be 8 more than the first addr. */ 2510 if (INTVAL (XEXP (addr2, 1)) != offset1 + 8) 2511 return 0; 2512 2513 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq 2514 instructions. */ 2515 return 1; 2516} 2517 2518/* Return the register class of a scratch register needed to copy IN into 2519 or out of a register in CLASS in MODE. If it can be done directly, 2520 NO_REGS is returned. */ 2521 2522enum reg_class 2523secondary_reload_class (class, mode, in) 2524 enum reg_class class; 2525 enum machine_mode mode ATTRIBUTE_UNUSED; 2526 rtx in; 2527{ 2528 int regno; 2529 2530 /* We can not copy a symbolic operand directly into anything other than 2531 BASE_REGS for TARGET_ELF. So indicate that a register from BASE_REGS 2532 is needed as an intermediate register. */ 2533 if (TARGET_ELF 2534 && class != BASE_REGS 2535 && (GET_CODE (in) == SYMBOL_REF 2536 || GET_CODE (in) == HIGH 2537 || GET_CODE (in) == LABEL_REF 2538 || GET_CODE (in) == CONST)) 2539 return BASE_REGS; 2540 2541 if (GET_CODE (in) == REG) 2542 { 2543 regno = REGNO (in); 2544 if (regno >= FIRST_PSEUDO_REGISTER) 2545 { 2546 regno = true_regnum (in); 2547 if (regno >= FIRST_PSEUDO_REGISTER) 2548 regno = -1; 2549 } 2550 } 2551 else if (GET_CODE (in) == SUBREG) 2552 { 2553 regno = true_regnum (in); 2554 if (regno >= FIRST_PSEUDO_REGISTER) 2555 regno = -1; 2556 } 2557 else 2558 regno = -1; 2559 2560 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS 2561 into anything. */ 2562 if (class == GENERAL_REGS || class == BASE_REGS 2563 || (regno >= 0 && INT_REGNO_P (regno))) 2564 return NO_REGS; 2565 2566 /* Constants, memory, and FP registers can go into FP registers. */ 2567 if ((regno == -1 || FP_REGNO_P (regno)) 2568 && (class == FLOAT_REGS || class == NON_SPECIAL_REGS)) 2569 return NO_REGS; 2570 2571 /* We can copy among the CR registers. */ 2572 if ((class == CR_REGS || class == CR0_REGS) 2573 && regno >= 0 && CR_REGNO_P (regno)) 2574 return NO_REGS; 2575 2576 /* Otherwise, we need GENERAL_REGS. */ 2577 return GENERAL_REGS; 2578} 2579 2580/* Given a comparison operation, return the bit number in CCR to test. We 2581 know this is a valid comparison. 2582 2583 SCC_P is 1 if this is for an scc. That means that %D will have been 2584 used instead of %C, so the bits will be in different places. 2585 2586 Return -1 if OP isn't a valid comparison for some reason. */ 2587 2588int 2589ccr_bit (op, scc_p) 2590 register rtx op; 2591 int scc_p; 2592{ 2593 enum rtx_code code = GET_CODE (op); 2594 enum machine_mode cc_mode; 2595 int cc_regnum; 2596 int base_bit; 2597 2598 if (GET_RTX_CLASS (code) != '<') 2599 return -1; 2600 2601 cc_mode = GET_MODE (XEXP (op, 0)); 2602 cc_regnum = REGNO (XEXP (op, 0)); 2603 base_bit = 4 * (cc_regnum - 68); 2604 2605 /* In CCEQmode cases we have made sure that the result is always in the 2606 third bit of the CR field. */ 2607 2608 if (cc_mode == CCEQmode) 2609 return base_bit + 3; 2610 2611 switch (code) 2612 { 2613 case NE: 2614 return scc_p ? base_bit + 3 : base_bit + 2; 2615 case EQ: 2616 return base_bit + 2; 2617 case GT: case GTU: 2618 return base_bit + 1; 2619 case LT: case LTU: 2620 return base_bit; 2621 2622 case GE: case GEU: 2623 /* If floating-point, we will have done a cror to put the bit in the 2624 unordered position. So test that bit. For integer, this is ! LT 2625 unless this is an scc insn. */ 2626 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit; 2627 2628 case LE: case LEU: 2629 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1; 2630 2631 default: 2632 abort (); 2633 } 2634} 2635 2636/* Return the GOT register. */ 2637 2638struct rtx_def * 2639rs6000_got_register (value) 2640 rtx value; 2641{ 2642 /* The second flow pass currently (June 1999) can't update regs_ever_live 2643 without disturbing other parts of the compiler, so update it here to 2644 make the prolog/epilogue code happy. */ 2645 if (no_new_pseudos && !regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) 2646 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1; 2647 2648 current_function_uses_pic_offset_table = 1; 2649 return pic_offset_table_rtx; 2650} 2651 2652/* Search for any occurrence of the GOT_TOC register marker that should 2653 have been eliminated, but may have crept back in. 2654 2655 This function could completely go away now (June 1999), but we leave it 2656 in for a while until all the possible issues with the new -fpic handling 2657 are resolved. */ 2658 2659void 2660rs6000_reorg (insn) 2661 rtx insn; 2662{ 2663 if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) 2664 { 2665 rtx got_reg = gen_rtx_REG (Pmode, 2); 2666 for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn)) 2667 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 2668 && reg_mentioned_p (got_reg, PATTERN (insn))) 2669 fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn)); 2670 } 2671} 2672 2673 2674/* Define the structure for the machine field in struct function. */ 2675struct machine_function 2676{ 2677 int sysv_varargs_p; 2678 int save_toc_p; 2679 int fpmem_size; 2680 int fpmem_offset; 2681}; 2682 2683/* Functions to save and restore rs6000_fpmem_size. 2684 These will be called, via pointer variables, 2685 from push_function_context and pop_function_context. */ 2686 2687void 2688rs6000_save_machine_status (p) 2689 struct function *p; 2690{ 2691 struct machine_function *machine = 2692 (struct machine_function *) xmalloc (sizeof (struct machine_function)); 2693 2694 p->machine = machine; 2695 machine->sysv_varargs_p = rs6000_sysv_varargs_p; 2696 machine->fpmem_size = rs6000_fpmem_size; 2697 machine->fpmem_offset = rs6000_fpmem_offset; 2698} 2699 2700void 2701rs6000_restore_machine_status (p) 2702 struct function *p; 2703{ 2704 struct machine_function *machine = p->machine; 2705 2706 rs6000_sysv_varargs_p = machine->sysv_varargs_p; 2707 rs6000_fpmem_size = machine->fpmem_size; 2708 rs6000_fpmem_offset = machine->fpmem_offset; 2709 2710 free (machine); 2711 p->machine = (struct machine_function *)0; 2712} 2713 2714/* Do anything needed before RTL is emitted for each function. */ 2715 2716void 2717rs6000_init_expanders () 2718{ 2719 /* Reset varargs and save TOC indicator */ 2720 rs6000_sysv_varargs_p = 0; 2721 rs6000_fpmem_size = 0; 2722 rs6000_fpmem_offset = 0; 2723 2724 /* Arrange to save and restore machine status around nested functions. */ 2725 save_machine_status = rs6000_save_machine_status; 2726 restore_machine_status = rs6000_restore_machine_status; 2727} 2728 2729 2730/* Print an operand. Recognize special options, documented below. */ 2731 2732#if TARGET_ELF 2733#define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel") 2734#define SMALL_DATA_REG ((rs6000_sdata == SDATA_EABI) ? 0 : 13) 2735#else 2736#define SMALL_DATA_RELOC "sda21" 2737#define SMALL_DATA_REG 0 2738#endif 2739 2740void 2741print_operand (file, x, code) 2742 FILE *file; 2743 rtx x; 2744 char code; 2745{ 2746 int i; 2747 HOST_WIDE_INT val; 2748 2749 /* These macros test for integers and extract the low-order bits. */ 2750#define INT_P(X) \ 2751((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \ 2752 && GET_MODE (X) == VOIDmode) 2753 2754#define INT_LOWPART(X) \ 2755 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X)) 2756 2757 switch (code) 2758 { 2759 case '.': 2760 /* Write out an instruction after the call which may be replaced 2761 with glue code by the loader. This depends on the AIX version. */ 2762 asm_fprintf (file, RS6000_CALL_GLUE); 2763 return; 2764 2765 case '*': 2766 /* Write the register number of the TOC register. */ 2767 fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2 /* PIC_OFFSET_TABLE_REGNUM? */ ], file); 2768 return; 2769 2770 case '$': 2771 /* Write out either a '.' or '$' for the current location, depending 2772 on whether this is Solaris or not. */ 2773 putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file); 2774 return; 2775 2776 case 'A': 2777 /* If X is a constant integer whose low-order 5 bits are zero, 2778 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug 2779 in the AIX assembler where "sri" with a zero shift count 2780 write a trash instruction. */ 2781 if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0) 2782 putc ('l', file); 2783 else 2784 putc ('r', file); 2785 return; 2786 2787 case 'b': 2788 /* Low-order 16 bits of constant, unsigned. */ 2789 if (! INT_P (x)) 2790 output_operand_lossage ("invalid %%b value"); 2791 2792 fprintf (file, "%d", INT_LOWPART (x) & 0xffff); 2793 return; 2794 2795 case 'B': 2796 /* If the low-order bit is zero, write 'r'; otherwise, write 'l' 2797 for 64-bit mask direction. */ 2798 putc (((INT_LOWPART(x) & 1) == 0 ? 'r' : 'l'), file); 2799 return; 2800 2801 case 'C': 2802 /* This is an optional cror needed for LE or GE floating-point 2803 comparisons. Otherwise write nothing. */ 2804 if ((GET_CODE (x) == LE || GET_CODE (x) == GE) 2805 && GET_MODE (XEXP (x, 0)) == CCFPmode) 2806 { 2807 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); 2808 2809 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, 2810 base_bit + 2, base_bit + (GET_CODE (x) == GE)); 2811 } 2812 return; 2813 2814 case 'D': 2815 /* Similar, except that this is for an scc, so we must be able to 2816 encode the test in a single bit that is one. We do the above 2817 for any LE, GE, GEU, or LEU and invert the bit for NE. */ 2818 if (GET_CODE (x) == LE || GET_CODE (x) == GE 2819 || GET_CODE (x) == LEU || GET_CODE (x) == GEU) 2820 { 2821 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); 2822 2823 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3, 2824 base_bit + 2, 2825 base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU)); 2826 } 2827 2828 else if (GET_CODE (x) == NE) 2829 { 2830 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68); 2831 2832 fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3, 2833 base_bit + 2, base_bit + 2); 2834 } 2835 return; 2836 2837 case 'E': 2838 /* X is a CR register. Print the number of the third bit of the CR */ 2839 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) 2840 output_operand_lossage ("invalid %%E value"); 2841 2842 fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3); 2843 return; 2844 2845 case 'f': 2846 /* X is a CR register. Print the shift count needed to move it 2847 to the high-order four bits. */ 2848 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) 2849 output_operand_lossage ("invalid %%f value"); 2850 else 2851 fprintf (file, "%d", 4 * (REGNO (x) - 68)); 2852 return; 2853 2854 case 'F': 2855 /* Similar, but print the count for the rotate in the opposite 2856 direction. */ 2857 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) 2858 output_operand_lossage ("invalid %%F value"); 2859 else 2860 fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68)); 2861 return; 2862 2863 case 'G': 2864 /* X is a constant integer. If it is negative, print "m", 2865 otherwise print "z". This is to make a aze or ame insn. */ 2866 if (GET_CODE (x) != CONST_INT) 2867 output_operand_lossage ("invalid %%G value"); 2868 else if (INTVAL (x) >= 0) 2869 putc ('z', file); 2870 else 2871 putc ('m', file); 2872 return; 2873 2874 case 'h': 2875 /* If constant, output low-order five bits. Otherwise, 2876 write normally. */ 2877 if (INT_P (x)) 2878 fprintf (file, "%d", INT_LOWPART (x) & 31); 2879 else 2880 print_operand (file, x, 0); 2881 return; 2882 2883 case 'H': 2884 /* If constant, output low-order six bits. Otherwise, 2885 write normally. */ 2886 if (INT_P (x)) 2887 fprintf (file, "%d", INT_LOWPART (x) & 63); 2888 else 2889 print_operand (file, x, 0); 2890 return; 2891 2892 case 'I': 2893 /* Print `i' if this is a constant, else nothing. */ 2894 if (INT_P (x)) 2895 putc ('i', file); 2896 return; 2897 2898 case 'j': 2899 /* Write the bit number in CCR for jump. */ 2900 i = ccr_bit (x, 0); 2901 if (i == -1) 2902 output_operand_lossage ("invalid %%j code"); 2903 else 2904 fprintf (file, "%d", i); 2905 return; 2906 2907 case 'J': 2908 /* Similar, but add one for shift count in rlinm for scc and pass 2909 scc flag to `ccr_bit'. */ 2910 i = ccr_bit (x, 1); 2911 if (i == -1) 2912 output_operand_lossage ("invalid %%J code"); 2913 else 2914 /* If we want bit 31, write a shift count of zero, not 32. */ 2915 fprintf (file, "%d", i == 31 ? 0 : i + 1); 2916 return; 2917 2918 case 'k': 2919 /* X must be a constant. Write the 1's complement of the 2920 constant. */ 2921 if (! INT_P (x)) 2922 output_operand_lossage ("invalid %%k value"); 2923 2924 fprintf (file, "%d", ~ INT_LOWPART (x)); 2925 return; 2926 2927 case 'L': 2928 /* Write second word of DImode or DFmode reference. Works on register 2929 or non-indexed memory only. */ 2930 if (GET_CODE (x) == REG) 2931 fprintf (file, "%s", reg_names[REGNO (x) + 1]); 2932 else if (GET_CODE (x) == MEM) 2933 { 2934 /* Handle possible auto-increment. Since it is pre-increment and 2935 we have already done it, we can just use an offset of word. */ 2936 if (GET_CODE (XEXP (x, 0)) == PRE_INC 2937 || GET_CODE (XEXP (x, 0)) == PRE_DEC) 2938 output_address (plus_constant_for_output (XEXP (XEXP (x, 0), 0), 2939 UNITS_PER_WORD)); 2940 else 2941 output_address (plus_constant_for_output (XEXP (x, 0), 2942 UNITS_PER_WORD)); 2943 if (small_data_operand (x, GET_MODE (x))) 2944 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, 2945 reg_names[SMALL_DATA_REG]); 2946 } 2947 return; 2948 2949 case 'm': 2950 /* MB value for a mask operand. */ 2951 if (! mask_operand (x, VOIDmode)) 2952 output_operand_lossage ("invalid %%m value"); 2953 2954 val = INT_LOWPART (x); 2955 2956 /* If the high bit is set and the low bit is not, the value is zero. 2957 If the high bit is zero, the value is the first 1 bit we find from 2958 the left. */ 2959 if ((val & 0x80000000) && ((val & 1) == 0)) 2960 { 2961 putc ('0', file); 2962 return; 2963 } 2964 else if ((val & 0x80000000) == 0) 2965 { 2966 for (i = 1; i < 32; i++) 2967 if ((val <<= 1) & 0x80000000) 2968 break; 2969 fprintf (file, "%d", i); 2970 return; 2971 } 2972 2973 /* Otherwise, look for the first 0 bit from the right. The result is its 2974 number plus 1. We know the low-order bit is one. */ 2975 for (i = 0; i < 32; i++) 2976 if (((val >>= 1) & 1) == 0) 2977 break; 2978 2979 /* If we ended in ...01, i would be 0. The correct value is 31, so 2980 we want 31 - i. */ 2981 fprintf (file, "%d", 31 - i); 2982 return; 2983 2984 case 'M': 2985 /* ME value for a mask operand. */ 2986 if (! mask_operand (x, VOIDmode)) 2987 output_operand_lossage ("invalid %%M value"); 2988 2989 val = INT_LOWPART (x); 2990 2991 /* If the low bit is set and the high bit is not, the value is 31. 2992 If the low bit is zero, the value is the first 1 bit we find from 2993 the right. */ 2994 if ((val & 1) && ((val & 0x80000000) == 0)) 2995 { 2996 fputs ("31", file); 2997 return; 2998 } 2999 else if ((val & 1) == 0) 3000 { 3001 for (i = 0; i < 32; i++) 3002 if ((val >>= 1) & 1) 3003 break; 3004 3005 /* If we had ....10, i would be 0. The result should be 3006 30, so we need 30 - i. */ 3007 fprintf (file, "%d", 30 - i); 3008 return; 3009 } 3010 3011 /* Otherwise, look for the first 0 bit from the left. The result is its 3012 number minus 1. We know the high-order bit is one. */ 3013 for (i = 0; i < 32; i++) 3014 if (((val <<= 1) & 0x80000000) == 0) 3015 break; 3016 3017 fprintf (file, "%d", i); 3018 return; 3019 3020 case 'N': 3021 /* Write the number of elements in the vector times 4. */ 3022 if (GET_CODE (x) != PARALLEL) 3023 output_operand_lossage ("invalid %%N value"); 3024 3025 fprintf (file, "%d", XVECLEN (x, 0) * 4); 3026 return; 3027 3028 case 'O': 3029 /* Similar, but subtract 1 first. */ 3030 if (GET_CODE (x) != PARALLEL) 3031 output_operand_lossage ("invalid %%O value"); 3032 3033 fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4); 3034 return; 3035 3036 case 'p': 3037 /* X is a CONST_INT that is a power of two. Output the logarithm. */ 3038 if (! INT_P (x) 3039 || (i = exact_log2 (INT_LOWPART (x))) < 0) 3040 output_operand_lossage ("invalid %%p value"); 3041 3042 fprintf (file, "%d", i); 3043 return; 3044 3045 case 'P': 3046 /* The operand must be an indirect memory reference. The result 3047 is the register number. */ 3048 if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG 3049 || REGNO (XEXP (x, 0)) >= 32) 3050 output_operand_lossage ("invalid %%P value"); 3051 3052 fprintf (file, "%d", REGNO (XEXP (x, 0))); 3053 return; 3054 3055 case 'R': 3056 /* X is a CR register. Print the mask for `mtcrf'. */ 3057 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x))) 3058 output_operand_lossage ("invalid %%R value"); 3059 else 3060 fprintf (file, "%d", 128 >> (REGNO (x) - 68)); 3061 return; 3062 3063 case 's': 3064 /* Low 5 bits of 32 - value */ 3065 if (! INT_P (x)) 3066 output_operand_lossage ("invalid %%s value"); 3067 3068 fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31); 3069 return; 3070 3071 case 'S': 3072 /* PowerPC64 mask position. All 0's and all 1's are excluded. 3073 CONST_INT 32-bit mask is considered sign-extended so any 3074 transition must occur within the CONST_INT, not on the boundary. */ 3075 if (! mask64_operand (x, VOIDmode)) 3076 output_operand_lossage ("invalid %%S value"); 3077 3078 val = INT_LOWPART (x); 3079 3080 if (val & 1) /* Clear Left */ 3081 { 3082 for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) 3083 if (!((val >>= 1) & 1)) 3084 break; 3085 3086#if HOST_BITS_PER_WIDE_INT == 32 3087 if (GET_CODE (x) == CONST_DOUBLE && i == 32) 3088 { 3089 val = CONST_DOUBLE_HIGH (x); 3090 3091 if (val == 0) 3092 --i; 3093 else 3094 for (i = 32; i < 64; i++) 3095 if (!((val >>= 1) & 1)) 3096 break; 3097 } 3098#endif 3099 /* i = index of last set bit from right 3100 mask begins at 63 - i from left */ 3101 if (i > 63) 3102 output_operand_lossage ("%%S computed all 1's mask"); 3103 fprintf (file, "%d", 63 - i); 3104 return; 3105 } 3106 else /* Clear Right */ 3107 { 3108 for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++) 3109 if ((val >>= 1) & 1) 3110 break; 3111 3112#if HOST_BITS_PER_WIDE_INT == 32 3113 if (GET_CODE (x) == CONST_DOUBLE && i == 32) 3114 { 3115 val = CONST_DOUBLE_HIGH (x); 3116 3117 if (val == (HOST_WIDE_INT) -1) 3118 --i; 3119 else 3120 for (i = 32; i < 64; i++) 3121 if ((val >>= 1) & 1) 3122 break; 3123 } 3124#endif 3125 /* i = index of last clear bit from right 3126 mask ends at 62 - i from left */ 3127 if (i > 62) 3128 output_operand_lossage ("%%S computed all 0's mask"); 3129 fprintf (file, "%d", 62 - i); 3130 return; 3131 } 3132 3133 case 't': 3134 /* Write 12 if this jump operation will branch if true, 4 otherwise. 3135 All floating-point operations except NE branch true and integer 3136 EQ, LT, GT, LTU and GTU also branch true. */ 3137 if (GET_RTX_CLASS (GET_CODE (x)) != '<') 3138 output_operand_lossage ("invalid %%t value"); 3139 3140 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode 3141 && GET_CODE (x) != NE) 3142 || GET_CODE (x) == EQ 3143 || GET_CODE (x) == LT || GET_CODE (x) == GT 3144 || GET_CODE (x) == LTU || GET_CODE (x) == GTU) 3145 fputs ("12", file); 3146 else 3147 putc ('4', file); 3148 return; 3149 3150 case 'T': 3151 /* Opposite of 't': write 4 if this jump operation will branch if true, 3152 12 otherwise. */ 3153 if (GET_RTX_CLASS (GET_CODE (x)) != '<') 3154 output_operand_lossage ("invalid %%T value"); 3155 3156 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode 3157 && GET_CODE (x) != NE) 3158 || GET_CODE (x) == EQ 3159 || GET_CODE (x) == LT || GET_CODE (x) == GT 3160 || GET_CODE (x) == LTU || GET_CODE (x) == GTU) 3161 putc ('4', file); 3162 else 3163 fputs ("12", file); 3164 return; 3165 3166 case 'u': 3167 /* High-order 16 bits of constant for use in unsigned operand. */ 3168 if (! INT_P (x)) 3169 output_operand_lossage ("invalid %%u value"); 3170 3171 fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff); 3172 return; 3173 3174 case 'v': 3175 /* High-order 16 bits of constant for use in signed operand. */ 3176 if (! INT_P (x)) 3177 output_operand_lossage ("invalid %%v value"); 3178 3179 { 3180 int value = (INT_LOWPART (x) >> 16) & 0xffff; 3181 3182 /* Solaris assembler doesn't like lis 0,0x8000 */ 3183 if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0) 3184 fprintf (file, "%d", value | (~0 << 16)); 3185 else 3186 fprintf (file, "0x%x", value); 3187 return; 3188 } 3189 3190 case 'U': 3191 /* Print `u' if this has an auto-increment or auto-decrement. */ 3192 if (GET_CODE (x) == MEM 3193 && (GET_CODE (XEXP (x, 0)) == PRE_INC 3194 || GET_CODE (XEXP (x, 0)) == PRE_DEC)) 3195 putc ('u', file); 3196 return; 3197 3198 case 'V': 3199 /* Print the trap code for this operand. */ 3200 switch (GET_CODE (x)) 3201 { 3202 case EQ: 3203 fputs ("eq", file); /* 4 */ 3204 break; 3205 case NE: 3206 fputs ("ne", file); /* 24 */ 3207 break; 3208 case LT: 3209 fputs ("lt", file); /* 16 */ 3210 break; 3211 case LE: 3212 fputs ("le", file); /* 20 */ 3213 break; 3214 case GT: 3215 fputs ("gt", file); /* 8 */ 3216 break; 3217 case GE: 3218 fputs ("ge", file); /* 12 */ 3219 break; 3220 case LTU: 3221 fputs ("llt", file); /* 2 */ 3222 break; 3223 case LEU: 3224 fputs ("lle", file); /* 6 */ 3225 break; 3226 case GTU: 3227 fputs ("lgt", file); /* 1 */ 3228 break; 3229 case GEU: 3230 fputs ("lge", file); /* 5 */ 3231 break; 3232 default: 3233 abort (); 3234 } 3235 break; 3236 3237 case 'w': 3238 /* If constant, low-order 16 bits of constant, signed. Otherwise, write 3239 normally. */ 3240 if (INT_P (x)) 3241 fprintf (file, "%d", ((INT_LOWPART (x) & 0xffff) ^ 0x8000) - 0x8000); 3242 else 3243 print_operand (file, x, 0); 3244 return; 3245 3246 case 'W': 3247 /* If constant, low-order 16 bits of constant, unsigned. 3248 Otherwise, write normally. */ 3249 if (INT_P (x)) 3250 fprintf (file, "%d", INT_LOWPART (x) & 0xffff); 3251 else 3252 print_operand (file, x, 0); 3253 return; 3254 3255 case 'X': 3256 if (GET_CODE (x) == MEM 3257 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0))) 3258 putc ('x', file); 3259 return; 3260 3261 case 'Y': 3262 /* Like 'L', for third word of TImode */ 3263 if (GET_CODE (x) == REG) 3264 fprintf (file, "%s", reg_names[REGNO (x) + 2]); 3265 else if (GET_CODE (x) == MEM) 3266 { 3267 if (GET_CODE (XEXP (x, 0)) == PRE_INC 3268 || GET_CODE (XEXP (x, 0)) == PRE_DEC) 3269 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8)); 3270 else 3271 output_address (plus_constant (XEXP (x, 0), 8)); 3272 if (small_data_operand (x, GET_MODE (x))) 3273 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, 3274 reg_names[SMALL_DATA_REG]); 3275 } 3276 return; 3277 3278 case 'z': 3279 /* X is a SYMBOL_REF. Write out the name preceded by a 3280 period and without any trailing data in brackets. Used for function 3281 names. If we are configured for System V (or the embedded ABI) on 3282 the PowerPC, do not emit the period, since those systems do not use 3283 TOCs and the like. */ 3284 if (GET_CODE (x) != SYMBOL_REF) 3285 abort (); 3286 3287 if (XSTR (x, 0)[0] != '.') 3288 { 3289 switch (DEFAULT_ABI) 3290 { 3291 default: 3292 abort (); 3293 3294 case ABI_AIX: 3295 putc ('.', file); 3296 break; 3297 3298 case ABI_V4: 3299 case ABI_AIX_NODESC: 3300 case ABI_SOLARIS: 3301 break; 3302 3303 case ABI_NT: 3304 fputs ("..", file); 3305 break; 3306 } 3307 } 3308 RS6000_OUTPUT_BASENAME (file, XSTR (x, 0)); 3309 return; 3310 3311 case 'Z': 3312 /* Like 'L', for last word of TImode. */ 3313 if (GET_CODE (x) == REG) 3314 fprintf (file, "%s", reg_names[REGNO (x) + 3]); 3315 else if (GET_CODE (x) == MEM) 3316 { 3317 if (GET_CODE (XEXP (x, 0)) == PRE_INC 3318 || GET_CODE (XEXP (x, 0)) == PRE_DEC) 3319 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12)); 3320 else 3321 output_address (plus_constant (XEXP (x, 0), 12)); 3322 if (small_data_operand (x, GET_MODE (x))) 3323 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, 3324 reg_names[SMALL_DATA_REG]); 3325 } 3326 return; 3327 3328 case 0: 3329 if (GET_CODE (x) == REG) 3330 fprintf (file, "%s", reg_names[REGNO (x)]); 3331 else if (GET_CODE (x) == MEM) 3332 { 3333 /* We need to handle PRE_INC and PRE_DEC here, since we need to 3334 know the width from the mode. */ 3335 if (GET_CODE (XEXP (x, 0)) == PRE_INC) 3336 fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)), 3337 REGNO (XEXP (XEXP (x, 0), 0))); 3338 else if (GET_CODE (XEXP (x, 0)) == PRE_DEC) 3339 fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)), 3340 REGNO (XEXP (XEXP (x, 0), 0))); 3341 else 3342 output_address (XEXP (x, 0)); 3343 } 3344 else 3345 output_addr_const (file, x); 3346 return; 3347 3348 default: 3349 output_operand_lossage ("invalid %%xn code"); 3350 } 3351} 3352 3353/* Print the address of an operand. */ 3354 3355void 3356print_operand_address (file, x) 3357 FILE *file; 3358 register rtx x; 3359{ 3360 if (GET_CODE (x) == REG) 3361 fprintf (file, "0(%s)", reg_names[ REGNO (x) ]); 3362 else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF) 3363 { 3364 output_addr_const (file, x); 3365 if (small_data_operand (x, GET_MODE (x))) 3366 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, 3367 reg_names[SMALL_DATA_REG]); 3368 3369#ifdef TARGET_NO_TOC 3370 else if (TARGET_NO_TOC) 3371 ; 3372#endif 3373 else 3374 fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 /* PIC_OFFSET_TABLE_REGNUM? */ ]); 3375 } 3376 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG) 3377 { 3378 if (REGNO (XEXP (x, 0)) == 0) 3379 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ], 3380 reg_names[ REGNO (XEXP (x, 0)) ]); 3381 else 3382 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ], 3383 reg_names[ REGNO (XEXP (x, 1)) ]); 3384 } 3385 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT) 3386 fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]); 3387 else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM 3388 && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1))) 3389 { 3390 output_addr_const (file, XEXP (x, 1)); 3391 fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]); 3392 } 3393 else 3394 abort (); 3395} 3396 3397/* This page contains routines that are used to determine what the function 3398 prologue and epilogue code will do and write them out. */ 3399 3400/* Return the first fixed-point register that is required to be saved. 32 if 3401 none. */ 3402 3403int 3404first_reg_to_save () 3405{ 3406 int first_reg; 3407 3408 /* Find lowest numbered live register. */ 3409 for (first_reg = 13; first_reg <= 31; first_reg++) 3410 if (regs_ever_live[first_reg] 3411 && (! call_used_regs[first_reg] 3412 || (first_reg == PIC_OFFSET_TABLE_REGNUM 3413 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 3414 && flag_pic == 1))) 3415 break; 3416 3417 if (profile_flag) 3418 { 3419 /* AIX must save/restore every register that contains a parameter 3420 before/after the .__mcount call plus an additional register 3421 for the static chain, if needed; use registers from 30 down to 22 3422 to do this. */ 3423 if (DEFAULT_ABI == ABI_AIX) 3424 { 3425 int last_parm_reg, profile_first_reg; 3426 3427 /* Figure out last used parameter register. The proper thing 3428 to do is to walk incoming args of the function. A function 3429 might have live parameter registers even if it has no 3430 incoming args. */ 3431 for (last_parm_reg = 10; 3432 last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; 3433 last_parm_reg--) 3434 ; 3435 3436 /* Calculate first reg for saving parameter registers 3437 and static chain. 3438 Skip reg 31 which may contain the frame pointer. */ 3439 profile_first_reg = (33 - last_parm_reg 3440 - (current_function_needs_context ? 1 : 0)); 3441 /* Do not save frame pointer if no parameters needs to be saved. */ 3442 if (profile_first_reg == 31) 3443 profile_first_reg = 32; 3444 3445 if (first_reg > profile_first_reg) 3446 first_reg = profile_first_reg; 3447 } 3448 3449 /* SVR4 may need one register to preserve the static chain. */ 3450 else if (current_function_needs_context) 3451 { 3452 /* Skip reg 31 which may contain the frame pointer. */ 3453 if (first_reg > 30) 3454 first_reg = 30; 3455 } 3456 } 3457 3458 return first_reg; 3459} 3460 3461/* Similar, for FP regs. */ 3462 3463int 3464first_fp_reg_to_save () 3465{ 3466 int first_reg; 3467 3468 /* Find lowest numbered live register. */ 3469 for (first_reg = 14 + 32; first_reg <= 63; first_reg++) 3470 if (regs_ever_live[first_reg]) 3471 break; 3472 3473 return first_reg; 3474} 3475 3476/* Return non-zero if this function makes calls. */ 3477 3478int 3479rs6000_makes_calls () 3480{ 3481 rtx insn; 3482 3483 /* If we are profiling, we will be making a call to __mcount. 3484 Under the System V ABI's, we store the LR directly, so 3485 we don't need to do it here. */ 3486 if (DEFAULT_ABI == ABI_AIX && profile_flag) 3487 return 1; 3488 3489 for (insn = get_insns (); insn; insn = next_insn (insn)) 3490 if (GET_CODE (insn) == CALL_INSN) 3491 return 1; 3492 3493 return 0; 3494} 3495 3496 3497/* Calculate the stack information for the current function. This is 3498 complicated by having two separate calling sequences, the AIX calling 3499 sequence and the V.4 calling sequence. 3500 3501 AIX stack frames look like: 3502 32-bit 64-bit 3503 SP----> +---------------------------------------+ 3504 | back chain to caller | 0 0 3505 +---------------------------------------+ 3506 | saved CR | 4 8 (8-11) 3507 +---------------------------------------+ 3508 | saved LR | 8 16 3509 +---------------------------------------+ 3510 | reserved for compilers | 12 24 3511 +---------------------------------------+ 3512 | reserved for binders | 16 32 3513 +---------------------------------------+ 3514 | saved TOC pointer | 20 40 3515 +---------------------------------------+ 3516 | Parameter save area (P) | 24 48 3517 +---------------------------------------+ 3518 | Alloca space (A) | 24+P etc. 3519 +---------------------------------------+ 3520 | Local variable space (L) | 24+P+A 3521 +---------------------------------------+ 3522 | Float/int conversion temporary (X) | 24+P+A+L 3523 +---------------------------------------+ 3524 | Save area for GP registers (G) | 24+P+A+X+L 3525 +---------------------------------------+ 3526 | Save area for FP registers (F) | 24+P+A+X+L+G 3527 +---------------------------------------+ 3528 old SP->| back chain to caller's caller | 3529 +---------------------------------------+ 3530 3531 The required alignment for AIX configurations is two words (i.e., 8 3532 or 16 bytes). 3533 3534 3535 V.4 stack frames look like: 3536 3537 SP----> +---------------------------------------+ 3538 | back chain to caller | 0 3539 +---------------------------------------+ 3540 | caller's saved LR | 4 3541 +---------------------------------------+ 3542 | Parameter save area (P) | 8 3543 +---------------------------------------+ 3544 | Alloca space (A) | 8+P 3545 +---------------------------------------+ 3546 | Varargs save area (V) | 8+P+A 3547 +---------------------------------------+ 3548 | Local variable space (L) | 8+P+A+V 3549 +---------------------------------------+ 3550 | Float/int conversion temporary (X) | 8+P+A+V+L 3551 +---------------------------------------+ 3552 | saved CR (C) | 8+P+A+V+L+X 3553 +---------------------------------------+ 3554 | Save area for GP registers (G) | 8+P+A+V+L+X+C 3555 +---------------------------------------+ 3556 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G 3557 +---------------------------------------+ 3558 old SP->| back chain to caller's caller | 3559 +---------------------------------------+ 3560 3561 The required alignment for V.4 is 16 bytes, or 8 bytes if -meabi is 3562 given. (But note below and in sysv4.h that we require only 8 and 3563 may round up the size of our stack frame anyways. The historical 3564 reason is early versions of powerpc-linux which didn't properly 3565 align the stack at program startup. A happy side-effect is that 3566 -mno-eabi libraries can be used with -meabi programs.) 3567 3568 3569 A PowerPC Windows/NT frame looks like: 3570 3571 SP----> +---------------------------------------+ 3572 | back chain to caller | 0 3573 +---------------------------------------+ 3574 | reserved | 4 3575 +---------------------------------------+ 3576 | reserved | 8 3577 +---------------------------------------+ 3578 | reserved | 12 3579 +---------------------------------------+ 3580 | reserved | 16 3581 +---------------------------------------+ 3582 | reserved | 20 3583 +---------------------------------------+ 3584 | Parameter save area (P) | 24 3585 +---------------------------------------+ 3586 | Alloca space (A) | 24+P 3587 +---------------------------------------+ 3588 | Local variable space (L) | 24+P+A 3589 +---------------------------------------+ 3590 | Float/int conversion temporary (X) | 24+P+A+L 3591 +---------------------------------------+ 3592 | Save area for FP registers (F) | 24+P+A+L+X 3593 +---------------------------------------+ 3594 | Possible alignment area (Y) | 24+P+A+L+X+F 3595 +---------------------------------------+ 3596 | Save area for GP registers (G) | 24+P+A+L+X+F+Y 3597 +---------------------------------------+ 3598 | Save area for CR (C) | 24+P+A+L+X+F+Y+G 3599 +---------------------------------------+ 3600 | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C 3601 +---------------------------------------+ 3602 | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T 3603 +---------------------------------------+ 3604 old SP->| back chain to caller's caller | 3605 +---------------------------------------+ 3606 3607 For NT, there is no specific order to save the registers, but in 3608 order to support __builtin_return_address, the save area for the 3609 link register needs to be in a known place, so we use -4 off of the 3610 old SP. To support calls through pointers, we also allocate a 3611 fixed slot to store the TOC, -8 off the old SP. 3612 3613 The required alignment for NT is 16 bytes. 3614 3615 3616 The EABI configuration defaults to the V.4 layout, unless 3617 -mcall-aix is used, in which case the AIX layout is used. However, 3618 the stack alignment requirements may differ. If -mno-eabi is not 3619 given, the required stack alignment is 8 bytes; if -mno-eabi is 3620 given, the required alignment is 16 bytes. (But see V.4 comment 3621 above.) */ 3622 3623#ifndef ABI_STACK_BOUNDARY 3624#define ABI_STACK_BOUNDARY STACK_BOUNDARY 3625#endif 3626 3627rs6000_stack_t * 3628rs6000_stack_info () 3629{ 3630 static rs6000_stack_t info, zero_info; 3631 rs6000_stack_t *info_ptr = &info; 3632 int reg_size = TARGET_32BIT ? 4 : 8; 3633 enum rs6000_abi abi; 3634 int total_raw_size; 3635 3636 /* Zero all fields portably */ 3637 info = zero_info; 3638 3639 /* Select which calling sequence */ 3640 info_ptr->abi = abi = DEFAULT_ABI; 3641 3642 /* Calculate which registers need to be saved & save area size */ 3643 info_ptr->first_gp_reg_save = first_reg_to_save (); 3644 /* Assume that we will have to save PIC_OFFSET_TABLE_REGNUM, 3645 even if it currently looks like we won't. */ 3646 if (flag_pic == 1 3647 && (abi == ABI_V4 || abi == ABI_SOLARIS) 3648 && info_ptr->first_gp_reg_save > PIC_OFFSET_TABLE_REGNUM) 3649 info_ptr->gp_size = reg_size * (32 - PIC_OFFSET_TABLE_REGNUM); 3650 else 3651 info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save); 3652 3653 info_ptr->first_fp_reg_save = first_fp_reg_to_save (); 3654 info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save); 3655 3656 /* Does this function call anything? */ 3657 info_ptr->calls_p = rs6000_makes_calls (); 3658 3659 /* Allocate space to save the toc. */ 3660 if (abi == ABI_NT && info_ptr->calls_p) 3661 { 3662 info_ptr->toc_save_p = 1; 3663 info_ptr->toc_size = reg_size; 3664 } 3665 3666 /* Does this machine need the float/int conversion area? */ 3667 info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM]; 3668 3669 /* If this is main and we need to call a function to set things up, 3670 save main's arguments around the call. */ 3671#ifdef TARGET_EABI 3672 if (TARGET_EABI) 3673#endif 3674 { 3675 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0 3676 && DECL_CONTEXT (current_function_decl) == NULL_TREE) 3677 { 3678 info_ptr->main_p = 1; 3679 3680#ifdef NAME__MAIN 3681 info_ptr->calls_p = 1; 3682 3683 if (DECL_ARGUMENTS (current_function_decl)) 3684 { 3685 int i; 3686 tree arg; 3687 3688 info_ptr->main_save_p = 1; 3689 info_ptr->main_size = 0; 3690 3691 for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl)); 3692 arg != NULL_TREE && i < 8; 3693 (arg = TREE_CHAIN (arg)), i++) 3694 { 3695 info_ptr->main_size += reg_size; 3696 } 3697 } 3698#endif 3699 } 3700 } 3701 3702 /* Determine if we need to save the link register */ 3703 if (regs_ever_live[65] 3704 || (DEFAULT_ABI == ABI_AIX && profile_flag) 3705#ifdef TARGET_RELOCATABLE 3706 || (TARGET_RELOCATABLE && (get_pool_size () != 0)) 3707#endif 3708 || (info_ptr->first_fp_reg_save != 64 3709 && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save)) 3710 || (abi == ABI_V4 && current_function_calls_alloca) 3711 || (abi == ABI_SOLARIS && current_function_calls_alloca) 3712 || info_ptr->calls_p) 3713 { 3714 info_ptr->lr_save_p = 1; 3715 regs_ever_live[65] = 1; 3716 if (abi == ABI_NT) 3717 info_ptr->lr_size = reg_size; 3718 } 3719 3720 /* Determine if we need to save the condition code registers */ 3721 if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72]) 3722 { 3723 info_ptr->cr_save_p = 1; 3724 if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) 3725 info_ptr->cr_size = reg_size; 3726 } 3727 3728 /* Determine various sizes */ 3729 info_ptr->reg_size = reg_size; 3730 info_ptr->fixed_size = RS6000_SAVE_AREA; 3731 info_ptr->varargs_size = RS6000_VARARGS_AREA; 3732 info_ptr->vars_size = RS6000_ALIGN (get_frame_size (), 8); 3733 info_ptr->parm_size = RS6000_ALIGN (current_function_outgoing_args_size, 8); 3734 info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0; 3735 info_ptr->save_size = RS6000_ALIGN (info_ptr->fp_size 3736 + info_ptr->gp_size 3737 + info_ptr->cr_size 3738 + info_ptr->lr_size 3739 + info_ptr->toc_size 3740 + info_ptr->main_size, 8); 3741 3742 /* Calculate the offsets */ 3743 switch (abi) 3744 { 3745 case ABI_NONE: 3746 default: 3747 abort (); 3748 3749 case ABI_AIX: 3750 case ABI_AIX_NODESC: 3751 info_ptr->fp_save_offset = - info_ptr->fp_size; 3752 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; 3753 info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size; 3754 info_ptr->cr_save_offset = reg_size; /* first word when 64-bit. */ 3755 info_ptr->lr_save_offset = 2*reg_size; 3756 break; 3757 3758 case ABI_V4: 3759 case ABI_SOLARIS: 3760 info_ptr->fp_save_offset = - info_ptr->fp_size; 3761 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size; 3762 info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size; 3763 info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size; 3764 info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size; 3765 info_ptr->lr_save_offset = reg_size; 3766 break; 3767 3768 case ABI_NT: 3769 info_ptr->lr_save_offset = -reg_size; 3770 info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size; 3771 info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size; 3772 info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size; 3773 info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size; 3774 if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0) 3775 info_ptr->fp_save_offset -= reg_size; 3776 3777 info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size; 3778 break; 3779 } 3780 3781 /* Ensure that fpmem_offset will be aligned to an 8-byte boundary. */ 3782 if (info_ptr->fpmem_p 3783 && (info_ptr->main_save_offset - info_ptr->fpmem_size) % 8) 3784 info_ptr->fpmem_size += reg_size; 3785 3786 total_raw_size = (info_ptr->vars_size 3787 + info_ptr->parm_size 3788 + info_ptr->fpmem_size 3789 + info_ptr->save_size 3790 + info_ptr->varargs_size 3791 + info_ptr->fixed_size); 3792 3793 info_ptr->total_size = RS6000_ALIGN (total_raw_size, ABI_STACK_BOUNDARY / BITS_PER_UNIT); 3794 3795 /* Determine if we need to allocate any stack frame: 3796 3797 For AIX we need to push the stack if a frame pointer is needed (because 3798 the stack might be dynamically adjusted), if we are debugging, if we 3799 make calls, or if the sum of fp_save, gp_save, fpmem, and local variables 3800 are more than the space needed to save all non-volatile registers: 3801 32-bit: 18*8 + 19*4 = 220 or 64-bit: 18*8 + 18*8 = 288 (GPR13 reserved). 3802 3803 For V.4 we don't have the stack cushion that AIX uses, but assume that 3804 the debugger can handle stackless frames. */ 3805 3806 if (info_ptr->calls_p) 3807 info_ptr->push_p = 1; 3808 3809 else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS) 3810 info_ptr->push_p = (total_raw_size > info_ptr->fixed_size 3811 || (abi == ABI_NT ? info_ptr->lr_save_p 3812 : info_ptr->calls_p)); 3813 3814 else 3815 info_ptr->push_p = (frame_pointer_needed 3816 || write_symbols != NO_DEBUG 3817 || ((total_raw_size - info_ptr->fixed_size) 3818 > (TARGET_32BIT ? 220 : 288))); 3819 3820 if (info_ptr->fpmem_p) 3821 { 3822 info_ptr->fpmem_offset = info_ptr->main_save_offset - info_ptr->fpmem_size; 3823 rs6000_fpmem_size = info_ptr->fpmem_size; 3824 rs6000_fpmem_offset = (info_ptr->push_p 3825 ? info_ptr->total_size + info_ptr->fpmem_offset 3826 : info_ptr->fpmem_offset); 3827 } 3828 else 3829 info_ptr->fpmem_offset = 0; 3830 3831 /* Zero offsets if we're not saving those registers */ 3832 if (info_ptr->fp_size == 0) 3833 info_ptr->fp_save_offset = 0; 3834 3835 if (info_ptr->gp_size == 0) 3836 info_ptr->gp_save_offset = 0; 3837 3838 if (!info_ptr->lr_save_p) 3839 info_ptr->lr_save_offset = 0; 3840 3841 if (!info_ptr->cr_save_p) 3842 info_ptr->cr_save_offset = 0; 3843 3844 if (!info_ptr->toc_save_p) 3845 info_ptr->toc_save_offset = 0; 3846 3847 if (!info_ptr->main_save_p) 3848 info_ptr->main_save_offset = 0; 3849 3850 return info_ptr; 3851} 3852 3853void 3854debug_stack_info (info) 3855 rs6000_stack_t *info; 3856{ 3857 const char *abi_string; 3858 3859 if (!info) 3860 info = rs6000_stack_info (); 3861 3862 fprintf (stderr, "\nStack information for function %s:\n", 3863 ((current_function_decl && DECL_NAME (current_function_decl)) 3864 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl)) 3865 : "<unknown>")); 3866 3867 switch (info->abi) 3868 { 3869 default: abi_string = "Unknown"; break; 3870 case ABI_NONE: abi_string = "NONE"; break; 3871 case ABI_AIX: abi_string = "AIX"; break; 3872 case ABI_AIX_NODESC: abi_string = "AIX"; break; 3873 case ABI_V4: abi_string = "V.4"; break; 3874 case ABI_SOLARIS: abi_string = "Solaris"; break; 3875 case ABI_NT: abi_string = "NT"; break; 3876 } 3877 3878 fprintf (stderr, "\tABI = %5s\n", abi_string); 3879 3880 if (info->first_gp_reg_save != 32) 3881 fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save); 3882 3883 if (info->first_fp_reg_save != 64) 3884 fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save); 3885 3886 if (info->lr_save_p) 3887 fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p); 3888 3889 if (info->cr_save_p) 3890 fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p); 3891 3892 if (info->toc_save_p) 3893 fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p); 3894 3895 if (info->push_p) 3896 fprintf (stderr, "\tpush_p = %5d\n", info->push_p); 3897 3898 if (info->calls_p) 3899 fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p); 3900 3901 if (info->main_p) 3902 fprintf (stderr, "\tmain_p = %5d\n", info->main_p); 3903 3904 if (info->main_save_p) 3905 fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p); 3906 3907 if (info->fpmem_p) 3908 fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p); 3909 3910 if (info->gp_save_offset) 3911 fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset); 3912 3913 if (info->fp_save_offset) 3914 fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset); 3915 3916 if (info->lr_save_offset) 3917 fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset); 3918 3919 if (info->cr_save_offset) 3920 fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset); 3921 3922 if (info->toc_save_offset) 3923 fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset); 3924 3925 if (info->varargs_save_offset) 3926 fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset); 3927 3928 if (info->main_save_offset) 3929 fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset); 3930 3931 if (info->fpmem_offset) 3932 fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset); 3933 3934 if (info->total_size) 3935 fprintf (stderr, "\ttotal_size = %5d\n", info->total_size); 3936 3937 if (info->varargs_size) 3938 fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size); 3939 3940 if (info->vars_size) 3941 fprintf (stderr, "\tvars_size = %5d\n", info->vars_size); 3942 3943 if (info->parm_size) 3944 fprintf (stderr, "\tparm_size = %5d\n", info->parm_size); 3945 3946 if (info->fpmem_size) 3947 fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size); 3948 3949 if (info->fixed_size) 3950 fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size); 3951 3952 if (info->gp_size) 3953 fprintf (stderr, "\tgp_size = %5d\n", info->gp_size); 3954 3955 if (info->fp_size) 3956 fprintf (stderr, "\tfp_size = %5d\n", info->fp_size); 3957 3958 if (info->lr_size) 3959 fprintf (stderr, "\tlr_size = %5d\n", info->cr_size); 3960 3961 if (info->cr_size) 3962 fprintf (stderr, "\tcr_size = %5d\n", info->cr_size); 3963 3964 if (info->toc_size) 3965 fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size); 3966 3967 if (info->main_size) 3968 fprintf (stderr, "\tmain_size = %5d\n", info->main_size); 3969 3970 if (info->save_size) 3971 fprintf (stderr, "\tsave_size = %5d\n", info->save_size); 3972 3973 if (info->reg_size != 4) 3974 fprintf (stderr, "\treg_size = %5d\n", info->reg_size); 3975 3976 fprintf (stderr, "\n"); 3977} 3978 3979/* Write out an instruction to load the TOC_TABLE address into register 30. 3980 This is only needed when TARGET_TOC, TARGET_MINIMAL_TOC, and there is 3981 a constant pool. */ 3982 3983void 3984rs6000_output_load_toc_table (file, reg) 3985 FILE *file; 3986 int reg; 3987{ 3988 char buf[256]; 3989 3990#ifdef USING_SVR4_H 3991 if (TARGET_RELOCATABLE) 3992 { 3993 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); 3994 fprintf (file, "\tbl "); 3995 assemble_name (file, buf); 3996 fprintf (file, "\n"); 3997 3998 /* possibly create the toc section */ 3999 if (!toc_initialized) 4000 { 4001 toc_section (); 4002 function_section (current_function_decl); 4003 } 4004 4005 /* If not first call in this function, we need to put the 4006 different between .LCTOC1 and the address we get to right 4007 after the bl. It will mess up disassembling the instructions 4008 but that can't be helped. We will later need to bias the 4009 address before loading. */ 4010 if (rs6000_pic_func_labelno != rs6000_pic_labelno) 4011 { 4012 const char *init_ptr = TARGET_32BIT ? ".long" : ".quad"; 4013 char *buf_ptr; 4014 4015 ASM_OUTPUT_INTERNAL_LABEL (file, "LCL", rs6000_pic_labelno); 4016 4017 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); 4018 STRIP_NAME_ENCODING (buf_ptr, buf); 4019 fprintf (file, "\t%s %s-", init_ptr, buf_ptr); 4020 4021 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); 4022 fprintf (file, "%s\n", buf_ptr); 4023 } 4024 4025 ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno); 4026 fprintf (file, "\tmflr %s\n", reg_names[reg]); 4027 4028 if (rs6000_pic_func_labelno != rs6000_pic_labelno) 4029 asm_fprintf(file, "\t{cal|la} %s,%d(%s)\n", reg_names[reg], 4030 (TARGET_32BIT ? 4 : 8), reg_names[reg]); 4031 4032 asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s,(" : "\tld %s,(", 4033 reg_names[0]); 4034 ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno); 4035 assemble_name (file, buf); 4036 fputs ("-", file); 4037 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno); 4038 assemble_name (file, buf); 4039 fprintf (file, ")(%s)\n", reg_names[reg]); 4040 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", 4041 reg_names[reg], reg_names[0], reg_names[reg]); 4042 rs6000_pic_labelno++; 4043 } 4044 else if (! TARGET_64BIT) 4045 { 4046 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1); 4047 asm_fprintf (file, "\t{liu|lis} %s,", reg_names[reg]); 4048 assemble_name (file, buf); 4049 fputs ("@ha\n", file); 4050 asm_fprintf (file, "\t{cal|la} %s,", reg_names[reg]); 4051 assemble_name (file, buf); 4052 asm_fprintf (file, "@l(%s)\n", reg_names[reg]); 4053 } 4054 else 4055 abort (); 4056 4057#else /* !USING_SVR4_H */ 4058 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0); 4059 asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", 4060 reg_names[reg]); 4061 assemble_name (file, buf); 4062 asm_fprintf (file, "(%s)\n", reg_names[2]); 4063#endif /* USING_SVR4_H */ 4064} 4065 4066 4067/* Emit the correct code for allocating stack space. If COPY_R12, make sure a copy 4068 of the old frame is left in r12. */ 4069 4070void 4071rs6000_allocate_stack_space (file, size, copy_r12) 4072 FILE *file; 4073 int size; 4074 int copy_r12; 4075{ 4076 int neg_size = -size; 4077 if (TARGET_UPDATE) 4078 { 4079 if (size < 32767) 4080 asm_fprintf (file, 4081 (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n", 4082 reg_names[1], neg_size, reg_names[1]); 4083 else 4084 { 4085 if (copy_r12) 4086 fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); 4087 4088 asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", 4089 reg_names[0], (neg_size >> 16) & 0xffff, 4090 reg_names[0], reg_names[0], neg_size & 0xffff); 4091 asm_fprintf (file, 4092 (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n", 4093 reg_names[1], reg_names[1], reg_names[0]); 4094 } 4095 } 4096 else 4097 { 4098 fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); 4099 if (size < 32767) 4100 asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", 4101 reg_names[1], neg_size, reg_names[1]); 4102 else 4103 { 4104 asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", 4105 reg_names[0], (neg_size >> 16) & 0xffff, 4106 reg_names[0], reg_names[0], neg_size & 0xffff); 4107 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n", reg_names[1], 4108 reg_names[0], reg_names[1]); 4109 } 4110 4111 asm_fprintf (file, 4112 (TARGET_32BIT) ? "\t{st|stw} %s,0(%s)\n" : "\tstd %s,0(%s)\n", 4113 reg_names[12], reg_names[1]); 4114 } 4115} 4116 4117 4118/* Write function prologue. */ 4119void 4120output_prolog (file, size) 4121 FILE *file; 4122 int size ATTRIBUTE_UNUSED; 4123{ 4124 rs6000_stack_t *info = rs6000_stack_info (); 4125 int reg_size = info->reg_size; 4126 const char *store_reg; 4127 const char *load_reg; 4128 int sp_reg = 1; 4129 int sp_offset = 0; 4130 4131 if (TARGET_32BIT) 4132 { 4133 store_reg = "\t{st|stw} %s,%d(%s)\n"; 4134 load_reg = "\t{l|lwz} %s,%d(%s)\n"; 4135 } 4136 else 4137 { 4138 store_reg = "\tstd %s,%d(%s)\n"; 4139 load_reg = "\tlld %s,%d(%s)\n"; 4140 } 4141 4142 if (TARGET_DEBUG_STACK) 4143 debug_stack_info (info); 4144 4145 /* Write .extern for any function we will call to save and restore fp 4146 values. */ 4147 if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) 4148 fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n", 4149 SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX, 4150 RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); 4151 4152 /* Write .extern for truncation routines, if needed. */ 4153 if (rs6000_trunc_used && ! trunc_defined) 4154 { 4155 fprintf (file, "\t.extern .%s\n\t.extern .%s\n", 4156 RS6000_ITRUNC, RS6000_UITRUNC); 4157 trunc_defined = 1; 4158 } 4159 4160 /* Write .extern for AIX common mode routines, if needed. */ 4161 if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined) 4162 { 4163 fputs ("\t.extern __mulh\n", file); 4164 fputs ("\t.extern __mull\n", file); 4165 fputs ("\t.extern __divss\n", file); 4166 fputs ("\t.extern __divus\n", file); 4167 fputs ("\t.extern __quoss\n", file); 4168 fputs ("\t.extern __quous\n", file); 4169 common_mode_defined = 1; 4170 } 4171 4172 /* For V.4, update stack before we do any saving and set back pointer. */ 4173 if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)) 4174 { 4175 if (info->total_size < 32767) 4176 sp_offset = info->total_size; 4177 else 4178 sp_reg = 12; 4179 rs6000_allocate_stack_space (file, info->total_size, sp_reg == 12); 4180 } 4181 4182 /* If we use the link register, get it into r0. */ 4183 if (info->lr_save_p) 4184 asm_fprintf (file, "\tmflr %s\n", reg_names[0]); 4185 4186 /* If we need to save CR, put it into r12. */ 4187 if (info->cr_save_p && sp_reg != 12) 4188 asm_fprintf (file, "\tmfcr %s\n", reg_names[12]); 4189 4190 /* Do any required saving of fpr's. If only one or two to save, do it 4191 ourself. Otherwise, call function. Note that since they are statically 4192 linked, we do not need a nop following them. */ 4193 if (FP_SAVE_INLINE (info->first_fp_reg_save)) 4194 { 4195 int regno = info->first_fp_reg_save; 4196 int loc = info->fp_save_offset + sp_offset; 4197 4198 for ( ; regno < 64; regno++, loc += 8) 4199 asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); 4200 } 4201 else if (info->first_fp_reg_save != 64) 4202 asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX, 4203 info->first_fp_reg_save - 32, SAVE_FP_SUFFIX); 4204 4205 /* Now save gpr's. */ 4206 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) 4207 { 4208 int regno = info->first_gp_reg_save; 4209 int loc = info->gp_save_offset + sp_offset; 4210 4211 for ( ; regno < 32; regno++, loc += reg_size) 4212 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); 4213 } 4214 4215 else if (info->first_gp_reg_save != 32) 4216 asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n", 4217 reg_names[info->first_gp_reg_save], 4218 info->gp_save_offset + sp_offset, 4219 reg_names[sp_reg]); 4220 4221 /* Save main's arguments if we need to call a function */ 4222#ifdef NAME__MAIN 4223 if (info->main_save_p) 4224 { 4225 int regno; 4226 int loc = info->main_save_offset + sp_offset; 4227 int size = info->main_size; 4228 4229 for (regno = 3; size > 0; regno++, loc += reg_size, size -= reg_size) 4230 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]); 4231 } 4232#endif 4233 4234 /* Save lr if we used it. */ 4235 if (info->lr_save_p) 4236 asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset, 4237 reg_names[sp_reg]); 4238 4239 /* Save CR if we use any that must be preserved. */ 4240 if (info->cr_save_p) 4241 { 4242 if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */ 4243 { 4244 asm_fprintf (file, "\tmfcr %s\n", reg_names[0]); 4245 asm_fprintf (file, store_reg, reg_names[0], 4246 info->cr_save_offset + sp_offset, 4247 reg_names[sp_reg]); 4248 } 4249 else 4250 asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset, 4251 reg_names[sp_reg]); 4252 } 4253 4254 /* If we need PIC_OFFSET_TABLE_REGNUM, initialize it now */ 4255 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 4256 && flag_pic == 1 && regs_ever_live[PIC_OFFSET_TABLE_REGNUM]) 4257 { 4258 if (!info->lr_save_p) 4259 asm_fprintf (file, "\tmflr %s\n", reg_names[0]); 4260 4261 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); 4262 asm_fprintf (file, "\tmflr %s\n", reg_names[PIC_OFFSET_TABLE_REGNUM]); 4263 4264 if (!info->lr_save_p) 4265 asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); 4266 } 4267 4268 /* NT needs us to probe the stack frame every 4k pages for large frames, so 4269 do it here. */ 4270 if (DEFAULT_ABI == ABI_NT && info->total_size > 4096) 4271 { 4272 if (info->total_size < 32768) 4273 { 4274 int probe_offset = 4096; 4275 while (probe_offset < info->total_size) 4276 { 4277 asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]); 4278 probe_offset += 4096; 4279 } 4280 } 4281 else 4282 { 4283 int probe_iterations = info->total_size / 4096; 4284 static int probe_labelno = 0; 4285 char buf[256]; 4286 4287 if (probe_iterations < 32768) 4288 asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations); 4289 else 4290 { 4291 asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16); 4292 if (probe_iterations & 0xffff) 4293 asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12], 4294 probe_iterations & 0xffff); 4295 } 4296 asm_fprintf (file, "\tmtctr %s\n", reg_names[12]); 4297 asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]); 4298 ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno); 4299 asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]); 4300 ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno++); 4301 fputs ("\tbdnz ", file); 4302 assemble_name (file, buf); 4303 fputs ("\n", file); 4304 } 4305 } 4306 4307 /* Update stack and set back pointer unless this is V.4, which was done previously */ 4308 if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS) 4309 rs6000_allocate_stack_space (file, info->total_size, FALSE); 4310 4311 /* Set frame pointer, if needed. */ 4312 if (frame_pointer_needed) 4313 asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]); 4314 4315#ifdef NAME__MAIN 4316 /* If we need to call a function to set things up for main, do so now 4317 before dealing with the TOC. */ 4318 if (info->main_p) 4319 { 4320 const char *prefix = ""; 4321 4322 switch (DEFAULT_ABI) 4323 { 4324 case ABI_AIX: prefix = "."; break; 4325 case ABI_NT: prefix = ".."; break; 4326 } 4327 4328 fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN); 4329#ifdef RS6000_CALL_GLUE2 4330 fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN); 4331#else 4332#ifdef RS6000_CALL_GLUE 4333 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) 4334 fprintf (file, "\t%s\n", RS6000_CALL_GLUE); 4335#endif 4336#endif 4337 4338 if (info->main_save_p) 4339 { 4340 int regno; 4341 int loc; 4342 int size = info->main_size; 4343 4344 if (info->total_size < 32767) 4345 { 4346 loc = info->total_size + info->main_save_offset; 4347 for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) 4348 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]); 4349 } 4350 else 4351 { 4352 int neg_size = info->main_save_offset - info->total_size; 4353 loc = 0; 4354 asm_fprintf (file, "\t{liu|lis} %s,0x%x\n\t{oril|ori} %s,%s,%d\n", 4355 reg_names[0], (neg_size >> 16) & 0xffff, 4356 reg_names[0], reg_names[0], neg_size & 0xffff); 4357 4358 asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0], 4359 reg_names[1]); 4360 4361 for (regno = 3; size > 0; regno++, size -= reg_size, loc += reg_size) 4362 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]); 4363 } 4364 } 4365 } 4366#endif 4367 4368 4369 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the 4370 TOC_TABLE address into register 30. */ 4371 if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0) 4372 { 4373#ifdef USING_SVR4_H 4374 if (!profile_flag) 4375 rs6000_pic_func_labelno = rs6000_pic_labelno; 4376#endif 4377 rs6000_output_load_toc_table (file, 30); 4378 } 4379 4380 if (DEFAULT_ABI == ABI_NT) 4381 { 4382 assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); 4383 fputs (".b:\n", file); 4384 } 4385} 4386 4387/* Write function epilogue. */ 4388 4389void 4390output_epilog (file, size) 4391 FILE *file; 4392 int size ATTRIBUTE_UNUSED; 4393{ 4394 rs6000_stack_t *info = rs6000_stack_info (); 4395 const char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n"; 4396 rtx insn = get_last_insn (); 4397 int sp_reg = 1; 4398 int sp_offset = 0; 4399 4400 /* If the last insn was a BARRIER, we don't have to write anything except 4401 the trace table. */ 4402 if (GET_CODE (insn) == NOTE) 4403 insn = prev_nonnote_insn (insn); 4404 if (insn == 0 || GET_CODE (insn) != BARRIER) 4405 { 4406 /* If we have a frame pointer, a call to alloca, or a large stack 4407 frame, restore the old stack pointer using the backchain. Otherwise, 4408 we know what size to update it with. */ 4409 if (frame_pointer_needed || current_function_calls_alloca 4410 || info->total_size > 32767) 4411 { 4412 /* Under V.4, don't reset the stack pointer until after we're done 4413 loading the saved registers. */ 4414 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 4415 sp_reg = 11; 4416 4417 asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]); 4418 } 4419 else if (info->push_p) 4420 { 4421 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 4422 sp_offset = info->total_size; 4423 else 4424 asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", 4425 reg_names[1], info->total_size, reg_names[1]); 4426 } 4427 4428 /* Get the old lr if we saved it. */ 4429 if (info->lr_save_p) 4430 asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]); 4431 4432 /* Get the old cr if we saved it. */ 4433 if (info->cr_save_p) 4434 asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]); 4435 4436 /* Set LR here to try to overlap restores below. */ 4437 if (info->lr_save_p) 4438 asm_fprintf (file, "\tmtlr %s\n", reg_names[0]); 4439 4440 /* Restore gpr's. */ 4441 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT) 4442 { 4443 int regno = info->first_gp_reg_save; 4444 int loc = info->gp_save_offset + sp_offset; 4445 int reg_size = (TARGET_32BIT) ? 4 : 8; 4446 4447 for ( ; regno < 32; regno++, loc += reg_size) 4448 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]); 4449 } 4450 4451 else if (info->first_gp_reg_save != 32) 4452 asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n", 4453 reg_names[info->first_gp_reg_save], 4454 info->gp_save_offset + sp_offset, 4455 reg_names[sp_reg]); 4456 4457 /* Restore fpr's if we can do it without calling a function. */ 4458 if (FP_SAVE_INLINE (info->first_fp_reg_save)) 4459 { 4460 int regno = info->first_fp_reg_save; 4461 int loc = info->fp_save_offset + sp_offset; 4462 4463 for ( ; regno < 64; regno++, loc += 8) 4464 asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]); 4465 } 4466 4467 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4 4468 that were used. */ 4469 if (info->cr_save_p) 4470 asm_fprintf (file, "\tmtcrf %d,%s\n", 4471 (regs_ever_live[70] != 0) * 0x20 4472 + (regs_ever_live[71] != 0) * 0x10 4473 + (regs_ever_live[72] != 0) * 0x8, reg_names[12]); 4474 4475 /* If this is V.4, unwind the stack pointer after all of the loads 4476 have been done */ 4477 if (sp_offset != 0) 4478 asm_fprintf (file, "\t{cal|la} %s,%d(%s)\n", 4479 reg_names[1], sp_offset, reg_names[1]); 4480 else if (sp_reg != 1) 4481 asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]); 4482 4483 /* If we have to restore more than two FP registers, branch to the 4484 restore function. It will return to our caller. */ 4485 if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save)) 4486 asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX, 4487 info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX); 4488 else 4489 asm_fprintf (file, "\t{br|blr}\n"); 4490 } 4491 4492 /* Output a traceback table here. See /usr/include/sys/debug.h for info 4493 on its format. 4494 4495 We don't output a traceback table if -finhibit-size-directive was 4496 used. The documentation for -finhibit-size-directive reads 4497 ``don't output a @code{.size} assembler directive, or anything 4498 else that would cause trouble if the function is split in the 4499 middle, and the two halves are placed at locations far apart in 4500 memory.'' The traceback table has this property, since it 4501 includes the offset from the start of the function to the 4502 traceback table itself. 4503 4504 System V.4 Powerpc's (and the embedded ABI derived from it) use a 4505 different traceback table. */ 4506 if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive) 4507 { 4508 char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0); 4509 int fixed_parms, float_parms, parm_info; 4510 int i; 4511 4512 while (*fname == '.') /* V.4 encodes . in the name */ 4513 fname++; 4514 4515 /* Need label immediately before tbtab, so we can compute its offset 4516 from the function start. */ 4517 if (*fname == '*') 4518 ++fname; 4519 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); 4520 ASM_OUTPUT_LABEL (file, fname); 4521 4522 /* The .tbtab pseudo-op can only be used for the first eight 4523 expressions, since it can't handle the possibly variable 4524 length fields that follow. However, if you omit the optional 4525 fields, the assembler outputs zeros for all optional fields 4526 anyways, giving each variable length field is minimum length 4527 (as defined in sys/debug.h). Thus we can not use the .tbtab 4528 pseudo-op at all. */ 4529 4530 /* An all-zero word flags the start of the tbtab, for debuggers 4531 that have to find it by searching forward from the entry 4532 point or from the current pc. */ 4533 fputs ("\t.long 0\n", file); 4534 4535 /* Tbtab format type. Use format type 0. */ 4536 fputs ("\t.byte 0,", file); 4537 4538 /* Language type. Unfortunately, there doesn't seem to be any 4539 official way to get this info, so we use language_string. C 4540 is 0. C++ is 9. No number defined for Obj-C, so use the 4541 value for C for now. There is no official value for Java, 4542 although IBM appears to be using 13. There is no official value 4543 for Chill, so we've choosen 44 pseudo-randomly. */ 4544 if (! strcmp (language_string, "GNU C") 4545 || ! strcmp (language_string, "GNU Obj-C")) 4546 i = 0; 4547 else if (! strcmp (language_string, "GNU F77")) 4548 i = 1; 4549 else if (! strcmp (language_string, "GNU Ada")) 4550 i = 3; 4551 else if (! strcmp (language_string, "GNU Pascal")) 4552 i = 2; 4553 else if (! strcmp (language_string, "GNU C++")) 4554 i = 9; 4555 else if (! strcmp (language_string, "GNU Java")) 4556 i = 13; 4557 else if (! strcmp (language_string, "GNU CHILL")) 4558 i = 44; 4559 else 4560 abort (); 4561 fprintf (file, "%d,", i); 4562 4563 /* 8 single bit fields: global linkage (not set for C extern linkage, 4564 apparently a PL/I convention?), out-of-line epilogue/prologue, offset 4565 from start of procedure stored in tbtab, internal function, function 4566 has controlled storage, function has no toc, function uses fp, 4567 function logs/aborts fp operations. */ 4568 /* Assume that fp operations are used if any fp reg must be saved. */ 4569 fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1)); 4570 4571 /* 6 bitfields: function is interrupt handler, name present in 4572 proc table, function calls alloca, on condition directives 4573 (controls stack walks, 3 bits), saves condition reg, saves 4574 link reg. */ 4575 /* The `function calls alloca' bit seems to be set whenever reg 31 is 4576 set up as a frame pointer, even when there is no alloca call. */ 4577 fprintf (file, "%d,", 4578 ((1 << 6) | (frame_pointer_needed << 5) 4579 | (info->cr_save_p << 1) | (info->lr_save_p))); 4580 4581 /* 3 bitfields: saves backchain, spare bit, number of fpr saved 4582 (6 bits). */ 4583 fprintf (file, "%d,", 4584 (info->push_p << 7) | (64 - info->first_fp_reg_save)); 4585 4586 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */ 4587 fprintf (file, "%d,", (32 - first_reg_to_save ())); 4588 4589 { 4590 /* Compute the parameter info from the function decl argument 4591 list. */ 4592 tree decl; 4593 int next_parm_info_bit; 4594 4595 next_parm_info_bit = 31; 4596 parm_info = 0; 4597 fixed_parms = 0; 4598 float_parms = 0; 4599 4600 for (decl = DECL_ARGUMENTS (current_function_decl); 4601 decl; decl = TREE_CHAIN (decl)) 4602 { 4603 rtx parameter = DECL_INCOMING_RTL (decl); 4604 enum machine_mode mode = GET_MODE (parameter); 4605 4606 if (GET_CODE (parameter) == REG) 4607 { 4608 if (GET_MODE_CLASS (mode) == MODE_FLOAT) 4609 { 4610 int bits; 4611 4612 float_parms++; 4613 4614 if (mode == SFmode) 4615 bits = 0x2; 4616 else if (mode == DFmode) 4617 bits = 0x3; 4618 else 4619 abort (); 4620 4621 /* If only one bit will fit, don't or in this entry. */ 4622 if (next_parm_info_bit > 0) 4623 parm_info |= (bits << (next_parm_info_bit - 1)); 4624 next_parm_info_bit -= 2; 4625 } 4626 else 4627 { 4628 fixed_parms += ((GET_MODE_SIZE (mode) 4629 + (UNITS_PER_WORD - 1)) 4630 / UNITS_PER_WORD); 4631 next_parm_info_bit -= 1; 4632 } 4633 } 4634 } 4635 } 4636 4637 /* Number of fixed point parameters. */ 4638 /* This is actually the number of words of fixed point parameters; thus 4639 an 8 byte struct counts as 2; and thus the maximum value is 8. */ 4640 fprintf (file, "%d,", fixed_parms); 4641 4642 /* 2 bitfields: number of floating point parameters (7 bits), parameters 4643 all on stack. */ 4644 /* This is actually the number of fp registers that hold parameters; 4645 and thus the maximum value is 13. */ 4646 /* Set parameters on stack bit if parameters are not in their original 4647 registers, regardless of whether they are on the stack? Xlc 4648 seems to set the bit when not optimizing. */ 4649 fprintf (file, "%d\n", ((float_parms << 1) | (! optimize))); 4650 4651 /* Optional fields follow. Some are variable length. */ 4652 4653 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float, 4654 11 double float. */ 4655 /* There is an entry for each parameter in a register, in the order that 4656 they occur in the parameter list. Any intervening arguments on the 4657 stack are ignored. If the list overflows a long (max possible length 4658 34 bits) then completely leave off all elements that don't fit. */ 4659 /* Only emit this long if there was at least one parameter. */ 4660 if (fixed_parms || float_parms) 4661 fprintf (file, "\t.long %d\n", parm_info); 4662 4663 /* Offset from start of code to tb table. */ 4664 fputs ("\t.long ", file); 4665 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT"); 4666 RS6000_OUTPUT_BASENAME (file, fname); 4667 fputs ("-.", file); 4668 RS6000_OUTPUT_BASENAME (file, fname); 4669 putc ('\n', file); 4670 4671 /* Interrupt handler mask. */ 4672 /* Omit this long, since we never set the interrupt handler bit 4673 above. */ 4674 4675 /* Number of CTL (controlled storage) anchors. */ 4676 /* Omit this long, since the has_ctl bit is never set above. */ 4677 4678 /* Displacement into stack of each CTL anchor. */ 4679 /* Omit this list of longs, because there are no CTL anchors. */ 4680 4681 /* Length of function name. */ 4682 fprintf (file, "\t.short %d\n", (int) strlen (fname)); 4683 4684 /* Function name. */ 4685 assemble_string (fname, strlen (fname)); 4686 4687 /* Register for alloca automatic storage; this is always reg 31. 4688 Only emit this if the alloca bit was set above. */ 4689 if (frame_pointer_needed) 4690 fputs ("\t.byte 31\n", file); 4691 } 4692 4693 if (DEFAULT_ABI == ABI_NT) 4694 { 4695 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); 4696 fputs (".e:\nFE_MOT_RESVD..", file); 4697 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); 4698 fputs (":\n", file); 4699 } 4700} 4701 4702/* A C compound statement that outputs the assembler code for a thunk function, 4703 used to implement C++ virtual function calls with multiple inheritance. The 4704 thunk acts as a wrapper around a virtual function, adjusting the implicit 4705 object parameter before handing control off to the real function. 4706 4707 First, emit code to add the integer DELTA to the location that contains the 4708 incoming first argument. Assume that this argument contains a pointer, and 4709 is the one used to pass the `this' pointer in C++. This is the incoming 4710 argument *before* the function prologue, e.g. `%o0' on a sparc. The 4711 addition must preserve the values of all other incoming arguments. 4712 4713 After the addition, emit code to jump to FUNCTION, which is a 4714 `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch 4715 the return address. Hence returning from FUNCTION will return to whoever 4716 called the current `thunk'. 4717 4718 The effect must be as if FUNCTION had been called directly with the adjusted 4719 first argument. This macro is responsible for emitting all of the code for 4720 a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not 4721 invoked. 4722 4723 The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been 4724 extracted from it.) It might possibly be useful on some targets, but 4725 probably not. 4726 4727 If you do not define this macro, the target-independent code in the C++ 4728 frontend will generate a less efficient heavyweight thunk that calls 4729 FUNCTION instead of jumping to it. The generic approach does not support 4730 varargs. */ 4731 4732void 4733output_mi_thunk (file, thunk_fndecl, delta, function) 4734 FILE *file; 4735 tree thunk_fndecl ATTRIBUTE_UNUSED; 4736 int delta; 4737 tree function; 4738{ 4739 const char *this_reg = reg_names[ aggregate_value_p (TREE_TYPE (TREE_TYPE (function))) ? 4 : 3 ]; 4740 const char *prefix; 4741 char *fname; 4742 const char *r0 = reg_names[0]; 4743 const char *sp = reg_names[1]; 4744 const char *toc = reg_names[2]; 4745 const char *schain = reg_names[11]; 4746 const char *r12 = reg_names[12]; 4747 char buf[512]; 4748 static int labelno = 0; 4749 4750 /* Small constants that can be done by one add instruction */ 4751 if (delta >= -32768 && delta <= 32767) 4752 { 4753 if (! TARGET_NEW_MNEMONICS) 4754 fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta, this_reg); 4755 else 4756 fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta); 4757 } 4758 4759 /* Large constants that can be done by one addis instruction */ 4760 else if ((delta & 0xffff) == 0 && num_insns_constant_wide (delta) == 1) 4761 asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, 4762 delta >> 16); 4763 4764 /* 32-bit constants that can be done by an add and addis instruction. */ 4765 else if (TARGET_32BIT || num_insns_constant_wide (delta) == 1) 4766 { 4767 /* Break into two pieces, propagating the sign bit from the low word to 4768 the upper word. */ 4769 int delta_high = delta >> 16; 4770 int delta_low = delta & 0xffff; 4771 if ((delta_low & 0x8000) != 0) 4772 { 4773 delta_high++; 4774 delta_low = (delta_low ^ 0x8000) - 0x8000; /* sign extend */ 4775 } 4776 4777 asm_fprintf (file, "\t{cau|addis} %s,%s,%d\n", this_reg, this_reg, 4778 delta_high); 4779 4780 if (! TARGET_NEW_MNEMONICS) 4781 fprintf (file, "\tcal %s,%d(%s)\n", this_reg, delta_low, this_reg); 4782 else 4783 fprintf (file, "\taddi %s,%s,%d\n", this_reg, this_reg, delta_low); 4784 } 4785 4786 /* 64-bit constants, fixme */ 4787 else 4788 abort (); 4789 4790 /* Get the prefix in front of the names. */ 4791 switch (DEFAULT_ABI) 4792 { 4793 default: 4794 abort (); 4795 4796 case ABI_AIX: 4797 prefix = "."; 4798 break; 4799 4800 case ABI_V4: 4801 case ABI_AIX_NODESC: 4802 case ABI_SOLARIS: 4803 prefix = ""; 4804 break; 4805 4806 case ABI_NT: 4807 prefix = ".."; 4808 break; 4809 } 4810 4811 /* If the function is compiled in this module, jump to it directly. 4812 Otherwise, load up its address and jump to it. */ 4813 4814 fname = XSTR (XEXP (DECL_RTL (function), 0), 0); 4815 4816 if (current_file_function_operand (XEXP (DECL_RTL (function), 0)) 4817 && ! lookup_attribute ("longcall", 4818 TYPE_ATTRIBUTES (TREE_TYPE (function)))) 4819 { 4820 fprintf (file, "\tb %s", prefix); 4821 assemble_name (file, fname); 4822 if (DEFAULT_ABI == ABI_V4 && flag_pic) fputs ("@local", file); 4823 fputs ("\n", file); 4824 } 4825 4826 else 4827 { 4828 switch (DEFAULT_ABI) 4829 { 4830 default: 4831 case ABI_NT: 4832 abort (); 4833 4834 case ABI_AIX: 4835 /* Set up a TOC entry for the function. */ 4836 ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); 4837 toc_section (); 4838 ASM_OUTPUT_INTERNAL_LABEL (file, "Lthunk", labelno); 4839 labelno++; 4840 4841 /* Note, MINIMAL_TOC doesn't make sense in the case of a thunk, since 4842 there will be only one TOC entry for this function. */ 4843 fputs ("\t.tc\t", file); 4844 assemble_name (file, buf); 4845 fputs ("[TC],", file); 4846 assemble_name (file, buf); 4847 putc ('\n', file); 4848 text_section (); 4849 asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz} %s," : "\tld %s", r12); 4850 assemble_name (file, buf); 4851 asm_fprintf (file, "(%s)\n", reg_names[2]); 4852 asm_fprintf (file, 4853 (TARGET_32BIT) ? "\t{l|lwz} %s,0(%s)\n" : "\tld %s,0(%s)\n", 4854 r0, r12); 4855 4856 asm_fprintf (file, 4857 (TARGET_32BIT) ? "\t{l|lwz} %s,4(%s)\n" : "\tld %s,8(%s)\n", 4858 toc, r12); 4859 4860 asm_fprintf (file, "\tmtctr %s\n", r0); 4861 asm_fprintf (file, 4862 (TARGET_32BIT) ? "\t{l|lwz} %s,8(%s)\n" : "\tld %s,16(%s)\n", 4863 schain, r12); 4864 4865 asm_fprintf (file, "\tbctr\n"); 4866 break; 4867 4868 case ABI_V4: 4869 fprintf (file, "\tb %s", prefix); 4870 assemble_name (file, fname); 4871 if (flag_pic) fputs ("@plt", file); 4872 fputs ("\n", file); 4873 break; 4874 4875 /* Don't use r11, that contains the static chain, just use r0/r12. */ 4876 case ABI_AIX_NODESC: 4877 case ABI_SOLARIS: 4878 if (flag_pic == 1) 4879 { 4880 fprintf (file, "\tmflr %s\n", r0); 4881 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); 4882 asm_fprintf (file, "\tmflr %s\n", r12); 4883 asm_fprintf (file, "\tmtlr %s\n", r0); 4884 asm_fprintf (file, "\t{l|lwz} %s,", r0); 4885 assemble_name (file, fname); 4886 asm_fprintf (file, "@got(%s)\n", r12); 4887 asm_fprintf (file, "\tmtctr %s\n", r0); 4888 asm_fprintf (file, "\tbctr\n"); 4889 } 4890#if TARGET_ELF 4891 else if (flag_pic > 1 || TARGET_RELOCATABLE) 4892 { 4893 ASM_GENERATE_INTERNAL_LABEL (buf, "Lthunk", labelno); 4894 labelno++; 4895 fprintf (file, "\tmflr %s\n", r0); 4896 asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", r0, sp); 4897 rs6000_pic_func_labelno = rs6000_pic_labelno; 4898 rs6000_output_load_toc_table (file, 12); 4899 asm_fprintf (file, "\t{l|lwz} %s,", r0); 4900 assemble_name (file, buf); 4901 asm_fprintf (file, "(%s)\n", r12); 4902 asm_fprintf (file, "\t{l|lwz} %s,4(%s)\n", r12, sp); 4903 asm_fprintf (file, "\tmtlr %s\n", r12); 4904 asm_fprintf (file, "\tmtctr %s\n", r0); 4905 asm_fprintf (file, "\tbctr\n"); 4906 asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); 4907 assemble_name (file, buf); 4908 fputs (" = .-.LCTOC1\n", file); 4909 fputs ("\t.long ", file); 4910 assemble_name (file, fname); 4911 fputs ("\n\t.previous\n", file); 4912 } 4913#endif /* TARGET_ELF */ 4914 4915 else 4916 { 4917 asm_fprintf (file, "\t{liu|lis} %s,", r12); 4918 assemble_name (file, fname); 4919 asm_fprintf (file, "@ha\n"); 4920 asm_fprintf (file, "\t{cal|la} %s,", r12); 4921 assemble_name (file, fname); 4922 asm_fprintf (file, "@l(%s)\n", r12); 4923 asm_fprintf (file, "\tmtctr %s\n", r12); 4924 asm_fprintf (file, "\tbctr\n"); 4925 } 4926 4927 break; 4928 } 4929 } 4930} 4931 4932 4933/* Output a TOC entry. We derive the entry name from what is 4934 being written. */ 4935 4936void 4937output_toc (file, x, labelno) 4938 FILE *file; 4939 rtx x; 4940 int labelno; 4941{ 4942 char buf[256]; 4943 char *name = buf; 4944 char *real_name; 4945 rtx base = x; 4946 int offset = 0; 4947 4948 if (TARGET_NO_TOC) 4949 abort (); 4950 4951 /* if we're going to put a double constant in the TOC, make sure it's 4952 aligned properly when strict alignment is on. */ 4953 if (GET_CODE (x) == CONST_DOUBLE 4954 && STRICT_ALIGNMENT 4955 && GET_MODE (x) == DFmode 4956 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) { 4957 ASM_OUTPUT_ALIGN (file, 3); 4958 } 4959 4960 4961 if (TARGET_ELF && TARGET_MINIMAL_TOC) 4962 { 4963 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC"); 4964 fprintf (file, "%d = .-", labelno); 4965 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC"); 4966 fputs ("1\n", file); 4967 } 4968 else 4969 ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno); 4970 4971 /* Handle FP constants specially. Note that if we have a minimal 4972 TOC, things we put here aren't actually in the TOC, so we can allow 4973 FP constants. */ 4974 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode 4975 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) 4976 { 4977 REAL_VALUE_TYPE rv; 4978 long k[2]; 4979 4980 REAL_VALUE_FROM_CONST_DOUBLE (rv, x); 4981 REAL_VALUE_TO_TARGET_DOUBLE (rv, k); 4982 4983 if (TARGET_64BIT) 4984 { 4985 if (TARGET_MINIMAL_TOC) 4986 fprintf (file, "\t.llong 0x%lx%08lx\n", k[0], k[1]); 4987 else 4988 fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx%08lx\n", 4989 k[0], k[1], k[0] & 0xffffffff, k[1] & 0xffffffff); 4990 return; 4991 } 4992 else 4993 { 4994 if (TARGET_MINIMAL_TOC) 4995 fprintf (file, "\t.long 0x%lx\n\t.long 0x%lx\n", k[0], k[1]); 4996 else 4997 fprintf (file, "\t.tc FD_%lx_%lx[TC],0x%lx,0x%lx\n", 4998 k[0], k[1], k[0], k[1]); 4999 return; 5000 } 5001 } 5002 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode 5003 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) 5004 { 5005 REAL_VALUE_TYPE rv; 5006 long l; 5007 5008 REAL_VALUE_FROM_CONST_DOUBLE (rv, x); 5009 REAL_VALUE_TO_TARGET_SINGLE (rv, l); 5010 5011 if (TARGET_64BIT) 5012 { 5013 if (TARGET_MINIMAL_TOC) 5014 fprintf (file, "\t.llong 0x%lx00000000\n", l); 5015 else 5016 fprintf (file, "\t.tc FS_%lx[TC],0x%lx00000000\n", l, l); 5017 return; 5018 } 5019 else 5020 { 5021 if (TARGET_MINIMAL_TOC) 5022 fprintf (file, "\t.long 0x%lx\n", l); 5023 else 5024 fprintf (file, "\t.tc FS_%lx[TC],0x%lx\n", l, l); 5025 return; 5026 } 5027 } 5028 else if (GET_MODE (x) == DImode 5029 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) 5030 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) 5031 { 5032 HOST_WIDE_INT low; 5033 HOST_WIDE_INT high; 5034 5035 if (GET_CODE (x) == CONST_DOUBLE) 5036 { 5037 low = CONST_DOUBLE_LOW (x); 5038 high = CONST_DOUBLE_HIGH (x); 5039 } 5040 else 5041#if HOST_BITS_PER_WIDE_INT == 32 5042 { 5043 low = INTVAL (x); 5044 high = (low < 0) ? ~0 : 0; 5045 } 5046#else 5047 { 5048 low = INTVAL (x) & 0xffffffff; 5049 high = (HOST_WIDE_INT) INTVAL (x) >> 32; 5050 } 5051#endif 5052 5053 if (TARGET_64BIT) 5054 { 5055 if (TARGET_MINIMAL_TOC) 5056 fprintf (file, "\t.llong 0x%lx%08lx\n", (long)high, (long)low); 5057 else 5058 fprintf (file, "\t.tc ID_%lx_%lx[TC],0x%lx%08lx\n", 5059 (long)high, (long)low, (long)high, (long)low); 5060 return; 5061 } 5062 else 5063 { 5064 if (TARGET_MINIMAL_TOC) 5065 fprintf (file, "\t.long %ld\n\t.long %ld\n", 5066 (long)high, (long)low); 5067 else 5068 fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n", 5069 (long)high, (long)low, (long)high, (long)low); 5070 return; 5071 } 5072 } 5073 5074 if (GET_CODE (x) == CONST) 5075 { 5076 base = XEXP (XEXP (x, 0), 0); 5077 offset = INTVAL (XEXP (XEXP (x, 0), 1)); 5078 } 5079 5080 if (GET_CODE (base) == SYMBOL_REF) 5081 name = XSTR (base, 0); 5082 else if (GET_CODE (base) == LABEL_REF) 5083 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0))); 5084 else if (GET_CODE (base) == CODE_LABEL) 5085 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base)); 5086 else 5087 abort (); 5088 5089 STRIP_NAME_ENCODING (real_name, name); 5090 if (TARGET_MINIMAL_TOC) 5091 fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); 5092 else 5093 { 5094 fprintf (file, "\t.tc %s", real_name); 5095 5096 if (offset < 0) 5097 fprintf (file, ".N%d", - offset); 5098 else if (offset) 5099 fprintf (file, ".P%d", offset); 5100 5101 fputs ("[TC],", file); 5102 } 5103 5104 /* Currently C++ toc references to vtables can be emitted before it 5105 is decided whether the vtable is public or private. If this is 5106 the case, then the linker will eventually complain that there is 5107 a TOC reference to an unknown section. Thus, for vtables only, 5108 we emit the TOC reference to reference the symbol and not the 5109 section. */ 5110 if (!strncmp ("_vt.", name, 4)) 5111 { 5112 RS6000_OUTPUT_BASENAME (file, name); 5113 if (offset < 0) 5114 fprintf (file, "%d", offset); 5115 else if (offset > 0) 5116 fprintf (file, "+%d", offset); 5117 } 5118 else 5119 output_addr_const (file, x); 5120 putc ('\n', file); 5121} 5122 5123/* Output an assembler pseudo-op to write an ASCII string of N characters 5124 starting at P to FILE. 5125 5126 On the RS/6000, we have to do this using the .byte operation and 5127 write out special characters outside the quoted string. 5128 Also, the assembler is broken; very long strings are truncated, 5129 so we must artificially break them up early. */ 5130 5131void 5132output_ascii (file, p, n) 5133 FILE *file; 5134 const char *p; 5135 int n; 5136{ 5137 char c; 5138 int i, count_string; 5139 const char *for_string = "\t.byte \""; 5140 const char *for_decimal = "\t.byte "; 5141 const char *to_close = NULL; 5142 5143 count_string = 0; 5144 for (i = 0; i < n; i++) 5145 { 5146 c = *p++; 5147 if (c >= ' ' && c < 0177) 5148 { 5149 if (for_string) 5150 fputs (for_string, file); 5151 putc (c, file); 5152 5153 /* Write two quotes to get one. */ 5154 if (c == '"') 5155 { 5156 putc (c, file); 5157 ++count_string; 5158 } 5159 5160 for_string = NULL; 5161 for_decimal = "\"\n\t.byte "; 5162 to_close = "\"\n"; 5163 ++count_string; 5164 5165 if (count_string >= 512) 5166 { 5167 fputs (to_close, file); 5168 5169 for_string = "\t.byte \""; 5170 for_decimal = "\t.byte "; 5171 to_close = NULL; 5172 count_string = 0; 5173 } 5174 } 5175 else 5176 { 5177 if (for_decimal) 5178 fputs (for_decimal, file); 5179 fprintf (file, "%d", c); 5180 5181 for_string = "\n\t.byte \""; 5182 for_decimal = ", "; 5183 to_close = "\n"; 5184 count_string = 0; 5185 } 5186 } 5187 5188 /* Now close the string if we have written one. Then end the line. */ 5189 if (to_close) 5190 fprintf (file, to_close); 5191} 5192 5193/* Generate a unique section name for FILENAME for a section type 5194 represented by SECTION_DESC. Output goes into BUF. 5195 5196 SECTION_DESC can be any string, as long as it is different for each 5197 possible section type. 5198 5199 We name the section in the same manner as xlc. The name begins with an 5200 underscore followed by the filename (after stripping any leading directory 5201 names) with the last period replaced by the string SECTION_DESC. If 5202 FILENAME does not contain a period, SECTION_DESC is appended to the end of 5203 the name. */ 5204 5205void 5206rs6000_gen_section_name (buf, filename, section_desc) 5207 char **buf; 5208 char *filename; 5209 char *section_desc; 5210{ 5211 char *q, *after_last_slash, *last_period = 0; 5212 char *p; 5213 int len; 5214 5215 after_last_slash = filename; 5216 for (q = filename; *q; q++) 5217 { 5218 if (*q == '/') 5219 after_last_slash = q + 1; 5220 else if (*q == '.') 5221 last_period = q; 5222 } 5223 5224 len = strlen (after_last_slash) + strlen (section_desc) + 2; 5225 *buf = (char *) permalloc (len); 5226 5227 p = *buf; 5228 *p++ = '_'; 5229 5230 for (q = after_last_slash; *q; q++) 5231 { 5232 if (q == last_period) 5233 { 5234 strcpy (p, section_desc); 5235 p += strlen (section_desc); 5236 } 5237 5238 else if (ISALNUM (*q)) 5239 *p++ = *q; 5240 } 5241 5242 if (last_period == 0) 5243 strcpy (p, section_desc); 5244 else 5245 *p = '\0'; 5246} 5247 5248/* Write function profiler code. */ 5249 5250void 5251output_function_profiler (file, labelno) 5252 FILE *file; 5253 int labelno; 5254{ 5255 /* The last used parameter register. */ 5256 int last_parm_reg; 5257 int i, j; 5258 char buf[100]; 5259 5260 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno); 5261 switch (DEFAULT_ABI) 5262 { 5263 default: 5264 abort (); 5265 5266 case ABI_V4: 5267 case ABI_SOLARIS: 5268 case ABI_AIX_NODESC: 5269 fprintf (file, "\tmflr %s\n", reg_names[0]); 5270 if (flag_pic == 1) 5271 { 5272 fputs ("\tbl _GLOBAL_OFFSET_TABLE_@local-4\n", file); 5273 asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", 5274 reg_names[0], reg_names[1]); 5275 asm_fprintf (file, "\tmflr %s\n", reg_names[12]); 5276 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[0]); 5277 assemble_name (file, buf); 5278 asm_fprintf (file, "@got(%s)\n", reg_names[12]); 5279 } 5280#if TARGET_ELF 5281 else if (flag_pic > 1 || TARGET_RELOCATABLE) 5282 { 5283 asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", 5284 reg_names[0], reg_names[1]); 5285 rs6000_pic_func_labelno = rs6000_pic_labelno; 5286 rs6000_output_load_toc_table (file, 12); 5287 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[12]); 5288 assemble_name (file, buf); 5289 asm_fprintf (file, "X(%s)\n", reg_names[12]); 5290 asm_fprintf (file, "%s\n", MINIMAL_TOC_SECTION_ASM_OP); 5291 assemble_name (file, buf); 5292 fputs ("X = .-.LCTOC1\n", file); 5293 fputs ("\t.long ", file); 5294 assemble_name (file, buf); 5295 fputs ("\n\t.previous\n", file); 5296 } 5297#endif 5298 else 5299 { 5300 asm_fprintf (file, "\t{liu|lis} %s,", reg_names[12]); 5301 assemble_name (file, buf); 5302 fputs ("@ha\n", file); 5303 asm_fprintf (file, "\t{st|stw} %s,4(%s)\n", 5304 reg_names[0], reg_names[1]); 5305 asm_fprintf (file, "\t{cal|la} %s,", reg_names[0]); 5306 assemble_name (file, buf); 5307 asm_fprintf (file, "@l(%s)\n", reg_names[12]); 5308 } 5309 5310 if (current_function_needs_context) 5311 asm_fprintf (file, "\tmr %s,%s\n", 5312 reg_names[30], reg_names[STATIC_CHAIN_REGNUM]); 5313 fprintf (file, "\tbl %s\n", RS6000_MCOUNT); 5314 if (current_function_needs_context) 5315 asm_fprintf (file, "\tmr %s,%s\n", 5316 reg_names[STATIC_CHAIN_REGNUM], reg_names[30]); 5317 break; 5318 5319 case ABI_AIX: 5320 /* Set up a TOC entry for the profiler label. */ 5321 toc_section (); 5322 ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno); 5323 if (TARGET_MINIMAL_TOC) 5324 { 5325 fputs (TARGET_32BIT ? "\t.long " : "\t.llong ", file); 5326 assemble_name (file, buf); 5327 putc ('\n', file); 5328 } 5329 else 5330 { 5331 fputs ("\t.tc\t", file); 5332 assemble_name (file, buf); 5333 fputs ("[TC],", file); 5334 assemble_name (file, buf); 5335 putc ('\n', file); 5336 } 5337 text_section (); 5338 5339 /* Figure out last used parameter register. The proper thing to do is 5340 to walk incoming args of the function. A function might have live 5341 parameter registers even if it has no incoming args. */ 5342 5343 for (last_parm_reg = 10; 5344 last_parm_reg > 2 && ! regs_ever_live [last_parm_reg]; 5345 last_parm_reg--) 5346 ; 5347 5348 /* Save parameter registers in regs 23-30 and static chain in r22. 5349 Don't overwrite reg 31, since it might be set up as the frame pointer. */ 5350 5351 for (i = 3, j = 30; i <= last_parm_reg; i++, j--) 5352 asm_fprintf (file, "\tmr %d,%d\n", j, i); 5353 if (current_function_needs_context) 5354 asm_fprintf (file, "\tmr %d,%d\n", j, STATIC_CHAIN_REGNUM); 5355 5356 /* Load location address into r3, and call mcount. */ 5357 5358 ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno); 5359 asm_fprintf (file, TARGET_32BIT ? "\t{l|lwz} %s," : "\tld %s,", 5360 reg_names[3]); 5361 assemble_name (file, buf); 5362 asm_fprintf (file, "(%s)\n\tbl %s\n\t%s\n", 5363 reg_names[2], RS6000_MCOUNT, RS6000_CALL_GLUE); 5364 5365 /* Restore parameter registers and static chain. */ 5366 5367 for (i = 3, j = 30; i <= last_parm_reg; i++, j--) 5368 asm_fprintf (file, "\tmr %d,%d\n", i, j); 5369 if (current_function_needs_context) 5370 asm_fprintf (file, "\tmr %d,%d\n", STATIC_CHAIN_REGNUM, j); 5371 5372 break; 5373 } 5374} 5375 5376/* Adjust the cost of a scheduling dependency. Return the new cost of 5377 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */ 5378 5379int 5380rs6000_adjust_cost (insn, link, dep_insn, cost) 5381 rtx insn; 5382 rtx link; 5383 rtx dep_insn ATTRIBUTE_UNUSED; 5384 int cost; 5385{ 5386 if (! recog_memoized (insn)) 5387 return 0; 5388 5389 if (REG_NOTE_KIND (link) != 0) 5390 return 0; 5391 5392 if (REG_NOTE_KIND (link) == 0) 5393 { 5394 /* Data dependency; DEP_INSN writes a register that INSN reads some 5395 cycles later. */ 5396 5397 /* Tell the first scheduling pass about the latency between a mtctr 5398 and bctr (and mtlr and br/blr). The first scheduling pass will not 5399 know about this latency since the mtctr instruction, which has the 5400 latency associated to it, will be generated by reload. */ 5401 if (get_attr_type (insn) == TYPE_JMPREG) 5402 return TARGET_POWER ? 5 : 4; 5403 5404 /* Fall out to return default cost. */ 5405 } 5406 5407 return cost; 5408} 5409 5410/* A C statement (sans semicolon) to update the integer scheduling priority 5411 INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier, 5412 increase the priority to execute INSN later. Do not define this macro if 5413 you do not need to adjust the scheduling priorities of insns. */ 5414 5415int 5416rs6000_adjust_priority (insn, priority) 5417 rtx insn ATTRIBUTE_UNUSED; 5418 int priority; 5419{ 5420 /* On machines (like the 750) which have asymetric integer units, where one 5421 integer unit can do multiply and divides and the other can't, reduce the 5422 priority of multiply/divide so it is scheduled before other integer 5423 operationss. */ 5424 5425#if 0 5426 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') 5427 return priority; 5428 5429 if (GET_CODE (PATTERN (insn)) == USE) 5430 return priority; 5431 5432 switch (rs6000_cpu_attr) { 5433 case CPU_PPC750: 5434 switch (get_attr_type (insn)) 5435 { 5436 default: 5437 break; 5438 5439 case TYPE_IMUL: 5440 case TYPE_IDIV: 5441 fprintf (stderr, "priority was %#x (%d) before adjustment\n", priority, priority); 5442 if (priority >= 0 && priority < 0x01000000) 5443 priority >>= 3; 5444 break; 5445 } 5446 } 5447#endif 5448 5449 return priority; 5450} 5451 5452/* Return how many instructions the machine can issue per cycle */ 5453int get_issue_rate() 5454{ 5455 switch (rs6000_cpu_attr) { 5456 case CPU_RIOS1: 5457 return 3; /* ? */ 5458 case CPU_RIOS2: 5459 return 4; 5460 case CPU_PPC601: 5461 return 3; /* ? */ 5462 case CPU_PPC603: 5463 return 2; 5464 case CPU_PPC750: 5465 return 2; 5466 case CPU_PPC604: 5467 return 4; 5468 case CPU_PPC604E: 5469 return 4; 5470 case CPU_PPC620: 5471 return 4; 5472 default: 5473 return 1; 5474 } 5475} 5476 5477 5478/* Output assembler code for a block containing the constant parts 5479 of a trampoline, leaving space for the variable parts. 5480 5481 The trampoline should set the static chain pointer to value placed 5482 into the trampoline and should branch to the specified routine. */ 5483 5484void 5485rs6000_trampoline_template (file) 5486 FILE *file; 5487{ 5488 const char *sc = reg_names[STATIC_CHAIN_REGNUM]; 5489 const char *r0 = reg_names[0]; 5490 const char *r2 = reg_names[2]; 5491 5492 switch (DEFAULT_ABI) 5493 { 5494 default: 5495 abort (); 5496 5497 /* Under AIX, this is not code at all, but merely a data area, 5498 since that is the way all functions are called. The first word is 5499 the address of the function, the second word is the TOC pointer (r2), 5500 and the third word is the static chain value. */ 5501 case ABI_AIX: 5502 break; 5503 5504 5505 /* V.4/eabi function pointers are just a single pointer, so we need to 5506 do the full gory code to load up the static chain. */ 5507 case ABI_V4: 5508 case ABI_SOLARIS: 5509 case ABI_AIX_NODESC: 5510 break; 5511 5512 /* NT function pointers point to a two word area (real address, TOC) 5513 which unfortunately does not include a static chain field. So we 5514 use the function field to point to ..LTRAMP1 and the toc field 5515 to point to the whole table. */ 5516 case ABI_NT: 5517 if (STATIC_CHAIN_REGNUM == 0 5518 || STATIC_CHAIN_REGNUM == 2 5519 || TARGET_64BIT 5520 || !TARGET_NEW_MNEMONICS) 5521 abort (); 5522 5523 fprintf (file, "\t.ualong 0\n"); /* offset 0 */ 5524 fprintf (file, "\t.ualong 0\n"); /* offset 4 */ 5525 fprintf (file, "\t.ualong 0\n"); /* offset 8 */ 5526 fprintf (file, "\t.ualong 0\n"); /* offset 12 */ 5527 fprintf (file, "\t.ualong 0\n"); /* offset 16 */ 5528 fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */ 5529 fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */ 5530 fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */ 5531 fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */ 5532 fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */ 5533 fprintf (file, "\tbctr\n"); /* offset 40 */ 5534 break; 5535 } 5536 5537 return; 5538} 5539 5540/* Length in units of the trampoline for entering a nested function. */ 5541 5542int 5543rs6000_trampoline_size () 5544{ 5545 int ret = 0; 5546 5547 switch (DEFAULT_ABI) 5548 { 5549 default: 5550 abort (); 5551 5552 case ABI_AIX: 5553 ret = (TARGET_32BIT) ? 12 : 24; 5554 break; 5555 5556 case ABI_V4: 5557 case ABI_SOLARIS: 5558 case ABI_AIX_NODESC: 5559 ret = (TARGET_32BIT) ? 40 : 48; 5560 break; 5561 5562 case ABI_NT: 5563 ret = 20; 5564 break; 5565 } 5566 5567 return ret; 5568} 5569 5570/* Emit RTL insns to initialize the variable parts of a trampoline. 5571 FNADDR is an RTX for the address of the function's pure code. 5572 CXT is an RTX for the static chain value for the function. */ 5573 5574void 5575rs6000_initialize_trampoline (addr, fnaddr, cxt) 5576 rtx addr; 5577 rtx fnaddr; 5578 rtx cxt; 5579{ 5580 enum machine_mode pmode = Pmode; 5581 int regsize = (TARGET_32BIT) ? 4 : 8; 5582 rtx ctx_reg = force_reg (pmode, cxt); 5583 5584 switch (DEFAULT_ABI) 5585 { 5586 default: 5587 abort (); 5588 5589/* Macros to shorten the code expansions below. */ 5590#define MEM_DEREF(addr) gen_rtx_MEM (pmode, memory_address (pmode, addr)) 5591#define MEM_PLUS(addr,offset) gen_rtx_MEM (pmode, memory_address (pmode, plus_constant (addr, offset))) 5592 5593 /* Under AIX, just build the 3 word function descriptor */ 5594 case ABI_AIX: 5595 { 5596 rtx fn_reg = gen_reg_rtx (pmode); 5597 rtx toc_reg = gen_reg_rtx (pmode); 5598 emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); 5599 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4)); 5600 emit_move_insn (MEM_DEREF (addr), fn_reg); 5601 emit_move_insn (MEM_PLUS (addr, regsize), toc_reg); 5602 emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg); 5603 } 5604 break; 5605 5606 /* Under V.4/eabi, call __trampoline_setup to do the real work. */ 5607 case ABI_V4: 5608 case ABI_SOLARIS: 5609 case ABI_AIX_NODESC: 5610 emit_library_call (gen_rtx_SYMBOL_REF (SImode, "__trampoline_setup"), 5611 FALSE, VOIDmode, 4, 5612 addr, pmode, 5613 GEN_INT (rs6000_trampoline_size ()), SImode, 5614 fnaddr, pmode, 5615 ctx_reg, pmode); 5616 break; 5617 5618 /* Under NT, update the first word to point to the ..LTRAMP1..0 header, 5619 the second word will point to the whole trampoline, third-fifth words 5620 will then have the real address, static chain, and toc value. */ 5621 case ABI_NT: 5622 { 5623 rtx tramp_reg = gen_reg_rtx (pmode); 5624 rtx fn_reg = gen_reg_rtx (pmode); 5625 rtx toc_reg = gen_reg_rtx (pmode); 5626 5627 emit_move_insn (tramp_reg, gen_rtx_SYMBOL_REF (pmode, "..LTRAMP1..0")); 5628 addr = force_reg (pmode, addr); 5629 emit_move_insn (fn_reg, MEM_DEREF (fnaddr)); 5630 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize)); 5631 emit_move_insn (MEM_DEREF (addr), tramp_reg); 5632 emit_move_insn (MEM_PLUS (addr, regsize), addr); 5633 emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg); 5634 emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg); 5635 emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx_REG (pmode, 2)); 5636 } 5637 break; 5638 } 5639 5640 return; 5641} 5642 5643 5644/* If defined, a C expression whose value is nonzero if IDENTIFIER 5645 with arguments ARGS is a valid machine specific attribute for DECL. 5646 The attributes in ATTRIBUTES have previously been assigned to DECL. */ 5647 5648int 5649rs6000_valid_decl_attribute_p (decl, attributes, identifier, args) 5650 tree decl ATTRIBUTE_UNUSED; 5651 tree attributes ATTRIBUTE_UNUSED; 5652 tree identifier ATTRIBUTE_UNUSED; 5653 tree args ATTRIBUTE_UNUSED; 5654{ 5655 return 0; 5656} 5657 5658/* If defined, a C expression whose value is nonzero if IDENTIFIER 5659 with arguments ARGS is a valid machine specific attribute for TYPE. 5660 The attributes in ATTRIBUTES have previously been assigned to TYPE. */ 5661 5662int 5663rs6000_valid_type_attribute_p (type, attributes, identifier, args) 5664 tree type; 5665 tree attributes ATTRIBUTE_UNUSED; 5666 tree identifier; 5667 tree args; 5668{ 5669 if (TREE_CODE (type) != FUNCTION_TYPE 5670 && TREE_CODE (type) != FIELD_DECL 5671 && TREE_CODE (type) != TYPE_DECL) 5672 return 0; 5673 5674 /* Longcall attribute says that the function is not within 2**26 bytes 5675 of the current function, and to do an indirect call. */ 5676 if (is_attribute_p ("longcall", identifier)) 5677 return (args == NULL_TREE); 5678 5679 if (DEFAULT_ABI == ABI_NT) 5680 { 5681 /* Stdcall attribute says callee is responsible for popping arguments 5682 if they are not variable. */ 5683 if (is_attribute_p ("stdcall", identifier)) 5684 return (args == NULL_TREE); 5685 5686 /* Cdecl attribute says the callee is a normal C declaration */ 5687 if (is_attribute_p ("cdecl", identifier)) 5688 return (args == NULL_TREE); 5689 5690 /* Dllimport attribute says the caller is to call the function 5691 indirectly through a __imp_<name> pointer. */ 5692 if (is_attribute_p ("dllimport", identifier)) 5693 return (args == NULL_TREE); 5694 5695 /* Dllexport attribute says the callee is to create a __imp_<name> 5696 pointer. */ 5697 if (is_attribute_p ("dllexport", identifier)) 5698 return (args == NULL_TREE); 5699 5700 /* Exception attribute allows the user to specify 1-2 strings or identifiers 5701 that will fill in the 3rd and 4th fields of the structured exception 5702 table. */ 5703 if (is_attribute_p ("exception", identifier)) 5704 { 5705 int i; 5706 5707 if (args == NULL_TREE) 5708 return 0; 5709 5710 for (i = 0; i < 2 && args != NULL_TREE; i++) 5711 { 5712 tree this_arg = TREE_VALUE (args); 5713 args = TREE_PURPOSE (args); 5714 5715 if (TREE_CODE (this_arg) != STRING_CST 5716 && TREE_CODE (this_arg) != IDENTIFIER_NODE) 5717 return 0; 5718 } 5719 5720 return (args == NULL_TREE); 5721 } 5722 } 5723 5724 return 0; 5725} 5726 5727/* If defined, a C expression whose value is zero if the attributes on 5728 TYPE1 and TYPE2 are incompatible, one if they are compatible, and 5729 two if they are nearly compatible (which causes a warning to be 5730 generated). */ 5731 5732int 5733rs6000_comp_type_attributes (type1, type2) 5734 tree type1 ATTRIBUTE_UNUSED; 5735 tree type2 ATTRIBUTE_UNUSED; 5736{ 5737 return 1; 5738} 5739 5740/* If defined, a C statement that assigns default attributes to newly 5741 defined TYPE. */ 5742 5743void 5744rs6000_set_default_type_attributes (type) 5745 tree type ATTRIBUTE_UNUSED; 5746{ 5747} 5748 5749/* Return a dll import reference corresponding to a call's SYMBOL_REF */ 5750struct rtx_def * 5751rs6000_dll_import_ref (call_ref) 5752 rtx call_ref; 5753{ 5754 const char *call_name; 5755 int len; 5756 char *p; 5757 rtx reg1, reg2; 5758 tree node; 5759 5760 if (GET_CODE (call_ref) != SYMBOL_REF) 5761 abort (); 5762 5763 call_name = XSTR (call_ref, 0); 5764 len = sizeof ("__imp_") + strlen (call_name); 5765 p = alloca (len); 5766 reg2 = gen_reg_rtx (Pmode); 5767 5768 strcpy (p, "__imp_"); 5769 strcat (p, call_name); 5770 node = get_identifier (p); 5771 5772 reg1 = force_reg (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node))); 5773 emit_move_insn (reg2, gen_rtx_MEM (Pmode, reg1)); 5774 5775 return reg2; 5776} 5777 5778/* Return a reference suitable for calling a function with the longcall attribute. */ 5779struct rtx_def * 5780rs6000_longcall_ref (call_ref) 5781 rtx call_ref; 5782{ 5783 const char *call_name; 5784 tree node; 5785 5786 if (GET_CODE (call_ref) != SYMBOL_REF) 5787 return call_ref; 5788 5789 /* System V adds '.' to the internal name, so skip them. */ 5790 call_name = XSTR (call_ref, 0); 5791 if (*call_name == '.') 5792 { 5793 while (*call_name == '.') 5794 call_name++; 5795 5796 node = get_identifier (call_name); 5797 call_ref = gen_rtx_SYMBOL_REF (VOIDmode, IDENTIFIER_POINTER (node)); 5798 } 5799 5800 return force_reg (Pmode, call_ref); 5801} 5802 5803 5804/* A C statement or statements to switch to the appropriate section 5805 for output of RTX in mode MODE. You can assume that RTX is some 5806 kind of constant in RTL. The argument MODE is redundant except in 5807 the case of a `const_int' rtx. Select the section by calling 5808 `text_section' or one of the alternatives for other sections. 5809 5810 Do not define this macro if you put all constants in the read-only 5811 data section. */ 5812 5813#ifdef USING_SVR4_H 5814 5815void 5816rs6000_select_rtx_section (mode, x) 5817 enum machine_mode mode; 5818 rtx x; 5819{ 5820 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x)) 5821 toc_section (); 5822 else 5823 const_section (); 5824} 5825 5826/* A C statement or statements to switch to the appropriate 5827 section for output of DECL. DECL is either a `VAR_DECL' node 5828 or a constant of some sort. RELOC indicates whether forming 5829 the initial value of DECL requires link-time relocations. */ 5830 5831void 5832rs6000_select_section (decl, reloc) 5833 tree decl; 5834 int reloc; 5835{ 5836 int size = int_size_in_bytes (TREE_TYPE (decl)); 5837 5838 if (TREE_CODE (decl) == STRING_CST) 5839 { 5840 if (! flag_writable_strings) 5841 const_section (); 5842 else 5843 data_section (); 5844 } 5845 else if (TREE_CODE (decl) == VAR_DECL) 5846 { 5847 if ((flag_pic && reloc) 5848 || !TREE_READONLY (decl) 5849 || TREE_SIDE_EFFECTS (decl) 5850 || !DECL_INITIAL (decl) 5851 || (DECL_INITIAL (decl) != error_mark_node 5852 && !TREE_CONSTANT (DECL_INITIAL (decl)))) 5853 { 5854 if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) 5855 sdata_section (); 5856 else 5857 data_section (); 5858 } 5859 else 5860 { 5861 if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value)) 5862 { 5863 if (rs6000_sdata == SDATA_EABI) 5864 sdata2_section (); 5865 else 5866 sdata_section (); /* System V doesn't have .sdata2/.sbss2 */ 5867 } 5868 else 5869 const_section (); 5870 } 5871 } 5872 else 5873 const_section (); 5874} 5875 5876 5877 5878/* If we are referencing a function that is static or is known to be 5879 in this file, make the SYMBOL_REF special. We can use this to indicate 5880 that we can branch to this function without emitting a no-op after the 5881 call. For real AIX and NT calling sequences, we also replace the 5882 function name with the real name (1 or 2 leading .'s), rather than 5883 the function descriptor name. This saves a lot of overriding code 5884 to read the prefixes. */ 5885 5886void 5887rs6000_encode_section_info (decl) 5888 tree decl; 5889{ 5890 if (TREE_CODE (decl) == FUNCTION_DECL) 5891 { 5892 rtx sym_ref = XEXP (DECL_RTL (decl), 0); 5893 if ((TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl)) 5894 && !DECL_WEAK (decl)) 5895 SYMBOL_REF_FLAG (sym_ref) = 1; 5896 5897 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT) 5898 { 5899 const char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : ".."; 5900 char *str = permalloc (strlen (prefix) + 1 5901 + strlen (XSTR (sym_ref, 0))); 5902 strcpy (str, prefix); 5903 strcat (str, XSTR (sym_ref, 0)); 5904 XSTR (sym_ref, 0) = str; 5905 } 5906 } 5907 else if (rs6000_sdata != SDATA_NONE 5908 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) 5909 && TREE_CODE (decl) == VAR_DECL) 5910 { 5911 int size = int_size_in_bytes (TREE_TYPE (decl)); 5912 tree section_name = DECL_SECTION_NAME (decl); 5913 const char *name = (char *)0; 5914 int len = 0; 5915 5916 if (section_name) 5917 { 5918 if (TREE_CODE (section_name) == STRING_CST) 5919 { 5920 name = TREE_STRING_POINTER (section_name); 5921 len = TREE_STRING_LENGTH (section_name); 5922 } 5923 else 5924 abort (); 5925 } 5926 5927 if ((size > 0 && size <= g_switch_value) 5928 || (name 5929 && ((len == sizeof (".sdata")-1 && strcmp (name, ".sdata") == 0) 5930 || (len == sizeof (".sdata2")-1 && strcmp (name, ".sdata2") == 0) 5931 || (len == sizeof (".sbss")-1 && strcmp (name, ".sbss") == 0) 5932 || (len == sizeof (".sbss2")-1 && strcmp (name, ".sbss2") == 0) 5933 || (len == sizeof (".PPC.EMB.sdata0")-1 && strcmp (name, ".PPC.EMB.sdata0") == 0) 5934 || (len == sizeof (".PPC.EMB.sbss0")-1 && strcmp (name, ".PPC.EMB.sbss0") == 0)))) 5935 { 5936 rtx sym_ref = XEXP (DECL_RTL (decl), 0); 5937 char *str = permalloc (2 + strlen (XSTR (sym_ref, 0))); 5938 strcpy (str, "@"); 5939 strcat (str, XSTR (sym_ref, 0)); 5940 XSTR (sym_ref, 0) = str; 5941 } 5942 } 5943} 5944 5945#endif /* USING_SVR4_H */ 5946 5947 5948/* Return a REG that occurs in ADDR with coefficient 1. 5949 ADDR can be effectively incremented by incrementing REG. 5950 5951 r0 is special and we must not select it as an address 5952 register by this routine since our caller will try to 5953 increment the returned register via an "la" instruction. */ 5954 5955struct rtx_def * 5956find_addr_reg (addr) 5957 rtx addr; 5958{ 5959 while (GET_CODE (addr) == PLUS) 5960 { 5961 if (GET_CODE (XEXP (addr, 0)) == REG 5962 && REGNO (XEXP (addr, 0)) != 0) 5963 addr = XEXP (addr, 0); 5964 else if (GET_CODE (XEXP (addr, 1)) == REG 5965 && REGNO (XEXP (addr, 1)) != 0) 5966 addr = XEXP (addr, 1); 5967 else if (CONSTANT_P (XEXP (addr, 0))) 5968 addr = XEXP (addr, 1); 5969 else if (CONSTANT_P (XEXP (addr, 1))) 5970 addr = XEXP (addr, 0); 5971 else 5972 abort (); 5973 } 5974 if (GET_CODE (addr) == REG && REGNO (addr) != 0) 5975 return addr; 5976 abort (); 5977} 5978 5979void 5980rs6000_fatal_bad_address (op) 5981 rtx op; 5982{ 5983 fatal_insn ("bad address", op); 5984} 5985