1/* Instruction building/extraction support for xc16x. -*- C -*- 2 3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator. 4 - the resultant file is machine generated, cgen-ibld.in isn't 5 6 Copyright (C) 1996-2017 Free Software Foundation, Inc. 7 8 This file is part of libopcodes. 9 10 This library is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 3, or (at your option) 13 any later version. 14 15 It is distributed in the hope that it will be useful, but WITHOUT 16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 18 License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with this program; if not, write to the Free Software Foundation, Inc., 22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 23 24/* ??? Eventually more and more of this stuff can go to cpu-independent files. 25 Keep that in mind. */ 26 27#include "sysdep.h" 28#include <stdio.h> 29#include "ansidecl.h" 30#include "dis-asm.h" 31#include "bfd.h" 32#include "symcat.h" 33#include "xc16x-desc.h" 34#include "xc16x-opc.h" 35#include "cgen/basic-modes.h" 36#include "opintl.h" 37#include "safe-ctype.h" 38 39#undef min 40#define min(a,b) ((a) < (b) ? (a) : (b)) 41#undef max 42#define max(a,b) ((a) > (b) ? (a) : (b)) 43 44/* Used by the ifield rtx function. */ 45#define FLD(f) (fields->f) 46 47static const char * insert_normal 48 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int, 49 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR); 50static const char * insert_insn_normal 51 (CGEN_CPU_DESC, const CGEN_INSN *, 52 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 53static int extract_normal 54 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, 55 unsigned int, unsigned int, unsigned int, unsigned int, 56 unsigned int, unsigned int, bfd_vma, long *); 57static int extract_insn_normal 58 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *, 59 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 60#if CGEN_INT_INSN_P 61static void put_insn_int_value 62 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT); 63#endif 64#if ! CGEN_INT_INSN_P 65static CGEN_INLINE void insert_1 66 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *); 67static CGEN_INLINE int fill_cache 68 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma); 69static CGEN_INLINE long extract_1 70 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma); 71#endif 72 73/* Operand insertion. */ 74 75#if ! CGEN_INT_INSN_P 76 77/* Subroutine of insert_normal. */ 78 79static CGEN_INLINE void 80insert_1 (CGEN_CPU_DESC cd, 81 unsigned long value, 82 int start, 83 int length, 84 int word_length, 85 unsigned char *bufp) 86{ 87 unsigned long x,mask; 88 int shift; 89 90 x = cgen_get_insn_value (cd, bufp, word_length); 91 92 /* Written this way to avoid undefined behaviour. */ 93 mask = (((1L << (length - 1)) - 1) << 1) | 1; 94 if (CGEN_INSN_LSB0_P) 95 shift = (start + 1) - length; 96 else 97 shift = (word_length - (start + length)); 98 x = (x & ~(mask << shift)) | ((value & mask) << shift); 99 100 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x); 101} 102 103#endif /* ! CGEN_INT_INSN_P */ 104 105/* Default insertion routine. 106 107 ATTRS is a mask of the boolean attributes. 108 WORD_OFFSET is the offset in bits from the start of the insn of the value. 109 WORD_LENGTH is the length of the word in bits in which the value resides. 110 START is the starting bit number in the word, architecture origin. 111 LENGTH is the length of VALUE in bits. 112 TOTAL_LENGTH is the total length of the insn in bits. 113 114 The result is an error message or NULL if success. */ 115 116/* ??? This duplicates functionality with bfd's howto table and 117 bfd_install_relocation. */ 118/* ??? This doesn't handle bfd_vma's. Create another function when 119 necessary. */ 120 121static const char * 122insert_normal (CGEN_CPU_DESC cd, 123 long value, 124 unsigned int attrs, 125 unsigned int word_offset, 126 unsigned int start, 127 unsigned int length, 128 unsigned int word_length, 129 unsigned int total_length, 130 CGEN_INSN_BYTES_PTR buffer) 131{ 132 static char errbuf[100]; 133 /* Written this way to avoid undefined behaviour. */ 134 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1; 135 136 /* If LENGTH is zero, this operand doesn't contribute to the value. */ 137 if (length == 0) 138 return NULL; 139 140 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 141 abort (); 142 143 /* For architectures with insns smaller than the base-insn-bitsize, 144 word_length may be too big. */ 145 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 146 { 147 if (word_offset == 0 148 && word_length > total_length) 149 word_length = total_length; 150 } 151 152 /* Ensure VALUE will fit. */ 153 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT)) 154 { 155 long minval = - (1L << (length - 1)); 156 unsigned long maxval = mask; 157 158 if ((value > 0 && (unsigned long) value > maxval) 159 || value < minval) 160 { 161 /* xgettext:c-format */ 162 sprintf (errbuf, 163 _("operand out of range (%ld not between %ld and %lu)"), 164 value, minval, maxval); 165 return errbuf; 166 } 167 } 168 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)) 169 { 170 unsigned long maxval = mask; 171 unsigned long val = (unsigned long) value; 172 173 /* For hosts with a word size > 32 check to see if value has been sign 174 extended beyond 32 bits. If so then ignore these higher sign bits 175 as the user is attempting to store a 32-bit signed value into an 176 unsigned 32-bit field which is allowed. */ 177 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1)) 178 val &= 0xFFFFFFFF; 179 180 if (val > maxval) 181 { 182 /* xgettext:c-format */ 183 sprintf (errbuf, 184 _("operand out of range (0x%lx not between 0 and 0x%lx)"), 185 val, maxval); 186 return errbuf; 187 } 188 } 189 else 190 { 191 if (! cgen_signed_overflow_ok_p (cd)) 192 { 193 long minval = - (1L << (length - 1)); 194 long maxval = (1L << (length - 1)) - 1; 195 196 if (value < minval || value > maxval) 197 { 198 sprintf 199 /* xgettext:c-format */ 200 (errbuf, _("operand out of range (%ld not between %ld and %ld)"), 201 value, minval, maxval); 202 return errbuf; 203 } 204 } 205 } 206 207#if CGEN_INT_INSN_P 208 209 { 210 int shift_within_word, shift_to_word, shift; 211 212 /* How to shift the value to BIT0 of the word. */ 213 shift_to_word = total_length - (word_offset + word_length); 214 215 /* How to shift the value to the field within the word. */ 216 if (CGEN_INSN_LSB0_P) 217 shift_within_word = start + 1 - length; 218 else 219 shift_within_word = word_length - start - length; 220 221 /* The total SHIFT, then mask in the value. */ 222 shift = shift_to_word + shift_within_word; 223 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift); 224 } 225 226#else /* ! CGEN_INT_INSN_P */ 227 228 { 229 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8; 230 231 insert_1 (cd, value, start, length, word_length, bufp); 232 } 233 234#endif /* ! CGEN_INT_INSN_P */ 235 236 return NULL; 237} 238 239/* Default insn builder (insert handler). 240 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning 241 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is 242 recorded in host byte order, otherwise BUFFER is an array of bytes 243 and the value is recorded in target byte order). 244 The result is an error message or NULL if success. */ 245 246static const char * 247insert_insn_normal (CGEN_CPU_DESC cd, 248 const CGEN_INSN * insn, 249 CGEN_FIELDS * fields, 250 CGEN_INSN_BYTES_PTR buffer, 251 bfd_vma pc) 252{ 253 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 254 unsigned long value; 255 const CGEN_SYNTAX_CHAR_TYPE * syn; 256 257 CGEN_INIT_INSERT (cd); 258 value = CGEN_INSN_BASE_VALUE (insn); 259 260 /* If we're recording insns as numbers (rather than a string of bytes), 261 target byte order handling is deferred until later. */ 262 263#if CGEN_INT_INSN_P 264 265 put_insn_int_value (cd, buffer, cd->base_insn_bitsize, 266 CGEN_FIELDS_BITSIZE (fields), value); 267 268#else 269 270 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize, 271 (unsigned) CGEN_FIELDS_BITSIZE (fields)), 272 value); 273 274#endif /* ! CGEN_INT_INSN_P */ 275 276 /* ??? It would be better to scan the format's fields. 277 Still need to be able to insert a value based on the operand though; 278 e.g. storing a branch displacement that got resolved later. 279 Needs more thought first. */ 280 281 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn) 282 { 283 const char *errmsg; 284 285 if (CGEN_SYNTAX_CHAR_P (* syn)) 286 continue; 287 288 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 289 fields, buffer, pc); 290 if (errmsg) 291 return errmsg; 292 } 293 294 return NULL; 295} 296 297#if CGEN_INT_INSN_P 298/* Cover function to store an insn value into an integral insn. Must go here 299 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */ 300 301static void 302put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 303 CGEN_INSN_BYTES_PTR buf, 304 int length, 305 int insn_length, 306 CGEN_INSN_INT value) 307{ 308 /* For architectures with insns smaller than the base-insn-bitsize, 309 length may be too big. */ 310 if (length > insn_length) 311 *buf = value; 312 else 313 { 314 int shift = insn_length - length; 315 /* Written this way to avoid undefined behaviour. */ 316 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1; 317 318 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift); 319 } 320} 321#endif 322 323/* Operand extraction. */ 324 325#if ! CGEN_INT_INSN_P 326 327/* Subroutine of extract_normal. 328 Ensure sufficient bytes are cached in EX_INFO. 329 OFFSET is the offset in bytes from the start of the insn of the value. 330 BYTES is the length of the needed value. 331 Returns 1 for success, 0 for failure. */ 332 333static CGEN_INLINE int 334fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 335 CGEN_EXTRACT_INFO *ex_info, 336 int offset, 337 int bytes, 338 bfd_vma pc) 339{ 340 /* It's doubtful that the middle part has already been fetched so 341 we don't optimize that case. kiss. */ 342 unsigned int mask; 343 disassemble_info *info = (disassemble_info *) ex_info->dis_info; 344 345 /* First do a quick check. */ 346 mask = (1 << bytes) - 1; 347 if (((ex_info->valid >> offset) & mask) == mask) 348 return 1; 349 350 /* Search for the first byte we need to read. */ 351 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1) 352 if (! (mask & ex_info->valid)) 353 break; 354 355 if (bytes) 356 { 357 int status; 358 359 pc += offset; 360 status = (*info->read_memory_func) 361 (pc, ex_info->insn_bytes + offset, bytes, info); 362 363 if (status != 0) 364 { 365 (*info->memory_error_func) (status, pc, info); 366 return 0; 367 } 368 369 ex_info->valid |= ((1 << bytes) - 1) << offset; 370 } 371 372 return 1; 373} 374 375/* Subroutine of extract_normal. */ 376 377static CGEN_INLINE long 378extract_1 (CGEN_CPU_DESC cd, 379 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 380 int start, 381 int length, 382 int word_length, 383 unsigned char *bufp, 384 bfd_vma pc ATTRIBUTE_UNUSED) 385{ 386 unsigned long x; 387 int shift; 388 389 x = cgen_get_insn_value (cd, bufp, word_length); 390 391 if (CGEN_INSN_LSB0_P) 392 shift = (start + 1) - length; 393 else 394 shift = (word_length - (start + length)); 395 return x >> shift; 396} 397 398#endif /* ! CGEN_INT_INSN_P */ 399 400/* Default extraction routine. 401 402 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order, 403 or sometimes less for cases like the m32r where the base insn size is 32 404 but some insns are 16 bits. 405 ATTRS is a mask of the boolean attributes. We only need `SIGNED', 406 but for generality we take a bitmask of all of them. 407 WORD_OFFSET is the offset in bits from the start of the insn of the value. 408 WORD_LENGTH is the length of the word in bits in which the value resides. 409 START is the starting bit number in the word, architecture origin. 410 LENGTH is the length of VALUE in bits. 411 TOTAL_LENGTH is the total length of the insn in bits. 412 413 Returns 1 for success, 0 for failure. */ 414 415/* ??? The return code isn't properly used. wip. */ 416 417/* ??? This doesn't handle bfd_vma's. Create another function when 418 necessary. */ 419 420static int 421extract_normal (CGEN_CPU_DESC cd, 422#if ! CGEN_INT_INSN_P 423 CGEN_EXTRACT_INFO *ex_info, 424#else 425 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED, 426#endif 427 CGEN_INSN_INT insn_value, 428 unsigned int attrs, 429 unsigned int word_offset, 430 unsigned int start, 431 unsigned int length, 432 unsigned int word_length, 433 unsigned int total_length, 434#if ! CGEN_INT_INSN_P 435 bfd_vma pc, 436#else 437 bfd_vma pc ATTRIBUTE_UNUSED, 438#endif 439 long *valuep) 440{ 441 long value, mask; 442 443 /* If LENGTH is zero, this operand doesn't contribute to the value 444 so give it a standard value of zero. */ 445 if (length == 0) 446 { 447 *valuep = 0; 448 return 1; 449 } 450 451 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 452 abort (); 453 454 /* For architectures with insns smaller than the insn-base-bitsize, 455 word_length may be too big. */ 456 if (cd->min_insn_bitsize < cd->base_insn_bitsize) 457 { 458 if (word_offset + word_length > total_length) 459 word_length = total_length - word_offset; 460 } 461 462 /* Does the value reside in INSN_VALUE, and at the right alignment? */ 463 464 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length)) 465 { 466 if (CGEN_INSN_LSB0_P) 467 value = insn_value >> ((word_offset + start + 1) - length); 468 else 469 value = insn_value >> (total_length - ( word_offset + start + length)); 470 } 471 472#if ! CGEN_INT_INSN_P 473 474 else 475 { 476 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8; 477 478 if (word_length > 8 * sizeof (CGEN_INSN_INT)) 479 abort (); 480 481 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0) 482 return 0; 483 484 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc); 485 } 486 487#endif /* ! CGEN_INT_INSN_P */ 488 489 /* Written this way to avoid undefined behaviour. */ 490 mask = (((1L << (length - 1)) - 1) << 1) | 1; 491 492 value &= mask; 493 /* sign extend? */ 494 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED) 495 && (value & (1L << (length - 1)))) 496 value |= ~mask; 497 498 *valuep = value; 499 500 return 1; 501} 502 503/* Default insn extractor. 504 505 INSN_VALUE is the first base_insn_bitsize bits, translated to host order. 506 The extracted fields are stored in FIELDS. 507 EX_INFO is used to handle reading variable length insns. 508 Return the length of the insn in bits, or 0 if no match, 509 or -1 if an error occurs fetching data (memory_error_func will have 510 been called). */ 511 512static int 513extract_insn_normal (CGEN_CPU_DESC cd, 514 const CGEN_INSN *insn, 515 CGEN_EXTRACT_INFO *ex_info, 516 CGEN_INSN_INT insn_value, 517 CGEN_FIELDS *fields, 518 bfd_vma pc) 519{ 520 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 521 const CGEN_SYNTAX_CHAR_TYPE *syn; 522 523 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 524 525 CGEN_INIT_EXTRACT (cd); 526 527 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 528 { 529 int length; 530 531 if (CGEN_SYNTAX_CHAR_P (*syn)) 532 continue; 533 534 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn), 535 ex_info, insn_value, fields, pc); 536 if (length <= 0) 537 return length; 538 } 539 540 /* We recognized and successfully extracted this insn. */ 541 return CGEN_INSN_BITSIZE (insn); 542} 543 544/* Machine generated code added here. */ 545 546const char * xc16x_cgen_insert_operand 547 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma); 548 549/* Main entry point for operand insertion. 550 551 This function is basically just a big switch statement. Earlier versions 552 used tables to look up the function to use, but 553 - if the table contains both assembler and disassembler functions then 554 the disassembler contains much of the assembler and vice-versa, 555 - there's a lot of inlining possibilities as things grow, 556 - using a switch statement avoids the function call overhead. 557 558 This function could be moved into `parse_insn_normal', but keeping it 559 separate makes clear the interface between `parse_insn_normal' and each of 560 the handlers. It's also needed by GAS to insert operands that couldn't be 561 resolved during parsing. */ 562 563const char * 564xc16x_cgen_insert_operand (CGEN_CPU_DESC cd, 565 int opindex, 566 CGEN_FIELDS * fields, 567 CGEN_INSN_BYTES_PTR buffer, 568 bfd_vma pc ATTRIBUTE_UNUSED) 569{ 570 const char * errmsg = NULL; 571 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 572 573 switch (opindex) 574 { 575 case XC16X_OPERAND_REGNAM : 576 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer); 577 break; 578 case XC16X_OPERAND_BIT01 : 579 errmsg = insert_normal (cd, fields->f_op_1bit, 0, 0, 8, 1, 32, total_length, buffer); 580 break; 581 case XC16X_OPERAND_BIT1 : 582 errmsg = insert_normal (cd, fields->f_op_bit1, 0, 0, 11, 1, 32, total_length, buffer); 583 break; 584 case XC16X_OPERAND_BIT2 : 585 errmsg = insert_normal (cd, fields->f_op_bit2, 0, 0, 11, 2, 32, total_length, buffer); 586 break; 587 case XC16X_OPERAND_BIT4 : 588 errmsg = insert_normal (cd, fields->f_op_bit4, 0, 0, 11, 4, 32, total_length, buffer); 589 break; 590 case XC16X_OPERAND_BIT8 : 591 errmsg = insert_normal (cd, fields->f_op_bit8, 0, 0, 31, 8, 32, total_length, buffer); 592 break; 593 case XC16X_OPERAND_BITONE : 594 errmsg = insert_normal (cd, fields->f_op_onebit, 0, 0, 9, 1, 32, total_length, buffer); 595 break; 596 case XC16X_OPERAND_CADDR : 597 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer); 598 break; 599 case XC16X_OPERAND_COND : 600 errmsg = insert_normal (cd, fields->f_condcode, 0, 0, 7, 4, 32, total_length, buffer); 601 break; 602 case XC16X_OPERAND_DATA8 : 603 errmsg = insert_normal (cd, fields->f_data8, 0, 0, 23, 8, 32, total_length, buffer); 604 break; 605 case XC16X_OPERAND_DATAHI8 : 606 errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer); 607 break; 608 case XC16X_OPERAND_DOT : 609 break; 610 case XC16X_OPERAND_DR : 611 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer); 612 break; 613 case XC16X_OPERAND_DRB : 614 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer); 615 break; 616 case XC16X_OPERAND_DRI : 617 errmsg = insert_normal (cd, fields->f_r4, 0, 0, 11, 4, 32, total_length, buffer); 618 break; 619 case XC16X_OPERAND_EXTCOND : 620 errmsg = insert_normal (cd, fields->f_extccode, 0, 0, 15, 5, 32, total_length, buffer); 621 break; 622 case XC16X_OPERAND_GENREG : 623 errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer); 624 break; 625 case XC16X_OPERAND_HASH : 626 break; 627 case XC16X_OPERAND_ICOND : 628 errmsg = insert_normal (cd, fields->f_icondcode, 0, 0, 15, 4, 32, total_length, buffer); 629 break; 630 case XC16X_OPERAND_LBIT2 : 631 errmsg = insert_normal (cd, fields->f_op_lbit2, 0, 0, 15, 2, 32, total_length, buffer); 632 break; 633 case XC16X_OPERAND_LBIT4 : 634 errmsg = insert_normal (cd, fields->f_op_lbit4, 0, 0, 15, 4, 32, total_length, buffer); 635 break; 636 case XC16X_OPERAND_MASK8 : 637 errmsg = insert_normal (cd, fields->f_mask8, 0, 0, 23, 8, 32, total_length, buffer); 638 break; 639 case XC16X_OPERAND_MASKLO8 : 640 errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer); 641 break; 642 case XC16X_OPERAND_MEMGR8 : 643 errmsg = insert_normal (cd, fields->f_memgr8, 0, 0, 31, 16, 32, total_length, buffer); 644 break; 645 case XC16X_OPERAND_MEMORY : 646 errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer); 647 break; 648 case XC16X_OPERAND_PAG : 649 break; 650 case XC16X_OPERAND_PAGENUM : 651 errmsg = insert_normal (cd, fields->f_pagenum, 0, 0, 25, 10, 32, total_length, buffer); 652 break; 653 case XC16X_OPERAND_POF : 654 break; 655 case XC16X_OPERAND_QBIT : 656 errmsg = insert_normal (cd, fields->f_qbit, 0, 0, 7, 4, 32, total_length, buffer); 657 break; 658 case XC16X_OPERAND_QHIBIT : 659 errmsg = insert_normal (cd, fields->f_qhibit, 0, 0, 27, 4, 32, total_length, buffer); 660 break; 661 case XC16X_OPERAND_QLOBIT : 662 errmsg = insert_normal (cd, fields->f_qlobit, 0, 0, 31, 4, 32, total_length, buffer); 663 break; 664 case XC16X_OPERAND_REG8 : 665 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer); 666 break; 667 case XC16X_OPERAND_REGB8 : 668 errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer); 669 break; 670 case XC16X_OPERAND_REGBMEM8 : 671 errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer); 672 break; 673 case XC16X_OPERAND_REGHI8 : 674 errmsg = insert_normal (cd, fields->f_reghi8, 0, 0, 23, 8, 32, total_length, buffer); 675 break; 676 case XC16X_OPERAND_REGMEM8 : 677 errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer); 678 break; 679 case XC16X_OPERAND_REGOFF8 : 680 errmsg = insert_normal (cd, fields->f_regoff8, 0, 0, 15, 8, 32, total_length, buffer); 681 break; 682 case XC16X_OPERAND_REL : 683 errmsg = insert_normal (cd, fields->f_rel8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, buffer); 684 break; 685 case XC16X_OPERAND_RELHI : 686 errmsg = insert_normal (cd, fields->f_relhi8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, buffer); 687 break; 688 case XC16X_OPERAND_SEG : 689 errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer); 690 break; 691 case XC16X_OPERAND_SEGHI8 : 692 errmsg = insert_normal (cd, fields->f_segnum8, 0, 0, 23, 8, 32, total_length, buffer); 693 break; 694 case XC16X_OPERAND_SEGM : 695 break; 696 case XC16X_OPERAND_SOF : 697 break; 698 case XC16X_OPERAND_SR : 699 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer); 700 break; 701 case XC16X_OPERAND_SR2 : 702 errmsg = insert_normal (cd, fields->f_r0, 0, 0, 9, 2, 32, total_length, buffer); 703 break; 704 case XC16X_OPERAND_SRB : 705 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer); 706 break; 707 case XC16X_OPERAND_SRC1 : 708 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer); 709 break; 710 case XC16X_OPERAND_SRC2 : 711 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer); 712 break; 713 case XC16X_OPERAND_SRDIV : 714 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer); 715 break; 716 case XC16X_OPERAND_U4 : 717 errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer); 718 break; 719 case XC16X_OPERAND_UIMM16 : 720 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer); 721 break; 722 case XC16X_OPERAND_UIMM2 : 723 errmsg = insert_normal (cd, fields->f_uimm2, 0, 0, 13, 2, 32, total_length, buffer); 724 break; 725 case XC16X_OPERAND_UIMM3 : 726 errmsg = insert_normal (cd, fields->f_uimm3, 0, 0, 10, 3, 32, total_length, buffer); 727 break; 728 case XC16X_OPERAND_UIMM4 : 729 errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer); 730 break; 731 case XC16X_OPERAND_UIMM7 : 732 errmsg = insert_normal (cd, fields->f_uimm7, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, buffer); 733 break; 734 case XC16X_OPERAND_UIMM8 : 735 errmsg = insert_normal (cd, fields->f_uimm8, 0, 0, 23, 8, 32, total_length, buffer); 736 break; 737 case XC16X_OPERAND_UPAG16 : 738 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer); 739 break; 740 case XC16X_OPERAND_UPOF16 : 741 errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer); 742 break; 743 case XC16X_OPERAND_USEG16 : 744 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer); 745 break; 746 case XC16X_OPERAND_USEG8 : 747 errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer); 748 break; 749 case XC16X_OPERAND_USOF16 : 750 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer); 751 break; 752 753 default : 754 /* xgettext:c-format */ 755 fprintf (stderr, _("Unrecognized field %d while building insn.\n"), 756 opindex); 757 abort (); 758 } 759 760 return errmsg; 761} 762 763int xc16x_cgen_extract_operand 764 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma); 765 766/* Main entry point for operand extraction. 767 The result is <= 0 for error, >0 for success. 768 ??? Actual values aren't well defined right now. 769 770 This function is basically just a big switch statement. Earlier versions 771 used tables to look up the function to use, but 772 - if the table contains both assembler and disassembler functions then 773 the disassembler contains much of the assembler and vice-versa, 774 - there's a lot of inlining possibilities as things grow, 775 - using a switch statement avoids the function call overhead. 776 777 This function could be moved into `print_insn_normal', but keeping it 778 separate makes clear the interface between `print_insn_normal' and each of 779 the handlers. */ 780 781int 782xc16x_cgen_extract_operand (CGEN_CPU_DESC cd, 783 int opindex, 784 CGEN_EXTRACT_INFO *ex_info, 785 CGEN_INSN_INT insn_value, 786 CGEN_FIELDS * fields, 787 bfd_vma pc) 788{ 789 /* Assume success (for those operands that are nops). */ 790 int length = 1; 791 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields); 792 793 switch (opindex) 794 { 795 case XC16X_OPERAND_REGNAM : 796 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8); 797 break; 798 case XC16X_OPERAND_BIT01 : 799 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_op_1bit); 800 break; 801 case XC16X_OPERAND_BIT1 : 802 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_op_bit1); 803 break; 804 case XC16X_OPERAND_BIT2 : 805 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 2, 32, total_length, pc, & fields->f_op_bit2); 806 break; 807 case XC16X_OPERAND_BIT4 : 808 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_op_bit4); 809 break; 810 case XC16X_OPERAND_BIT8 : 811 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_op_bit8); 812 break; 813 case XC16X_OPERAND_BITONE : 814 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_op_onebit); 815 break; 816 case XC16X_OPERAND_CADDR : 817 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16); 818 break; 819 case XC16X_OPERAND_COND : 820 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_condcode); 821 break; 822 case XC16X_OPERAND_DATA8 : 823 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_data8); 824 break; 825 case XC16X_OPERAND_DATAHI8 : 826 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8); 827 break; 828 case XC16X_OPERAND_DOT : 829 break; 830 case XC16X_OPERAND_DR : 831 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1); 832 break; 833 case XC16X_OPERAND_DRB : 834 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1); 835 break; 836 case XC16X_OPERAND_DRI : 837 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r4); 838 break; 839 case XC16X_OPERAND_EXTCOND : 840 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_extccode); 841 break; 842 case XC16X_OPERAND_GENREG : 843 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8); 844 break; 845 case XC16X_OPERAND_HASH : 846 break; 847 case XC16X_OPERAND_ICOND : 848 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_icondcode); 849 break; 850 case XC16X_OPERAND_LBIT2 : 851 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 2, 32, total_length, pc, & fields->f_op_lbit2); 852 break; 853 case XC16X_OPERAND_LBIT4 : 854 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_op_lbit4); 855 break; 856 case XC16X_OPERAND_MASK8 : 857 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_mask8); 858 break; 859 case XC16X_OPERAND_MASKLO8 : 860 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8); 861 break; 862 case XC16X_OPERAND_MEMGR8 : 863 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memgr8); 864 break; 865 case XC16X_OPERAND_MEMORY : 866 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory); 867 break; 868 case XC16X_OPERAND_PAG : 869 break; 870 case XC16X_OPERAND_PAGENUM : 871 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 10, 32, total_length, pc, & fields->f_pagenum); 872 break; 873 case XC16X_OPERAND_POF : 874 break; 875 case XC16X_OPERAND_QBIT : 876 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_qbit); 877 break; 878 case XC16X_OPERAND_QHIBIT : 879 length = extract_normal (cd, ex_info, insn_value, 0, 0, 27, 4, 32, total_length, pc, & fields->f_qhibit); 880 break; 881 case XC16X_OPERAND_QLOBIT : 882 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 4, 32, total_length, pc, & fields->f_qlobit); 883 break; 884 case XC16X_OPERAND_REG8 : 885 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8); 886 break; 887 case XC16X_OPERAND_REGB8 : 888 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8); 889 break; 890 case XC16X_OPERAND_REGBMEM8 : 891 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8); 892 break; 893 case XC16X_OPERAND_REGHI8 : 894 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_reghi8); 895 break; 896 case XC16X_OPERAND_REGMEM8 : 897 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8); 898 break; 899 case XC16X_OPERAND_REGOFF8 : 900 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regoff8); 901 break; 902 case XC16X_OPERAND_REL : 903 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & fields->f_rel8); 904 break; 905 case XC16X_OPERAND_RELHI : 906 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, pc, & fields->f_relhi8); 907 break; 908 case XC16X_OPERAND_SEG : 909 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8); 910 break; 911 case XC16X_OPERAND_SEGHI8 : 912 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_segnum8); 913 break; 914 case XC16X_OPERAND_SEGM : 915 break; 916 case XC16X_OPERAND_SOF : 917 break; 918 case XC16X_OPERAND_SR : 919 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2); 920 break; 921 case XC16X_OPERAND_SR2 : 922 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 2, 32, total_length, pc, & fields->f_r0); 923 break; 924 case XC16X_OPERAND_SRB : 925 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2); 926 break; 927 case XC16X_OPERAND_SRC1 : 928 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1); 929 break; 930 case XC16X_OPERAND_SRC2 : 931 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2); 932 break; 933 case XC16X_OPERAND_SRDIV : 934 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8); 935 break; 936 case XC16X_OPERAND_U4 : 937 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4); 938 break; 939 case XC16X_OPERAND_UIMM16 : 940 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16); 941 break; 942 case XC16X_OPERAND_UIMM2 : 943 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 2, 32, total_length, pc, & fields->f_uimm2); 944 break; 945 case XC16X_OPERAND_UIMM3 : 946 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 3, 32, total_length, pc, & fields->f_uimm3); 947 break; 948 case XC16X_OPERAND_UIMM4 : 949 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4); 950 break; 951 case XC16X_OPERAND_UIMM7 : 952 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, pc, & fields->f_uimm7); 953 break; 954 case XC16X_OPERAND_UIMM8 : 955 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_uimm8); 956 break; 957 case XC16X_OPERAND_UPAG16 : 958 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16); 959 break; 960 case XC16X_OPERAND_UPOF16 : 961 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory); 962 break; 963 case XC16X_OPERAND_USEG16 : 964 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16); 965 break; 966 case XC16X_OPERAND_USEG8 : 967 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8); 968 break; 969 case XC16X_OPERAND_USOF16 : 970 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16); 971 break; 972 973 default : 974 /* xgettext:c-format */ 975 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"), 976 opindex); 977 abort (); 978 } 979 980 return length; 981} 982 983cgen_insert_fn * const xc16x_cgen_insert_handlers[] = 984{ 985 insert_insn_normal, 986}; 987 988cgen_extract_fn * const xc16x_cgen_extract_handlers[] = 989{ 990 extract_insn_normal, 991}; 992 993int xc16x_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 994bfd_vma xc16x_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *); 995 996/* Getting values from cgen_fields is handled by a collection of functions. 997 They are distinguished by the type of the VALUE argument they return. 998 TODO: floating point, inlining support, remove cases where result type 999 not appropriate. */ 1000 1001int 1002xc16x_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1003 int opindex, 1004 const CGEN_FIELDS * fields) 1005{ 1006 int value; 1007 1008 switch (opindex) 1009 { 1010 case XC16X_OPERAND_REGNAM : 1011 value = fields->f_reg8; 1012 break; 1013 case XC16X_OPERAND_BIT01 : 1014 value = fields->f_op_1bit; 1015 break; 1016 case XC16X_OPERAND_BIT1 : 1017 value = fields->f_op_bit1; 1018 break; 1019 case XC16X_OPERAND_BIT2 : 1020 value = fields->f_op_bit2; 1021 break; 1022 case XC16X_OPERAND_BIT4 : 1023 value = fields->f_op_bit4; 1024 break; 1025 case XC16X_OPERAND_BIT8 : 1026 value = fields->f_op_bit8; 1027 break; 1028 case XC16X_OPERAND_BITONE : 1029 value = fields->f_op_onebit; 1030 break; 1031 case XC16X_OPERAND_CADDR : 1032 value = fields->f_offset16; 1033 break; 1034 case XC16X_OPERAND_COND : 1035 value = fields->f_condcode; 1036 break; 1037 case XC16X_OPERAND_DATA8 : 1038 value = fields->f_data8; 1039 break; 1040 case XC16X_OPERAND_DATAHI8 : 1041 value = fields->f_datahi8; 1042 break; 1043 case XC16X_OPERAND_DOT : 1044 value = 0; 1045 break; 1046 case XC16X_OPERAND_DR : 1047 value = fields->f_r1; 1048 break; 1049 case XC16X_OPERAND_DRB : 1050 value = fields->f_r1; 1051 break; 1052 case XC16X_OPERAND_DRI : 1053 value = fields->f_r4; 1054 break; 1055 case XC16X_OPERAND_EXTCOND : 1056 value = fields->f_extccode; 1057 break; 1058 case XC16X_OPERAND_GENREG : 1059 value = fields->f_regb8; 1060 break; 1061 case XC16X_OPERAND_HASH : 1062 value = 0; 1063 break; 1064 case XC16X_OPERAND_ICOND : 1065 value = fields->f_icondcode; 1066 break; 1067 case XC16X_OPERAND_LBIT2 : 1068 value = fields->f_op_lbit2; 1069 break; 1070 case XC16X_OPERAND_LBIT4 : 1071 value = fields->f_op_lbit4; 1072 break; 1073 case XC16X_OPERAND_MASK8 : 1074 value = fields->f_mask8; 1075 break; 1076 case XC16X_OPERAND_MASKLO8 : 1077 value = fields->f_datahi8; 1078 break; 1079 case XC16X_OPERAND_MEMGR8 : 1080 value = fields->f_memgr8; 1081 break; 1082 case XC16X_OPERAND_MEMORY : 1083 value = fields->f_memory; 1084 break; 1085 case XC16X_OPERAND_PAG : 1086 value = 0; 1087 break; 1088 case XC16X_OPERAND_PAGENUM : 1089 value = fields->f_pagenum; 1090 break; 1091 case XC16X_OPERAND_POF : 1092 value = 0; 1093 break; 1094 case XC16X_OPERAND_QBIT : 1095 value = fields->f_qbit; 1096 break; 1097 case XC16X_OPERAND_QHIBIT : 1098 value = fields->f_qhibit; 1099 break; 1100 case XC16X_OPERAND_QLOBIT : 1101 value = fields->f_qlobit; 1102 break; 1103 case XC16X_OPERAND_REG8 : 1104 value = fields->f_reg8; 1105 break; 1106 case XC16X_OPERAND_REGB8 : 1107 value = fields->f_regb8; 1108 break; 1109 case XC16X_OPERAND_REGBMEM8 : 1110 value = fields->f_regmem8; 1111 break; 1112 case XC16X_OPERAND_REGHI8 : 1113 value = fields->f_reghi8; 1114 break; 1115 case XC16X_OPERAND_REGMEM8 : 1116 value = fields->f_regmem8; 1117 break; 1118 case XC16X_OPERAND_REGOFF8 : 1119 value = fields->f_regoff8; 1120 break; 1121 case XC16X_OPERAND_REL : 1122 value = fields->f_rel8; 1123 break; 1124 case XC16X_OPERAND_RELHI : 1125 value = fields->f_relhi8; 1126 break; 1127 case XC16X_OPERAND_SEG : 1128 value = fields->f_seg8; 1129 break; 1130 case XC16X_OPERAND_SEGHI8 : 1131 value = fields->f_segnum8; 1132 break; 1133 case XC16X_OPERAND_SEGM : 1134 value = 0; 1135 break; 1136 case XC16X_OPERAND_SOF : 1137 value = 0; 1138 break; 1139 case XC16X_OPERAND_SR : 1140 value = fields->f_r2; 1141 break; 1142 case XC16X_OPERAND_SR2 : 1143 value = fields->f_r0; 1144 break; 1145 case XC16X_OPERAND_SRB : 1146 value = fields->f_r2; 1147 break; 1148 case XC16X_OPERAND_SRC1 : 1149 value = fields->f_r1; 1150 break; 1151 case XC16X_OPERAND_SRC2 : 1152 value = fields->f_r2; 1153 break; 1154 case XC16X_OPERAND_SRDIV : 1155 value = fields->f_reg8; 1156 break; 1157 case XC16X_OPERAND_U4 : 1158 value = fields->f_uimm4; 1159 break; 1160 case XC16X_OPERAND_UIMM16 : 1161 value = fields->f_uimm16; 1162 break; 1163 case XC16X_OPERAND_UIMM2 : 1164 value = fields->f_uimm2; 1165 break; 1166 case XC16X_OPERAND_UIMM3 : 1167 value = fields->f_uimm3; 1168 break; 1169 case XC16X_OPERAND_UIMM4 : 1170 value = fields->f_uimm4; 1171 break; 1172 case XC16X_OPERAND_UIMM7 : 1173 value = fields->f_uimm7; 1174 break; 1175 case XC16X_OPERAND_UIMM8 : 1176 value = fields->f_uimm8; 1177 break; 1178 case XC16X_OPERAND_UPAG16 : 1179 value = fields->f_uimm16; 1180 break; 1181 case XC16X_OPERAND_UPOF16 : 1182 value = fields->f_memory; 1183 break; 1184 case XC16X_OPERAND_USEG16 : 1185 value = fields->f_offset16; 1186 break; 1187 case XC16X_OPERAND_USEG8 : 1188 value = fields->f_seg8; 1189 break; 1190 case XC16X_OPERAND_USOF16 : 1191 value = fields->f_offset16; 1192 break; 1193 1194 default : 1195 /* xgettext:c-format */ 1196 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"), 1197 opindex); 1198 abort (); 1199 } 1200 1201 return value; 1202} 1203 1204bfd_vma 1205xc16x_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1206 int opindex, 1207 const CGEN_FIELDS * fields) 1208{ 1209 bfd_vma value; 1210 1211 switch (opindex) 1212 { 1213 case XC16X_OPERAND_REGNAM : 1214 value = fields->f_reg8; 1215 break; 1216 case XC16X_OPERAND_BIT01 : 1217 value = fields->f_op_1bit; 1218 break; 1219 case XC16X_OPERAND_BIT1 : 1220 value = fields->f_op_bit1; 1221 break; 1222 case XC16X_OPERAND_BIT2 : 1223 value = fields->f_op_bit2; 1224 break; 1225 case XC16X_OPERAND_BIT4 : 1226 value = fields->f_op_bit4; 1227 break; 1228 case XC16X_OPERAND_BIT8 : 1229 value = fields->f_op_bit8; 1230 break; 1231 case XC16X_OPERAND_BITONE : 1232 value = fields->f_op_onebit; 1233 break; 1234 case XC16X_OPERAND_CADDR : 1235 value = fields->f_offset16; 1236 break; 1237 case XC16X_OPERAND_COND : 1238 value = fields->f_condcode; 1239 break; 1240 case XC16X_OPERAND_DATA8 : 1241 value = fields->f_data8; 1242 break; 1243 case XC16X_OPERAND_DATAHI8 : 1244 value = fields->f_datahi8; 1245 break; 1246 case XC16X_OPERAND_DOT : 1247 value = 0; 1248 break; 1249 case XC16X_OPERAND_DR : 1250 value = fields->f_r1; 1251 break; 1252 case XC16X_OPERAND_DRB : 1253 value = fields->f_r1; 1254 break; 1255 case XC16X_OPERAND_DRI : 1256 value = fields->f_r4; 1257 break; 1258 case XC16X_OPERAND_EXTCOND : 1259 value = fields->f_extccode; 1260 break; 1261 case XC16X_OPERAND_GENREG : 1262 value = fields->f_regb8; 1263 break; 1264 case XC16X_OPERAND_HASH : 1265 value = 0; 1266 break; 1267 case XC16X_OPERAND_ICOND : 1268 value = fields->f_icondcode; 1269 break; 1270 case XC16X_OPERAND_LBIT2 : 1271 value = fields->f_op_lbit2; 1272 break; 1273 case XC16X_OPERAND_LBIT4 : 1274 value = fields->f_op_lbit4; 1275 break; 1276 case XC16X_OPERAND_MASK8 : 1277 value = fields->f_mask8; 1278 break; 1279 case XC16X_OPERAND_MASKLO8 : 1280 value = fields->f_datahi8; 1281 break; 1282 case XC16X_OPERAND_MEMGR8 : 1283 value = fields->f_memgr8; 1284 break; 1285 case XC16X_OPERAND_MEMORY : 1286 value = fields->f_memory; 1287 break; 1288 case XC16X_OPERAND_PAG : 1289 value = 0; 1290 break; 1291 case XC16X_OPERAND_PAGENUM : 1292 value = fields->f_pagenum; 1293 break; 1294 case XC16X_OPERAND_POF : 1295 value = 0; 1296 break; 1297 case XC16X_OPERAND_QBIT : 1298 value = fields->f_qbit; 1299 break; 1300 case XC16X_OPERAND_QHIBIT : 1301 value = fields->f_qhibit; 1302 break; 1303 case XC16X_OPERAND_QLOBIT : 1304 value = fields->f_qlobit; 1305 break; 1306 case XC16X_OPERAND_REG8 : 1307 value = fields->f_reg8; 1308 break; 1309 case XC16X_OPERAND_REGB8 : 1310 value = fields->f_regb8; 1311 break; 1312 case XC16X_OPERAND_REGBMEM8 : 1313 value = fields->f_regmem8; 1314 break; 1315 case XC16X_OPERAND_REGHI8 : 1316 value = fields->f_reghi8; 1317 break; 1318 case XC16X_OPERAND_REGMEM8 : 1319 value = fields->f_regmem8; 1320 break; 1321 case XC16X_OPERAND_REGOFF8 : 1322 value = fields->f_regoff8; 1323 break; 1324 case XC16X_OPERAND_REL : 1325 value = fields->f_rel8; 1326 break; 1327 case XC16X_OPERAND_RELHI : 1328 value = fields->f_relhi8; 1329 break; 1330 case XC16X_OPERAND_SEG : 1331 value = fields->f_seg8; 1332 break; 1333 case XC16X_OPERAND_SEGHI8 : 1334 value = fields->f_segnum8; 1335 break; 1336 case XC16X_OPERAND_SEGM : 1337 value = 0; 1338 break; 1339 case XC16X_OPERAND_SOF : 1340 value = 0; 1341 break; 1342 case XC16X_OPERAND_SR : 1343 value = fields->f_r2; 1344 break; 1345 case XC16X_OPERAND_SR2 : 1346 value = fields->f_r0; 1347 break; 1348 case XC16X_OPERAND_SRB : 1349 value = fields->f_r2; 1350 break; 1351 case XC16X_OPERAND_SRC1 : 1352 value = fields->f_r1; 1353 break; 1354 case XC16X_OPERAND_SRC2 : 1355 value = fields->f_r2; 1356 break; 1357 case XC16X_OPERAND_SRDIV : 1358 value = fields->f_reg8; 1359 break; 1360 case XC16X_OPERAND_U4 : 1361 value = fields->f_uimm4; 1362 break; 1363 case XC16X_OPERAND_UIMM16 : 1364 value = fields->f_uimm16; 1365 break; 1366 case XC16X_OPERAND_UIMM2 : 1367 value = fields->f_uimm2; 1368 break; 1369 case XC16X_OPERAND_UIMM3 : 1370 value = fields->f_uimm3; 1371 break; 1372 case XC16X_OPERAND_UIMM4 : 1373 value = fields->f_uimm4; 1374 break; 1375 case XC16X_OPERAND_UIMM7 : 1376 value = fields->f_uimm7; 1377 break; 1378 case XC16X_OPERAND_UIMM8 : 1379 value = fields->f_uimm8; 1380 break; 1381 case XC16X_OPERAND_UPAG16 : 1382 value = fields->f_uimm16; 1383 break; 1384 case XC16X_OPERAND_UPOF16 : 1385 value = fields->f_memory; 1386 break; 1387 case XC16X_OPERAND_USEG16 : 1388 value = fields->f_offset16; 1389 break; 1390 case XC16X_OPERAND_USEG8 : 1391 value = fields->f_seg8; 1392 break; 1393 case XC16X_OPERAND_USOF16 : 1394 value = fields->f_offset16; 1395 break; 1396 1397 default : 1398 /* xgettext:c-format */ 1399 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"), 1400 opindex); 1401 abort (); 1402 } 1403 1404 return value; 1405} 1406 1407void xc16x_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int); 1408void xc16x_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma); 1409 1410/* Stuffing values in cgen_fields is handled by a collection of functions. 1411 They are distinguished by the type of the VALUE argument they accept. 1412 TODO: floating point, inlining support, remove cases where argument type 1413 not appropriate. */ 1414 1415void 1416xc16x_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1417 int opindex, 1418 CGEN_FIELDS * fields, 1419 int value) 1420{ 1421 switch (opindex) 1422 { 1423 case XC16X_OPERAND_REGNAM : 1424 fields->f_reg8 = value; 1425 break; 1426 case XC16X_OPERAND_BIT01 : 1427 fields->f_op_1bit = value; 1428 break; 1429 case XC16X_OPERAND_BIT1 : 1430 fields->f_op_bit1 = value; 1431 break; 1432 case XC16X_OPERAND_BIT2 : 1433 fields->f_op_bit2 = value; 1434 break; 1435 case XC16X_OPERAND_BIT4 : 1436 fields->f_op_bit4 = value; 1437 break; 1438 case XC16X_OPERAND_BIT8 : 1439 fields->f_op_bit8 = value; 1440 break; 1441 case XC16X_OPERAND_BITONE : 1442 fields->f_op_onebit = value; 1443 break; 1444 case XC16X_OPERAND_CADDR : 1445 fields->f_offset16 = value; 1446 break; 1447 case XC16X_OPERAND_COND : 1448 fields->f_condcode = value; 1449 break; 1450 case XC16X_OPERAND_DATA8 : 1451 fields->f_data8 = value; 1452 break; 1453 case XC16X_OPERAND_DATAHI8 : 1454 fields->f_datahi8 = value; 1455 break; 1456 case XC16X_OPERAND_DOT : 1457 break; 1458 case XC16X_OPERAND_DR : 1459 fields->f_r1 = value; 1460 break; 1461 case XC16X_OPERAND_DRB : 1462 fields->f_r1 = value; 1463 break; 1464 case XC16X_OPERAND_DRI : 1465 fields->f_r4 = value; 1466 break; 1467 case XC16X_OPERAND_EXTCOND : 1468 fields->f_extccode = value; 1469 break; 1470 case XC16X_OPERAND_GENREG : 1471 fields->f_regb8 = value; 1472 break; 1473 case XC16X_OPERAND_HASH : 1474 break; 1475 case XC16X_OPERAND_ICOND : 1476 fields->f_icondcode = value; 1477 break; 1478 case XC16X_OPERAND_LBIT2 : 1479 fields->f_op_lbit2 = value; 1480 break; 1481 case XC16X_OPERAND_LBIT4 : 1482 fields->f_op_lbit4 = value; 1483 break; 1484 case XC16X_OPERAND_MASK8 : 1485 fields->f_mask8 = value; 1486 break; 1487 case XC16X_OPERAND_MASKLO8 : 1488 fields->f_datahi8 = value; 1489 break; 1490 case XC16X_OPERAND_MEMGR8 : 1491 fields->f_memgr8 = value; 1492 break; 1493 case XC16X_OPERAND_MEMORY : 1494 fields->f_memory = value; 1495 break; 1496 case XC16X_OPERAND_PAG : 1497 break; 1498 case XC16X_OPERAND_PAGENUM : 1499 fields->f_pagenum = value; 1500 break; 1501 case XC16X_OPERAND_POF : 1502 break; 1503 case XC16X_OPERAND_QBIT : 1504 fields->f_qbit = value; 1505 break; 1506 case XC16X_OPERAND_QHIBIT : 1507 fields->f_qhibit = value; 1508 break; 1509 case XC16X_OPERAND_QLOBIT : 1510 fields->f_qlobit = value; 1511 break; 1512 case XC16X_OPERAND_REG8 : 1513 fields->f_reg8 = value; 1514 break; 1515 case XC16X_OPERAND_REGB8 : 1516 fields->f_regb8 = value; 1517 break; 1518 case XC16X_OPERAND_REGBMEM8 : 1519 fields->f_regmem8 = value; 1520 break; 1521 case XC16X_OPERAND_REGHI8 : 1522 fields->f_reghi8 = value; 1523 break; 1524 case XC16X_OPERAND_REGMEM8 : 1525 fields->f_regmem8 = value; 1526 break; 1527 case XC16X_OPERAND_REGOFF8 : 1528 fields->f_regoff8 = value; 1529 break; 1530 case XC16X_OPERAND_REL : 1531 fields->f_rel8 = value; 1532 break; 1533 case XC16X_OPERAND_RELHI : 1534 fields->f_relhi8 = value; 1535 break; 1536 case XC16X_OPERAND_SEG : 1537 fields->f_seg8 = value; 1538 break; 1539 case XC16X_OPERAND_SEGHI8 : 1540 fields->f_segnum8 = value; 1541 break; 1542 case XC16X_OPERAND_SEGM : 1543 break; 1544 case XC16X_OPERAND_SOF : 1545 break; 1546 case XC16X_OPERAND_SR : 1547 fields->f_r2 = value; 1548 break; 1549 case XC16X_OPERAND_SR2 : 1550 fields->f_r0 = value; 1551 break; 1552 case XC16X_OPERAND_SRB : 1553 fields->f_r2 = value; 1554 break; 1555 case XC16X_OPERAND_SRC1 : 1556 fields->f_r1 = value; 1557 break; 1558 case XC16X_OPERAND_SRC2 : 1559 fields->f_r2 = value; 1560 break; 1561 case XC16X_OPERAND_SRDIV : 1562 fields->f_reg8 = value; 1563 break; 1564 case XC16X_OPERAND_U4 : 1565 fields->f_uimm4 = value; 1566 break; 1567 case XC16X_OPERAND_UIMM16 : 1568 fields->f_uimm16 = value; 1569 break; 1570 case XC16X_OPERAND_UIMM2 : 1571 fields->f_uimm2 = value; 1572 break; 1573 case XC16X_OPERAND_UIMM3 : 1574 fields->f_uimm3 = value; 1575 break; 1576 case XC16X_OPERAND_UIMM4 : 1577 fields->f_uimm4 = value; 1578 break; 1579 case XC16X_OPERAND_UIMM7 : 1580 fields->f_uimm7 = value; 1581 break; 1582 case XC16X_OPERAND_UIMM8 : 1583 fields->f_uimm8 = value; 1584 break; 1585 case XC16X_OPERAND_UPAG16 : 1586 fields->f_uimm16 = value; 1587 break; 1588 case XC16X_OPERAND_UPOF16 : 1589 fields->f_memory = value; 1590 break; 1591 case XC16X_OPERAND_USEG16 : 1592 fields->f_offset16 = value; 1593 break; 1594 case XC16X_OPERAND_USEG8 : 1595 fields->f_seg8 = value; 1596 break; 1597 case XC16X_OPERAND_USOF16 : 1598 fields->f_offset16 = value; 1599 break; 1600 1601 default : 1602 /* xgettext:c-format */ 1603 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"), 1604 opindex); 1605 abort (); 1606 } 1607} 1608 1609void 1610xc16x_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 1611 int opindex, 1612 CGEN_FIELDS * fields, 1613 bfd_vma value) 1614{ 1615 switch (opindex) 1616 { 1617 case XC16X_OPERAND_REGNAM : 1618 fields->f_reg8 = value; 1619 break; 1620 case XC16X_OPERAND_BIT01 : 1621 fields->f_op_1bit = value; 1622 break; 1623 case XC16X_OPERAND_BIT1 : 1624 fields->f_op_bit1 = value; 1625 break; 1626 case XC16X_OPERAND_BIT2 : 1627 fields->f_op_bit2 = value; 1628 break; 1629 case XC16X_OPERAND_BIT4 : 1630 fields->f_op_bit4 = value; 1631 break; 1632 case XC16X_OPERAND_BIT8 : 1633 fields->f_op_bit8 = value; 1634 break; 1635 case XC16X_OPERAND_BITONE : 1636 fields->f_op_onebit = value; 1637 break; 1638 case XC16X_OPERAND_CADDR : 1639 fields->f_offset16 = value; 1640 break; 1641 case XC16X_OPERAND_COND : 1642 fields->f_condcode = value; 1643 break; 1644 case XC16X_OPERAND_DATA8 : 1645 fields->f_data8 = value; 1646 break; 1647 case XC16X_OPERAND_DATAHI8 : 1648 fields->f_datahi8 = value; 1649 break; 1650 case XC16X_OPERAND_DOT : 1651 break; 1652 case XC16X_OPERAND_DR : 1653 fields->f_r1 = value; 1654 break; 1655 case XC16X_OPERAND_DRB : 1656 fields->f_r1 = value; 1657 break; 1658 case XC16X_OPERAND_DRI : 1659 fields->f_r4 = value; 1660 break; 1661 case XC16X_OPERAND_EXTCOND : 1662 fields->f_extccode = value; 1663 break; 1664 case XC16X_OPERAND_GENREG : 1665 fields->f_regb8 = value; 1666 break; 1667 case XC16X_OPERAND_HASH : 1668 break; 1669 case XC16X_OPERAND_ICOND : 1670 fields->f_icondcode = value; 1671 break; 1672 case XC16X_OPERAND_LBIT2 : 1673 fields->f_op_lbit2 = value; 1674 break; 1675 case XC16X_OPERAND_LBIT4 : 1676 fields->f_op_lbit4 = value; 1677 break; 1678 case XC16X_OPERAND_MASK8 : 1679 fields->f_mask8 = value; 1680 break; 1681 case XC16X_OPERAND_MASKLO8 : 1682 fields->f_datahi8 = value; 1683 break; 1684 case XC16X_OPERAND_MEMGR8 : 1685 fields->f_memgr8 = value; 1686 break; 1687 case XC16X_OPERAND_MEMORY : 1688 fields->f_memory = value; 1689 break; 1690 case XC16X_OPERAND_PAG : 1691 break; 1692 case XC16X_OPERAND_PAGENUM : 1693 fields->f_pagenum = value; 1694 break; 1695 case XC16X_OPERAND_POF : 1696 break; 1697 case XC16X_OPERAND_QBIT : 1698 fields->f_qbit = value; 1699 break; 1700 case XC16X_OPERAND_QHIBIT : 1701 fields->f_qhibit = value; 1702 break; 1703 case XC16X_OPERAND_QLOBIT : 1704 fields->f_qlobit = value; 1705 break; 1706 case XC16X_OPERAND_REG8 : 1707 fields->f_reg8 = value; 1708 break; 1709 case XC16X_OPERAND_REGB8 : 1710 fields->f_regb8 = value; 1711 break; 1712 case XC16X_OPERAND_REGBMEM8 : 1713 fields->f_regmem8 = value; 1714 break; 1715 case XC16X_OPERAND_REGHI8 : 1716 fields->f_reghi8 = value; 1717 break; 1718 case XC16X_OPERAND_REGMEM8 : 1719 fields->f_regmem8 = value; 1720 break; 1721 case XC16X_OPERAND_REGOFF8 : 1722 fields->f_regoff8 = value; 1723 break; 1724 case XC16X_OPERAND_REL : 1725 fields->f_rel8 = value; 1726 break; 1727 case XC16X_OPERAND_RELHI : 1728 fields->f_relhi8 = value; 1729 break; 1730 case XC16X_OPERAND_SEG : 1731 fields->f_seg8 = value; 1732 break; 1733 case XC16X_OPERAND_SEGHI8 : 1734 fields->f_segnum8 = value; 1735 break; 1736 case XC16X_OPERAND_SEGM : 1737 break; 1738 case XC16X_OPERAND_SOF : 1739 break; 1740 case XC16X_OPERAND_SR : 1741 fields->f_r2 = value; 1742 break; 1743 case XC16X_OPERAND_SR2 : 1744 fields->f_r0 = value; 1745 break; 1746 case XC16X_OPERAND_SRB : 1747 fields->f_r2 = value; 1748 break; 1749 case XC16X_OPERAND_SRC1 : 1750 fields->f_r1 = value; 1751 break; 1752 case XC16X_OPERAND_SRC2 : 1753 fields->f_r2 = value; 1754 break; 1755 case XC16X_OPERAND_SRDIV : 1756 fields->f_reg8 = value; 1757 break; 1758 case XC16X_OPERAND_U4 : 1759 fields->f_uimm4 = value; 1760 break; 1761 case XC16X_OPERAND_UIMM16 : 1762 fields->f_uimm16 = value; 1763 break; 1764 case XC16X_OPERAND_UIMM2 : 1765 fields->f_uimm2 = value; 1766 break; 1767 case XC16X_OPERAND_UIMM3 : 1768 fields->f_uimm3 = value; 1769 break; 1770 case XC16X_OPERAND_UIMM4 : 1771 fields->f_uimm4 = value; 1772 break; 1773 case XC16X_OPERAND_UIMM7 : 1774 fields->f_uimm7 = value; 1775 break; 1776 case XC16X_OPERAND_UIMM8 : 1777 fields->f_uimm8 = value; 1778 break; 1779 case XC16X_OPERAND_UPAG16 : 1780 fields->f_uimm16 = value; 1781 break; 1782 case XC16X_OPERAND_UPOF16 : 1783 fields->f_memory = value; 1784 break; 1785 case XC16X_OPERAND_USEG16 : 1786 fields->f_offset16 = value; 1787 break; 1788 case XC16X_OPERAND_USEG8 : 1789 fields->f_seg8 = value; 1790 break; 1791 case XC16X_OPERAND_USOF16 : 1792 fields->f_offset16 = value; 1793 break; 1794 1795 default : 1796 /* xgettext:c-format */ 1797 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"), 1798 opindex); 1799 abort (); 1800 } 1801} 1802 1803/* Function to call before using the instruction builder tables. */ 1804 1805void 1806xc16x_cgen_init_ibld_table (CGEN_CPU_DESC cd) 1807{ 1808 cd->insert_handlers = & xc16x_cgen_insert_handlers[0]; 1809 cd->extract_handlers = & xc16x_cgen_extract_handlers[0]; 1810 1811 cd->insert_operand = xc16x_cgen_insert_operand; 1812 cd->extract_operand = xc16x_cgen_extract_operand; 1813 1814 cd->get_int_operand = xc16x_cgen_get_int_operand; 1815 cd->set_int_operand = xc16x_cgen_set_int_operand; 1816 cd->get_vma_operand = xc16x_cgen_get_vma_operand; 1817 cd->set_vma_operand = xc16x_cgen_set_vma_operand; 1818} 1819