1/* Print Motorola 68k instructions. 2 Copyright (C) 1986-2017 Free Software Foundation, Inc. 3 4 This file is part of the GNU opcodes library. 5 6 This library is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 It is distributed in the hope that it will be useful, but WITHOUT 12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 14 License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21#include "sysdep.h" 22#include "dis-asm.h" 23#include "floatformat.h" 24#include "libiberty.h" 25#include "opintl.h" 26 27#include "opcode/m68k.h" 28 29/* Local function prototypes. */ 30 31const char * const fpcr_names[] = 32{ 33 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr", 34 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr" 35}; 36 37static char *const reg_names[] = 38{ 39 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", 40 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", 41 "%ps", "%pc" 42}; 43 44/* Name of register halves for MAC/EMAC. 45 Seperate from reg_names since 'spu', 'fpl' look weird. */ 46static char *const reg_half_names[] = 47{ 48 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", 49 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7", 50 "%ps", "%pc" 51}; 52 53/* Sign-extend an (unsigned char). */ 54#if __STDC__ == 1 55#define COERCE_SIGNED_CHAR(ch) ((signed char) (ch)) 56#else 57#define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128) 58#endif 59 60/* Get a 1 byte signed integer. */ 61#define NEXTBYTE(p, val) \ 62 do \ 63 { \ 64 p += 2; \ 65 if (!FETCH_DATA (info, p)) \ 66 return -3; \ 67 val = COERCE_SIGNED_CHAR (p[-1]); \ 68 } \ 69 while (0) 70 71/* Get a 2 byte signed integer. */ 72#define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000)) 73 74#define NEXTWORD(p, val, ret_val) \ 75 do \ 76 { \ 77 p += 2; \ 78 if (!FETCH_DATA (info, p)) \ 79 return ret_val; \ 80 val = COERCE16 ((p[-2] << 8) + p[-1]); \ 81 } \ 82 while (0) 83 84/* Get a 4 byte signed integer. */ 85#define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000) 86 87#define NEXTLONG(p, val, ret_val) \ 88 do \ 89 { \ 90 p += 4; \ 91 if (!FETCH_DATA (info, p)) \ 92 return ret_val; \ 93 val = COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \ 94 } \ 95 while (0) 96 97/* Get a 4 byte unsigned integer. */ 98#define NEXTULONG(p, val) \ 99 do \ 100 { \ 101 p += 4; \ 102 if (!FETCH_DATA (info, p)) \ 103 return -3; \ 104 val = (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \ 105 } \ 106 while (0) 107 108/* Get a single precision float. */ 109#define NEXTSINGLE(val, p) \ 110 do \ 111 { \ 112 p += 4; \ 113 if (!FETCH_DATA (info, p)) \ 114 return -3; \ 115 floatformat_to_double (& floatformat_ieee_single_big, \ 116 (char *) p - 4, & val); \ 117 } \ 118 while (0) 119 120/* Get a double precision float. */ 121#define NEXTDOUBLE(val, p) \ 122 do \ 123 { \ 124 p += 8; \ 125 if (!FETCH_DATA (info, p)) \ 126 return -3; \ 127 floatformat_to_double (& floatformat_ieee_double_big, \ 128 (char *) p - 8, & val); \ 129 } \ 130 while (0) 131 132/* Get an extended precision float. */ 133#define NEXTEXTEND(val, p) \ 134 do \ 135 { \ 136 p += 12; \ 137 if (!FETCH_DATA (info, p)) \ 138 return -3; \ 139 floatformat_to_double (& floatformat_m68881_ext, \ 140 (char *) p - 12, & val); \ 141 } \ 142 while (0) 143 144/* Need a function to convert from packed to double 145 precision. Actually, it's easier to print a 146 packed number than a double anyway, so maybe 147 there should be a special case to handle this... */ 148#define NEXTPACKED(p, val) \ 149 do \ 150 { \ 151 p += 12; \ 152 if (!FETCH_DATA (info, p)) \ 153 return -3; \ 154 val = 0.0; \ 155 } \ 156 while (0) 157 158 159/* Maximum length of an instruction. */ 160#define MAXLEN 22 161 162struct private 163{ 164 /* Points to first byte not fetched. */ 165 bfd_byte *max_fetched; 166 bfd_byte the_buffer[MAXLEN]; 167 bfd_vma insn_start; 168}; 169 170/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) 171 to ADDR (exclusive) are valid. Returns 1 for success, 0 on error. */ 172#define FETCH_DATA(info, addr) \ 173 ((addr) <= ((struct private *) (info->private_data))->max_fetched \ 174 ? 1 : fetch_data ((info), (addr))) 175 176static int 177fetch_data (struct disassemble_info *info, bfd_byte *addr) 178{ 179 int status; 180 struct private *priv = (struct private *)info->private_data; 181 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); 182 183 status = (*info->read_memory_func) (start, 184 priv->max_fetched, 185 addr - priv->max_fetched, 186 info); 187 if (status != 0) 188 { 189 (*info->memory_error_func) (status, start, info); 190 return 0; 191 } 192 else 193 priv->max_fetched = addr; 194 return 1; 195} 196 197/* This function is used to print to the bit-bucket. */ 198static int 199dummy_printer (FILE *file ATTRIBUTE_UNUSED, 200 const char *format ATTRIBUTE_UNUSED, 201 ...) 202{ 203 return 0; 204} 205 206static void 207dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED, 208 struct disassemble_info *info ATTRIBUTE_UNUSED) 209{ 210} 211 212/* Fetch BITS bits from a position in the instruction specified by CODE. 213 CODE is a "place to put an argument", or 'x' for a destination 214 that is a general address (mode and register). 215 BUFFER contains the instruction. 216 Returns -1 on failure. */ 217 218static int 219fetch_arg (unsigned char *buffer, 220 int code, 221 int bits, 222 disassemble_info *info) 223{ 224 int val = 0; 225 226 switch (code) 227 { 228 case '/': /* MAC/EMAC mask bit. */ 229 val = buffer[3] >> 5; 230 break; 231 232 case 'G': /* EMAC ACC load. */ 233 val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1); 234 break; 235 236 case 'H': /* EMAC ACC !load. */ 237 val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1); 238 break; 239 240 case ']': /* EMAC ACCEXT bit. */ 241 val = buffer[0] >> 2; 242 break; 243 244 case 'I': /* MAC/EMAC scale factor. */ 245 val = buffer[2] >> 1; 246 break; 247 248 case 'F': /* EMAC ACCx. */ 249 val = buffer[0] >> 1; 250 break; 251 252 case 'f': 253 val = buffer[1]; 254 break; 255 256 case 's': 257 val = buffer[1]; 258 break; 259 260 case 'd': /* Destination, for register or quick. */ 261 val = (buffer[0] << 8) + buffer[1]; 262 val >>= 9; 263 break; 264 265 case 'x': /* Destination, for general arg. */ 266 val = (buffer[0] << 8) + buffer[1]; 267 val >>= 6; 268 break; 269 270 case 'k': 271 if (! FETCH_DATA (info, buffer + 3)) 272 return -1; 273 val = (buffer[3] >> 4); 274 break; 275 276 case 'C': 277 if (! FETCH_DATA (info, buffer + 3)) 278 return -1; 279 val = buffer[3]; 280 break; 281 282 case '1': 283 if (! FETCH_DATA (info, buffer + 3)) 284 return -1; 285 val = (buffer[2] << 8) + buffer[3]; 286 val >>= 12; 287 break; 288 289 case '2': 290 if (! FETCH_DATA (info, buffer + 3)) 291 return -1; 292 val = (buffer[2] << 8) + buffer[3]; 293 val >>= 6; 294 break; 295 296 case '3': 297 case 'j': 298 if (! FETCH_DATA (info, buffer + 3)) 299 return -1; 300 val = (buffer[2] << 8) + buffer[3]; 301 break; 302 303 case '4': 304 if (! FETCH_DATA (info, buffer + 5)) 305 return -1; 306 val = (buffer[4] << 8) + buffer[5]; 307 val >>= 12; 308 break; 309 310 case '5': 311 if (! FETCH_DATA (info, buffer + 5)) 312 return -1; 313 val = (buffer[4] << 8) + buffer[5]; 314 val >>= 6; 315 break; 316 317 case '6': 318 if (! FETCH_DATA (info, buffer + 5)) 319 return -1; 320 val = (buffer[4] << 8) + buffer[5]; 321 break; 322 323 case '7': 324 if (! FETCH_DATA (info, buffer + 3)) 325 return -1; 326 val = (buffer[2] << 8) + buffer[3]; 327 val >>= 7; 328 break; 329 330 case '8': 331 if (! FETCH_DATA (info, buffer + 3)) 332 return -1; 333 val = (buffer[2] << 8) + buffer[3]; 334 val >>= 10; 335 break; 336 337 case '9': 338 if (! FETCH_DATA (info, buffer + 3)) 339 return -1; 340 val = (buffer[2] << 8) + buffer[3]; 341 val >>= 5; 342 break; 343 344 case 'e': 345 val = (buffer[1] >> 6); 346 break; 347 348 case 'E': 349 if (! FETCH_DATA (info, buffer + 3)) 350 return -1; 351 val = (buffer[2] >> 1); 352 break; 353 354 case 'm': 355 val = (buffer[1] & 0x40 ? 0x8 : 0) 356 | ((buffer[0] >> 1) & 0x7) 357 | (buffer[3] & 0x80 ? 0x10 : 0); 358 break; 359 360 case 'n': 361 val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7); 362 break; 363 364 case 'o': 365 val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0); 366 break; 367 368 case 'M': 369 val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0); 370 break; 371 372 case 'N': 373 val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0); 374 break; 375 376 case 'h': 377 val = buffer[2] >> 2; 378 break; 379 380 default: 381 abort (); 382 } 383 384 /* bits is never too big. */ 385 return val & ((1 << bits) - 1); 386} 387 388/* Check if an EA is valid for a particular code. This is required 389 for the EMAC instructions since the type of source address determines 390 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it 391 is a non-load EMAC instruction and the bits mean register Ry. 392 A similar case exists for the movem instructions where the register 393 mask is interpreted differently for different EAs. */ 394 395static bfd_boolean 396m68k_valid_ea (char code, int val) 397{ 398 int mode, mask; 399#define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \ 400 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \ 401 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11) 402 403 switch (code) 404 { 405 case '*': 406 mask = M (1,1,1,1,1,1,1,1,1,1,1,1); 407 break; 408 case '~': 409 mask = M (0,0,1,1,1,1,1,1,1,0,0,0); 410 break; 411 case '%': 412 mask = M (1,1,1,1,1,1,1,1,1,0,0,0); 413 break; 414 case ';': 415 mask = M (1,0,1,1,1,1,1,1,1,1,1,1); 416 break; 417 case '@': 418 mask = M (1,0,1,1,1,1,1,1,1,1,1,0); 419 break; 420 case '!': 421 mask = M (0,0,1,0,0,1,1,1,1,1,1,0); 422 break; 423 case '&': 424 mask = M (0,0,1,0,0,1,1,1,1,0,0,0); 425 break; 426 case '$': 427 mask = M (1,0,1,1,1,1,1,1,1,0,0,0); 428 break; 429 case '?': 430 mask = M (1,0,1,0,0,1,1,1,1,0,0,0); 431 break; 432 case '/': 433 mask = M (1,0,1,0,0,1,1,1,1,1,1,0); 434 break; 435 case '|': 436 mask = M (0,0,1,0,0,1,1,1,1,1,1,0); 437 break; 438 case '>': 439 mask = M (0,0,1,0,1,1,1,1,1,0,0,0); 440 break; 441 case '<': 442 mask = M (0,0,1,1,0,1,1,1,1,1,1,0); 443 break; 444 case 'm': 445 mask = M (1,1,1,1,1,0,0,0,0,0,0,0); 446 break; 447 case 'n': 448 mask = M (0,0,0,0,0,1,0,0,0,1,0,0); 449 break; 450 case 'o': 451 mask = M (0,0,0,0,0,0,1,1,1,0,1,1); 452 break; 453 case 'p': 454 mask = M (1,1,1,1,1,1,0,0,0,0,0,0); 455 break; 456 case 'q': 457 mask = M (1,0,1,1,1,1,0,0,0,0,0,0); 458 break; 459 case 'v': 460 mask = M (1,0,1,1,1,1,0,1,1,0,0,0); 461 break; 462 case 'b': 463 mask = M (1,0,1,1,1,1,0,0,0,1,0,0); 464 break; 465 case 'w': 466 mask = M (0,0,1,1,1,1,0,0,0,1,0,0); 467 break; 468 case 'y': 469 mask = M (0,0,1,0,0,1,0,0,0,0,0,0); 470 break; 471 case 'z': 472 mask = M (0,0,1,0,0,1,0,0,0,1,0,0); 473 break; 474 case '4': 475 mask = M (0,0,1,1,1,1,0,0,0,0,0,0); 476 break; 477 default: 478 abort (); 479 } 480#undef M 481 482 mode = (val >> 3) & 7; 483 if (mode == 7) 484 mode += val & 7; 485 return (mask & (1 << mode)) != 0; 486} 487 488/* Print a base register REGNO and displacement DISP, on INFO->STREAM. 489 REGNO = -1 for pc, -2 for none (suppressed). */ 490 491static void 492print_base (int regno, bfd_vma disp, disassemble_info *info) 493{ 494 if (regno == -1) 495 { 496 (*info->fprintf_func) (info->stream, "%%pc@("); 497 (*info->print_address_func) (disp, info); 498 } 499 else 500 { 501 char buf[50]; 502 503 if (regno == -2) 504 (*info->fprintf_func) (info->stream, "@("); 505 else if (regno == -3) 506 (*info->fprintf_func) (info->stream, "%%zpc@("); 507 else 508 (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]); 509 510 sprintf_vma (buf, disp); 511 (*info->fprintf_func) (info->stream, "%s", buf); 512 } 513} 514 515/* Print an indexed argument. The base register is BASEREG (-1 for pc). 516 P points to extension word, in buffer. 517 ADDR is the nominal core address of that extension word. 518 Returns NULL upon error. */ 519 520static unsigned char * 521print_indexed (int basereg, 522 unsigned char *p, 523 bfd_vma addr, 524 disassemble_info *info) 525{ 526 int word; 527 static char *const scales[] = { "", ":2", ":4", ":8" }; 528 bfd_vma base_disp; 529 bfd_vma outer_disp; 530 char buf[40]; 531 char vmabuf[50]; 532 533 NEXTWORD (p, word, NULL); 534 535 /* Generate the text for the index register. 536 Where this will be output is not yet determined. */ 537 sprintf (buf, "%s:%c%s", 538 reg_names[(word >> 12) & 0xf], 539 (word & 0x800) ? 'l' : 'w', 540 scales[(word >> 9) & 3]); 541 542 /* Handle the 68000 style of indexing. */ 543 544 if ((word & 0x100) == 0) 545 { 546 base_disp = word & 0xff; 547 if ((base_disp & 0x80) != 0) 548 base_disp -= 0x100; 549 if (basereg == -1) 550 base_disp += addr; 551 print_base (basereg, base_disp, info); 552 (*info->fprintf_func) (info->stream, ",%s)", buf); 553 return p; 554 } 555 556 /* Handle the generalized kind. */ 557 /* First, compute the displacement to add to the base register. */ 558 if (word & 0200) 559 { 560 if (basereg == -1) 561 basereg = -3; 562 else 563 basereg = -2; 564 } 565 if (word & 0100) 566 buf[0] = '\0'; 567 base_disp = 0; 568 switch ((word >> 4) & 3) 569 { 570 case 2: 571 NEXTWORD (p, base_disp, NULL); 572 break; 573 case 3: 574 NEXTLONG (p, base_disp, NULL); 575 } 576 if (basereg == -1) 577 base_disp += addr; 578 579 /* Handle single-level case (not indirect). */ 580 if ((word & 7) == 0) 581 { 582 print_base (basereg, base_disp, info); 583 if (buf[0] != '\0') 584 (*info->fprintf_func) (info->stream, ",%s", buf); 585 (*info->fprintf_func) (info->stream, ")"); 586 return p; 587 } 588 589 /* Two level. Compute displacement to add after indirection. */ 590 outer_disp = 0; 591 switch (word & 3) 592 { 593 case 2: 594 NEXTWORD (p, outer_disp, NULL); 595 break; 596 case 3: 597 NEXTLONG (p, outer_disp, NULL); 598 } 599 600 print_base (basereg, base_disp, info); 601 if ((word & 4) == 0 && buf[0] != '\0') 602 { 603 (*info->fprintf_func) (info->stream, ",%s", buf); 604 buf[0] = '\0'; 605 } 606 sprintf_vma (vmabuf, outer_disp); 607 (*info->fprintf_func) (info->stream, ")@(%s", vmabuf); 608 if (buf[0] != '\0') 609 (*info->fprintf_func) (info->stream, ",%s", buf); 610 (*info->fprintf_func) (info->stream, ")"); 611 612 return p; 613} 614 615#define FETCH_ARG(size, val) \ 616 do \ 617 { \ 618 val = fetch_arg (buffer, place, size, info); \ 619 if (val < 0) \ 620 return -3; \ 621 } \ 622 while (0) 623 624/* Returns number of bytes "eaten" by the operand, or 625 return -1 if an invalid operand was found, or -2 if 626 an opcode tabe error was found or -3 to simply abort. 627 ADDR is the pc for this arg to be relative to. */ 628 629static int 630print_insn_arg (const char *d, 631 unsigned char *buffer, 632 unsigned char *p0, 633 bfd_vma addr, 634 disassemble_info *info) 635{ 636 int val = 0; 637 int place = d[1]; 638 unsigned char *p = p0; 639 int regno; 640 const char *regname; 641 unsigned char *p1; 642 double flval; 643 int flt_p; 644 bfd_signed_vma disp; 645 unsigned int uval; 646 647 switch (*d) 648 { 649 case 'c': /* Cache identifier. */ 650 { 651 static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" }; 652 FETCH_ARG (2, val); 653 (*info->fprintf_func) (info->stream, "%s", cacheFieldName[val]); 654 break; 655 } 656 657 case 'a': /* Address register indirect only. Cf. case '+'. */ 658 { 659 FETCH_ARG (3, val); 660 (*info->fprintf_func) (info->stream, "%s@", reg_names[val + 8]); 661 break; 662 } 663 664 case '_': /* 32-bit absolute address for move16. */ 665 { 666 NEXTULONG (p, uval); 667 (*info->print_address_func) (uval, info); 668 break; 669 } 670 671 case 'C': 672 (*info->fprintf_func) (info->stream, "%%ccr"); 673 break; 674 675 case 'S': 676 (*info->fprintf_func) (info->stream, "%%sr"); 677 break; 678 679 case 'U': 680 (*info->fprintf_func) (info->stream, "%%usp"); 681 break; 682 683 case 'E': 684 (*info->fprintf_func) (info->stream, "%%acc"); 685 break; 686 687 case 'G': 688 (*info->fprintf_func) (info->stream, "%%macsr"); 689 break; 690 691 case 'H': 692 (*info->fprintf_func) (info->stream, "%%mask"); 693 break; 694 695 case 'J': 696 { 697 /* FIXME: There's a problem here, different m68k processors call the 698 same address different names. The tables below try to get it right 699 using info->mach, but only for v4e. */ 700 struct regname { char * name; int value; }; 701 static const struct regname names[] = 702 { 703 {"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002}, 704 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005}, 705 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008}, 706 {"%rgpiobar", 0x009}, {"%acr4",0x00c}, 707 {"%acr5",0x00d}, {"%acr6",0x00e}, {"%acr7", 0x00f}, 708 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802}, 709 {"%msp", 0x803}, {"%isp", 0x804}, 710 {"%pc", 0x80f}, 711 /* Reg c04 is sometimes called flashbar or rambar. 712 Reg c05 is also sometimes called rambar. */ 713 {"%rambar0", 0xc04}, {"%rambar1", 0xc05}, 714 715 /* reg c0e is sometimes called mbar2 or secmbar. 716 reg c0f is sometimes called mbar. */ 717 {"%mbar0", 0xc0e}, {"%mbar1", 0xc0f}, 718 719 /* Should we be calling this psr like we do in case 'Y'? */ 720 {"%mmusr",0x805}, 721 722 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}, 723 724 /* Fido added these. */ 725 {"%cac", 0xffe}, {"%mbo", 0xfff} 726 }; 727 /* Alternate names for v4e (MCF5407/5445x/MCF547x/MCF548x), at least. */ 728 static const struct regname names_v4e[] = 729 { 730 {"%asid",0x003}, {"%acr0",0x004}, {"%acr1",0x005}, 731 {"%acr2",0x006}, {"%acr3",0x007}, {"%mmubar",0x008}, 732 }; 733 unsigned int arch_mask; 734 735 arch_mask = bfd_m68k_mach_to_features (info->mach); 736 FETCH_ARG (12, val); 737 if (arch_mask & (mcfisa_b | mcfisa_c)) 738 { 739 for (regno = ARRAY_SIZE (names_v4e); --regno >= 0;) 740 if (names_v4e[regno].value == val) 741 { 742 (*info->fprintf_func) (info->stream, "%s", names_v4e[regno].name); 743 break; 744 } 745 if (regno >= 0) 746 break; 747 } 748 for (regno = ARRAY_SIZE (names) - 1; regno >= 0; regno--) 749 if (names[regno].value == val) 750 { 751 (*info->fprintf_func) (info->stream, "%s", names[regno].name); 752 break; 753 } 754 if (regno < 0) 755 (*info->fprintf_func) (info->stream, "0x%x", val); 756 } 757 break; 758 759 case 'Q': 760 FETCH_ARG (3, val); 761 /* 0 means 8, except for the bkpt instruction... */ 762 if (val == 0 && d[1] != 's') 763 val = 8; 764 (*info->fprintf_func) (info->stream, "#%d", val); 765 break; 766 767 case 'x': 768 FETCH_ARG (3, val); 769 /* 0 means -1. */ 770 if (val == 0) 771 val = -1; 772 (*info->fprintf_func) (info->stream, "#%d", val); 773 break; 774 775 case 'j': 776 FETCH_ARG (3, val); 777 (*info->fprintf_func) (info->stream, "#%d", val+1); 778 break; 779 780 case 'K': 781 FETCH_ARG (9, val); 782 (*info->fprintf_func) (info->stream, "#%d", val); 783 break; 784 785 case 'M': 786 if (place == 'h') 787 { 788 static char *const scalefactor_name[] = { "<<", ">>" }; 789 790 FETCH_ARG (1, val); 791 (*info->fprintf_func) (info->stream, "%s", scalefactor_name[val]); 792 } 793 else 794 { 795 FETCH_ARG (8, val); 796 if (val & 0x80) 797 val = val - 0x100; 798 (*info->fprintf_func) (info->stream, "#%d", val); 799 } 800 break; 801 802 case 'T': 803 FETCH_ARG (4, val); 804 (*info->fprintf_func) (info->stream, "#%d", val); 805 break; 806 807 case 'D': 808 FETCH_ARG (3, val); 809 (*info->fprintf_func) (info->stream, "%s", reg_names[val]); 810 break; 811 812 case 'A': 813 FETCH_ARG (3, val); 814 (*info->fprintf_func) (info->stream, "%s", reg_names[val + 010]); 815 break; 816 817 case 'R': 818 FETCH_ARG (4, val); 819 (*info->fprintf_func) (info->stream, "%s", reg_names[val]); 820 break; 821 822 case 'r': 823 FETCH_ARG (4, regno); 824 if (regno > 7) 825 (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]); 826 else 827 (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]); 828 break; 829 830 case 'F': 831 FETCH_ARG (3, val); 832 (*info->fprintf_func) (info->stream, "%%fp%d", val); 833 break; 834 835 case 'O': 836 FETCH_ARG (6, val); 837 if (val & 0x20) 838 (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]); 839 else 840 (*info->fprintf_func) (info->stream, "%d", val); 841 break; 842 843 case '+': 844 FETCH_ARG (3, val); 845 (*info->fprintf_func) (info->stream, "%s@+", reg_names[val + 8]); 846 break; 847 848 case '-': 849 FETCH_ARG (3, val); 850 (*info->fprintf_func) (info->stream, "%s@-", reg_names[val + 8]); 851 break; 852 853 case 'k': 854 if (place == 'k') 855 { 856 FETCH_ARG (3, val); 857 (*info->fprintf_func) (info->stream, "{%s}", reg_names[val]); 858 } 859 else if (place == 'C') 860 { 861 FETCH_ARG (7, val); 862 if (val > 63) /* This is a signed constant. */ 863 val -= 128; 864 (*info->fprintf_func) (info->stream, "{#%d}", val); 865 } 866 else 867 return -1; 868 break; 869 870 case '#': 871 case '^': 872 p1 = buffer + (*d == '#' ? 2 : 4); 873 if (place == 's') 874 FETCH_ARG (4, val); 875 else if (place == 'C') 876 FETCH_ARG (7, val); 877 else if (place == '8') 878 FETCH_ARG (3, val); 879 else if (place == '3') 880 FETCH_ARG (8, val); 881 else if (place == 'b') 882 NEXTBYTE (p1, val); 883 else if (place == 'w' || place == 'W') 884 NEXTWORD (p1, val, -3); 885 else if (place == 'l') 886 NEXTLONG (p1, val, -3); 887 else 888 return -2; 889 890 (*info->fprintf_func) (info->stream, "#%d", val); 891 break; 892 893 case 'B': 894 if (place == 'b') 895 NEXTBYTE (p, disp); 896 else if (place == 'B') 897 disp = COERCE_SIGNED_CHAR (buffer[1]); 898 else if (place == 'w' || place == 'W') 899 NEXTWORD (p, disp, -3); 900 else if (place == 'l' || place == 'L' || place == 'C') 901 NEXTLONG (p, disp, -3); 902 else if (place == 'g') 903 { 904 NEXTBYTE (buffer, disp); 905 if (disp == 0) 906 NEXTWORD (p, disp, -3); 907 else if (disp == -1) 908 NEXTLONG (p, disp, -3); 909 } 910 else if (place == 'c') 911 { 912 if (buffer[1] & 0x40) /* If bit six is one, long offset. */ 913 NEXTLONG (p, disp, -3); 914 else 915 NEXTWORD (p, disp, -3); 916 } 917 else 918 return -2; 919 920 (*info->print_address_func) (addr + disp, info); 921 break; 922 923 case 'd': 924 { 925 int val1; 926 927 NEXTWORD (p, val, -3); 928 FETCH_ARG (3, val1); 929 (*info->fprintf_func) (info->stream, "%s@(%d)", reg_names[val1 + 8], val); 930 break; 931 } 932 933 case 's': 934 FETCH_ARG (3, val); 935 (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]); 936 break; 937 938 case 'e': 939 FETCH_ARG (2, val); 940 (*info->fprintf_func) (info->stream, "%%acc%d", val); 941 break; 942 943 case 'g': 944 FETCH_ARG (1, val); 945 (*info->fprintf_func) (info->stream, "%%accext%s", val == 0 ? "01" : "23"); 946 break; 947 948 case 'i': 949 FETCH_ARG (2, val); 950 if (val == 1) 951 (*info->fprintf_func) (info->stream, "<<"); 952 else if (val == 3) 953 (*info->fprintf_func) (info->stream, ">>"); 954 else 955 return -1; 956 break; 957 958 case 'I': 959 /* Get coprocessor ID... */ 960 val = fetch_arg (buffer, 'd', 3, info); 961 if (val < 0) 962 return -3; 963 if (val != 1) /* Unusual coprocessor ID? */ 964 (*info->fprintf_func) (info->stream, "(cpid=%d) ", val); 965 break; 966 967 case '4': 968 case '*': 969 case '~': 970 case '%': 971 case ';': 972 case '@': 973 case '!': 974 case '$': 975 case '?': 976 case '/': 977 case '&': 978 case '|': 979 case '<': 980 case '>': 981 case 'm': 982 case 'n': 983 case 'o': 984 case 'p': 985 case 'q': 986 case 'v': 987 case 'b': 988 case 'w': 989 case 'y': 990 case 'z': 991 if (place == 'd') 992 { 993 val = fetch_arg (buffer, 'x', 6, info); 994 if (val < 0) 995 return -3; 996 val = ((val & 7) << 3) + ((val >> 3) & 7); 997 } 998 else 999 { 1000 val = fetch_arg (buffer, 's', 6, info); 1001 if (val < 0) 1002 return -3; 1003 } 1004 1005 /* If the <ea> is invalid for *d, then reject this match. */ 1006 if (!m68k_valid_ea (*d, val)) 1007 return -1; 1008 1009 /* Get register number assuming address register. */ 1010 regno = (val & 7) + 8; 1011 regname = reg_names[regno]; 1012 switch (val >> 3) 1013 { 1014 case 0: 1015 (*info->fprintf_func) (info->stream, "%s", reg_names[val]); 1016 break; 1017 1018 case 1: 1019 (*info->fprintf_func) (info->stream, "%s", regname); 1020 break; 1021 1022 case 2: 1023 (*info->fprintf_func) (info->stream, "%s@", regname); 1024 break; 1025 1026 case 3: 1027 (*info->fprintf_func) (info->stream, "%s@+", regname); 1028 break; 1029 1030 case 4: 1031 (*info->fprintf_func) (info->stream, "%s@-", regname); 1032 break; 1033 1034 case 5: 1035 NEXTWORD (p, val, -3); 1036 (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val); 1037 break; 1038 1039 case 6: 1040 p = print_indexed (regno, p, addr, info); 1041 if (p == NULL) 1042 return -3; 1043 break; 1044 1045 case 7: 1046 switch (val & 7) 1047 { 1048 case 0: 1049 NEXTWORD (p, val, -3); 1050 (*info->print_address_func) (val, info); 1051 break; 1052 1053 case 1: 1054 NEXTULONG (p, uval); 1055 (*info->print_address_func) (uval, info); 1056 break; 1057 1058 case 2: 1059 NEXTWORD (p, val, -3); 1060 (*info->fprintf_func) (info->stream, "%%pc@("); 1061 (*info->print_address_func) (addr + val, info); 1062 (*info->fprintf_func) (info->stream, ")"); 1063 break; 1064 1065 case 3: 1066 p = print_indexed (-1, p, addr, info); 1067 if (p == NULL) 1068 return -3; 1069 break; 1070 1071 case 4: 1072 flt_p = 1; /* Assume it's a float... */ 1073 switch (place) 1074 { 1075 case 'b': 1076 NEXTBYTE (p, val); 1077 flt_p = 0; 1078 break; 1079 1080 case 'w': 1081 NEXTWORD (p, val, -3); 1082 flt_p = 0; 1083 break; 1084 1085 case 'l': 1086 NEXTLONG (p, val, -3); 1087 flt_p = 0; 1088 break; 1089 1090 case 'f': 1091 NEXTSINGLE (flval, p); 1092 break; 1093 1094 case 'F': 1095 NEXTDOUBLE (flval, p); 1096 break; 1097 1098 case 'x': 1099 NEXTEXTEND (flval, p); 1100 break; 1101 1102 case 'p': 1103 NEXTPACKED (p, flval); 1104 break; 1105 1106 default: 1107 return -1; 1108 } 1109 if (flt_p) /* Print a float? */ 1110 (*info->fprintf_func) (info->stream, "#0e%g", flval); 1111 else 1112 (*info->fprintf_func) (info->stream, "#%d", val); 1113 break; 1114 1115 default: 1116 return -1; 1117 } 1118 } 1119 1120 /* If place is '/', then this is the case of the mask bit for 1121 mac/emac loads. Now that the arg has been printed, grab the 1122 mask bit and if set, add a '&' to the arg. */ 1123 if (place == '/') 1124 { 1125 FETCH_ARG (1, val); 1126 if (val) 1127 info->fprintf_func (info->stream, "&"); 1128 } 1129 break; 1130 1131 case 'L': 1132 case 'l': 1133 if (place == 'w') 1134 { 1135 char doneany; 1136 p1 = buffer + 2; 1137 NEXTWORD (p1, val, -3); 1138 /* Move the pointer ahead if this point is farther ahead 1139 than the last. */ 1140 p = p1 > p ? p1 : p; 1141 if (val == 0) 1142 { 1143 (*info->fprintf_func) (info->stream, "#0"); 1144 break; 1145 } 1146 if (*d == 'l') 1147 { 1148 int newval = 0; 1149 1150 for (regno = 0; regno < 16; ++regno) 1151 if (val & (0x8000 >> regno)) 1152 newval |= 1 << regno; 1153 val = newval; 1154 } 1155 val &= 0xffff; 1156 doneany = 0; 1157 for (regno = 0; regno < 16; ++regno) 1158 if (val & (1 << regno)) 1159 { 1160 int first_regno; 1161 1162 if (doneany) 1163 (*info->fprintf_func) (info->stream, "/"); 1164 doneany = 1; 1165 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]); 1166 first_regno = regno; 1167 while (val & (1 << (regno + 1))) 1168 ++regno; 1169 if (regno > first_regno) 1170 (*info->fprintf_func) (info->stream, "-%s", 1171 reg_names[regno]); 1172 } 1173 } 1174 else if (place == '3') 1175 { 1176 /* `fmovem' insn. */ 1177 char doneany; 1178 1179 FETCH_ARG (8, val); 1180 if (val == 0) 1181 { 1182 (*info->fprintf_func) (info->stream, "#0"); 1183 break; 1184 } 1185 if (*d == 'l') 1186 { 1187 int newval = 0; 1188 1189 for (regno = 0; regno < 8; ++regno) 1190 if (val & (0x80 >> regno)) 1191 newval |= 1 << regno; 1192 val = newval; 1193 } 1194 val &= 0xff; 1195 doneany = 0; 1196 for (regno = 0; regno < 8; ++regno) 1197 if (val & (1 << regno)) 1198 { 1199 int first_regno; 1200 if (doneany) 1201 (*info->fprintf_func) (info->stream, "/"); 1202 doneany = 1; 1203 (*info->fprintf_func) (info->stream, "%%fp%d", regno); 1204 first_regno = regno; 1205 while (val & (1 << (regno + 1))) 1206 ++regno; 1207 if (regno > first_regno) 1208 (*info->fprintf_func) (info->stream, "-%%fp%d", regno); 1209 } 1210 } 1211 else if (place == '8') 1212 { 1213 FETCH_ARG (3, val); 1214 /* fmoveml for FP status registers. */ 1215 (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]); 1216 } 1217 else 1218 return -2; 1219 break; 1220 1221 case 'X': 1222 place = '8'; 1223 /* Fall through. */ 1224 case 'Y': 1225 case 'Z': 1226 case 'W': 1227 case '0': 1228 case '1': 1229 case '2': 1230 case '3': 1231 { 1232 char *name = 0; 1233 1234 FETCH_ARG (5, val); 1235 switch (val) 1236 { 1237 case 2: name = "%tt0"; break; 1238 case 3: name = "%tt1"; break; 1239 case 0x10: name = "%tc"; break; 1240 case 0x11: name = "%drp"; break; 1241 case 0x12: name = "%srp"; break; 1242 case 0x13: name = "%crp"; break; 1243 case 0x14: name = "%cal"; break; 1244 case 0x15: name = "%val"; break; 1245 case 0x16: name = "%scc"; break; 1246 case 0x17: name = "%ac"; break; 1247 case 0x18: name = "%psr"; break; 1248 case 0x19: name = "%pcsr"; break; 1249 case 0x1c: 1250 case 0x1d: 1251 { 1252 int break_reg = ((buffer[3] >> 2) & 7); 1253 1254 (*info->fprintf_func) 1255 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d", 1256 break_reg); 1257 } 1258 break; 1259 default: 1260 (*info->fprintf_func) (info->stream, "<mmu register %d>", val); 1261 } 1262 if (name) 1263 (*info->fprintf_func) (info->stream, "%s", name); 1264 } 1265 break; 1266 1267 case 'f': 1268 { 1269 int fc; 1270 1271 FETCH_ARG (5, fc); 1272 if (fc == 1) 1273 (*info->fprintf_func) (info->stream, "%%dfc"); 1274 else if (fc == 0) 1275 (*info->fprintf_func) (info->stream, "%%sfc"); 1276 else 1277 /* xgettext:c-format */ 1278 (*info->fprintf_func) (info->stream, _("<function code %d>"), fc); 1279 } 1280 break; 1281 1282 case 'V': 1283 (*info->fprintf_func) (info->stream, "%%val"); 1284 break; 1285 1286 case 't': 1287 { 1288 int level; 1289 1290 FETCH_ARG (3, level); 1291 (*info->fprintf_func) (info->stream, "%d", level); 1292 } 1293 break; 1294 1295 case 'u': 1296 { 1297 short is_upper = 0; 1298 int reg; 1299 1300 FETCH_ARG (5, reg); 1301 if (reg & 0x10) 1302 { 1303 is_upper = 1; 1304 reg &= 0xf; 1305 } 1306 (*info->fprintf_func) (info->stream, "%s%s", 1307 reg_half_names[reg], 1308 is_upper ? "u" : "l"); 1309 } 1310 break; 1311 1312 default: 1313 return -2; 1314 } 1315 1316 return p - p0; 1317} 1318 1319/* Try to match the current instruction to best and if so, return the 1320 number of bytes consumed from the instruction stream, else zero. */ 1321 1322static int 1323match_insn_m68k (bfd_vma memaddr, 1324 disassemble_info * info, 1325 const struct m68k_opcode * best) 1326{ 1327 unsigned char *save_p; 1328 unsigned char *p; 1329 const char *d; 1330 const char *args = best->args; 1331 1332 struct private *priv = (struct private *) info->private_data; 1333 bfd_byte *buffer = priv->the_buffer; 1334 fprintf_ftype save_printer = info->fprintf_func; 1335 void (* save_print_address) (bfd_vma, struct disassemble_info *) 1336 = info->print_address_func; 1337 1338 if (*args == '.') 1339 args++; 1340 1341 /* Point at first word of argument data, 1342 and at descriptor for first argument. */ 1343 p = buffer + 2; 1344 1345 /* Figure out how long the fixed-size portion of the instruction is. 1346 The only place this is stored in the opcode table is 1347 in the arguments--look for arguments which specify fields in the 2nd 1348 or 3rd words of the instruction. */ 1349 for (d = args; *d; d += 2) 1350 { 1351 /* I don't think it is necessary to be checking d[0] here; 1352 I suspect all this could be moved to the case statement below. */ 1353 if (d[0] == '#') 1354 { 1355 if (d[1] == 'l' && p - buffer < 6) 1356 p = buffer + 6; 1357 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8') 1358 p = buffer + 4; 1359 } 1360 1361 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4) 1362 p = buffer + 4; 1363 1364 switch (d[1]) 1365 { 1366 case '1': 1367 case '2': 1368 case '3': 1369 case '7': 1370 case '8': 1371 case '9': 1372 case 'i': 1373 if (p - buffer < 4) 1374 p = buffer + 4; 1375 break; 1376 case '4': 1377 case '5': 1378 case '6': 1379 if (p - buffer < 6) 1380 p = buffer + 6; 1381 break; 1382 default: 1383 break; 1384 } 1385 } 1386 1387 /* pflusha is an exceptions. It takes no arguments but is two words 1388 long. Recognize it by looking at the lower 16 bits of the mask. */ 1389 if (p - buffer < 4 && (best->match & 0xFFFF) != 0) 1390 p = buffer + 4; 1391 1392 /* lpstop is another exception. It takes a one word argument but is 1393 three words long. */ 1394 if (p - buffer < 6 1395 && (best->match & 0xffff) == 0xffff 1396 && args[0] == '#' 1397 && args[1] == 'w') 1398 { 1399 /* Copy the one word argument into the usual location for a one 1400 word argument, to simplify printing it. We can get away with 1401 this because we know exactly what the second word is, and we 1402 aren't going to print anything based on it. */ 1403 p = buffer + 6; 1404 FETCH_DATA (info, p); 1405 buffer[2] = buffer[4]; 1406 buffer[3] = buffer[5]; 1407 } 1408 1409 FETCH_DATA (info, p); 1410 1411 save_p = p; 1412 info->print_address_func = dummy_print_address; 1413 info->fprintf_func = (fprintf_ftype) dummy_printer; 1414 1415 /* We scan the operands twice. The first time we don't print anything, 1416 but look for errors. */ 1417 for (d = args; *d; d += 2) 1418 { 1419 int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info); 1420 1421 if (eaten >= 0) 1422 p += eaten; 1423 else if (eaten == -1 || eaten == -3) 1424 { 1425 info->fprintf_func = save_printer; 1426 info->print_address_func = save_print_address; 1427 return 0; 1428 } 1429 else 1430 { 1431 /* We must restore the print functions before trying to print the 1432 error message. */ 1433 info->fprintf_func = save_printer; 1434 info->print_address_func = save_print_address; 1435 info->fprintf_func (info->stream, 1436 /* xgettext:c-format */ 1437 _("<internal error in opcode table: %s %s>\n"), 1438 best->name, best->args); 1439 return 2; 1440 } 1441 } 1442 1443 p = save_p; 1444 info->fprintf_func = save_printer; 1445 info->print_address_func = save_print_address; 1446 1447 d = args; 1448 1449 info->fprintf_func (info->stream, "%s", best->name); 1450 1451 if (*d) 1452 info->fprintf_func (info->stream, " "); 1453 1454 while (*d) 1455 { 1456 p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info); 1457 d += 2; 1458 1459 if (*d && *(d - 2) != 'I' && *d != 'k') 1460 info->fprintf_func (info->stream, ","); 1461 } 1462 1463 return p - buffer; 1464} 1465 1466/* Try to interpret the instruction at address MEMADDR as one that 1467 can execute on a processor with the features given by ARCH_MASK. 1468 If successful, print the instruction to INFO->STREAM and return 1469 its length in bytes. Return 0 otherwise. */ 1470 1471static int 1472m68k_scan_mask (bfd_vma memaddr, disassemble_info *info, 1473 unsigned int arch_mask) 1474{ 1475 int i; 1476 const char *d; 1477 static const struct m68k_opcode **opcodes[16]; 1478 static int numopcodes[16]; 1479 int val; 1480 int major_opcode; 1481 1482 struct private *priv = (struct private *) info->private_data; 1483 bfd_byte *buffer = priv->the_buffer; 1484 1485 if (!opcodes[0]) 1486 { 1487 /* Speed up the matching by sorting the opcode 1488 table on the upper four bits of the opcode. */ 1489 const struct m68k_opcode **opc_pointer[16]; 1490 1491 /* First count how many opcodes are in each of the sixteen buckets. */ 1492 for (i = 0; i < m68k_numopcodes; i++) 1493 numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++; 1494 1495 /* Then create a sorted table of pointers 1496 that point into the unsorted table. */ 1497 opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *) 1498 * m68k_numopcodes); 1499 opcodes[0] = opc_pointer[0]; 1500 1501 for (i = 1; i < 16; i++) 1502 { 1503 opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1]; 1504 opcodes[i] = opc_pointer[i]; 1505 } 1506 1507 for (i = 0; i < m68k_numopcodes; i++) 1508 *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i]; 1509 } 1510 1511 FETCH_DATA (info, buffer + 2); 1512 major_opcode = (buffer[0] >> 4) & 15; 1513 1514 for (i = 0; i < numopcodes[major_opcode]; i++) 1515 { 1516 const struct m68k_opcode *opc = opcodes[major_opcode][i]; 1517 unsigned long opcode = opc->opcode; 1518 unsigned long match = opc->match; 1519 const char *args = opc->args; 1520 1521 if (*args == '.') 1522 args++; 1523 1524 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24))) 1525 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16))) 1526 /* Only fetch the next two bytes if we need to. */ 1527 && (((0xffff & match) == 0) 1528 || 1529 (FETCH_DATA (info, buffer + 4) 1530 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8))) 1531 && ((0xff & buffer[3] & match) == (0xff & opcode))) 1532 ) 1533 && (opc->arch & arch_mask) != 0) 1534 { 1535 /* Don't use for printout the variants of divul and divsl 1536 that have the same register number in two places. 1537 The more general variants will match instead. */ 1538 for (d = args; *d; d += 2) 1539 if (d[1] == 'D') 1540 break; 1541 1542 /* Don't use for printout the variants of most floating 1543 point coprocessor instructions which use the same 1544 register number in two places, as above. */ 1545 if (*d == '\0') 1546 for (d = args; *d; d += 2) 1547 if (d[1] == 't') 1548 break; 1549 1550 /* Don't match fmovel with more than one register; 1551 wait for fmoveml. */ 1552 if (*d == '\0') 1553 { 1554 for (d = args; *d; d += 2) 1555 { 1556 if (d[0] == 's' && d[1] == '8') 1557 { 1558 val = fetch_arg (buffer, d[1], 3, info); 1559 if (val < 0) 1560 return 0; 1561 if ((val & (val - 1)) != 0) 1562 break; 1563 } 1564 } 1565 } 1566 1567 /* Don't match FPU insns with non-default coprocessor ID. */ 1568 if (*d == '\0') 1569 { 1570 for (d = args; *d; d += 2) 1571 { 1572 if (d[0] == 'I') 1573 { 1574 val = fetch_arg (buffer, 'd', 3, info); 1575 if (val != 1) 1576 break; 1577 } 1578 } 1579 } 1580 1581 if (*d == '\0') 1582 if ((val = match_insn_m68k (memaddr, info, opc))) 1583 return val; 1584 } 1585 } 1586 return 0; 1587} 1588 1589/* Print the m68k instruction at address MEMADDR in debugged memory, 1590 on INFO->STREAM. Returns length of the instruction, in bytes. */ 1591 1592int 1593print_insn_m68k (bfd_vma memaddr, disassemble_info *info) 1594{ 1595 unsigned int arch_mask; 1596 struct private priv; 1597 int val; 1598 1599 bfd_byte *buffer = priv.the_buffer; 1600 1601 info->private_data = & priv; 1602 /* Tell objdump to use two bytes per chunk 1603 and six bytes per line for displaying raw data. */ 1604 info->bytes_per_chunk = 2; 1605 info->bytes_per_line = 6; 1606 info->display_endian = BFD_ENDIAN_BIG; 1607 priv.max_fetched = priv.the_buffer; 1608 priv.insn_start = memaddr; 1609 1610 arch_mask = bfd_m68k_mach_to_features (info->mach); 1611 if (!arch_mask) 1612 { 1613 /* First try printing an m680x0 instruction. Try printing a Coldfire 1614 one if that fails. */ 1615 val = m68k_scan_mask (memaddr, info, m68k_mask); 1616 if (val == 0) 1617 val = m68k_scan_mask (memaddr, info, mcf_mask); 1618 } 1619 else 1620 { 1621 val = m68k_scan_mask (memaddr, info, arch_mask); 1622 } 1623 1624 if (val == 0) 1625 /* Handle undefined instructions. */ 1626 info->fprintf_func (info->stream, ".short 0x%04x", (buffer[0] << 8) + buffer[1]); 1627 1628 return val ? val : 2; 1629} 1630