1/* Assembler interface for targets using CGEN. -*- C -*- 2 CGEN: Cpu tools GENerator 3 4 THIS FILE IS MACHINE GENERATED WITH CGEN. 5 - the resultant file is machine generated, cgen-asm.in isn't 6 7 Copyright (C) 1996-2017 Free Software Foundation, Inc. 8 9 This file is part of libopcodes. 10 11 This library is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 3, or (at your option) 14 any later version. 15 16 It is distributed in the hope that it will be useful, but WITHOUT 17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with this program; if not, write to the Free Software Foundation, Inc., 23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 24 25 26/* ??? Eventually more and more of this stuff can go to cpu-independent files. 27 Keep that in mind. */ 28 29#include "sysdep.h" 30#include <stdio.h> 31#include "ansidecl.h" 32#include "bfd.h" 33#include "symcat.h" 34#include "m32c-desc.h" 35#include "m32c-opc.h" 36#include "opintl.h" 37#include "xregex.h" 38#include "libiberty.h" 39#include "safe-ctype.h" 40 41#undef min 42#define min(a,b) ((a) < (b) ? (a) : (b)) 43#undef max 44#define max(a,b) ((a) > (b) ? (a) : (b)) 45 46static const char * parse_insn_normal 47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); 48 49/* -- assembler routines inserted here. */ 50 51/* -- asm.c */ 52#include "safe-ctype.h" 53 54#define MACH_M32C 5 /* Must match md_begin. */ 55 56static int 57m32c_cgen_isa_register (const char **strp) 58 { 59 int u; 60 const char *s = *strp; 61 static char * m32c_register_names [] = 62 { 63 "r0", "r1", "r2", "r3", "r0l", "r0h", "r1l", "r1h", 64 "a0", "a1", "r2r0", "r3r1", "sp", "fb", "dct0", "dct1", "flg", "svf", 65 "drc0", "drc1", "dmd0", "dmd1", "intb", "svp", "vct", "isp", "dma0", 66 "dma1", "dra0", "dra1", "dsa0", "dsa1", 0 67 }; 68 69 for (u = 0; m32c_register_names[u]; u++) 70 { 71 int len = strlen (m32c_register_names[u]); 72 73 if (memcmp (m32c_register_names[u], s, len) == 0 74 && (s[len] == 0 || ! ISALNUM (s[len]))) 75 return 1; 76 } 77 return 0; 78} 79 80#define PARSE_UNSIGNED \ 81 do \ 82 { \ 83 /* Don't successfully parse literals beginning with '['. */ \ 84 if (**strp == '[') \ 85 return "Invalid literal"; /* Anything -- will not be seen. */ \ 86 \ 87 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value);\ 88 if (errmsg) \ 89 return errmsg; \ 90 } \ 91 while (0) 92 93#define PARSE_SIGNED \ 94 do \ 95 { \ 96 /* Don't successfully parse literals beginning with '['. */ \ 97 if (**strp == '[') \ 98 return "Invalid literal"; /* Anything -- will not be seen. */ \ 99 \ 100 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); \ 101 if (errmsg) \ 102 return errmsg; \ 103 } \ 104 while (0) 105 106static const char * 107parse_unsigned6 (CGEN_CPU_DESC cd, const char **strp, 108 int opindex, unsigned long *valuep) 109{ 110 const char *errmsg = 0; 111 unsigned long value; 112 113 PARSE_UNSIGNED; 114 115 if (value > 0x3f) 116 return _("imm:6 immediate is out of range"); 117 118 *valuep = value; 119 return 0; 120} 121 122static const char * 123parse_unsigned8 (CGEN_CPU_DESC cd, const char **strp, 124 int opindex, unsigned long *valuep) 125{ 126 const char *errmsg = 0; 127 unsigned long value = 0; 128 long have_zero = 0; 129 130 if (strncasecmp (*strp, "%dsp8(", 6) == 0) 131 { 132 enum cgen_parse_operand_result result_type; 133 bfd_vma val; 134 135 *strp += 6; 136 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_8, 137 & result_type, & val); 138 if (**strp != ')') 139 return _("missing `)'"); 140 (*strp) ++; 141 142 if (errmsg == NULL 143 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 144 return _("%dsp8() takes a symbolic address, not a number"); 145 146 value = val; 147 *valuep = value; 148 return errmsg; 149 } 150 151 if (strncmp (*strp, "0x0", 3) == 0 152 || (**strp == '0' && *(*strp + 1) != 'x')) 153 have_zero = 1; 154 155 PARSE_UNSIGNED; 156 157 if (value > 0xff) 158 return _("dsp:8 immediate is out of range"); 159 160 /* If this field may require a relocation then use larger dsp16. */ 161 if (! have_zero && value == 0) 162 return _("dsp:8 immediate is out of range"); 163 164 *valuep = value; 165 return 0; 166} 167 168static const char * 169parse_signed4 (CGEN_CPU_DESC cd, const char **strp, 170 int opindex, signed long *valuep) 171{ 172 const char *errmsg = 0; 173 signed long value; 174 long have_zero = 0; 175 176 if (strncmp (*strp, "0x0", 3) == 0 177 || (**strp == '0' && *(*strp + 1) != 'x')) 178 have_zero = 1; 179 180 PARSE_SIGNED; 181 182 if (value < -8 || value > 7) 183 return _("Immediate is out of range -8 to 7"); 184 185 /* If this field may require a relocation then use larger dsp16. */ 186 if (! have_zero && value == 0) 187 return _("Immediate is out of range -8 to 7"); 188 189 *valuep = value; 190 return 0; 191} 192 193static const char * 194parse_signed4n (CGEN_CPU_DESC cd, const char **strp, 195 int opindex, signed long *valuep) 196{ 197 const char *errmsg = 0; 198 signed long value; 199 long have_zero = 0; 200 201 if (strncmp (*strp, "0x0", 3) == 0 202 || (**strp == '0' && *(*strp + 1) != 'x')) 203 have_zero = 1; 204 205 PARSE_SIGNED; 206 207 if (value < -7 || value > 8) 208 return _("Immediate is out of range -7 to 8"); 209 210 /* If this field may require a relocation then use larger dsp16. */ 211 if (! have_zero && value == 0) 212 return _("Immediate is out of range -7 to 8"); 213 214 *valuep = -value; 215 return 0; 216} 217 218static const char * 219parse_signed8 (CGEN_CPU_DESC cd, const char **strp, 220 int opindex, signed long *valuep) 221{ 222 const char *errmsg = 0; 223 signed long value = 0; 224 225 if (strncasecmp (*strp, "%hi8(", 5) == 0) 226 { 227 enum cgen_parse_operand_result result_type; 228 bfd_vma val; 229 230 *strp += 5; 231 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32C_HI8, 232 & result_type, & val); 233 if (**strp != ')') 234 return _("missing `)'"); 235 (*strp) ++; 236 237 if (errmsg == NULL 238 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 239 val >>= 16; 240 241 value = val; 242 *valuep = value; 243 return errmsg; 244 } 245 246 PARSE_SIGNED; 247 248 if (value <= 255 && value > 127) 249 value -= 0x100; 250 251 if (value < -128 || value > 127) 252 return _("dsp:8 immediate is out of range"); 253 254 *valuep = value; 255 return 0; 256} 257 258static const char * 259parse_unsigned16 (CGEN_CPU_DESC cd, const char **strp, 260 int opindex, unsigned long *valuep) 261{ 262 const char *errmsg = 0; 263 unsigned long value = 0; 264 long have_zero = 0; 265 266 if (strncasecmp (*strp, "%dsp16(", 7) == 0) 267 { 268 enum cgen_parse_operand_result result_type; 269 bfd_vma val; 270 271 *strp += 7; 272 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_16, 273 & result_type, & val); 274 if (**strp != ')') 275 return _("missing `)'"); 276 (*strp) ++; 277 278 if (errmsg == NULL 279 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 280 return _("%dsp16() takes a symbolic address, not a number"); 281 282 value = val; 283 *valuep = value; 284 return errmsg; 285 } 286 287 /* Don't successfully parse literals beginning with '['. */ 288 if (**strp == '[') 289 return "Invalid literal"; /* Anything -- will not be seen. */ 290 291 /* Don't successfully parse register names. */ 292 if (m32c_cgen_isa_register (strp)) 293 return "Invalid literal"; /* Anything -- will not be seen. */ 294 295 if (strncmp (*strp, "0x0", 3) == 0 296 || (**strp == '0' && *(*strp + 1) != 'x')) 297 have_zero = 1; 298 299 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 300 if (errmsg) 301 return errmsg; 302 303 if (value > 0xffff) 304 return _("dsp:16 immediate is out of range"); 305 306 /* If this field may require a relocation then use larger dsp24. */ 307 if (cd->machs == MACH_M32C && ! have_zero && value == 0 308 && (strncmp (*strp, "[a", 2) == 0 309 || **strp == ',' 310 || **strp == 0)) 311 return _("dsp:16 immediate is out of range"); 312 313 *valuep = value; 314 return 0; 315} 316 317static const char * 318parse_signed16 (CGEN_CPU_DESC cd, const char **strp, 319 int opindex, signed long *valuep) 320{ 321 const char *errmsg = 0; 322 signed long value = 0; 323 324 if (strncasecmp (*strp, "%lo16(", 6) == 0) 325 { 326 enum cgen_parse_operand_result result_type; 327 bfd_vma val; 328 329 *strp += 6; 330 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, 331 & result_type, & val); 332 if (**strp != ')') 333 return _("missing `)'"); 334 (*strp) ++; 335 336 if (errmsg == NULL 337 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 338 val &= 0xffff; 339 340 value = val; 341 *valuep = value; 342 return errmsg; 343 } 344 345 if (strncasecmp (*strp, "%hi16(", 6) == 0) 346 { 347 enum cgen_parse_operand_result result_type; 348 bfd_vma val; 349 350 *strp += 6; 351 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, 352 & result_type, & val); 353 if (**strp != ')') 354 return _("missing `)'"); 355 (*strp) ++; 356 357 if (errmsg == NULL 358 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) 359 val >>= 16; 360 361 value = val; 362 *valuep = value; 363 return errmsg; 364 } 365 366 PARSE_SIGNED; 367 368 if (value <= 65535 && value > 32767) 369 value -= 0x10000; 370 371 if (value < -32768 || value > 32767) 372 return _("dsp:16 immediate is out of range"); 373 374 *valuep = value; 375 return 0; 376} 377 378static const char * 379parse_unsigned20 (CGEN_CPU_DESC cd, const char **strp, 380 int opindex, unsigned long *valuep) 381{ 382 const char *errmsg = 0; 383 unsigned long value; 384 385 /* Don't successfully parse literals beginning with '['. */ 386 if (**strp == '[') 387 return "Invalid literal"; /* Anything -- will not be seen. */ 388 389 /* Don't successfully parse register names. */ 390 if (m32c_cgen_isa_register (strp)) 391 return "Invalid literal"; /* Anything -- will not be seen. */ 392 393 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 394 if (errmsg) 395 return errmsg; 396 397 if (value > 0xfffff) 398 return _("dsp:20 immediate is out of range"); 399 400 *valuep = value; 401 return 0; 402} 403 404static const char * 405parse_unsigned24 (CGEN_CPU_DESC cd, const char **strp, 406 int opindex, unsigned long *valuep) 407{ 408 const char *errmsg = 0; 409 unsigned long value; 410 411 /* Don't successfully parse literals beginning with '['. */ 412 if (**strp == '[') 413 return "Invalid literal"; /* Anything -- will not be seen. */ 414 415 /* Don't successfully parse register names. */ 416 if (m32c_cgen_isa_register (strp)) 417 return "Invalid literal"; /* Anything -- will not be seen. */ 418 419 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 420 if (errmsg) 421 return errmsg; 422 423 if (value > 0xffffff) 424 return _("dsp:24 immediate is out of range"); 425 426 *valuep = value; 427 return 0; 428} 429 430/* This should only be used for #imm->reg. */ 431static const char * 432parse_signed24 (CGEN_CPU_DESC cd, const char **strp, 433 int opindex, signed long *valuep) 434{ 435 const char *errmsg = 0; 436 signed long value; 437 438 PARSE_SIGNED; 439 440 if (value <= 0xffffff && value > 0x7fffff) 441 value -= 0x1000000; 442 443 if (value > 0xffffff) 444 return _("dsp:24 immediate is out of range"); 445 446 *valuep = value; 447 return 0; 448} 449 450static const char * 451parse_signed32 (CGEN_CPU_DESC cd, const char **strp, 452 int opindex, signed long *valuep) 453{ 454 const char *errmsg = 0; 455 signed long value; 456 457 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 458 if (errmsg) 459 return errmsg; 460 461 *valuep = value; 462 return 0; 463} 464 465static const char * 466parse_imm1_S (CGEN_CPU_DESC cd, const char **strp, 467 int opindex, signed long *valuep) 468{ 469 const char *errmsg = 0; 470 signed long value; 471 472 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 473 if (errmsg) 474 return errmsg; 475 476 if (value < 1 || value > 2) 477 return _("immediate is out of range 1-2"); 478 479 *valuep = value; 480 return 0; 481} 482 483static const char * 484parse_imm3_S (CGEN_CPU_DESC cd, const char **strp, 485 int opindex, signed long *valuep) 486{ 487 const char *errmsg = 0; 488 signed long value; 489 490 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 491 if (errmsg) 492 return errmsg; 493 494 if (value < 1 || value > 8) 495 return _("immediate is out of range 1-8"); 496 497 *valuep = value; 498 return 0; 499} 500 501static const char * 502parse_bit3_S (CGEN_CPU_DESC cd, const char **strp, 503 int opindex, signed long *valuep) 504{ 505 const char *errmsg = 0; 506 signed long value; 507 508 errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); 509 if (errmsg) 510 return errmsg; 511 512 if (value < 0 || value > 7) 513 return _("immediate is out of range 0-7"); 514 515 *valuep = value; 516 return 0; 517} 518 519static const char * 520parse_lab_5_3 (CGEN_CPU_DESC cd, 521 const char **strp, 522 int opindex ATTRIBUTE_UNUSED, 523 int opinfo, 524 enum cgen_parse_operand_result *type_addr, 525 bfd_vma *valuep) 526{ 527 const char *errmsg = 0; 528 bfd_vma value; 529 enum cgen_parse_operand_result op_res; 530 531 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_5_3, 532 opinfo, & op_res, & value); 533 534 if (type_addr) 535 *type_addr = op_res; 536 537 if (op_res == CGEN_PARSE_OPERAND_RESULT_QUEUED) 538 { 539 /* This is a hack; the field cannot handle near-zero signed 540 offsets that CGEN wants to put in to indicate an "empty" 541 operand at first. */ 542 *valuep = 2; 543 return 0; 544 } 545 if (errmsg) 546 return errmsg; 547 548 if (value < 2 || value > 9) 549 return _("immediate is out of range 2-9"); 550 551 *valuep = value; 552 return 0; 553} 554 555static const char * 556parse_Bitno16R (CGEN_CPU_DESC cd, const char **strp, 557 int opindex, unsigned long *valuep) 558{ 559 const char *errmsg = 0; 560 unsigned long value; 561 562 errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, & value); 563 if (errmsg) 564 return errmsg; 565 566 if (value > 15) 567 return _("Bit number for indexing general register is out of range 0-15"); 568 569 *valuep = value; 570 return 0; 571} 572 573static const char * 574parse_unsigned_bitbase (CGEN_CPU_DESC cd, const char **strp, 575 int opindex, unsigned long *valuep, 576 unsigned bits, int allow_syms) 577{ 578 const char *errmsg = 0; 579 unsigned long bit; 580 unsigned long base; 581 const char *newp = *strp; 582 unsigned long long bitbase; 583 long have_zero = 0; 584 585 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit); 586 if (errmsg) 587 return errmsg; 588 589 if (*newp != ',') 590 return "Missing base for bit,base:8"; 591 592 ++newp; 593 594 if (strncmp (newp, "0x0", 3) == 0 595 || (newp[0] == '0' && newp[1] != 'x')) 596 have_zero = 1; 597 598 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & base); 599 if (errmsg) 600 return errmsg; 601 602 bitbase = (unsigned long long) bit + ((unsigned long long) base * 8); 603 604 if (bitbase >= (1ull << bits)) 605 return _("bit,base is out of range"); 606 607 /* If this field may require a relocation then use larger displacement. */ 608 if (! have_zero && base == 0) 609 { 610 switch (allow_syms) { 611 case 0: 612 return _("bit,base out of range for symbol"); 613 case 1: 614 break; 615 case 2: 616 if (strncmp (newp, "[sb]", 4) != 0) 617 return _("bit,base out of range for symbol"); 618 break; 619 } 620 } 621 622 *valuep = bitbase; 623 *strp = newp; 624 return 0; 625} 626 627static const char * 628parse_signed_bitbase (CGEN_CPU_DESC cd, const char **strp, 629 int opindex, signed long *valuep, 630 unsigned bits, int allow_syms) 631{ 632 const char *errmsg = 0; 633 unsigned long bit; 634 signed long base; 635 const char *newp = *strp; 636 long long bitbase; 637 long long limit; 638 long have_zero = 0; 639 640 errmsg = cgen_parse_unsigned_integer (cd, & newp, opindex, & bit); 641 if (errmsg) 642 return errmsg; 643 644 if (*newp != ',') 645 return "Missing base for bit,base:8"; 646 647 ++newp; 648 649 if (strncmp (newp, "0x0", 3) == 0 650 || (newp[0] == '0' && newp[1] != 'x')) 651 have_zero = 1; 652 653 errmsg = cgen_parse_signed_integer (cd, & newp, opindex, & base); 654 if (errmsg) 655 return errmsg; 656 657 bitbase = (long long)bit + ((long long)base * 8); 658 659 limit = 1ll << (bits - 1); 660 if (bitbase < -limit || bitbase >= limit) 661 return _("bit,base is out of range"); 662 663 /* If this field may require a relocation then use larger displacement. */ 664 if (! have_zero && base == 0 && ! allow_syms) 665 return _("bit,base out of range for symbol"); 666 667 *valuep = bitbase; 668 *strp = newp; 669 return 0; 670} 671 672static const char * 673parse_unsigned_bitbase8 (CGEN_CPU_DESC cd, const char **strp, 674 int opindex, unsigned long *valuep) 675{ 676 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 8, 0); 677} 678 679static const char * 680parse_unsigned_bitbase11 (CGEN_CPU_DESC cd, const char **strp, 681 int opindex, unsigned long *valuep) 682{ 683 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 11, 0); 684} 685 686static const char * 687parse_unsigned_bitbase16 (CGEN_CPU_DESC cd, const char **strp, 688 int opindex, unsigned long *valuep) 689{ 690 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 16, 1); 691} 692 693static const char * 694parse_unsigned_bitbase19 (CGEN_CPU_DESC cd, const char **strp, 695 int opindex, unsigned long *valuep) 696{ 697 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 19, 2); 698} 699 700static const char * 701parse_unsigned_bitbase27 (CGEN_CPU_DESC cd, const char **strp, 702 int opindex, unsigned long *valuep) 703{ 704 return parse_unsigned_bitbase (cd, strp, opindex, valuep, 27, 1); 705} 706 707static const char * 708parse_signed_bitbase8 (CGEN_CPU_DESC cd, const char **strp, 709 int opindex, signed long *valuep) 710{ 711 return parse_signed_bitbase (cd, strp, opindex, valuep, 8, 1); 712} 713 714static const char * 715parse_signed_bitbase11 (CGEN_CPU_DESC cd, const char **strp, 716 int opindex, signed long *valuep) 717{ 718 return parse_signed_bitbase (cd, strp, opindex, valuep, 11, 0); 719} 720 721static const char * 722parse_signed_bitbase19 (CGEN_CPU_DESC cd, const char **strp, 723 int opindex, signed long *valuep) 724{ 725 return parse_signed_bitbase (cd, strp, opindex, valuep, 19, 1); 726} 727 728/* Parse the suffix as :<char> or as nothing followed by a whitespace. */ 729 730static const char * 731parse_suffix (const char **strp, char suffix) 732{ 733 const char *newp = *strp; 734 735 if (**strp == ':' && TOLOWER (*(*strp + 1)) == suffix) 736 newp = *strp + 2; 737 738 if (ISSPACE (*newp)) 739 { 740 *strp = newp; 741 return 0; 742 } 743 744 return "Invalid suffix"; /* Anything -- will not be seen. */ 745} 746 747static const char * 748parse_S (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 749 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 750{ 751 return parse_suffix (strp, 's'); 752} 753 754static const char * 755parse_G (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 756 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 757{ 758 return parse_suffix (strp, 'g'); 759} 760 761static const char * 762parse_Q (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 763 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 764{ 765 return parse_suffix (strp, 'q'); 766} 767 768static const char * 769parse_Z (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 770 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 771{ 772 return parse_suffix (strp, 'z'); 773} 774 775/* Parse an empty suffix. Fail if the next char is ':'. */ 776 777static const char * 778parse_X (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 779 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 780{ 781 if (**strp == ':') 782 return "Unexpected suffix"; 783 return 0; 784} 785 786static const char * 787parse_r0l_r0h (CGEN_CPU_DESC cd, const char **strp, 788 int opindex ATTRIBUTE_UNUSED, signed long *valuep) 789{ 790 const char *errmsg; 791 signed long value; 792 signed long junk; 793 const char *newp = *strp; 794 795 /* Parse r0[hl]. */ 796 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l_r0h, & value); 797 if (errmsg) 798 return errmsg; 799 800 if (*newp != ',') 801 return _("not a valid r0l/r0h pair"); 802 ++newp; 803 804 /* Parse the second register in the pair. */ 805 if (value == 0) /* r0l */ 806 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0h, & junk); 807 else 808 errmsg = cgen_parse_keyword (cd, & newp, & m32c_cgen_opval_h_r0l, & junk); 809 if (errmsg) 810 return errmsg; 811 812 *strp = newp; 813 *valuep = ! value; 814 return 0; 815} 816 817/* Accept .b or .w in any case. */ 818 819static const char * 820parse_size (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, const char **strp, 821 int opindex ATTRIBUTE_UNUSED, signed long *valuep ATTRIBUTE_UNUSED) 822{ 823 if (**strp == '.' 824 && (*(*strp + 1) == 'b' || *(*strp + 1) == 'B' 825 || *(*strp + 1) == 'w' || *(*strp + 1) == 'W')) 826 { 827 *strp += 2; 828 return NULL; 829 } 830 831 return _("Invalid size specifier"); 832} 833 834/* Special check to ensure that instruction exists for given machine. */ 835 836int 837m32c_cgen_insn_supported (CGEN_CPU_DESC cd, 838 const CGEN_INSN *insn) 839{ 840 int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH); 841 CGEN_BITSET isas = CGEN_INSN_BITSET_ATTR_VALUE (insn, CGEN_INSN_ISA); 842 843 /* If attributes are absent, assume no restriction. */ 844 if (machs == 0) 845 machs = ~0; 846 847 return ((machs & cd->machs) 848 && cgen_bitset_intersect_p (& isas, cd->isas)); 849} 850 851/* Parse a set of registers, R0,R1,A0,A1,SB,FB. */ 852 853static const char * 854parse_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 855 const char **strp, 856 int opindex ATTRIBUTE_UNUSED, 857 unsigned long *valuep, 858 int push) 859{ 860 const char *errmsg = 0; 861 int regno = 0; 862 863 *valuep = 0; 864 while (**strp && **strp != ')') 865 { 866 if (**strp == 'r' || **strp == 'R') 867 { 868 ++*strp; 869 regno = **strp - '0'; 870 if (regno > 4) 871 errmsg = _("Register number is not valid"); 872 } 873 else if (**strp == 'a' || **strp == 'A') 874 { 875 ++*strp; 876 regno = **strp - '0'; 877 if (regno > 2) 878 errmsg = _("Register number is not valid"); 879 regno = **strp - '0' + 4; 880 } 881 882 else if (strncasecmp (*strp, "sb", 2) == 0 || strncasecmp (*strp, "SB", 2) == 0) 883 { 884 regno = 6; 885 ++*strp; 886 } 887 888 else if (strncasecmp (*strp, "fb", 2) == 0 || strncasecmp (*strp, "FB", 2) == 0) 889 { 890 regno = 7; 891 ++*strp; 892 } 893 894 if (push) /* Mask is reversed for push. */ 895 *valuep |= 0x80 >> regno; 896 else 897 *valuep |= 1 << regno; 898 899 ++*strp; 900 if (**strp == ',') 901 { 902 if (*(*strp + 1) == ')') 903 break; 904 ++*strp; 905 } 906 } 907 908 if (!*strp) 909 errmsg = _("Register list is not valid"); 910 911 return errmsg; 912} 913 914#define POP 0 915#define PUSH 1 916 917static const char * 918parse_pop_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 919 const char **strp, 920 int opindex ATTRIBUTE_UNUSED, 921 unsigned long *valuep) 922{ 923 return parse_regset (cd, strp, opindex, valuep, POP); 924} 925 926static const char * 927parse_push_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 928 const char **strp, 929 int opindex ATTRIBUTE_UNUSED, 930 unsigned long *valuep) 931{ 932 return parse_regset (cd, strp, opindex, valuep, PUSH); 933} 934 935/* -- dis.c */ 936 937const char * m32c_cgen_parse_operand 938 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *); 939 940/* Main entry point for operand parsing. 941 942 This function is basically just a big switch statement. Earlier versions 943 used tables to look up the function to use, but 944 - if the table contains both assembler and disassembler functions then 945 the disassembler contains much of the assembler and vice-versa, 946 - there's a lot of inlining possibilities as things grow, 947 - using a switch statement avoids the function call overhead. 948 949 This function could be moved into `parse_insn_normal', but keeping it 950 separate makes clear the interface between `parse_insn_normal' and each of 951 the handlers. */ 952 953const char * 954m32c_cgen_parse_operand (CGEN_CPU_DESC cd, 955 int opindex, 956 const char ** strp, 957 CGEN_FIELDS * fields) 958{ 959 const char * errmsg = NULL; 960 /* Used by scalar operands that still need to be parsed. */ 961 long junk ATTRIBUTE_UNUSED; 962 963 switch (opindex) 964 { 965 case M32C_OPERAND_A0 : 966 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a0, & junk); 967 break; 968 case M32C_OPERAND_A1 : 969 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_a1, & junk); 970 break; 971 case M32C_OPERAND_AN16_PUSH_S : 972 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_4_1); 973 break; 974 case M32C_OPERAND_BIT16AN : 975 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an); 976 break; 977 case M32C_OPERAND_BIT16RN : 978 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn); 979 break; 980 case M32C_OPERAND_BIT3_S : 981 errmsg = parse_bit3_S (cd, strp, M32C_OPERAND_BIT3_S, (long *) (& fields->f_imm3_S)); 982 break; 983 case M32C_OPERAND_BIT32ANPREFIXED : 984 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 985 break; 986 case M32C_OPERAND_BIT32ANUNPREFIXED : 987 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 988 break; 989 case M32C_OPERAND_BIT32RNPREFIXED : 990 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI); 991 break; 992 case M32C_OPERAND_BIT32RNUNPREFIXED : 993 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI); 994 break; 995 case M32C_OPERAND_BITBASE16_16_S8 : 996 errmsg = parse_signed_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_S8, (long *) (& fields->f_dsp_16_s8)); 997 break; 998 case M32C_OPERAND_BITBASE16_16_U16 : 999 errmsg = parse_unsigned_bitbase16 (cd, strp, M32C_OPERAND_BITBASE16_16_U16, (unsigned long *) (& fields->f_dsp_16_u16)); 1000 break; 1001 case M32C_OPERAND_BITBASE16_16_U8 : 1002 errmsg = parse_unsigned_bitbase8 (cd, strp, M32C_OPERAND_BITBASE16_16_U8, (unsigned long *) (& fields->f_dsp_16_u8)); 1003 break; 1004 case M32C_OPERAND_BITBASE16_8_U11_S : 1005 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE16_8_U11_S, (unsigned long *) (& fields->f_bitbase16_u11_S)); 1006 break; 1007 case M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED : 1008 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_S11_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s11_unprefixed)); 1009 break; 1010 case M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED : 1011 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_S19_UNPREFIXED, (long *) (& fields->f_bitbase32_16_s19_unprefixed)); 1012 break; 1013 case M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED : 1014 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_16_U11_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u11_unprefixed)); 1015 break; 1016 case M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED : 1017 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_16_U19_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u19_unprefixed)); 1018 break; 1019 case M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED : 1020 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_16_U27_UNPREFIXED, (unsigned long *) (& fields->f_bitbase32_16_u27_unprefixed)); 1021 break; 1022 case M32C_OPERAND_BITBASE32_24_S11_PREFIXED : 1023 errmsg = parse_signed_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_S11_PREFIXED, (long *) (& fields->f_bitbase32_24_s11_prefixed)); 1024 break; 1025 case M32C_OPERAND_BITBASE32_24_S19_PREFIXED : 1026 errmsg = parse_signed_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_S19_PREFIXED, (long *) (& fields->f_bitbase32_24_s19_prefixed)); 1027 break; 1028 case M32C_OPERAND_BITBASE32_24_U11_PREFIXED : 1029 errmsg = parse_unsigned_bitbase11 (cd, strp, M32C_OPERAND_BITBASE32_24_U11_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u11_prefixed)); 1030 break; 1031 case M32C_OPERAND_BITBASE32_24_U19_PREFIXED : 1032 errmsg = parse_unsigned_bitbase19 (cd, strp, M32C_OPERAND_BITBASE32_24_U19_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u19_prefixed)); 1033 break; 1034 case M32C_OPERAND_BITBASE32_24_U27_PREFIXED : 1035 errmsg = parse_unsigned_bitbase27 (cd, strp, M32C_OPERAND_BITBASE32_24_U27_PREFIXED, (unsigned long *) (& fields->f_bitbase32_24_u27_prefixed)); 1036 break; 1037 case M32C_OPERAND_BITNO16R : 1038 errmsg = parse_Bitno16R (cd, strp, M32C_OPERAND_BITNO16R, (unsigned long *) (& fields->f_dsp_16_u8)); 1039 break; 1040 case M32C_OPERAND_BITNO32PREFIXED : 1041 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32PREFIXED, (unsigned long *) (& fields->f_bitno32_prefixed)); 1042 break; 1043 case M32C_OPERAND_BITNO32UNPREFIXED : 1044 errmsg = cgen_parse_unsigned_integer (cd, strp, M32C_OPERAND_BITNO32UNPREFIXED, (unsigned long *) (& fields->f_bitno32_unprefixed)); 1045 break; 1046 case M32C_OPERAND_DSP_10_U6 : 1047 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_10_U6, (unsigned long *) (& fields->f_dsp_10_u6)); 1048 break; 1049 case M32C_OPERAND_DSP_16_S16 : 1050 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_16_S16, (long *) (& fields->f_dsp_16_s16)); 1051 break; 1052 case M32C_OPERAND_DSP_16_S8 : 1053 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_16_S8, (long *) (& fields->f_dsp_16_s8)); 1054 break; 1055 case M32C_OPERAND_DSP_16_U16 : 1056 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_16_U16, (unsigned long *) (& fields->f_dsp_16_u16)); 1057 break; 1058 case M32C_OPERAND_DSP_16_U20 : 1059 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_16_U20, (unsigned long *) (& fields->f_dsp_16_u24)); 1060 break; 1061 case M32C_OPERAND_DSP_16_U24 : 1062 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_16_U24, (unsigned long *) (& fields->f_dsp_16_u24)); 1063 break; 1064 case M32C_OPERAND_DSP_16_U8 : 1065 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_16_U8, (unsigned long *) (& fields->f_dsp_16_u8)); 1066 break; 1067 case M32C_OPERAND_DSP_24_S16 : 1068 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_24_S16, (long *) (& fields->f_dsp_24_s16)); 1069 break; 1070 case M32C_OPERAND_DSP_24_S8 : 1071 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_24_S8, (long *) (& fields->f_dsp_24_s8)); 1072 break; 1073 case M32C_OPERAND_DSP_24_U16 : 1074 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_24_U16, (unsigned long *) (& fields->f_dsp_24_u16)); 1075 break; 1076 case M32C_OPERAND_DSP_24_U20 : 1077 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_24_U20, (unsigned long *) (& fields->f_dsp_24_u24)); 1078 break; 1079 case M32C_OPERAND_DSP_24_U24 : 1080 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_24_U24, (unsigned long *) (& fields->f_dsp_24_u24)); 1081 break; 1082 case M32C_OPERAND_DSP_24_U8 : 1083 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_24_U8, (unsigned long *) (& fields->f_dsp_24_u8)); 1084 break; 1085 case M32C_OPERAND_DSP_32_S16 : 1086 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_32_S16, (long *) (& fields->f_dsp_32_s16)); 1087 break; 1088 case M32C_OPERAND_DSP_32_S8 : 1089 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_32_S8, (long *) (& fields->f_dsp_32_s8)); 1090 break; 1091 case M32C_OPERAND_DSP_32_U16 : 1092 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_32_U16, (unsigned long *) (& fields->f_dsp_32_u16)); 1093 break; 1094 case M32C_OPERAND_DSP_32_U20 : 1095 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_32_U20, (unsigned long *) (& fields->f_dsp_32_u24)); 1096 break; 1097 case M32C_OPERAND_DSP_32_U24 : 1098 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_32_U24, (unsigned long *) (& fields->f_dsp_32_u24)); 1099 break; 1100 case M32C_OPERAND_DSP_32_U8 : 1101 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_32_U8, (unsigned long *) (& fields->f_dsp_32_u8)); 1102 break; 1103 case M32C_OPERAND_DSP_40_S16 : 1104 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_40_S16, (long *) (& fields->f_dsp_40_s16)); 1105 break; 1106 case M32C_OPERAND_DSP_40_S8 : 1107 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_40_S8, (long *) (& fields->f_dsp_40_s8)); 1108 break; 1109 case M32C_OPERAND_DSP_40_U16 : 1110 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_40_U16, (unsigned long *) (& fields->f_dsp_40_u16)); 1111 break; 1112 case M32C_OPERAND_DSP_40_U20 : 1113 errmsg = parse_unsigned20 (cd, strp, M32C_OPERAND_DSP_40_U20, (unsigned long *) (& fields->f_dsp_40_u20)); 1114 break; 1115 case M32C_OPERAND_DSP_40_U24 : 1116 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_40_U24, (unsigned long *) (& fields->f_dsp_40_u24)); 1117 break; 1118 case M32C_OPERAND_DSP_40_U8 : 1119 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_40_U8, (unsigned long *) (& fields->f_dsp_40_u8)); 1120 break; 1121 case M32C_OPERAND_DSP_48_S16 : 1122 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_DSP_48_S16, (long *) (& fields->f_dsp_48_s16)); 1123 break; 1124 case M32C_OPERAND_DSP_48_S8 : 1125 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_48_S8, (long *) (& fields->f_dsp_48_s8)); 1126 break; 1127 case M32C_OPERAND_DSP_48_U16 : 1128 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_48_U16, (unsigned long *) (& fields->f_dsp_48_u16)); 1129 break; 1130 case M32C_OPERAND_DSP_48_U20 : 1131 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U20, (unsigned long *) (& fields->f_dsp_48_u20)); 1132 break; 1133 case M32C_OPERAND_DSP_48_U24 : 1134 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_48_U24, (unsigned long *) (& fields->f_dsp_48_u24)); 1135 break; 1136 case M32C_OPERAND_DSP_48_U8 : 1137 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_48_U8, (unsigned long *) (& fields->f_dsp_48_u8)); 1138 break; 1139 case M32C_OPERAND_DSP_8_S24 : 1140 errmsg = parse_signed24 (cd, strp, M32C_OPERAND_DSP_8_S24, (long *) (& fields->f_dsp_8_s24)); 1141 break; 1142 case M32C_OPERAND_DSP_8_S8 : 1143 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_DSP_8_S8, (long *) (& fields->f_dsp_8_s8)); 1144 break; 1145 case M32C_OPERAND_DSP_8_U16 : 1146 errmsg = parse_unsigned16 (cd, strp, M32C_OPERAND_DSP_8_U16, (unsigned long *) (& fields->f_dsp_8_u16)); 1147 break; 1148 case M32C_OPERAND_DSP_8_U24 : 1149 errmsg = parse_unsigned24 (cd, strp, M32C_OPERAND_DSP_8_U24, (unsigned long *) (& fields->f_dsp_8_u24)); 1150 break; 1151 case M32C_OPERAND_DSP_8_U6 : 1152 errmsg = parse_unsigned6 (cd, strp, M32C_OPERAND_DSP_8_U6, (unsigned long *) (& fields->f_dsp_8_u6)); 1153 break; 1154 case M32C_OPERAND_DSP_8_U8 : 1155 errmsg = parse_unsigned8 (cd, strp, M32C_OPERAND_DSP_8_U8, (unsigned long *) (& fields->f_dsp_8_u8)); 1156 break; 1157 case M32C_OPERAND_DST16AN : 1158 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst16_an); 1159 break; 1160 case M32C_OPERAND_DST16AN_S : 1161 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an_s); 1162 break; 1163 case M32C_OPERAND_DST16ANHI : 1164 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst16_an); 1165 break; 1166 case M32C_OPERAND_DST16ANQI : 1167 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_an); 1168 break; 1169 case M32C_OPERAND_DST16ANQI_S : 1170 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst16_rn_QI_s); 1171 break; 1172 case M32C_OPERAND_DST16ANSI : 1173 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_SI, & fields->f_dst16_an); 1174 break; 1175 case M32C_OPERAND_DST16RNEXTQI : 1176 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst16_rn_ext); 1177 break; 1178 case M32C_OPERAND_DST16RNHI : 1179 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst16_rn); 1180 break; 1181 case M32C_OPERAND_DST16RNQI : 1182 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst16_rn); 1183 break; 1184 case M32C_OPERAND_DST16RNQI_S : 1185 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l_r0h, & fields->f_dst16_rn_QI_s); 1186 break; 1187 case M32C_OPERAND_DST16RNSI : 1188 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst16_rn); 1189 break; 1190 case M32C_OPERAND_DST32ANEXTUNPREFIXED : 1191 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1192 break; 1193 case M32C_OPERAND_DST32ANPREFIXED : 1194 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 1195 break; 1196 case M32C_OPERAND_DST32ANPREFIXEDHI : 1197 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_prefixed); 1198 break; 1199 case M32C_OPERAND_DST32ANPREFIXEDQI : 1200 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_prefixed); 1201 break; 1202 case M32C_OPERAND_DST32ANPREFIXEDSI : 1203 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_prefixed); 1204 break; 1205 case M32C_OPERAND_DST32ANUNPREFIXED : 1206 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1207 break; 1208 case M32C_OPERAND_DST32ANUNPREFIXEDHI : 1209 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_dst32_an_unprefixed); 1210 break; 1211 case M32C_OPERAND_DST32ANUNPREFIXEDQI : 1212 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_dst32_an_unprefixed); 1213 break; 1214 case M32C_OPERAND_DST32ANUNPREFIXEDSI : 1215 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_dst32_an_unprefixed); 1216 break; 1217 case M32C_OPERAND_DST32R0HI_S : 1218 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk); 1219 break; 1220 case M32C_OPERAND_DST32R0QI_S : 1221 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk); 1222 break; 1223 case M32C_OPERAND_DST32RNEXTUNPREFIXEDHI : 1224 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_HI, & fields->f_dst32_rn_ext_unprefixed); 1225 break; 1226 case M32C_OPERAND_DST32RNEXTUNPREFIXEDQI : 1227 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_ext_QI, & fields->f_dst32_rn_ext_unprefixed); 1228 break; 1229 case M32C_OPERAND_DST32RNPREFIXEDHI : 1230 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_prefixed_HI); 1231 break; 1232 case M32C_OPERAND_DST32RNPREFIXEDQI : 1233 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_prefixed_QI); 1234 break; 1235 case M32C_OPERAND_DST32RNPREFIXEDSI : 1236 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_prefixed_SI); 1237 break; 1238 case M32C_OPERAND_DST32RNUNPREFIXEDHI : 1239 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_dst32_rn_unprefixed_HI); 1240 break; 1241 case M32C_OPERAND_DST32RNUNPREFIXEDQI : 1242 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_dst32_rn_unprefixed_QI); 1243 break; 1244 case M32C_OPERAND_DST32RNUNPREFIXEDSI : 1245 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_dst32_rn_unprefixed_SI); 1246 break; 1247 case M32C_OPERAND_G : 1248 errmsg = parse_G (cd, strp, M32C_OPERAND_G, (long *) (& junk)); 1249 break; 1250 case M32C_OPERAND_IMM_12_S4 : 1251 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_12_S4, (long *) (& fields->f_imm_12_s4)); 1252 break; 1253 case M32C_OPERAND_IMM_12_S4N : 1254 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_12_S4N, (long *) (& fields->f_imm_12_s4)); 1255 break; 1256 case M32C_OPERAND_IMM_13_U3 : 1257 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_13_U3, (long *) (& fields->f_imm_13_u3)); 1258 break; 1259 case M32C_OPERAND_IMM_16_HI : 1260 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_16_HI, (long *) (& fields->f_dsp_16_s16)); 1261 break; 1262 case M32C_OPERAND_IMM_16_QI : 1263 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_16_QI, (long *) (& fields->f_dsp_16_s8)); 1264 break; 1265 case M32C_OPERAND_IMM_16_SI : 1266 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_16_SI, (long *) (& fields->f_dsp_16_s32)); 1267 break; 1268 case M32C_OPERAND_IMM_20_S4 : 1269 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_20_S4, (long *) (& fields->f_imm_20_s4)); 1270 break; 1271 case M32C_OPERAND_IMM_24_HI : 1272 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_24_HI, (long *) (& fields->f_dsp_24_s16)); 1273 break; 1274 case M32C_OPERAND_IMM_24_QI : 1275 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_24_QI, (long *) (& fields->f_dsp_24_s8)); 1276 break; 1277 case M32C_OPERAND_IMM_24_SI : 1278 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_24_SI, (long *) (& fields->f_dsp_24_s32)); 1279 break; 1280 case M32C_OPERAND_IMM_32_HI : 1281 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_32_HI, (long *) (& fields->f_dsp_32_s16)); 1282 break; 1283 case M32C_OPERAND_IMM_32_QI : 1284 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_32_QI, (long *) (& fields->f_dsp_32_s8)); 1285 break; 1286 case M32C_OPERAND_IMM_32_SI : 1287 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_32_SI, (long *) (& fields->f_dsp_32_s32)); 1288 break; 1289 case M32C_OPERAND_IMM_40_HI : 1290 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_40_HI, (long *) (& fields->f_dsp_40_s16)); 1291 break; 1292 case M32C_OPERAND_IMM_40_QI : 1293 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_40_QI, (long *) (& fields->f_dsp_40_s8)); 1294 break; 1295 case M32C_OPERAND_IMM_40_SI : 1296 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_40_SI, (long *) (& fields->f_dsp_40_s32)); 1297 break; 1298 case M32C_OPERAND_IMM_48_HI : 1299 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_48_HI, (long *) (& fields->f_dsp_48_s16)); 1300 break; 1301 case M32C_OPERAND_IMM_48_QI : 1302 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_48_QI, (long *) (& fields->f_dsp_48_s8)); 1303 break; 1304 case M32C_OPERAND_IMM_48_SI : 1305 errmsg = parse_signed32 (cd, strp, M32C_OPERAND_IMM_48_SI, (long *) (& fields->f_dsp_48_s32)); 1306 break; 1307 case M32C_OPERAND_IMM_56_HI : 1308 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_56_HI, (long *) (& fields->f_dsp_56_s16)); 1309 break; 1310 case M32C_OPERAND_IMM_56_QI : 1311 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_56_QI, (long *) (& fields->f_dsp_56_s8)); 1312 break; 1313 case M32C_OPERAND_IMM_64_HI : 1314 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_64_HI, (long *) (& fields->f_dsp_64_s16)); 1315 break; 1316 case M32C_OPERAND_IMM_8_HI : 1317 errmsg = parse_signed16 (cd, strp, M32C_OPERAND_IMM_8_HI, (long *) (& fields->f_dsp_8_s16)); 1318 break; 1319 case M32C_OPERAND_IMM_8_QI : 1320 errmsg = parse_signed8 (cd, strp, M32C_OPERAND_IMM_8_QI, (long *) (& fields->f_dsp_8_s8)); 1321 break; 1322 case M32C_OPERAND_IMM_8_S4 : 1323 errmsg = parse_signed4 (cd, strp, M32C_OPERAND_IMM_8_S4, (long *) (& fields->f_imm_8_s4)); 1324 break; 1325 case M32C_OPERAND_IMM_8_S4N : 1326 errmsg = parse_signed4n (cd, strp, M32C_OPERAND_IMM_8_S4N, (long *) (& fields->f_imm_8_s4)); 1327 break; 1328 case M32C_OPERAND_IMM_SH_12_S4 : 1329 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_12_s4); 1330 break; 1331 case M32C_OPERAND_IMM_SH_20_S4 : 1332 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_20_s4); 1333 break; 1334 case M32C_OPERAND_IMM_SH_8_S4 : 1335 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_shimm, & fields->f_imm_8_s4); 1336 break; 1337 case M32C_OPERAND_IMM1_S : 1338 errmsg = parse_imm1_S (cd, strp, M32C_OPERAND_IMM1_S, (long *) (& fields->f_imm1_S)); 1339 break; 1340 case M32C_OPERAND_IMM3_S : 1341 errmsg = parse_imm3_S (cd, strp, M32C_OPERAND_IMM3_S, (long *) (& fields->f_imm3_S)); 1342 break; 1343 case M32C_OPERAND_LAB_16_8 : 1344 { 1345 bfd_vma value = 0; 1346 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_16_8, 0, NULL, & value); 1347 fields->f_lab_16_8 = value; 1348 } 1349 break; 1350 case M32C_OPERAND_LAB_24_8 : 1351 { 1352 bfd_vma value = 0; 1353 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_24_8, 0, NULL, & value); 1354 fields->f_lab_24_8 = value; 1355 } 1356 break; 1357 case M32C_OPERAND_LAB_32_8 : 1358 { 1359 bfd_vma value = 0; 1360 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_32_8, 0, NULL, & value); 1361 fields->f_lab_32_8 = value; 1362 } 1363 break; 1364 case M32C_OPERAND_LAB_40_8 : 1365 { 1366 bfd_vma value = 0; 1367 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_40_8, 0, NULL, & value); 1368 fields->f_lab_40_8 = value; 1369 } 1370 break; 1371 case M32C_OPERAND_LAB_5_3 : 1372 { 1373 bfd_vma value = 0; 1374 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB_5_3, 0, NULL, & value); 1375 fields->f_lab_5_3 = value; 1376 } 1377 break; 1378 case M32C_OPERAND_LAB_8_16 : 1379 { 1380 bfd_vma value = 0; 1381 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_16, 0, NULL, & value); 1382 fields->f_lab_8_16 = value; 1383 } 1384 break; 1385 case M32C_OPERAND_LAB_8_24 : 1386 { 1387 bfd_vma value = 0; 1388 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_24, 0, NULL, & value); 1389 fields->f_lab_8_24 = value; 1390 } 1391 break; 1392 case M32C_OPERAND_LAB_8_8 : 1393 { 1394 bfd_vma value = 0; 1395 errmsg = cgen_parse_address (cd, strp, M32C_OPERAND_LAB_8_8, 0, NULL, & value); 1396 fields->f_lab_8_8 = value; 1397 } 1398 break; 1399 case M32C_OPERAND_LAB32_JMP_S : 1400 { 1401 bfd_vma value = 0; 1402 errmsg = parse_lab_5_3 (cd, strp, M32C_OPERAND_LAB32_JMP_S, 0, NULL, & value); 1403 fields->f_lab32_jmp_s = value; 1404 } 1405 break; 1406 case M32C_OPERAND_Q : 1407 errmsg = parse_Q (cd, strp, M32C_OPERAND_Q, (long *) (& junk)); 1408 break; 1409 case M32C_OPERAND_R0 : 1410 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0, & junk); 1411 break; 1412 case M32C_OPERAND_R0H : 1413 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0h, & junk); 1414 break; 1415 case M32C_OPERAND_R0L : 1416 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r0l, & junk); 1417 break; 1418 case M32C_OPERAND_R1 : 1419 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1, & junk); 1420 break; 1421 case M32C_OPERAND_R1R2R0 : 1422 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r1r2r0, & junk); 1423 break; 1424 case M32C_OPERAND_R2 : 1425 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2, & junk); 1426 break; 1427 case M32C_OPERAND_R2R0 : 1428 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r2r0, & junk); 1429 break; 1430 case M32C_OPERAND_R3 : 1431 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3, & junk); 1432 break; 1433 case M32C_OPERAND_R3R1 : 1434 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_r3r1, & junk); 1435 break; 1436 case M32C_OPERAND_REGSETPOP : 1437 errmsg = parse_pop_regset (cd, strp, M32C_OPERAND_REGSETPOP, (unsigned long *) (& fields->f_8_8)); 1438 break; 1439 case M32C_OPERAND_REGSETPUSH : 1440 errmsg = parse_push_regset (cd, strp, M32C_OPERAND_REGSETPUSH, (unsigned long *) (& fields->f_8_8)); 1441 break; 1442 case M32C_OPERAND_RN16_PUSH_S : 1443 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_4_1); 1444 break; 1445 case M32C_OPERAND_S : 1446 errmsg = parse_S (cd, strp, M32C_OPERAND_S, (long *) (& junk)); 1447 break; 1448 case M32C_OPERAND_SRC16AN : 1449 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src16_an); 1450 break; 1451 case M32C_OPERAND_SRC16ANHI : 1452 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src16_an); 1453 break; 1454 case M32C_OPERAND_SRC16ANQI : 1455 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src16_an); 1456 break; 1457 case M32C_OPERAND_SRC16RNHI : 1458 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src16_rn); 1459 break; 1460 case M32C_OPERAND_SRC16RNQI : 1461 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src16_rn); 1462 break; 1463 case M32C_OPERAND_SRC32ANPREFIXED : 1464 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed); 1465 break; 1466 case M32C_OPERAND_SRC32ANPREFIXEDHI : 1467 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_prefixed); 1468 break; 1469 case M32C_OPERAND_SRC32ANPREFIXEDQI : 1470 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_prefixed); 1471 break; 1472 case M32C_OPERAND_SRC32ANPREFIXEDSI : 1473 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_prefixed); 1474 break; 1475 case M32C_OPERAND_SRC32ANUNPREFIXED : 1476 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed); 1477 break; 1478 case M32C_OPERAND_SRC32ANUNPREFIXEDHI : 1479 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_HI, & fields->f_src32_an_unprefixed); 1480 break; 1481 case M32C_OPERAND_SRC32ANUNPREFIXEDQI : 1482 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar_QI, & fields->f_src32_an_unprefixed); 1483 break; 1484 case M32C_OPERAND_SRC32ANUNPREFIXEDSI : 1485 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_ar, & fields->f_src32_an_unprefixed); 1486 break; 1487 case M32C_OPERAND_SRC32RNPREFIXEDHI : 1488 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_prefixed_HI); 1489 break; 1490 case M32C_OPERAND_SRC32RNPREFIXEDQI : 1491 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_prefixed_QI); 1492 break; 1493 case M32C_OPERAND_SRC32RNPREFIXEDSI : 1494 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_prefixed_SI); 1495 break; 1496 case M32C_OPERAND_SRC32RNUNPREFIXEDHI : 1497 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_HI, & fields->f_src32_rn_unprefixed_HI); 1498 break; 1499 case M32C_OPERAND_SRC32RNUNPREFIXEDQI : 1500 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_QI, & fields->f_src32_rn_unprefixed_QI); 1501 break; 1502 case M32C_OPERAND_SRC32RNUNPREFIXEDSI : 1503 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_gr_SI, & fields->f_src32_rn_unprefixed_SI); 1504 break; 1505 case M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL : 1506 errmsg = parse_r0l_r0h (cd, strp, M32C_OPERAND_SRCDST16_R0L_R0H_S_NORMAL, (long *) (& fields->f_5_1)); 1507 break; 1508 case M32C_OPERAND_X : 1509 errmsg = parse_X (cd, strp, M32C_OPERAND_X, (long *) (& junk)); 1510 break; 1511 case M32C_OPERAND_Z : 1512 errmsg = parse_Z (cd, strp, M32C_OPERAND_Z, (long *) (& junk)); 1513 break; 1514 case M32C_OPERAND_COND16_16 : 1515 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_16_u8); 1516 break; 1517 case M32C_OPERAND_COND16_24 : 1518 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_24_u8); 1519 break; 1520 case M32C_OPERAND_COND16_32 : 1521 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16, & fields->f_dsp_32_u8); 1522 break; 1523 case M32C_OPERAND_COND16C : 1524 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16c, & fields->f_cond16); 1525 break; 1526 case M32C_OPERAND_COND16J : 1527 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j, & fields->f_cond16); 1528 break; 1529 case M32C_OPERAND_COND16J5 : 1530 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond16j_5, & fields->f_cond16j_5); 1531 break; 1532 case M32C_OPERAND_COND32 : 1533 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32); 1534 break; 1535 case M32C_OPERAND_COND32_16 : 1536 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_16_u8); 1537 break; 1538 case M32C_OPERAND_COND32_24 : 1539 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_24_u8); 1540 break; 1541 case M32C_OPERAND_COND32_32 : 1542 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_32_u8); 1543 break; 1544 case M32C_OPERAND_COND32_40 : 1545 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_dsp_40_u8); 1546 break; 1547 case M32C_OPERAND_COND32J : 1548 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond32j); 1549 break; 1550 case M32C_OPERAND_CR1_PREFIXED_32 : 1551 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_21_3); 1552 break; 1553 case M32C_OPERAND_CR1_UNPREFIXED_32 : 1554 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr1_32, & fields->f_13_3); 1555 break; 1556 case M32C_OPERAND_CR16 : 1557 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr_16, & fields->f_9_3); 1558 break; 1559 case M32C_OPERAND_CR2_32 : 1560 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr2_32, & fields->f_13_3); 1561 break; 1562 case M32C_OPERAND_CR3_PREFIXED_32 : 1563 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_21_3); 1564 break; 1565 case M32C_OPERAND_CR3_UNPREFIXED_32 : 1566 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cr3_32, & fields->f_13_3); 1567 break; 1568 case M32C_OPERAND_FLAGS16 : 1569 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_9_3); 1570 break; 1571 case M32C_OPERAND_FLAGS32 : 1572 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_flags, & fields->f_13_3); 1573 break; 1574 case M32C_OPERAND_SCCOND32 : 1575 errmsg = cgen_parse_keyword (cd, strp, & m32c_cgen_opval_h_cond32, & fields->f_cond16); 1576 break; 1577 case M32C_OPERAND_SIZE : 1578 errmsg = parse_size (cd, strp, M32C_OPERAND_SIZE, (long *) (& junk)); 1579 break; 1580 1581 default : 1582 /* xgettext:c-format */ 1583 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); 1584 abort (); 1585 } 1586 1587 return errmsg; 1588} 1589 1590cgen_parse_fn * const m32c_cgen_parse_handlers[] = 1591{ 1592 parse_insn_normal, 1593}; 1594 1595void 1596m32c_cgen_init_asm (CGEN_CPU_DESC cd) 1597{ 1598 m32c_cgen_init_opcode_table (cd); 1599 m32c_cgen_init_ibld_table (cd); 1600 cd->parse_handlers = & m32c_cgen_parse_handlers[0]; 1601 cd->parse_operand = m32c_cgen_parse_operand; 1602#ifdef CGEN_ASM_INIT_HOOK 1603CGEN_ASM_INIT_HOOK 1604#endif 1605} 1606 1607 1608 1609/* Regex construction routine. 1610 1611 This translates an opcode syntax string into a regex string, 1612 by replacing any non-character syntax element (such as an 1613 opcode) with the pattern '.*' 1614 1615 It then compiles the regex and stores it in the opcode, for 1616 later use by m32c_cgen_assemble_insn 1617 1618 Returns NULL for success, an error message for failure. */ 1619 1620char * 1621m32c_cgen_build_insn_regex (CGEN_INSN *insn) 1622{ 1623 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); 1624 const char *mnem = CGEN_INSN_MNEMONIC (insn); 1625 char rxbuf[CGEN_MAX_RX_ELEMENTS]; 1626 char *rx = rxbuf; 1627 const CGEN_SYNTAX_CHAR_TYPE *syn; 1628 int reg_err; 1629 1630 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); 1631 1632 /* Mnemonics come first in the syntax string. */ 1633 if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) 1634 return _("missing mnemonic in syntax string"); 1635 ++syn; 1636 1637 /* Generate a case sensitive regular expression that emulates case 1638 insensitive matching in the "C" locale. We cannot generate a case 1639 insensitive regular expression because in Turkish locales, 'i' and 'I' 1640 are not equal modulo case conversion. */ 1641 1642 /* Copy the literal mnemonic out of the insn. */ 1643 for (; *mnem; mnem++) 1644 { 1645 char c = *mnem; 1646 1647 if (ISALPHA (c)) 1648 { 1649 *rx++ = '['; 1650 *rx++ = TOLOWER (c); 1651 *rx++ = TOUPPER (c); 1652 *rx++ = ']'; 1653 } 1654 else 1655 *rx++ = c; 1656 } 1657 1658 /* Copy any remaining literals from the syntax string into the rx. */ 1659 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) 1660 { 1661 if (CGEN_SYNTAX_CHAR_P (* syn)) 1662 { 1663 char c = CGEN_SYNTAX_CHAR (* syn); 1664 1665 switch (c) 1666 { 1667 /* Escape any regex metacharacters in the syntax. */ 1668 case '.': case '[': case '\\': 1669 case '*': case '^': case '$': 1670 1671#ifdef CGEN_ESCAPE_EXTENDED_REGEX 1672 case '?': case '{': case '}': 1673 case '(': case ')': case '*': 1674 case '|': case '+': case ']': 1675#endif 1676 *rx++ = '\\'; 1677 *rx++ = c; 1678 break; 1679 1680 default: 1681 if (ISALPHA (c)) 1682 { 1683 *rx++ = '['; 1684 *rx++ = TOLOWER (c); 1685 *rx++ = TOUPPER (c); 1686 *rx++ = ']'; 1687 } 1688 else 1689 *rx++ = c; 1690 break; 1691 } 1692 } 1693 else 1694 { 1695 /* Replace non-syntax fields with globs. */ 1696 *rx++ = '.'; 1697 *rx++ = '*'; 1698 } 1699 } 1700 1701 /* Trailing whitespace ok. */ 1702 * rx++ = '['; 1703 * rx++ = ' '; 1704 * rx++ = '\t'; 1705 * rx++ = ']'; 1706 * rx++ = '*'; 1707 1708 /* But anchor it after that. */ 1709 * rx++ = '$'; 1710 * rx = '\0'; 1711 1712 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); 1713 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); 1714 1715 if (reg_err == 0) 1716 return NULL; 1717 else 1718 { 1719 static char msg[80]; 1720 1721 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); 1722 regfree ((regex_t *) CGEN_INSN_RX (insn)); 1723 free (CGEN_INSN_RX (insn)); 1724 (CGEN_INSN_RX (insn)) = NULL; 1725 return msg; 1726 } 1727} 1728 1729 1730/* Default insn parser. 1731 1732 The syntax string is scanned and operands are parsed and stored in FIELDS. 1733 Relocs are queued as we go via other callbacks. 1734 1735 ??? Note that this is currently an all-or-nothing parser. If we fail to 1736 parse the instruction, we return 0 and the caller will start over from 1737 the beginning. Backtracking will be necessary in parsing subexpressions, 1738 but that can be handled there. Not handling backtracking here may get 1739 expensive in the case of the m68k. Deal with later. 1740 1741 Returns NULL for success, an error message for failure. */ 1742 1743static const char * 1744parse_insn_normal (CGEN_CPU_DESC cd, 1745 const CGEN_INSN *insn, 1746 const char **strp, 1747 CGEN_FIELDS *fields) 1748{ 1749 /* ??? Runtime added insns not handled yet. */ 1750 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 1751 const char *str = *strp; 1752 const char *errmsg; 1753 const char *p; 1754 const CGEN_SYNTAX_CHAR_TYPE * syn; 1755#ifdef CGEN_MNEMONIC_OPERANDS 1756 /* FIXME: wip */ 1757 int past_opcode_p; 1758#endif 1759 1760 /* For now we assume the mnemonic is first (there are no leading operands). 1761 We can parse it without needing to set up operand parsing. 1762 GAS's input scrubber will ensure mnemonics are lowercase, but we may 1763 not be called from GAS. */ 1764 p = CGEN_INSN_MNEMONIC (insn); 1765 while (*p && TOLOWER (*p) == TOLOWER (*str)) 1766 ++p, ++str; 1767 1768 if (* p) 1769 return _("unrecognized instruction"); 1770 1771#ifndef CGEN_MNEMONIC_OPERANDS 1772 if (* str && ! ISSPACE (* str)) 1773 return _("unrecognized instruction"); 1774#endif 1775 1776 CGEN_INIT_PARSE (cd); 1777 cgen_init_parse_operand (cd); 1778#ifdef CGEN_MNEMONIC_OPERANDS 1779 past_opcode_p = 0; 1780#endif 1781 1782 /* We don't check for (*str != '\0') here because we want to parse 1783 any trailing fake arguments in the syntax string. */ 1784 syn = CGEN_SYNTAX_STRING (syntax); 1785 1786 /* Mnemonics come first for now, ensure valid string. */ 1787 if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) 1788 abort (); 1789 1790 ++syn; 1791 1792 while (* syn != 0) 1793 { 1794 /* Non operand chars must match exactly. */ 1795 if (CGEN_SYNTAX_CHAR_P (* syn)) 1796 { 1797 /* FIXME: While we allow for non-GAS callers above, we assume the 1798 first char after the mnemonic part is a space. */ 1799 /* FIXME: We also take inappropriate advantage of the fact that 1800 GAS's input scrubber will remove extraneous blanks. */ 1801 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) 1802 { 1803#ifdef CGEN_MNEMONIC_OPERANDS 1804 if (CGEN_SYNTAX_CHAR(* syn) == ' ') 1805 past_opcode_p = 1; 1806#endif 1807 ++ syn; 1808 ++ str; 1809 } 1810 else if (*str) 1811 { 1812 /* Syntax char didn't match. Can't be this insn. */ 1813 static char msg [80]; 1814 1815 /* xgettext:c-format */ 1816 sprintf (msg, _("syntax error (expected char `%c', found `%c')"), 1817 CGEN_SYNTAX_CHAR(*syn), *str); 1818 return msg; 1819 } 1820 else 1821 { 1822 /* Ran out of input. */ 1823 static char msg [80]; 1824 1825 /* xgettext:c-format */ 1826 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), 1827 CGEN_SYNTAX_CHAR(*syn)); 1828 return msg; 1829 } 1830 continue; 1831 } 1832 1833#ifdef CGEN_MNEMONIC_OPERANDS 1834 (void) past_opcode_p; 1835#endif 1836 /* We have an operand of some sort. */ 1837 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields); 1838 if (errmsg) 1839 return errmsg; 1840 1841 /* Done with this operand, continue with next one. */ 1842 ++ syn; 1843 } 1844 1845 /* If we're at the end of the syntax string, we're done. */ 1846 if (* syn == 0) 1847 { 1848 /* FIXME: For the moment we assume a valid `str' can only contain 1849 blanks now. IE: We needn't try again with a longer version of 1850 the insn and it is assumed that longer versions of insns appear 1851 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ 1852 while (ISSPACE (* str)) 1853 ++ str; 1854 1855 if (* str != '\0') 1856 return _("junk at end of line"); /* FIXME: would like to include `str' */ 1857 1858 return NULL; 1859 } 1860 1861 /* We couldn't parse it. */ 1862 return _("unrecognized instruction"); 1863} 1864 1865/* Main entry point. 1866 This routine is called for each instruction to be assembled. 1867 STR points to the insn to be assembled. 1868 We assume all necessary tables have been initialized. 1869 The assembled instruction, less any fixups, is stored in BUF. 1870 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value 1871 still needs to be converted to target byte order, otherwise BUF is an array 1872 of bytes in target byte order. 1873 The result is a pointer to the insn's entry in the opcode table, 1874 or NULL if an error occured (an error message will have already been 1875 printed). 1876 1877 Note that when processing (non-alias) macro-insns, 1878 this function recurses. 1879 1880 ??? It's possible to make this cpu-independent. 1881 One would have to deal with a few minor things. 1882 At this point in time doing so would be more of a curiosity than useful 1883 [for example this file isn't _that_ big], but keeping the possibility in 1884 mind helps keep the design clean. */ 1885 1886const CGEN_INSN * 1887m32c_cgen_assemble_insn (CGEN_CPU_DESC cd, 1888 const char *str, 1889 CGEN_FIELDS *fields, 1890 CGEN_INSN_BYTES_PTR buf, 1891 char **errmsg) 1892{ 1893 const char *start; 1894 CGEN_INSN_LIST *ilist; 1895 const char *parse_errmsg = NULL; 1896 const char *insert_errmsg = NULL; 1897 int recognized_mnemonic = 0; 1898 1899 /* Skip leading white space. */ 1900 while (ISSPACE (* str)) 1901 ++ str; 1902 1903 /* The instructions are stored in hashed lists. 1904 Get the first in the list. */ 1905 ilist = CGEN_ASM_LOOKUP_INSN (cd, str); 1906 1907 /* Keep looking until we find a match. */ 1908 start = str; 1909 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) 1910 { 1911 const CGEN_INSN *insn = ilist->insn; 1912 recognized_mnemonic = 1; 1913 1914#ifdef CGEN_VALIDATE_INSN_SUPPORTED 1915 /* Not usually needed as unsupported opcodes 1916 shouldn't be in the hash lists. */ 1917 /* Is this insn supported by the selected cpu? */ 1918 if (! m32c_cgen_insn_supported (cd, insn)) 1919 continue; 1920#endif 1921 /* If the RELAXED attribute is set, this is an insn that shouldn't be 1922 chosen immediately. Instead, it is used during assembler/linker 1923 relaxation if possible. */ 1924 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) 1925 continue; 1926 1927 str = start; 1928 1929 /* Skip this insn if str doesn't look right lexically. */ 1930 if (CGEN_INSN_RX (insn) != NULL && 1931 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) 1932 continue; 1933 1934 /* Allow parse/insert handlers to obtain length of insn. */ 1935 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); 1936 1937 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); 1938 if (parse_errmsg != NULL) 1939 continue; 1940 1941 /* ??? 0 is passed for `pc'. */ 1942 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, 1943 (bfd_vma) 0); 1944 if (insert_errmsg != NULL) 1945 continue; 1946 1947 /* It is up to the caller to actually output the insn and any 1948 queued relocs. */ 1949 return insn; 1950 } 1951 1952 { 1953 static char errbuf[150]; 1954 const char *tmp_errmsg; 1955#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS 1956#define be_verbose 1 1957#else 1958#define be_verbose 0 1959#endif 1960 1961 if (be_verbose) 1962 { 1963 /* If requesting verbose error messages, use insert_errmsg. 1964 Failing that, use parse_errmsg. */ 1965 tmp_errmsg = (insert_errmsg ? insert_errmsg : 1966 parse_errmsg ? parse_errmsg : 1967 recognized_mnemonic ? 1968 _("unrecognized form of instruction") : 1969 _("unrecognized instruction")); 1970 1971 if (strlen (start) > 50) 1972 /* xgettext:c-format */ 1973 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); 1974 else 1975 /* xgettext:c-format */ 1976 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); 1977 } 1978 else 1979 { 1980 if (strlen (start) > 50) 1981 /* xgettext:c-format */ 1982 sprintf (errbuf, _("bad instruction `%.50s...'"), start); 1983 else 1984 /* xgettext:c-format */ 1985 sprintf (errbuf, _("bad instruction `%.50s'"), start); 1986 } 1987 1988 *errmsg = errbuf; 1989 return NULL; 1990 } 1991} 1992