1/* aarch64-asm.h -- Header file for aarch64-asm.c and aarch64-asm-2.c.
2   Copyright (C) 2012-2017 Free Software Foundation, Inc.
3   Contributed by ARM Ltd.
4
5   This file is part of the GNU opcodes library.
6
7   This library is free software; you can redistribute it and/or modify
8   it under the terms of the GNU General Public License as published by
9   the Free Software Foundation; either version 3, or (at your option)
10   any later version.
11
12   It is distributed in the hope that it will be useful, but WITHOUT
13   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
15   License for more details.
16
17   You should have received a copy of the GNU General Public License
18   along with this program; see the file COPYING3. If not,
19   see <http://www.gnu.org/licenses/>.  */
20
21#ifndef OPCODES_AARCH64_ASM_H
22#define OPCODES_AARCH64_ASM_H
23
24#include "aarch64-opc.h"
25
26/* Given OPCODE, return the opcode entry that OPCODE aliases to, e.g.
27   given LSL, return UBFM.  */
28
29const aarch64_opcode* aarch64_find_real_opcode (const aarch64_opcode *);
30
31/* Switch-table-based high-level operand inserter.  */
32
33const char* aarch64_insert_operand (const aarch64_operand *,
34				    const aarch64_opnd_info *, aarch64_insn *,
35				    const aarch64_inst *);
36
37/* Operand inserters.  */
38
39#define AARCH64_DECL_OPD_INSERTER(x)	\
40  const char* aarch64_##x (const aarch64_operand *, const aarch64_opnd_info *, \
41			   aarch64_insn *, const aarch64_inst *)
42
43AARCH64_DECL_OPD_INSERTER (ins_regno);
44AARCH64_DECL_OPD_INSERTER (ins_reglane);
45AARCH64_DECL_OPD_INSERTER (ins_reglist);
46AARCH64_DECL_OPD_INSERTER (ins_ldst_reglist);
47AARCH64_DECL_OPD_INSERTER (ins_ldst_reglist_r);
48AARCH64_DECL_OPD_INSERTER (ins_ldst_elemlist);
49AARCH64_DECL_OPD_INSERTER (ins_advsimd_imm_shift);
50AARCH64_DECL_OPD_INSERTER (ins_imm);
51AARCH64_DECL_OPD_INSERTER (ins_imm_half);
52AARCH64_DECL_OPD_INSERTER (ins_advsimd_imm_modified);
53AARCH64_DECL_OPD_INSERTER (ins_fpimm);
54AARCH64_DECL_OPD_INSERTER (ins_fbits);
55AARCH64_DECL_OPD_INSERTER (ins_aimm);
56AARCH64_DECL_OPD_INSERTER (ins_limm);
57AARCH64_DECL_OPD_INSERTER (ins_inv_limm);
58AARCH64_DECL_OPD_INSERTER (ins_ft);
59AARCH64_DECL_OPD_INSERTER (ins_addr_simple);
60AARCH64_DECL_OPD_INSERTER (ins_addr_regoff);
61AARCH64_DECL_OPD_INSERTER (ins_addr_simm);
62AARCH64_DECL_OPD_INSERTER (ins_addr_simm10);
63AARCH64_DECL_OPD_INSERTER (ins_addr_uimm12);
64AARCH64_DECL_OPD_INSERTER (ins_simd_addr_post);
65AARCH64_DECL_OPD_INSERTER (ins_cond);
66AARCH64_DECL_OPD_INSERTER (ins_sysreg);
67AARCH64_DECL_OPD_INSERTER (ins_pstatefield);
68AARCH64_DECL_OPD_INSERTER (ins_sysins_op);
69AARCH64_DECL_OPD_INSERTER (ins_barrier);
70AARCH64_DECL_OPD_INSERTER (ins_hint);
71AARCH64_DECL_OPD_INSERTER (ins_prfop);
72AARCH64_DECL_OPD_INSERTER (ins_reg_extended);
73AARCH64_DECL_OPD_INSERTER (ins_reg_shifted);
74AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s4);
75AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s4xvl);
76AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s6xvl);
77AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_s9xvl);
78AARCH64_DECL_OPD_INSERTER (ins_sve_addr_ri_u6);
79AARCH64_DECL_OPD_INSERTER (ins_sve_addr_rr_lsl);
80AARCH64_DECL_OPD_INSERTER (ins_sve_addr_rz_xtw);
81AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zi_u5);
82AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_lsl);
83AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_sxtw);
84AARCH64_DECL_OPD_INSERTER (ins_sve_addr_zz_uxtw);
85AARCH64_DECL_OPD_INSERTER (ins_sve_aimm);
86AARCH64_DECL_OPD_INSERTER (ins_sve_asimm);
87AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_one);
88AARCH64_DECL_OPD_INSERTER (ins_sve_float_half_two);
89AARCH64_DECL_OPD_INSERTER (ins_sve_float_zero_one);
90AARCH64_DECL_OPD_INSERTER (ins_sve_index);
91AARCH64_DECL_OPD_INSERTER (ins_sve_limm_mov);
92AARCH64_DECL_OPD_INSERTER (ins_sve_quad_index);
93AARCH64_DECL_OPD_INSERTER (ins_sve_reglist);
94AARCH64_DECL_OPD_INSERTER (ins_sve_scale);
95AARCH64_DECL_OPD_INSERTER (ins_sve_shlimm);
96AARCH64_DECL_OPD_INSERTER (ins_sve_shrimm);
97AARCH64_DECL_OPD_INSERTER (ins_imm_rotate1);
98AARCH64_DECL_OPD_INSERTER (ins_imm_rotate2);
99
100#undef AARCH64_DECL_OPD_INSERTER
101
102#endif /* OPCODES_AARCH64_ASM_H */
103