1// arm.cc -- arm target support for gold. 2 3// Copyright (C) 2009-2017 Free Software Foundation, Inc. 4// Written by Doug Kwan <dougkwan@google.com> based on the i386 code 5// by Ian Lance Taylor <iant@google.com>. 6// This file also contains borrowed and adapted code from 7// bfd/elf32-arm.c. 8 9// This file is part of gold. 10 11// This program is free software; you can redistribute it and/or modify 12// it under the terms of the GNU General Public License as published by 13// the Free Software Foundation; either version 3 of the License, or 14// (at your option) any later version. 15 16// This program is distributed in the hope that it will be useful, 17// but WITHOUT ANY WARRANTY; without even the implied warranty of 18// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19// GNU General Public License for more details. 20 21// You should have received a copy of the GNU General Public License 22// along with this program; if not, write to the Free Software 23// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 24// MA 02110-1301, USA. 25 26#include "gold.h" 27 28#include <cstring> 29#include <limits> 30#include <cstdio> 31#include <string> 32#include <algorithm> 33#include <map> 34#include <utility> 35#include <set> 36 37#include "elfcpp.h" 38#include "parameters.h" 39#include "reloc.h" 40#include "arm.h" 41#include "object.h" 42#include "symtab.h" 43#include "layout.h" 44#include "output.h" 45#include "copy-relocs.h" 46#include "target.h" 47#include "target-reloc.h" 48#include "target-select.h" 49#include "tls.h" 50#include "defstd.h" 51#include "gc.h" 52#include "attributes.h" 53#include "arm-reloc-property.h" 54#include "nacl.h" 55 56namespace 57{ 58 59using namespace gold; 60 61template<bool big_endian> 62class Output_data_plt_arm; 63 64template<bool big_endian> 65class Output_data_plt_arm_short; 66 67template<bool big_endian> 68class Output_data_plt_arm_long; 69 70template<bool big_endian> 71class Stub_table; 72 73template<bool big_endian> 74class Arm_input_section; 75 76class Arm_exidx_cantunwind; 77 78class Arm_exidx_merged_section; 79 80class Arm_exidx_fixup; 81 82template<bool big_endian> 83class Arm_output_section; 84 85class Arm_exidx_input_section; 86 87template<bool big_endian> 88class Arm_relobj; 89 90template<bool big_endian> 91class Arm_relocate_functions; 92 93template<bool big_endian> 94class Arm_output_data_got; 95 96template<bool big_endian> 97class Target_arm; 98 99// For convenience. 100typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address; 101 102// Maximum branch offsets for ARM, THUMB and THUMB2. 103const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8); 104const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8); 105const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4); 106const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4); 107const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4); 108const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4); 109 110// Thread Control Block size. 111const size_t ARM_TCB_SIZE = 8; 112 113// The arm target class. 114// 115// This is a very simple port of gold for ARM-EABI. It is intended for 116// supporting Android only for the time being. 117// 118// TODOs: 119// - Implement all static relocation types documented in arm-reloc.def. 120// - Make PLTs more flexible for different architecture features like 121// Thumb-2 and BE8. 122// There are probably a lot more. 123 124// Ideally we would like to avoid using global variables but this is used 125// very in many places and sometimes in loops. If we use a function 126// returning a static instance of Arm_reloc_property_table, it will be very 127// slow in an threaded environment since the static instance needs to be 128// locked. The pointer is below initialized in the 129// Target::do_select_as_default_target() hook so that we do not spend time 130// building the table if we are not linking ARM objects. 131// 132// An alternative is to to process the information in arm-reloc.def in 133// compilation time and generate a representation of it in PODs only. That 134// way we can avoid initialization when the linker starts. 135 136Arm_reloc_property_table* arm_reloc_property_table = NULL; 137 138// Instruction template class. This class is similar to the insn_sequence 139// struct in bfd/elf32-arm.c. 140 141class Insn_template 142{ 143 public: 144 // Types of instruction templates. 145 enum Type 146 { 147 THUMB16_TYPE = 1, 148 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction 149 // templates with class-specific semantics. Currently this is used 150 // only by the Cortex_a8_stub class for handling condition codes in 151 // conditional branches. 152 THUMB16_SPECIAL_TYPE, 153 THUMB32_TYPE, 154 ARM_TYPE, 155 DATA_TYPE 156 }; 157 158 // Factory methods to create instruction templates in different formats. 159 160 static const Insn_template 161 thumb16_insn(uint32_t data) 162 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); } 163 164 // A Thumb conditional branch, in which the proper condition is inserted 165 // when we build the stub. 166 static const Insn_template 167 thumb16_bcond_insn(uint32_t data) 168 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); } 169 170 static const Insn_template 171 thumb32_insn(uint32_t data) 172 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); } 173 174 static const Insn_template 175 thumb32_b_insn(uint32_t data, int reloc_addend) 176 { 177 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24, 178 reloc_addend); 179 } 180 181 static const Insn_template 182 arm_insn(uint32_t data) 183 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); } 184 185 static const Insn_template 186 arm_rel_insn(unsigned data, int reloc_addend) 187 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); } 188 189 static const Insn_template 190 data_word(unsigned data, unsigned int r_type, int reloc_addend) 191 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); } 192 193 // Accessors. This class is used for read-only objects so no modifiers 194 // are provided. 195 196 uint32_t 197 data() const 198 { return this->data_; } 199 200 // Return the instruction sequence type of this. 201 Type 202 type() const 203 { return this->type_; } 204 205 // Return the ARM relocation type of this. 206 unsigned int 207 r_type() const 208 { return this->r_type_; } 209 210 int32_t 211 reloc_addend() const 212 { return this->reloc_addend_; } 213 214 // Return size of instruction template in bytes. 215 size_t 216 size() const; 217 218 // Return byte-alignment of instruction template. 219 unsigned 220 alignment() const; 221 222 private: 223 // We make the constructor private to ensure that only the factory 224 // methods are used. 225 inline 226 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend) 227 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend) 228 { } 229 230 // Instruction specific data. This is used to store information like 231 // some of the instruction bits. 232 uint32_t data_; 233 // Instruction template type. 234 Type type_; 235 // Relocation type if there is a relocation or R_ARM_NONE otherwise. 236 unsigned int r_type_; 237 // Relocation addend. 238 int32_t reloc_addend_; 239}; 240 241// Macro for generating code to stub types. One entry per long/short 242// branch stub 243 244#define DEF_STUBS \ 245 DEF_STUB(long_branch_any_any) \ 246 DEF_STUB(long_branch_v4t_arm_thumb) \ 247 DEF_STUB(long_branch_thumb_only) \ 248 DEF_STUB(long_branch_v4t_thumb_thumb) \ 249 DEF_STUB(long_branch_v4t_thumb_arm) \ 250 DEF_STUB(short_branch_v4t_thumb_arm) \ 251 DEF_STUB(long_branch_any_arm_pic) \ 252 DEF_STUB(long_branch_any_thumb_pic) \ 253 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ 254 DEF_STUB(long_branch_v4t_arm_thumb_pic) \ 255 DEF_STUB(long_branch_v4t_thumb_arm_pic) \ 256 DEF_STUB(long_branch_thumb_only_pic) \ 257 DEF_STUB(a8_veneer_b_cond) \ 258 DEF_STUB(a8_veneer_b) \ 259 DEF_STUB(a8_veneer_bl) \ 260 DEF_STUB(a8_veneer_blx) \ 261 DEF_STUB(v4_veneer_bx) 262 263// Stub types. 264 265#define DEF_STUB(x) arm_stub_##x, 266typedef enum 267 { 268 arm_stub_none, 269 DEF_STUBS 270 271 // First reloc stub type. 272 arm_stub_reloc_first = arm_stub_long_branch_any_any, 273 // Last reloc stub type. 274 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic, 275 276 // First Cortex-A8 stub type. 277 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond, 278 // Last Cortex-A8 stub type. 279 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx, 280 281 // Last stub type. 282 arm_stub_type_last = arm_stub_v4_veneer_bx 283 } Stub_type; 284#undef DEF_STUB 285 286// Stub template class. Templates are meant to be read-only objects. 287// A stub template for a stub type contains all read-only attributes 288// common to all stubs of the same type. 289 290class Stub_template 291{ 292 public: 293 Stub_template(Stub_type, const Insn_template*, size_t); 294 295 ~Stub_template() 296 { } 297 298 // Return stub type. 299 Stub_type 300 type() const 301 { return this->type_; } 302 303 // Return an array of instruction templates. 304 const Insn_template* 305 insns() const 306 { return this->insns_; } 307 308 // Return size of template in number of instructions. 309 size_t 310 insn_count() const 311 { return this->insn_count_; } 312 313 // Return size of template in bytes. 314 size_t 315 size() const 316 { return this->size_; } 317 318 // Return alignment of the stub template. 319 unsigned 320 alignment() const 321 { return this->alignment_; } 322 323 // Return whether entry point is in thumb mode. 324 bool 325 entry_in_thumb_mode() const 326 { return this->entry_in_thumb_mode_; } 327 328 // Return number of relocations in this template. 329 size_t 330 reloc_count() const 331 { return this->relocs_.size(); } 332 333 // Return index of the I-th instruction with relocation. 334 size_t 335 reloc_insn_index(size_t i) const 336 { 337 gold_assert(i < this->relocs_.size()); 338 return this->relocs_[i].first; 339 } 340 341 // Return the offset of the I-th instruction with relocation from the 342 // beginning of the stub. 343 section_size_type 344 reloc_offset(size_t i) const 345 { 346 gold_assert(i < this->relocs_.size()); 347 return this->relocs_[i].second; 348 } 349 350 private: 351 // This contains information about an instruction template with a relocation 352 // and its offset from start of stub. 353 typedef std::pair<size_t, section_size_type> Reloc; 354 355 // A Stub_template may not be copied. We want to share templates as much 356 // as possible. 357 Stub_template(const Stub_template&); 358 Stub_template& operator=(const Stub_template&); 359 360 // Stub type. 361 Stub_type type_; 362 // Points to an array of Insn_templates. 363 const Insn_template* insns_; 364 // Number of Insn_templates in insns_[]. 365 size_t insn_count_; 366 // Size of templated instructions in bytes. 367 size_t size_; 368 // Alignment of templated instructions. 369 unsigned alignment_; 370 // Flag to indicate if entry is in thumb mode. 371 bool entry_in_thumb_mode_; 372 // A table of reloc instruction indices and offsets. We can find these by 373 // looking at the instruction templates but we pre-compute and then stash 374 // them here for speed. 375 std::vector<Reloc> relocs_; 376}; 377 378// 379// A class for code stubs. This is a base class for different type of 380// stubs used in the ARM target. 381// 382 383class Stub 384{ 385 private: 386 static const section_offset_type invalid_offset = 387 static_cast<section_offset_type>(-1); 388 389 public: 390 Stub(const Stub_template* stub_template) 391 : stub_template_(stub_template), offset_(invalid_offset) 392 { } 393 394 virtual 395 ~Stub() 396 { } 397 398 // Return the stub template. 399 const Stub_template* 400 stub_template() const 401 { return this->stub_template_; } 402 403 // Return offset of code stub from beginning of its containing stub table. 404 section_offset_type 405 offset() const 406 { 407 gold_assert(this->offset_ != invalid_offset); 408 return this->offset_; 409 } 410 411 // Set offset of code stub from beginning of its containing stub table. 412 void 413 set_offset(section_offset_type offset) 414 { this->offset_ = offset; } 415 416 // Return the relocation target address of the i-th relocation in the 417 // stub. This must be defined in a child class. 418 Arm_address 419 reloc_target(size_t i) 420 { return this->do_reloc_target(i); } 421 422 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written. 423 void 424 write(unsigned char* view, section_size_type view_size, bool big_endian) 425 { this->do_write(view, view_size, big_endian); } 426 427 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template 428 // for the i-th instruction. 429 uint16_t 430 thumb16_special(size_t i) 431 { return this->do_thumb16_special(i); } 432 433 protected: 434 // This must be defined in the child class. 435 virtual Arm_address 436 do_reloc_target(size_t) = 0; 437 438 // This may be overridden in the child class. 439 virtual void 440 do_write(unsigned char* view, section_size_type view_size, bool big_endian) 441 { 442 if (big_endian) 443 this->do_fixed_endian_write<true>(view, view_size); 444 else 445 this->do_fixed_endian_write<false>(view, view_size); 446 } 447 448 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE 449 // instruction template. 450 virtual uint16_t 451 do_thumb16_special(size_t) 452 { gold_unreachable(); } 453 454 private: 455 // A template to implement do_write. 456 template<bool big_endian> 457 void inline 458 do_fixed_endian_write(unsigned char*, section_size_type); 459 460 // Its template. 461 const Stub_template* stub_template_; 462 // Offset within the section of containing this stub. 463 section_offset_type offset_; 464}; 465 466// Reloc stub class. These are stubs we use to fix up relocation because 467// of limited branch ranges. 468 469class Reloc_stub : public Stub 470{ 471 public: 472 static const unsigned int invalid_index = static_cast<unsigned int>(-1); 473 // We assume we never jump to this address. 474 static const Arm_address invalid_address = static_cast<Arm_address>(-1); 475 476 // Return destination address. 477 Arm_address 478 destination_address() const 479 { 480 gold_assert(this->destination_address_ != this->invalid_address); 481 return this->destination_address_; 482 } 483 484 // Set destination address. 485 void 486 set_destination_address(Arm_address address) 487 { 488 gold_assert(address != this->invalid_address); 489 this->destination_address_ = address; 490 } 491 492 // Reset destination address. 493 void 494 reset_destination_address() 495 { this->destination_address_ = this->invalid_address; } 496 497 // Determine stub type for a branch of a relocation of R_TYPE going 498 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set, 499 // the branch target is a thumb instruction. TARGET is used for look 500 // up ARM-specific linker settings. 501 static Stub_type 502 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address, 503 Arm_address branch_target, bool target_is_thumb); 504 505 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol 506 // and an addend. Since we treat global and local symbol differently, we 507 // use a Symbol object for a global symbol and a object-index pair for 508 // a local symbol. 509 class Key 510 { 511 public: 512 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and 513 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL 514 // and R_SYM must not be invalid_index. 515 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj, 516 unsigned int r_sym, int32_t addend) 517 : stub_type_(stub_type), addend_(addend) 518 { 519 if (symbol != NULL) 520 { 521 this->r_sym_ = Reloc_stub::invalid_index; 522 this->u_.symbol = symbol; 523 } 524 else 525 { 526 gold_assert(relobj != NULL && r_sym != invalid_index); 527 this->r_sym_ = r_sym; 528 this->u_.relobj = relobj; 529 } 530 } 531 532 ~Key() 533 { } 534 535 // Accessors: Keys are meant to be read-only object so no modifiers are 536 // provided. 537 538 // Return stub type. 539 Stub_type 540 stub_type() const 541 { return this->stub_type_; } 542 543 // Return the local symbol index or invalid_index. 544 unsigned int 545 r_sym() const 546 { return this->r_sym_; } 547 548 // Return the symbol if there is one. 549 const Symbol* 550 symbol() const 551 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; } 552 553 // Return the relobj if there is one. 554 const Relobj* 555 relobj() const 556 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; } 557 558 // Whether this equals to another key k. 559 bool 560 eq(const Key& k) const 561 { 562 return ((this->stub_type_ == k.stub_type_) 563 && (this->r_sym_ == k.r_sym_) 564 && ((this->r_sym_ != Reloc_stub::invalid_index) 565 ? (this->u_.relobj == k.u_.relobj) 566 : (this->u_.symbol == k.u_.symbol)) 567 && (this->addend_ == k.addend_)); 568 } 569 570 // Return a hash value. 571 size_t 572 hash_value() const 573 { 574 return (this->stub_type_ 575 ^ this->r_sym_ 576 ^ gold::string_hash<char>( 577 (this->r_sym_ != Reloc_stub::invalid_index) 578 ? this->u_.relobj->name().c_str() 579 : this->u_.symbol->name()) 580 ^ this->addend_); 581 } 582 583 // Functors for STL associative containers. 584 struct hash 585 { 586 size_t 587 operator()(const Key& k) const 588 { return k.hash_value(); } 589 }; 590 591 struct equal_to 592 { 593 bool 594 operator()(const Key& k1, const Key& k2) const 595 { return k1.eq(k2); } 596 }; 597 598 // Name of key. This is mainly for debugging. 599 std::string 600 name() const ATTRIBUTE_UNUSED; 601 602 private: 603 // Stub type. 604 Stub_type stub_type_; 605 // If this is a local symbol, this is the index in the defining object. 606 // Otherwise, it is invalid_index for a global symbol. 607 unsigned int r_sym_; 608 // If r_sym_ is an invalid index, this points to a global symbol. 609 // Otherwise, it points to a relobj. We used the unsized and target 610 // independent Symbol and Relobj classes instead of Sized_symbol<32> and 611 // Arm_relobj, in order to avoid making the stub class a template 612 // as most of the stub machinery is endianness-neutral. However, it 613 // may require a bit of casting done by users of this class. 614 union 615 { 616 const Symbol* symbol; 617 const Relobj* relobj; 618 } u_; 619 // Addend associated with a reloc. 620 int32_t addend_; 621 }; 622 623 protected: 624 // Reloc_stubs are created via a stub factory. So these are protected. 625 Reloc_stub(const Stub_template* stub_template) 626 : Stub(stub_template), destination_address_(invalid_address) 627 { } 628 629 ~Reloc_stub() 630 { } 631 632 friend class Stub_factory; 633 634 // Return the relocation target address of the i-th relocation in the 635 // stub. 636 Arm_address 637 do_reloc_target(size_t i) 638 { 639 // All reloc stub have only one relocation. 640 gold_assert(i == 0); 641 return this->destination_address_; 642 } 643 644 private: 645 // Address of destination. 646 Arm_address destination_address_; 647}; 648 649// Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit 650// THUMB branch that meets the following conditions: 651// 652// 1. The branch straddles across a page boundary. i.e. lower 12-bit of 653// branch address is 0xffe. 654// 2. The branch target address is in the same page as the first word of the 655// branch. 656// 3. The branch follows a 32-bit instruction which is not a branch. 657// 658// To do the fix up, we need to store the address of the branch instruction 659// and its target at least. We also need to store the original branch 660// instruction bits for the condition code in a conditional branch. The 661// condition code is used in a special instruction template. We also want 662// to identify input sections needing Cortex-A8 workaround quickly. We store 663// extra information about object and section index of the code section 664// containing a branch being fixed up. The information is used to mark 665// the code section when we finalize the Cortex-A8 stubs. 666// 667 668class Cortex_a8_stub : public Stub 669{ 670 public: 671 ~Cortex_a8_stub() 672 { } 673 674 // Return the object of the code section containing the branch being fixed 675 // up. 676 Relobj* 677 relobj() const 678 { return this->relobj_; } 679 680 // Return the section index of the code section containing the branch being 681 // fixed up. 682 unsigned int 683 shndx() const 684 { return this->shndx_; } 685 686 // Return the source address of stub. This is the address of the original 687 // branch instruction. LSB is 1 always set to indicate that it is a THUMB 688 // instruction. 689 Arm_address 690 source_address() const 691 { return this->source_address_; } 692 693 // Return the destination address of the stub. This is the branch taken 694 // address of the original branch instruction. LSB is 1 if it is a THUMB 695 // instruction address. 696 Arm_address 697 destination_address() const 698 { return this->destination_address_; } 699 700 // Return the instruction being fixed up. 701 uint32_t 702 original_insn() const 703 { return this->original_insn_; } 704 705 protected: 706 // Cortex_a8_stubs are created via a stub factory. So these are protected. 707 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj, 708 unsigned int shndx, Arm_address source_address, 709 Arm_address destination_address, uint32_t original_insn) 710 : Stub(stub_template), relobj_(relobj), shndx_(shndx), 711 source_address_(source_address | 1U), 712 destination_address_(destination_address), 713 original_insn_(original_insn) 714 { } 715 716 friend class Stub_factory; 717 718 // Return the relocation target address of the i-th relocation in the 719 // stub. 720 Arm_address 721 do_reloc_target(size_t i) 722 { 723 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond) 724 { 725 // The conditional branch veneer has two relocations. 726 gold_assert(i < 2); 727 return i == 0 ? this->source_address_ + 4 : this->destination_address_; 728 } 729 else 730 { 731 // All other Cortex-A8 stubs have only one relocation. 732 gold_assert(i == 0); 733 return this->destination_address_; 734 } 735 } 736 737 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template. 738 uint16_t 739 do_thumb16_special(size_t); 740 741 private: 742 // Object of the code section containing the branch being fixed up. 743 Relobj* relobj_; 744 // Section index of the code section containing the branch begin fixed up. 745 unsigned int shndx_; 746 // Source address of original branch. 747 Arm_address source_address_; 748 // Destination address of the original branch. 749 Arm_address destination_address_; 750 // Original branch instruction. This is needed for copying the condition 751 // code from a condition branch to its stub. 752 uint32_t original_insn_; 753}; 754 755// ARMv4 BX Rx branch relocation stub class. 756class Arm_v4bx_stub : public Stub 757{ 758 public: 759 ~Arm_v4bx_stub() 760 { } 761 762 // Return the associated register. 763 uint32_t 764 reg() const 765 { return this->reg_; } 766 767 protected: 768 // Arm V4BX stubs are created via a stub factory. So these are protected. 769 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg) 770 : Stub(stub_template), reg_(reg) 771 { } 772 773 friend class Stub_factory; 774 775 // Return the relocation target address of the i-th relocation in the 776 // stub. 777 Arm_address 778 do_reloc_target(size_t) 779 { gold_unreachable(); } 780 781 // This may be overridden in the child class. 782 virtual void 783 do_write(unsigned char* view, section_size_type view_size, bool big_endian) 784 { 785 if (big_endian) 786 this->do_fixed_endian_v4bx_write<true>(view, view_size); 787 else 788 this->do_fixed_endian_v4bx_write<false>(view, view_size); 789 } 790 791 private: 792 // A template to implement do_write. 793 template<bool big_endian> 794 void inline 795 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type) 796 { 797 const Insn_template* insns = this->stub_template()->insns(); 798 elfcpp::Swap<32, big_endian>::writeval(view, 799 (insns[0].data() 800 + (this->reg_ << 16))); 801 view += insns[0].size(); 802 elfcpp::Swap<32, big_endian>::writeval(view, 803 (insns[1].data() + this->reg_)); 804 view += insns[1].size(); 805 elfcpp::Swap<32, big_endian>::writeval(view, 806 (insns[2].data() + this->reg_)); 807 } 808 809 // A register index (r0-r14), which is associated with the stub. 810 uint32_t reg_; 811}; 812 813// Stub factory class. 814 815class Stub_factory 816{ 817 public: 818 // Return the unique instance of this class. 819 static const Stub_factory& 820 get_instance() 821 { 822 static Stub_factory singleton; 823 return singleton; 824 } 825 826 // Make a relocation stub. 827 Reloc_stub* 828 make_reloc_stub(Stub_type stub_type) const 829 { 830 gold_assert(stub_type >= arm_stub_reloc_first 831 && stub_type <= arm_stub_reloc_last); 832 return new Reloc_stub(this->stub_templates_[stub_type]); 833 } 834 835 // Make a Cortex-A8 stub. 836 Cortex_a8_stub* 837 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx, 838 Arm_address source, Arm_address destination, 839 uint32_t original_insn) const 840 { 841 gold_assert(stub_type >= arm_stub_cortex_a8_first 842 && stub_type <= arm_stub_cortex_a8_last); 843 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx, 844 source, destination, original_insn); 845 } 846 847 // Make an ARM V4BX relocation stub. 848 // This method creates a stub from the arm_stub_v4_veneer_bx template only. 849 Arm_v4bx_stub* 850 make_arm_v4bx_stub(uint32_t reg) const 851 { 852 gold_assert(reg < 0xf); 853 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx], 854 reg); 855 } 856 857 private: 858 // Constructor and destructor are protected since we only return a single 859 // instance created in Stub_factory::get_instance(). 860 861 Stub_factory(); 862 863 // A Stub_factory may not be copied since it is a singleton. 864 Stub_factory(const Stub_factory&); 865 Stub_factory& operator=(Stub_factory&); 866 867 // Stub templates. These are initialized in the constructor. 868 const Stub_template* stub_templates_[arm_stub_type_last+1]; 869}; 870 871// A class to hold stubs for the ARM target. 872 873template<bool big_endian> 874class Stub_table : public Output_data 875{ 876 public: 877 Stub_table(Arm_input_section<big_endian>* owner) 878 : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0), 879 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf), 880 prev_data_size_(0), prev_addralign_(1) 881 { } 882 883 ~Stub_table() 884 { } 885 886 // Owner of this stub table. 887 Arm_input_section<big_endian>* 888 owner() const 889 { return this->owner_; } 890 891 // Whether this stub table is empty. 892 bool 893 empty() const 894 { 895 return (this->reloc_stubs_.empty() 896 && this->cortex_a8_stubs_.empty() 897 && this->arm_v4bx_stubs_.empty()); 898 } 899 900 // Return the current data size. 901 off_t 902 current_data_size() const 903 { return this->current_data_size_for_child(); } 904 905 // Add a STUB using KEY. The caller is responsible for avoiding addition 906 // if a STUB with the same key has already been added. 907 void 908 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key) 909 { 910 const Stub_template* stub_template = stub->stub_template(); 911 gold_assert(stub_template->type() == key.stub_type()); 912 this->reloc_stubs_[key] = stub; 913 914 // Assign stub offset early. We can do this because we never remove 915 // reloc stubs and they are in the beginning of the stub table. 916 uint64_t align = stub_template->alignment(); 917 this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align); 918 stub->set_offset(this->reloc_stubs_size_); 919 this->reloc_stubs_size_ += stub_template->size(); 920 this->reloc_stubs_addralign_ = 921 std::max(this->reloc_stubs_addralign_, align); 922 } 923 924 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS. 925 // The caller is responsible for avoiding addition if a STUB with the same 926 // address has already been added. 927 void 928 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub) 929 { 930 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub); 931 this->cortex_a8_stubs_.insert(value); 932 } 933 934 // Add an ARM V4BX relocation stub. A register index will be retrieved 935 // from the stub. 936 void 937 add_arm_v4bx_stub(Arm_v4bx_stub* stub) 938 { 939 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL); 940 this->arm_v4bx_stubs_[stub->reg()] = stub; 941 } 942 943 // Remove all Cortex-A8 stubs. 944 void 945 remove_all_cortex_a8_stubs(); 946 947 // Look up a relocation stub using KEY. Return NULL if there is none. 948 Reloc_stub* 949 find_reloc_stub(const Reloc_stub::Key& key) const 950 { 951 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key); 952 return (p != this->reloc_stubs_.end()) ? p->second : NULL; 953 } 954 955 // Look up an arm v4bx relocation stub using the register index. 956 // Return NULL if there is none. 957 Arm_v4bx_stub* 958 find_arm_v4bx_stub(const uint32_t reg) const 959 { 960 gold_assert(reg < 0xf); 961 return this->arm_v4bx_stubs_[reg]; 962 } 963 964 // Relocate stubs in this stub table. 965 void 966 relocate_stubs(const Relocate_info<32, big_endian>*, 967 Target_arm<big_endian>*, Output_section*, 968 unsigned char*, Arm_address, section_size_type); 969 970 // Update data size and alignment at the end of a relaxation pass. Return 971 // true if either data size or alignment is different from that of the 972 // previous relaxation pass. 973 bool 974 update_data_size_and_addralign(); 975 976 // Finalize stubs. Set the offsets of all stubs and mark input sections 977 // needing the Cortex-A8 workaround. 978 void 979 finalize_stubs(); 980 981 // Apply Cortex-A8 workaround to an address range. 982 void 983 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*, 984 unsigned char*, Arm_address, 985 section_size_type); 986 987 protected: 988 // Write out section contents. 989 void 990 do_write(Output_file*); 991 992 // Return the required alignment. 993 uint64_t 994 do_addralign() const 995 { return this->prev_addralign_; } 996 997 // Reset address and file offset. 998 void 999 do_reset_address_and_file_offset() 1000 { this->set_current_data_size_for_child(this->prev_data_size_); } 1001 1002 // Set final data size. 1003 void 1004 set_final_data_size() 1005 { this->set_data_size(this->current_data_size()); } 1006 1007 private: 1008 // Relocate one stub. 1009 void 1010 relocate_stub(Stub*, const Relocate_info<32, big_endian>*, 1011 Target_arm<big_endian>*, Output_section*, 1012 unsigned char*, Arm_address, section_size_type); 1013 1014 // Unordered map of relocation stubs. 1015 typedef 1016 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash, 1017 Reloc_stub::Key::equal_to> 1018 Reloc_stub_map; 1019 1020 // List of Cortex-A8 stubs ordered by addresses of branches being 1021 // fixed up in output. 1022 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list; 1023 // List of Arm V4BX relocation stubs ordered by associated registers. 1024 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list; 1025 1026 // Owner of this stub table. 1027 Arm_input_section<big_endian>* owner_; 1028 // The relocation stubs. 1029 Reloc_stub_map reloc_stubs_; 1030 // Size of reloc stubs. 1031 off_t reloc_stubs_size_; 1032 // Maximum address alignment of reloc stubs. 1033 uint64_t reloc_stubs_addralign_; 1034 // The cortex_a8_stubs. 1035 Cortex_a8_stub_list cortex_a8_stubs_; 1036 // The Arm V4BX relocation stubs. 1037 Arm_v4bx_stub_list arm_v4bx_stubs_; 1038 // data size of this in the previous pass. 1039 off_t prev_data_size_; 1040 // address alignment of this in the previous pass. 1041 uint64_t prev_addralign_; 1042}; 1043 1044// Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry 1045// we add to the end of an EXIDX input section that goes into the output. 1046 1047class Arm_exidx_cantunwind : public Output_section_data 1048{ 1049 public: 1050 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx) 1051 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx) 1052 { } 1053 1054 // Return the object containing the section pointed by this. 1055 Relobj* 1056 relobj() const 1057 { return this->relobj_; } 1058 1059 // Return the section index of the section pointed by this. 1060 unsigned int 1061 shndx() const 1062 { return this->shndx_; } 1063 1064 protected: 1065 void 1066 do_write(Output_file* of) 1067 { 1068 if (parameters->target().is_big_endian()) 1069 this->do_fixed_endian_write<true>(of); 1070 else 1071 this->do_fixed_endian_write<false>(of); 1072 } 1073 1074 // Write to a map file. 1075 void 1076 do_print_to_mapfile(Mapfile* mapfile) const 1077 { mapfile->print_output_data(this, _("** ARM cantunwind")); } 1078 1079 private: 1080 // Implement do_write for a given endianness. 1081 template<bool big_endian> 1082 void inline 1083 do_fixed_endian_write(Output_file*); 1084 1085 // The object containing the section pointed by this. 1086 Relobj* relobj_; 1087 // The section index of the section pointed by this. 1088 unsigned int shndx_; 1089}; 1090 1091// During EXIDX coverage fix-up, we compact an EXIDX section. The 1092// Offset map is used to map input section offset within the EXIDX section 1093// to the output offset from the start of this EXIDX section. 1094 1095typedef std::map<section_offset_type, section_offset_type> 1096 Arm_exidx_section_offset_map; 1097 1098// Arm_exidx_merged_section class. This represents an EXIDX input section 1099// with some of its entries merged. 1100 1101class Arm_exidx_merged_section : public Output_relaxed_input_section 1102{ 1103 public: 1104 // Constructor for Arm_exidx_merged_section. 1105 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section. 1106 // SECTION_OFFSET_MAP points to a section offset map describing how 1107 // parts of the input section are mapped to output. DELETED_BYTES is 1108 // the number of bytes deleted from the EXIDX input section. 1109 Arm_exidx_merged_section( 1110 const Arm_exidx_input_section& exidx_input_section, 1111 const Arm_exidx_section_offset_map& section_offset_map, 1112 uint32_t deleted_bytes); 1113 1114 // Build output contents. 1115 void 1116 build_contents(const unsigned char*, section_size_type); 1117 1118 // Return the original EXIDX input section. 1119 const Arm_exidx_input_section& 1120 exidx_input_section() const 1121 { return this->exidx_input_section_; } 1122 1123 // Return the section offset map. 1124 const Arm_exidx_section_offset_map& 1125 section_offset_map() const 1126 { return this->section_offset_map_; } 1127 1128 protected: 1129 // Write merged section into file OF. 1130 void 1131 do_write(Output_file* of); 1132 1133 bool 1134 do_output_offset(const Relobj*, unsigned int, section_offset_type, 1135 section_offset_type*) const; 1136 1137 private: 1138 // Original EXIDX input section. 1139 const Arm_exidx_input_section& exidx_input_section_; 1140 // Section offset map. 1141 const Arm_exidx_section_offset_map& section_offset_map_; 1142 // Merged section contents. We need to keep build the merged section 1143 // and save it here to avoid accessing the original EXIDX section when 1144 // we cannot lock the sections' object. 1145 unsigned char* section_contents_; 1146}; 1147 1148// A class to wrap an ordinary input section containing executable code. 1149 1150template<bool big_endian> 1151class Arm_input_section : public Output_relaxed_input_section 1152{ 1153 public: 1154 Arm_input_section(Relobj* relobj, unsigned int shndx) 1155 : Output_relaxed_input_section(relobj, shndx, 1), 1156 original_addralign_(1), original_size_(0), stub_table_(NULL), 1157 original_contents_(NULL) 1158 { } 1159 1160 ~Arm_input_section() 1161 { delete[] this->original_contents_; } 1162 1163 // Initialize. 1164 void 1165 init(); 1166 1167 // Whether this is a stub table owner. 1168 bool 1169 is_stub_table_owner() const 1170 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; } 1171 1172 // Return the stub table. 1173 Stub_table<big_endian>* 1174 stub_table() const 1175 { return this->stub_table_; } 1176 1177 // Set the stub_table. 1178 void 1179 set_stub_table(Stub_table<big_endian>* stub_table) 1180 { this->stub_table_ = stub_table; } 1181 1182 // Downcast a base pointer to an Arm_input_section pointer. This is 1183 // not type-safe but we only use Arm_input_section not the base class. 1184 static Arm_input_section<big_endian>* 1185 as_arm_input_section(Output_relaxed_input_section* poris) 1186 { return static_cast<Arm_input_section<big_endian>*>(poris); } 1187 1188 // Return the original size of the section. 1189 uint32_t 1190 original_size() const 1191 { return this->original_size_; } 1192 1193 protected: 1194 // Write data to output file. 1195 void 1196 do_write(Output_file*); 1197 1198 // Return required alignment of this. 1199 uint64_t 1200 do_addralign() const 1201 { 1202 if (this->is_stub_table_owner()) 1203 return std::max(this->stub_table_->addralign(), 1204 static_cast<uint64_t>(this->original_addralign_)); 1205 else 1206 return this->original_addralign_; 1207 } 1208 1209 // Finalize data size. 1210 void 1211 set_final_data_size(); 1212 1213 // Reset address and file offset. 1214 void 1215 do_reset_address_and_file_offset(); 1216 1217 // Output offset. 1218 bool 1219 do_output_offset(const Relobj* object, unsigned int shndx, 1220 section_offset_type offset, 1221 section_offset_type* poutput) const 1222 { 1223 if ((object == this->relobj()) 1224 && (shndx == this->shndx()) 1225 && (offset >= 0) 1226 && (offset <= 1227 convert_types<section_offset_type, uint32_t>(this->original_size_))) 1228 { 1229 *poutput = offset; 1230 return true; 1231 } 1232 else 1233 return false; 1234 } 1235 1236 private: 1237 // Copying is not allowed. 1238 Arm_input_section(const Arm_input_section&); 1239 Arm_input_section& operator=(const Arm_input_section&); 1240 1241 // Address alignment of the original input section. 1242 uint32_t original_addralign_; 1243 // Section size of the original input section. 1244 uint32_t original_size_; 1245 // Stub table. 1246 Stub_table<big_endian>* stub_table_; 1247 // Original section contents. We have to make a copy here since the file 1248 // containing the original section may not be locked when we need to access 1249 // the contents. 1250 unsigned char* original_contents_; 1251}; 1252 1253// Arm_exidx_fixup class. This is used to define a number of methods 1254// and keep states for fixing up EXIDX coverage. 1255 1256class Arm_exidx_fixup 1257{ 1258 public: 1259 Arm_exidx_fixup(Output_section* exidx_output_section, 1260 bool merge_exidx_entries = true) 1261 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE), 1262 last_inlined_entry_(0), last_input_section_(NULL), 1263 section_offset_map_(NULL), first_output_text_section_(NULL), 1264 merge_exidx_entries_(merge_exidx_entries) 1265 { } 1266 1267 ~Arm_exidx_fixup() 1268 { delete this->section_offset_map_; } 1269 1270 // Process an EXIDX section for entry merging. SECTION_CONTENTS points 1271 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return 1272 // number of bytes to be deleted in output. If parts of the input EXIDX 1273 // section are merged a heap allocated Arm_exidx_section_offset_map is store 1274 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is 1275 // responsible for releasing it. 1276 template<bool big_endian> 1277 uint32_t 1278 process_exidx_section(const Arm_exidx_input_section* exidx_input_section, 1279 const unsigned char* section_contents, 1280 section_size_type section_size, 1281 Arm_exidx_section_offset_map** psection_offset_map); 1282 1283 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last 1284 // input section, if there is not one already. 1285 void 1286 add_exidx_cantunwind_as_needed(); 1287 1288 // Return the output section for the text section which is linked to the 1289 // first exidx input in output. 1290 Output_section* 1291 first_output_text_section() const 1292 { return this->first_output_text_section_; } 1293 1294 private: 1295 // Copying is not allowed. 1296 Arm_exidx_fixup(const Arm_exidx_fixup&); 1297 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&); 1298 1299 // Type of EXIDX unwind entry. 1300 enum Unwind_type 1301 { 1302 // No type. 1303 UT_NONE, 1304 // EXIDX_CANTUNWIND. 1305 UT_EXIDX_CANTUNWIND, 1306 // Inlined entry. 1307 UT_INLINED_ENTRY, 1308 // Normal entry. 1309 UT_NORMAL_ENTRY, 1310 }; 1311 1312 // Process an EXIDX entry. We only care about the second word of the 1313 // entry. Return true if the entry can be deleted. 1314 bool 1315 process_exidx_entry(uint32_t second_word); 1316 1317 // Update the current section offset map during EXIDX section fix-up. 1318 // If there is no map, create one. INPUT_OFFSET is the offset of a 1319 // reference point, DELETED_BYTES is the number of deleted by in the 1320 // section so far. If DELETE_ENTRY is true, the reference point and 1321 // all offsets after the previous reference point are discarded. 1322 void 1323 update_offset_map(section_offset_type input_offset, 1324 section_size_type deleted_bytes, bool delete_entry); 1325 1326 // EXIDX output section. 1327 Output_section* exidx_output_section_; 1328 // Unwind type of the last EXIDX entry processed. 1329 Unwind_type last_unwind_type_; 1330 // Last seen inlined EXIDX entry. 1331 uint32_t last_inlined_entry_; 1332 // Last processed EXIDX input section. 1333 const Arm_exidx_input_section* last_input_section_; 1334 // Section offset map created in process_exidx_section. 1335 Arm_exidx_section_offset_map* section_offset_map_; 1336 // Output section for the text section which is linked to the first exidx 1337 // input in output. 1338 Output_section* first_output_text_section_; 1339 1340 bool merge_exidx_entries_; 1341}; 1342 1343// Arm output section class. This is defined mainly to add a number of 1344// stub generation methods. 1345 1346template<bool big_endian> 1347class Arm_output_section : public Output_section 1348{ 1349 public: 1350 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list; 1351 1352 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section. 1353 Arm_output_section(const char* name, elfcpp::Elf_Word type, 1354 elfcpp::Elf_Xword flags) 1355 : Output_section(name, type, 1356 (type == elfcpp::SHT_ARM_EXIDX 1357 ? flags | elfcpp::SHF_LINK_ORDER 1358 : flags)) 1359 { 1360 if (type == elfcpp::SHT_ARM_EXIDX) 1361 this->set_always_keeps_input_sections(); 1362 } 1363 1364 ~Arm_output_section() 1365 { } 1366 1367 // Group input sections for stub generation. 1368 void 1369 group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*); 1370 1371 // Downcast a base pointer to an Arm_output_section pointer. This is 1372 // not type-safe but we only use Arm_output_section not the base class. 1373 static Arm_output_section<big_endian>* 1374 as_arm_output_section(Output_section* os) 1375 { return static_cast<Arm_output_section<big_endian>*>(os); } 1376 1377 // Append all input text sections in this into LIST. 1378 void 1379 append_text_sections_to_list(Text_section_list* list); 1380 1381 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION 1382 // is a list of text input sections sorted in ascending order of their 1383 // output addresses. 1384 void 1385 fix_exidx_coverage(Layout* layout, 1386 const Text_section_list& sorted_text_section, 1387 Symbol_table* symtab, 1388 bool merge_exidx_entries, 1389 const Task* task); 1390 1391 // Link an EXIDX section into its corresponding text section. 1392 void 1393 set_exidx_section_link(); 1394 1395 private: 1396 // For convenience. 1397 typedef Output_section::Input_section Input_section; 1398 typedef Output_section::Input_section_list Input_section_list; 1399 1400 // Create a stub group. 1401 void create_stub_group(Input_section_list::const_iterator, 1402 Input_section_list::const_iterator, 1403 Input_section_list::const_iterator, 1404 Target_arm<big_endian>*, 1405 std::vector<Output_relaxed_input_section*>*, 1406 const Task* task); 1407}; 1408 1409// Arm_exidx_input_section class. This represents an EXIDX input section. 1410 1411class Arm_exidx_input_section 1412{ 1413 public: 1414 static const section_offset_type invalid_offset = 1415 static_cast<section_offset_type>(-1); 1416 1417 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx, 1418 unsigned int link, uint32_t size, 1419 uint32_t addralign, uint32_t text_size) 1420 : relobj_(relobj), shndx_(shndx), link_(link), size_(size), 1421 addralign_(addralign), text_size_(text_size), has_errors_(false) 1422 { } 1423 1424 ~Arm_exidx_input_section() 1425 { } 1426 1427 // Accessors: This is a read-only class. 1428 1429 // Return the object containing this EXIDX input section. 1430 Relobj* 1431 relobj() const 1432 { return this->relobj_; } 1433 1434 // Return the section index of this EXIDX input section. 1435 unsigned int 1436 shndx() const 1437 { return this->shndx_; } 1438 1439 // Return the section index of linked text section in the same object. 1440 unsigned int 1441 link() const 1442 { return this->link_; } 1443 1444 // Return size of the EXIDX input section. 1445 uint32_t 1446 size() const 1447 { return this->size_; } 1448 1449 // Return address alignment of EXIDX input section. 1450 uint32_t 1451 addralign() const 1452 { return this->addralign_; } 1453 1454 // Return size of the associated text input section. 1455 uint32_t 1456 text_size() const 1457 { return this->text_size_; } 1458 1459 // Whether there are any errors in the EXIDX input section. 1460 bool 1461 has_errors() const 1462 { return this->has_errors_; } 1463 1464 // Set has-errors flag. 1465 void 1466 set_has_errors() 1467 { this->has_errors_ = true; } 1468 1469 private: 1470 // Object containing this. 1471 Relobj* relobj_; 1472 // Section index of this. 1473 unsigned int shndx_; 1474 // text section linked to this in the same object. 1475 unsigned int link_; 1476 // Size of this. For ARM 32-bit is sufficient. 1477 uint32_t size_; 1478 // Address alignment of this. For ARM 32-bit is sufficient. 1479 uint32_t addralign_; 1480 // Size of associated text section. 1481 uint32_t text_size_; 1482 // Whether this has any errors. 1483 bool has_errors_; 1484}; 1485 1486// Arm_relobj class. 1487 1488template<bool big_endian> 1489class Arm_relobj : public Sized_relobj_file<32, big_endian> 1490{ 1491 public: 1492 static const Arm_address invalid_address = static_cast<Arm_address>(-1); 1493 1494 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset, 1495 const typename elfcpp::Ehdr<32, big_endian>& ehdr) 1496 : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr), 1497 stub_tables_(), local_symbol_is_thumb_function_(), 1498 attributes_section_data_(NULL), mapping_symbols_info_(), 1499 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(), 1500 output_local_symbol_count_needs_update_(false), 1501 merge_flags_and_attributes_(true) 1502 { } 1503 1504 ~Arm_relobj() 1505 { delete this->attributes_section_data_; } 1506 1507 // Return the stub table of the SHNDX-th section if there is one. 1508 Stub_table<big_endian>* 1509 stub_table(unsigned int shndx) const 1510 { 1511 gold_assert(shndx < this->stub_tables_.size()); 1512 return this->stub_tables_[shndx]; 1513 } 1514 1515 // Set STUB_TABLE to be the stub_table of the SHNDX-th section. 1516 void 1517 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table) 1518 { 1519 gold_assert(shndx < this->stub_tables_.size()); 1520 this->stub_tables_[shndx] = stub_table; 1521 } 1522 1523 // Whether a local symbol is a THUMB function. R_SYM is the symbol table 1524 // index. This is only valid after do_count_local_symbol is called. 1525 bool 1526 local_symbol_is_thumb_function(unsigned int r_sym) const 1527 { 1528 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size()); 1529 return this->local_symbol_is_thumb_function_[r_sym]; 1530 } 1531 1532 // Scan all relocation sections for stub generation. 1533 void 1534 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*, 1535 const Layout*); 1536 1537 // Convert regular input section with index SHNDX to a relaxed section. 1538 void 1539 convert_input_section_to_relaxed_section(unsigned shndx) 1540 { 1541 // The stubs have relocations and we need to process them after writing 1542 // out the stubs. So relocation now must follow section write. 1543 this->set_section_offset(shndx, -1ULL); 1544 this->set_relocs_must_follow_section_writes(); 1545 } 1546 1547 // Downcast a base pointer to an Arm_relobj pointer. This is 1548 // not type-safe but we only use Arm_relobj not the base class. 1549 static Arm_relobj<big_endian>* 1550 as_arm_relobj(Relobj* relobj) 1551 { return static_cast<Arm_relobj<big_endian>*>(relobj); } 1552 1553 // Processor-specific flags in ELF file header. This is valid only after 1554 // reading symbols. 1555 elfcpp::Elf_Word 1556 processor_specific_flags() const 1557 { return this->processor_specific_flags_; } 1558 1559 // Attribute section data This is the contents of the .ARM.attribute section 1560 // if there is one. 1561 const Attributes_section_data* 1562 attributes_section_data() const 1563 { return this->attributes_section_data_; } 1564 1565 // Mapping symbol location. 1566 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position; 1567 1568 // Functor for STL container. 1569 struct Mapping_symbol_position_less 1570 { 1571 bool 1572 operator()(const Mapping_symbol_position& p1, 1573 const Mapping_symbol_position& p2) const 1574 { 1575 return (p1.first < p2.first 1576 || (p1.first == p2.first && p1.second < p2.second)); 1577 } 1578 }; 1579 1580 // We only care about the first character of a mapping symbol, so 1581 // we only store that instead of the whole symbol name. 1582 typedef std::map<Mapping_symbol_position, char, 1583 Mapping_symbol_position_less> Mapping_symbols_info; 1584 1585 // Whether a section contains any Cortex-A8 workaround. 1586 bool 1587 section_has_cortex_a8_workaround(unsigned int shndx) const 1588 { 1589 return (this->section_has_cortex_a8_workaround_ != NULL 1590 && (*this->section_has_cortex_a8_workaround_)[shndx]); 1591 } 1592 1593 // Mark a section that has Cortex-A8 workaround. 1594 void 1595 mark_section_for_cortex_a8_workaround(unsigned int shndx) 1596 { 1597 if (this->section_has_cortex_a8_workaround_ == NULL) 1598 this->section_has_cortex_a8_workaround_ = 1599 new std::vector<bool>(this->shnum(), false); 1600 (*this->section_has_cortex_a8_workaround_)[shndx] = true; 1601 } 1602 1603 // Return the EXIDX section of an text section with index SHNDX or NULL 1604 // if the text section has no associated EXIDX section. 1605 const Arm_exidx_input_section* 1606 exidx_input_section_by_link(unsigned int shndx) const 1607 { 1608 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx); 1609 return ((p != this->exidx_section_map_.end() 1610 && p->second->link() == shndx) 1611 ? p->second 1612 : NULL); 1613 } 1614 1615 // Return the EXIDX section with index SHNDX or NULL if there is none. 1616 const Arm_exidx_input_section* 1617 exidx_input_section_by_shndx(unsigned shndx) const 1618 { 1619 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx); 1620 return ((p != this->exidx_section_map_.end() 1621 && p->second->shndx() == shndx) 1622 ? p->second 1623 : NULL); 1624 } 1625 1626 // Whether output local symbol count needs updating. 1627 bool 1628 output_local_symbol_count_needs_update() const 1629 { return this->output_local_symbol_count_needs_update_; } 1630 1631 // Set output_local_symbol_count_needs_update flag to be true. 1632 void 1633 set_output_local_symbol_count_needs_update() 1634 { this->output_local_symbol_count_needs_update_ = true; } 1635 1636 // Update output local symbol count at the end of relaxation. 1637 void 1638 update_output_local_symbol_count(); 1639 1640 // Whether we want to merge processor-specific flags and attributes. 1641 bool 1642 merge_flags_and_attributes() const 1643 { return this->merge_flags_and_attributes_; } 1644 1645 // Export list of EXIDX section indices. 1646 void 1647 get_exidx_shndx_list(std::vector<unsigned int>* list) const 1648 { 1649 list->clear(); 1650 for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin(); 1651 p != this->exidx_section_map_.end(); 1652 ++p) 1653 { 1654 if (p->second->shndx() == p->first) 1655 list->push_back(p->first); 1656 } 1657 // Sort list to make result independent of implementation of map. 1658 std::sort(list->begin(), list->end()); 1659 } 1660 1661 protected: 1662 // Post constructor setup. 1663 void 1664 do_setup() 1665 { 1666 // Call parent's setup method. 1667 Sized_relobj_file<32, big_endian>::do_setup(); 1668 1669 // Initialize look-up tables. 1670 Stub_table_list empty_stub_table_list(this->shnum(), NULL); 1671 this->stub_tables_.swap(empty_stub_table_list); 1672 } 1673 1674 // Count the local symbols. 1675 void 1676 do_count_local_symbols(Stringpool_template<char>*, 1677 Stringpool_template<char>*); 1678 1679 void 1680 do_relocate_sections( 1681 const Symbol_table* symtab, const Layout* layout, 1682 const unsigned char* pshdrs, Output_file* of, 1683 typename Sized_relobj_file<32, big_endian>::Views* pivews); 1684 1685 // Read the symbol information. 1686 void 1687 do_read_symbols(Read_symbols_data* sd); 1688 1689 // Process relocs for garbage collection. 1690 void 1691 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*); 1692 1693 private: 1694 1695 // Whether a section needs to be scanned for relocation stubs. 1696 bool 1697 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&, 1698 const Relobj::Output_sections&, 1699 const Symbol_table*, const unsigned char*); 1700 1701 // Whether a section is a scannable text section. 1702 bool 1703 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int, 1704 const Output_section*, const Symbol_table*); 1705 1706 // Whether a section needs to be scanned for the Cortex-A8 erratum. 1707 bool 1708 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&, 1709 unsigned int, Output_section*, 1710 const Symbol_table*); 1711 1712 // Scan a section for the Cortex-A8 erratum. 1713 void 1714 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&, 1715 unsigned int, Output_section*, 1716 Target_arm<big_endian>*); 1717 1718 // Find the linked text section of an EXIDX section by looking at the 1719 // first relocation of the EXIDX section. PSHDR points to the section 1720 // headers of a relocation section and PSYMS points to the local symbols. 1721 // PSHNDX points to a location storing the text section index if found. 1722 // Return whether we can find the linked section. 1723 bool 1724 find_linked_text_section(const unsigned char* pshdr, 1725 const unsigned char* psyms, unsigned int* pshndx); 1726 1727 // 1728 // Make a new Arm_exidx_input_section object for EXIDX section with 1729 // index SHNDX and section header SHDR. TEXT_SHNDX is the section 1730 // index of the linked text section. 1731 void 1732 make_exidx_input_section(unsigned int shndx, 1733 const elfcpp::Shdr<32, big_endian>& shdr, 1734 unsigned int text_shndx, 1735 const elfcpp::Shdr<32, big_endian>& text_shdr); 1736 1737 // Return the output address of either a plain input section or a 1738 // relaxed input section. SHNDX is the section index. 1739 Arm_address 1740 simple_input_section_output_address(unsigned int, Output_section*); 1741 1742 typedef std::vector<Stub_table<big_endian>*> Stub_table_list; 1743 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*> 1744 Exidx_section_map; 1745 1746 // List of stub tables. 1747 Stub_table_list stub_tables_; 1748 // Bit vector to tell if a local symbol is a thumb function or not. 1749 // This is only valid after do_count_local_symbol is called. 1750 std::vector<bool> local_symbol_is_thumb_function_; 1751 // processor-specific flags in ELF file header. 1752 elfcpp::Elf_Word processor_specific_flags_; 1753 // Object attributes if there is an .ARM.attributes section or NULL. 1754 Attributes_section_data* attributes_section_data_; 1755 // Mapping symbols information. 1756 Mapping_symbols_info mapping_symbols_info_; 1757 // Bitmap to indicate sections with Cortex-A8 workaround or NULL. 1758 std::vector<bool>* section_has_cortex_a8_workaround_; 1759 // Map a text section to its associated .ARM.exidx section, if there is one. 1760 Exidx_section_map exidx_section_map_; 1761 // Whether output local symbol count needs updating. 1762 bool output_local_symbol_count_needs_update_; 1763 // Whether we merge processor flags and attributes of this object to 1764 // output. 1765 bool merge_flags_and_attributes_; 1766}; 1767 1768// Arm_dynobj class. 1769 1770template<bool big_endian> 1771class Arm_dynobj : public Sized_dynobj<32, big_endian> 1772{ 1773 public: 1774 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset, 1775 const elfcpp::Ehdr<32, big_endian>& ehdr) 1776 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr), 1777 processor_specific_flags_(0), attributes_section_data_(NULL) 1778 { } 1779 1780 ~Arm_dynobj() 1781 { delete this->attributes_section_data_; } 1782 1783 // Downcast a base pointer to an Arm_relobj pointer. This is 1784 // not type-safe but we only use Arm_relobj not the base class. 1785 static Arm_dynobj<big_endian>* 1786 as_arm_dynobj(Dynobj* dynobj) 1787 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); } 1788 1789 // Processor-specific flags in ELF file header. This is valid only after 1790 // reading symbols. 1791 elfcpp::Elf_Word 1792 processor_specific_flags() const 1793 { return this->processor_specific_flags_; } 1794 1795 // Attributes section data. 1796 const Attributes_section_data* 1797 attributes_section_data() const 1798 { return this->attributes_section_data_; } 1799 1800 protected: 1801 // Read the symbol information. 1802 void 1803 do_read_symbols(Read_symbols_data* sd); 1804 1805 private: 1806 // processor-specific flags in ELF file header. 1807 elfcpp::Elf_Word processor_specific_flags_; 1808 // Object attributes if there is an .ARM.attributes section or NULL. 1809 Attributes_section_data* attributes_section_data_; 1810}; 1811 1812// Functor to read reloc addends during stub generation. 1813 1814template<int sh_type, bool big_endian> 1815struct Stub_addend_reader 1816{ 1817 // Return the addend for a relocation of a particular type. Depending 1818 // on whether this is a REL or RELA relocation, read the addend from a 1819 // view or from a Reloc object. 1820 elfcpp::Elf_types<32>::Elf_Swxword 1821 operator()( 1822 unsigned int /* r_type */, 1823 const unsigned char* /* view */, 1824 const typename Reloc_types<sh_type, 1825 32, big_endian>::Reloc& /* reloc */) const; 1826}; 1827 1828// Specialized Stub_addend_reader for SHT_REL type relocation sections. 1829 1830template<bool big_endian> 1831struct Stub_addend_reader<elfcpp::SHT_REL, big_endian> 1832{ 1833 elfcpp::Elf_types<32>::Elf_Swxword 1834 operator()( 1835 unsigned int, 1836 const unsigned char*, 1837 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const; 1838}; 1839 1840// Specialized Stub_addend_reader for RELA type relocation sections. 1841// We currently do not handle RELA type relocation sections but it is trivial 1842// to implement the addend reader. This is provided for completeness and to 1843// make it easier to add support for RELA relocation sections in the future. 1844 1845template<bool big_endian> 1846struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian> 1847{ 1848 elfcpp::Elf_types<32>::Elf_Swxword 1849 operator()( 1850 unsigned int, 1851 const unsigned char*, 1852 const typename Reloc_types<elfcpp::SHT_RELA, 32, 1853 big_endian>::Reloc& reloc) const 1854 { return reloc.get_r_addend(); } 1855}; 1856 1857// Cortex_a8_reloc class. We keep record of relocation that may need 1858// the Cortex-A8 erratum workaround. 1859 1860class Cortex_a8_reloc 1861{ 1862 public: 1863 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type, 1864 Arm_address destination) 1865 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination) 1866 { } 1867 1868 ~Cortex_a8_reloc() 1869 { } 1870 1871 // Accessors: This is a read-only class. 1872 1873 // Return the relocation stub associated with this relocation if there is 1874 // one. 1875 const Reloc_stub* 1876 reloc_stub() const 1877 { return this->reloc_stub_; } 1878 1879 // Return the relocation type. 1880 unsigned int 1881 r_type() const 1882 { return this->r_type_; } 1883 1884 // Return the destination address of the relocation. LSB stores the THUMB 1885 // bit. 1886 Arm_address 1887 destination() const 1888 { return this->destination_; } 1889 1890 private: 1891 // Associated relocation stub if there is one, or NULL. 1892 const Reloc_stub* reloc_stub_; 1893 // Relocation type. 1894 unsigned int r_type_; 1895 // Destination address of this relocation. LSB is used to distinguish 1896 // ARM/THUMB mode. 1897 Arm_address destination_; 1898}; 1899 1900// Arm_output_data_got class. We derive this from Output_data_got to add 1901// extra methods to handle TLS relocations in a static link. 1902 1903template<bool big_endian> 1904class Arm_output_data_got : public Output_data_got<32, big_endian> 1905{ 1906 public: 1907 Arm_output_data_got(Symbol_table* symtab, Layout* layout) 1908 : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout) 1909 { } 1910 1911 // Add a static entry for the GOT entry at OFFSET. GSYM is a global 1912 // symbol and R_TYPE is the code of a dynamic relocation that needs to be 1913 // applied in a static link. 1914 void 1915 add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym) 1916 { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); } 1917 1918 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object 1919 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic 1920 // relocation that needs to be applied in a static link. 1921 void 1922 add_static_reloc(unsigned int got_offset, unsigned int r_type, 1923 Sized_relobj_file<32, big_endian>* relobj, 1924 unsigned int index) 1925 { 1926 this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj, 1927 index)); 1928 } 1929 1930 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries. 1931 // The first one is initialized to be 1, which is the module index for 1932 // the main executable and the second one 0. A reloc of the type 1933 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will 1934 // be applied by gold. GSYM is a global symbol. 1935 void 1936 add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym); 1937 1938 // Same as the above but for a local symbol in OBJECT with INDEX. 1939 void 1940 add_tls_gd32_with_static_reloc(unsigned int got_type, 1941 Sized_relobj_file<32, big_endian>* object, 1942 unsigned int index); 1943 1944 protected: 1945 // Write out the GOT table. 1946 void 1947 do_write(Output_file*); 1948 1949 private: 1950 // This class represent dynamic relocations that need to be applied by 1951 // gold because we are using TLS relocations in a static link. 1952 class Static_reloc 1953 { 1954 public: 1955 Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym) 1956 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true) 1957 { this->u_.global.symbol = gsym; } 1958 1959 Static_reloc(unsigned int got_offset, unsigned int r_type, 1960 Sized_relobj_file<32, big_endian>* relobj, unsigned int index) 1961 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false) 1962 { 1963 this->u_.local.relobj = relobj; 1964 this->u_.local.index = index; 1965 } 1966 1967 // Return the GOT offset. 1968 unsigned int 1969 got_offset() const 1970 { return this->got_offset_; } 1971 1972 // Relocation type. 1973 unsigned int 1974 r_type() const 1975 { return this->r_type_; } 1976 1977 // Whether the symbol is global or not. 1978 bool 1979 symbol_is_global() const 1980 { return this->symbol_is_global_; } 1981 1982 // For a relocation against a global symbol, the global symbol. 1983 Symbol* 1984 symbol() const 1985 { 1986 gold_assert(this->symbol_is_global_); 1987 return this->u_.global.symbol; 1988 } 1989 1990 // For a relocation against a local symbol, the defining object. 1991 Sized_relobj_file<32, big_endian>* 1992 relobj() const 1993 { 1994 gold_assert(!this->symbol_is_global_); 1995 return this->u_.local.relobj; 1996 } 1997 1998 // For a relocation against a local symbol, the local symbol index. 1999 unsigned int 2000 index() const 2001 { 2002 gold_assert(!this->symbol_is_global_); 2003 return this->u_.local.index; 2004 } 2005 2006 private: 2007 // GOT offset of the entry to which this relocation is applied. 2008 unsigned int got_offset_; 2009 // Type of relocation. 2010 unsigned int r_type_; 2011 // Whether this relocation is against a global symbol. 2012 bool symbol_is_global_; 2013 // A global or local symbol. 2014 union 2015 { 2016 struct 2017 { 2018 // For a global symbol, the symbol itself. 2019 Symbol* symbol; 2020 } global; 2021 struct 2022 { 2023 // For a local symbol, the object defining object. 2024 Sized_relobj_file<32, big_endian>* relobj; 2025 // For a local symbol, the symbol index. 2026 unsigned int index; 2027 } local; 2028 } u_; 2029 }; 2030 2031 // Symbol table of the output object. 2032 Symbol_table* symbol_table_; 2033 // Layout of the output object. 2034 Layout* layout_; 2035 // Static relocs to be applied to the GOT. 2036 std::vector<Static_reloc> static_relocs_; 2037}; 2038 2039// The ARM target has many relocation types with odd-sizes or noncontiguous 2040// bits. The default handling of relocatable relocation cannot process these 2041// relocations. So we have to extend the default code. 2042 2043template<bool big_endian, typename Classify_reloc> 2044class Arm_scan_relocatable_relocs : 2045 public Default_scan_relocatable_relocs<Classify_reloc> 2046{ 2047 public: 2048 // Return the strategy to use for a local symbol which is a section 2049 // symbol, given the relocation type. 2050 inline Relocatable_relocs::Reloc_strategy 2051 local_section_strategy(unsigned int r_type, Relobj*) 2052 { 2053 if (Classify_reloc::sh_type == elfcpp::SHT_RELA) 2054 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA; 2055 else 2056 { 2057 if (r_type == elfcpp::R_ARM_TARGET1 2058 || r_type == elfcpp::R_ARM_TARGET2) 2059 { 2060 const Target_arm<big_endian>* arm_target = 2061 Target_arm<big_endian>::default_target(); 2062 r_type = arm_target->get_real_reloc_type(r_type); 2063 } 2064 2065 switch(r_type) 2066 { 2067 // Relocations that write nothing. These exclude R_ARM_TARGET1 2068 // and R_ARM_TARGET2. 2069 case elfcpp::R_ARM_NONE: 2070 case elfcpp::R_ARM_V4BX: 2071 case elfcpp::R_ARM_TLS_GOTDESC: 2072 case elfcpp::R_ARM_TLS_CALL: 2073 case elfcpp::R_ARM_TLS_DESCSEQ: 2074 case elfcpp::R_ARM_THM_TLS_CALL: 2075 case elfcpp::R_ARM_GOTRELAX: 2076 case elfcpp::R_ARM_GNU_VTENTRY: 2077 case elfcpp::R_ARM_GNU_VTINHERIT: 2078 case elfcpp::R_ARM_THM_TLS_DESCSEQ16: 2079 case elfcpp::R_ARM_THM_TLS_DESCSEQ32: 2080 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0; 2081 // These should have been converted to something else above. 2082 case elfcpp::R_ARM_TARGET1: 2083 case elfcpp::R_ARM_TARGET2: 2084 gold_unreachable(); 2085 // Relocations that write full 32 bits and 2086 // have alignment of 1. 2087 case elfcpp::R_ARM_ABS32: 2088 case elfcpp::R_ARM_REL32: 2089 case elfcpp::R_ARM_SBREL32: 2090 case elfcpp::R_ARM_GOTOFF32: 2091 case elfcpp::R_ARM_BASE_PREL: 2092 case elfcpp::R_ARM_GOT_BREL: 2093 case elfcpp::R_ARM_BASE_ABS: 2094 case elfcpp::R_ARM_ABS32_NOI: 2095 case elfcpp::R_ARM_REL32_NOI: 2096 case elfcpp::R_ARM_PLT32_ABS: 2097 case elfcpp::R_ARM_GOT_ABS: 2098 case elfcpp::R_ARM_GOT_PREL: 2099 case elfcpp::R_ARM_TLS_GD32: 2100 case elfcpp::R_ARM_TLS_LDM32: 2101 case elfcpp::R_ARM_TLS_LDO32: 2102 case elfcpp::R_ARM_TLS_IE32: 2103 case elfcpp::R_ARM_TLS_LE32: 2104 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED; 2105 default: 2106 // For all other static relocations, return RELOC_SPECIAL. 2107 return Relocatable_relocs::RELOC_SPECIAL; 2108 } 2109 } 2110 } 2111}; 2112 2113template<bool big_endian> 2114class Target_arm : public Sized_target<32, big_endian> 2115{ 2116 public: 2117 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian> 2118 Reloc_section; 2119 2120 // When were are relocating a stub, we pass this as the relocation number. 2121 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1); 2122 2123 Target_arm(const Target::Target_info* info = &arm_info) 2124 : Sized_target<32, big_endian>(info), 2125 got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL), 2126 rel_dyn_(NULL), rel_irelative_(NULL), copy_relocs_(elfcpp::R_ARM_COPY), 2127 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false), 2128 stub_tables_(), stub_factory_(Stub_factory::get_instance()), 2129 should_force_pic_veneer_(false), 2130 arm_input_section_map_(), attributes_section_data_(NULL), 2131 fix_cortex_a8_(false), cortex_a8_relocs_info_(), 2132 target1_reloc_(elfcpp::R_ARM_ABS32), 2133 // This can be any reloc type but usually is R_ARM_GOT_PREL. 2134 target2_reloc_(elfcpp::R_ARM_GOT_PREL) 2135 { } 2136 2137 // Whether we force PCI branch veneers. 2138 bool 2139 should_force_pic_veneer() const 2140 { return this->should_force_pic_veneer_; } 2141 2142 // Set PIC veneer flag. 2143 void 2144 set_should_force_pic_veneer(bool value) 2145 { this->should_force_pic_veneer_ = value; } 2146 2147 // Whether we use THUMB-2 instructions. 2148 bool 2149 using_thumb2() const 2150 { 2151 Object_attribute* attr = 2152 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2153 int arch = attr->int_value(); 2154 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7; 2155 } 2156 2157 // Whether we use THUMB/THUMB-2 instructions only. 2158 bool 2159 using_thumb_only() const 2160 { 2161 Object_attribute* attr = 2162 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2163 2164 if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M 2165 || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M) 2166 return true; 2167 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7 2168 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M) 2169 return false; 2170 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile); 2171 return attr->int_value() == 'M'; 2172 } 2173 2174 // Whether we have an NOP instruction. If not, use mov r0, r0 instead. 2175 bool 2176 may_use_arm_nop() const 2177 { 2178 Object_attribute* attr = 2179 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2180 int arch = attr->int_value(); 2181 return (arch == elfcpp::TAG_CPU_ARCH_V6T2 2182 || arch == elfcpp::TAG_CPU_ARCH_V6K 2183 || arch == elfcpp::TAG_CPU_ARCH_V7 2184 || arch == elfcpp::TAG_CPU_ARCH_V7E_M); 2185 } 2186 2187 // Whether we have THUMB-2 NOP.W instruction. 2188 bool 2189 may_use_thumb2_nop() const 2190 { 2191 Object_attribute* attr = 2192 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2193 int arch = attr->int_value(); 2194 return (arch == elfcpp::TAG_CPU_ARCH_V6T2 2195 || arch == elfcpp::TAG_CPU_ARCH_V7 2196 || arch == elfcpp::TAG_CPU_ARCH_V7E_M); 2197 } 2198 2199 // Whether we have v4T interworking instructions available. 2200 bool 2201 may_use_v4t_interworking() const 2202 { 2203 Object_attribute* attr = 2204 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2205 int arch = attr->int_value(); 2206 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4 2207 && arch != elfcpp::TAG_CPU_ARCH_V4); 2208 } 2209 2210 // Whether we have v5T interworking instructions available. 2211 bool 2212 may_use_v5t_interworking() const 2213 { 2214 Object_attribute* attr = 2215 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 2216 int arch = attr->int_value(); 2217 if (parameters->options().fix_arm1176()) 2218 return (arch == elfcpp::TAG_CPU_ARCH_V6T2 2219 || arch == elfcpp::TAG_CPU_ARCH_V7 2220 || arch == elfcpp::TAG_CPU_ARCH_V6_M 2221 || arch == elfcpp::TAG_CPU_ARCH_V6S_M 2222 || arch == elfcpp::TAG_CPU_ARCH_V7E_M); 2223 else 2224 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4 2225 && arch != elfcpp::TAG_CPU_ARCH_V4 2226 && arch != elfcpp::TAG_CPU_ARCH_V4T); 2227 } 2228 2229 // Process the relocations to determine unreferenced sections for 2230 // garbage collection. 2231 void 2232 gc_process_relocs(Symbol_table* symtab, 2233 Layout* layout, 2234 Sized_relobj_file<32, big_endian>* object, 2235 unsigned int data_shndx, 2236 unsigned int sh_type, 2237 const unsigned char* prelocs, 2238 size_t reloc_count, 2239 Output_section* output_section, 2240 bool needs_special_offset_handling, 2241 size_t local_symbol_count, 2242 const unsigned char* plocal_symbols); 2243 2244 // Scan the relocations to look for symbol adjustments. 2245 void 2246 scan_relocs(Symbol_table* symtab, 2247 Layout* layout, 2248 Sized_relobj_file<32, big_endian>* object, 2249 unsigned int data_shndx, 2250 unsigned int sh_type, 2251 const unsigned char* prelocs, 2252 size_t reloc_count, 2253 Output_section* output_section, 2254 bool needs_special_offset_handling, 2255 size_t local_symbol_count, 2256 const unsigned char* plocal_symbols); 2257 2258 // Finalize the sections. 2259 void 2260 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*); 2261 2262 // Return the value to use for a dynamic symbol which requires special 2263 // treatment. 2264 uint64_t 2265 do_dynsym_value(const Symbol*) const; 2266 2267 // Return the plt address for globals. Since we have irelative plt entries, 2268 // address calculation is not as straightforward as plt_address + plt_offset. 2269 uint64_t 2270 do_plt_address_for_global(const Symbol* gsym) const 2271 { return this->plt_section()->address_for_global(gsym); } 2272 2273 // Return the plt address for locals. Since we have irelative plt entries, 2274 // address calculation is not as straightforward as plt_address + plt_offset. 2275 uint64_t 2276 do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const 2277 { return this->plt_section()->address_for_local(relobj, symndx); } 2278 2279 // Relocate a section. 2280 void 2281 relocate_section(const Relocate_info<32, big_endian>*, 2282 unsigned int sh_type, 2283 const unsigned char* prelocs, 2284 size_t reloc_count, 2285 Output_section* output_section, 2286 bool needs_special_offset_handling, 2287 unsigned char* view, 2288 Arm_address view_address, 2289 section_size_type view_size, 2290 const Reloc_symbol_changes*); 2291 2292 // Scan the relocs during a relocatable link. 2293 void 2294 scan_relocatable_relocs(Symbol_table* symtab, 2295 Layout* layout, 2296 Sized_relobj_file<32, big_endian>* object, 2297 unsigned int data_shndx, 2298 unsigned int sh_type, 2299 const unsigned char* prelocs, 2300 size_t reloc_count, 2301 Output_section* output_section, 2302 bool needs_special_offset_handling, 2303 size_t local_symbol_count, 2304 const unsigned char* plocal_symbols, 2305 Relocatable_relocs*); 2306 2307 // Scan the relocs for --emit-relocs. 2308 void 2309 emit_relocs_scan(Symbol_table* symtab, 2310 Layout* layout, 2311 Sized_relobj_file<32, big_endian>* object, 2312 unsigned int data_shndx, 2313 unsigned int sh_type, 2314 const unsigned char* prelocs, 2315 size_t reloc_count, 2316 Output_section* output_section, 2317 bool needs_special_offset_handling, 2318 size_t local_symbol_count, 2319 const unsigned char* plocal_syms, 2320 Relocatable_relocs* rr); 2321 2322 // Emit relocations for a section. 2323 void 2324 relocate_relocs(const Relocate_info<32, big_endian>*, 2325 unsigned int sh_type, 2326 const unsigned char* prelocs, 2327 size_t reloc_count, 2328 Output_section* output_section, 2329 typename elfcpp::Elf_types<32>::Elf_Off 2330 offset_in_output_section, 2331 unsigned char* view, 2332 Arm_address view_address, 2333 section_size_type view_size, 2334 unsigned char* reloc_view, 2335 section_size_type reloc_view_size); 2336 2337 // Perform target-specific processing in a relocatable link. This is 2338 // only used if we use the relocation strategy RELOC_SPECIAL. 2339 void 2340 relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo, 2341 unsigned int sh_type, 2342 const unsigned char* preloc_in, 2343 size_t relnum, 2344 Output_section* output_section, 2345 typename elfcpp::Elf_types<32>::Elf_Off 2346 offset_in_output_section, 2347 unsigned char* view, 2348 typename elfcpp::Elf_types<32>::Elf_Addr 2349 view_address, 2350 section_size_type view_size, 2351 unsigned char* preloc_out); 2352 2353 // Return whether SYM is defined by the ABI. 2354 bool 2355 do_is_defined_by_abi(const Symbol* sym) const 2356 { return strcmp(sym->name(), "__tls_get_addr") == 0; } 2357 2358 // Return whether there is a GOT section. 2359 bool 2360 has_got_section() const 2361 { return this->got_ != NULL; } 2362 2363 // Return the size of the GOT section. 2364 section_size_type 2365 got_size() const 2366 { 2367 gold_assert(this->got_ != NULL); 2368 return this->got_->data_size(); 2369 } 2370 2371 // Return the number of entries in the GOT. 2372 unsigned int 2373 got_entry_count() const 2374 { 2375 if (!this->has_got_section()) 2376 return 0; 2377 return this->got_size() / 4; 2378 } 2379 2380 // Return the number of entries in the PLT. 2381 unsigned int 2382 plt_entry_count() const; 2383 2384 // Return the offset of the first non-reserved PLT entry. 2385 unsigned int 2386 first_plt_entry_offset() const; 2387 2388 // Return the size of each PLT entry. 2389 unsigned int 2390 plt_entry_size() const; 2391 2392 // Get the section to use for IRELATIVE relocations, create it if necessary. 2393 Reloc_section* 2394 rel_irelative_section(Layout*); 2395 2396 // Map platform-specific reloc types 2397 unsigned int 2398 get_real_reloc_type(unsigned int r_type) const; 2399 2400 // 2401 // Methods to support stub-generations. 2402 // 2403 2404 // Return the stub factory 2405 const Stub_factory& 2406 stub_factory() const 2407 { return this->stub_factory_; } 2408 2409 // Make a new Arm_input_section object. 2410 Arm_input_section<big_endian>* 2411 new_arm_input_section(Relobj*, unsigned int); 2412 2413 // Find the Arm_input_section object corresponding to the SHNDX-th input 2414 // section of RELOBJ. 2415 Arm_input_section<big_endian>* 2416 find_arm_input_section(Relobj* relobj, unsigned int shndx) const; 2417 2418 // Make a new Stub_table 2419 Stub_table<big_endian>* 2420 new_stub_table(Arm_input_section<big_endian>*); 2421 2422 // Scan a section for stub generation. 2423 void 2424 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int, 2425 const unsigned char*, size_t, Output_section*, 2426 bool, const unsigned char*, Arm_address, 2427 section_size_type); 2428 2429 // Relocate a stub. 2430 void 2431 relocate_stub(Stub*, const Relocate_info<32, big_endian>*, 2432 Output_section*, unsigned char*, Arm_address, 2433 section_size_type); 2434 2435 // Get the default ARM target. 2436 static Target_arm<big_endian>* 2437 default_target() 2438 { 2439 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM 2440 && parameters->target().is_big_endian() == big_endian); 2441 return static_cast<Target_arm<big_endian>*>( 2442 parameters->sized_target<32, big_endian>()); 2443 } 2444 2445 // Whether NAME belongs to a mapping symbol. 2446 static bool 2447 is_mapping_symbol_name(const char* name) 2448 { 2449 return (name 2450 && name[0] == '$' 2451 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd') 2452 && (name[2] == '\0' || name[2] == '.')); 2453 } 2454 2455 // Whether we work around the Cortex-A8 erratum. 2456 bool 2457 fix_cortex_a8() const 2458 { return this->fix_cortex_a8_; } 2459 2460 // Whether we merge exidx entries in debuginfo. 2461 bool 2462 merge_exidx_entries() const 2463 { return parameters->options().merge_exidx_entries(); } 2464 2465 // Whether we fix R_ARM_V4BX relocation. 2466 // 0 - do not fix 2467 // 1 - replace with MOV instruction (armv4 target) 2468 // 2 - make interworking veneer (>= armv4t targets only) 2469 General_options::Fix_v4bx 2470 fix_v4bx() const 2471 { return parameters->options().fix_v4bx(); } 2472 2473 // Scan a span of THUMB code section for Cortex-A8 erratum. 2474 void 2475 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int, 2476 section_size_type, section_size_type, 2477 const unsigned char*, Arm_address); 2478 2479 // Apply Cortex-A8 workaround to a branch. 2480 void 2481 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address, 2482 unsigned char*, Arm_address); 2483 2484 protected: 2485 // Make the PLT-generator object. 2486 Output_data_plt_arm<big_endian>* 2487 make_data_plt(Layout* layout, 2488 Arm_output_data_got<big_endian>* got, 2489 Output_data_space* got_plt, 2490 Output_data_space* got_irelative) 2491 { return this->do_make_data_plt(layout, got, got_plt, got_irelative); } 2492 2493 // Make an ELF object. 2494 Object* 2495 do_make_elf_object(const std::string&, Input_file*, off_t, 2496 const elfcpp::Ehdr<32, big_endian>& ehdr); 2497 2498 Object* 2499 do_make_elf_object(const std::string&, Input_file*, off_t, 2500 const elfcpp::Ehdr<32, !big_endian>&) 2501 { gold_unreachable(); } 2502 2503 Object* 2504 do_make_elf_object(const std::string&, Input_file*, off_t, 2505 const elfcpp::Ehdr<64, false>&) 2506 { gold_unreachable(); } 2507 2508 Object* 2509 do_make_elf_object(const std::string&, Input_file*, off_t, 2510 const elfcpp::Ehdr<64, true>&) 2511 { gold_unreachable(); } 2512 2513 // Make an output section. 2514 Output_section* 2515 do_make_output_section(const char* name, elfcpp::Elf_Word type, 2516 elfcpp::Elf_Xword flags) 2517 { return new Arm_output_section<big_endian>(name, type, flags); } 2518 2519 void 2520 do_adjust_elf_header(unsigned char* view, int len); 2521 2522 // We only need to generate stubs, and hence perform relaxation if we are 2523 // not doing relocatable linking. 2524 bool 2525 do_may_relax() const 2526 { return !parameters->options().relocatable(); } 2527 2528 bool 2529 do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*); 2530 2531 // Determine whether an object attribute tag takes an integer, a 2532 // string or both. 2533 int 2534 do_attribute_arg_type(int tag) const; 2535 2536 // Reorder tags during output. 2537 int 2538 do_attributes_order(int num) const; 2539 2540 // This is called when the target is selected as the default. 2541 void 2542 do_select_as_default_target() 2543 { 2544 // No locking is required since there should only be one default target. 2545 // We cannot have both the big-endian and little-endian ARM targets 2546 // as the default. 2547 gold_assert(arm_reloc_property_table == NULL); 2548 arm_reloc_property_table = new Arm_reloc_property_table(); 2549 if (parameters->options().user_set_target1_rel()) 2550 { 2551 // FIXME: This is not strictly compatible with ld, which allows both 2552 // --target1-abs and --target-rel to be given. 2553 if (parameters->options().user_set_target1_abs()) 2554 gold_error(_("Cannot use both --target1-abs and --target1-rel.")); 2555 else 2556 this->target1_reloc_ = elfcpp::R_ARM_REL32; 2557 } 2558 // We don't need to handle --target1-abs because target1_reloc_ is set 2559 // to elfcpp::R_ARM_ABS32 in the member initializer list. 2560 2561 if (parameters->options().user_set_target2()) 2562 { 2563 const char* target2 = parameters->options().target2(); 2564 if (strcmp(target2, "rel") == 0) 2565 this->target2_reloc_ = elfcpp::R_ARM_REL32; 2566 else if (strcmp(target2, "abs") == 0) 2567 this->target2_reloc_ = elfcpp::R_ARM_ABS32; 2568 else if (strcmp(target2, "got-rel") == 0) 2569 this->target2_reloc_ = elfcpp::R_ARM_GOT_PREL; 2570 else 2571 gold_unreachable(); 2572 } 2573 } 2574 2575 // Virtual function which is set to return true by a target if 2576 // it can use relocation types to determine if a function's 2577 // pointer is taken. 2578 virtual bool 2579 do_can_check_for_function_pointers() const 2580 { return true; } 2581 2582 // Whether a section called SECTION_NAME may have function pointers to 2583 // sections not eligible for safe ICF folding. 2584 virtual bool 2585 do_section_may_have_icf_unsafe_pointers(const char* section_name) const 2586 { 2587 return (!is_prefix_of(".ARM.exidx", section_name) 2588 && !is_prefix_of(".ARM.extab", section_name) 2589 && Target::do_section_may_have_icf_unsafe_pointers(section_name)); 2590 } 2591 2592 virtual void 2593 do_define_standard_symbols(Symbol_table*, Layout*); 2594 2595 virtual Output_data_plt_arm<big_endian>* 2596 do_make_data_plt(Layout* layout, 2597 Arm_output_data_got<big_endian>* got, 2598 Output_data_space* got_plt, 2599 Output_data_space* got_irelative) 2600 { 2601 gold_assert(got_plt != NULL && got_irelative != NULL); 2602 if (parameters->options().long_plt()) 2603 return new Output_data_plt_arm_long<big_endian>( 2604 layout, got, got_plt, got_irelative); 2605 else 2606 return new Output_data_plt_arm_short<big_endian>( 2607 layout, got, got_plt, got_irelative); 2608 } 2609 2610 private: 2611 // The class which scans relocations. 2612 class Scan 2613 { 2614 public: 2615 Scan() 2616 : issued_non_pic_error_(false) 2617 { } 2618 2619 static inline int 2620 get_reference_flags(unsigned int r_type); 2621 2622 inline void 2623 local(Symbol_table* symtab, Layout* layout, Target_arm* target, 2624 Sized_relobj_file<32, big_endian>* object, 2625 unsigned int data_shndx, 2626 Output_section* output_section, 2627 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, 2628 const elfcpp::Sym<32, big_endian>& lsym, 2629 bool is_discarded); 2630 2631 inline void 2632 global(Symbol_table* symtab, Layout* layout, Target_arm* target, 2633 Sized_relobj_file<32, big_endian>* object, 2634 unsigned int data_shndx, 2635 Output_section* output_section, 2636 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type, 2637 Symbol* gsym); 2638 2639 inline bool 2640 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* , 2641 Sized_relobj_file<32, big_endian>* , 2642 unsigned int , 2643 Output_section* , 2644 const elfcpp::Rel<32, big_endian>& , 2645 unsigned int , 2646 const elfcpp::Sym<32, big_endian>&); 2647 2648 inline bool 2649 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* , 2650 Sized_relobj_file<32, big_endian>* , 2651 unsigned int , 2652 Output_section* , 2653 const elfcpp::Rel<32, big_endian>& , 2654 unsigned int , Symbol*); 2655 2656 private: 2657 static void 2658 unsupported_reloc_local(Sized_relobj_file<32, big_endian>*, 2659 unsigned int r_type); 2660 2661 static void 2662 unsupported_reloc_global(Sized_relobj_file<32, big_endian>*, 2663 unsigned int r_type, Symbol*); 2664 2665 void 2666 check_non_pic(Relobj*, unsigned int r_type); 2667 2668 // Almost identical to Symbol::needs_plt_entry except that it also 2669 // handles STT_ARM_TFUNC. 2670 static bool 2671 symbol_needs_plt_entry(const Symbol* sym) 2672 { 2673 // An undefined symbol from an executable does not need a PLT entry. 2674 if (sym->is_undefined() && !parameters->options().shared()) 2675 return false; 2676 2677 if (sym->type() == elfcpp::STT_GNU_IFUNC) 2678 return true; 2679 2680 return (!parameters->doing_static_link() 2681 && (sym->type() == elfcpp::STT_FUNC 2682 || sym->type() == elfcpp::STT_ARM_TFUNC) 2683 && (sym->is_from_dynobj() 2684 || sym->is_undefined() 2685 || sym->is_preemptible())); 2686 } 2687 2688 inline bool 2689 possible_function_pointer_reloc(unsigned int r_type); 2690 2691 // Whether a plt entry is needed for ifunc. 2692 bool 2693 reloc_needs_plt_for_ifunc(Sized_relobj_file<32, big_endian>*, 2694 unsigned int r_type); 2695 2696 // Whether we have issued an error about a non-PIC compilation. 2697 bool issued_non_pic_error_; 2698 }; 2699 2700 // The class which implements relocation. 2701 class Relocate 2702 { 2703 public: 2704 Relocate() 2705 { } 2706 2707 ~Relocate() 2708 { } 2709 2710 // Return whether the static relocation needs to be applied. 2711 inline bool 2712 should_apply_static_reloc(const Sized_symbol<32>* gsym, 2713 unsigned int r_type, 2714 bool is_32bit, 2715 Output_section* output_section); 2716 2717 // Do a relocation. Return false if the caller should not issue 2718 // any warnings about this relocation. 2719 inline bool 2720 relocate(const Relocate_info<32, big_endian>*, unsigned int, 2721 Target_arm*, Output_section*, size_t, const unsigned char*, 2722 const Sized_symbol<32>*, const Symbol_value<32>*, 2723 unsigned char*, Arm_address, section_size_type); 2724 2725 // Return whether we want to pass flag NON_PIC_REF for this 2726 // reloc. This means the relocation type accesses a symbol not via 2727 // GOT or PLT. 2728 static inline bool 2729 reloc_is_non_pic(unsigned int r_type) 2730 { 2731 switch (r_type) 2732 { 2733 // These relocation types reference GOT or PLT entries explicitly. 2734 case elfcpp::R_ARM_GOT_BREL: 2735 case elfcpp::R_ARM_GOT_ABS: 2736 case elfcpp::R_ARM_GOT_PREL: 2737 case elfcpp::R_ARM_GOT_BREL12: 2738 case elfcpp::R_ARM_PLT32_ABS: 2739 case elfcpp::R_ARM_TLS_GD32: 2740 case elfcpp::R_ARM_TLS_LDM32: 2741 case elfcpp::R_ARM_TLS_IE32: 2742 case elfcpp::R_ARM_TLS_IE12GP: 2743 2744 // These relocate types may use PLT entries. 2745 case elfcpp::R_ARM_CALL: 2746 case elfcpp::R_ARM_THM_CALL: 2747 case elfcpp::R_ARM_JUMP24: 2748 case elfcpp::R_ARM_THM_JUMP24: 2749 case elfcpp::R_ARM_THM_JUMP19: 2750 case elfcpp::R_ARM_PLT32: 2751 case elfcpp::R_ARM_THM_XPC22: 2752 case elfcpp::R_ARM_PREL31: 2753 case elfcpp::R_ARM_SBREL31: 2754 return false; 2755 2756 default: 2757 return true; 2758 } 2759 } 2760 2761 private: 2762 // Do a TLS relocation. 2763 inline typename Arm_relocate_functions<big_endian>::Status 2764 relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*, 2765 size_t, const elfcpp::Rel<32, big_endian>&, unsigned int, 2766 const Sized_symbol<32>*, const Symbol_value<32>*, 2767 unsigned char*, elfcpp::Elf_types<32>::Elf_Addr, 2768 section_size_type); 2769 2770 }; 2771 2772 // A class for inquiring about properties of a relocation, 2773 // used while scanning relocs during a relocatable link and 2774 // garbage collection. 2775 class Classify_reloc : 2776 public gold::Default_classify_reloc<elfcpp::SHT_REL, 32, big_endian> 2777 { 2778 public: 2779 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc 2780 Reltype; 2781 2782 // Return the explicit addend of the relocation (return 0 for SHT_REL). 2783 static typename elfcpp::Elf_types<32>::Elf_Swxword 2784 get_r_addend(const Reltype*) 2785 { return 0; } 2786 2787 // Return the size of the addend of the relocation (only used for SHT_REL). 2788 static unsigned int 2789 get_size_for_reloc(unsigned int, Relobj*); 2790 }; 2791 2792 // Adjust TLS relocation type based on the options and whether this 2793 // is a local symbol. 2794 static tls::Tls_optimization 2795 optimize_tls_reloc(bool is_final, int r_type); 2796 2797 // Get the GOT section, creating it if necessary. 2798 Arm_output_data_got<big_endian>* 2799 got_section(Symbol_table*, Layout*); 2800 2801 // Get the GOT PLT section. 2802 Output_data_space* 2803 got_plt_section() const 2804 { 2805 gold_assert(this->got_plt_ != NULL); 2806 return this->got_plt_; 2807 } 2808 2809 // Create the PLT section. 2810 void 2811 make_plt_section(Symbol_table* symtab, Layout* layout); 2812 2813 // Create a PLT entry for a global symbol. 2814 void 2815 make_plt_entry(Symbol_table*, Layout*, Symbol*); 2816 2817 // Create a PLT entry for a local STT_GNU_IFUNC symbol. 2818 void 2819 make_local_ifunc_plt_entry(Symbol_table*, Layout*, 2820 Sized_relobj_file<32, big_endian>* relobj, 2821 unsigned int local_sym_index); 2822 2823 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment. 2824 void 2825 define_tls_base_symbol(Symbol_table*, Layout*); 2826 2827 // Create a GOT entry for the TLS module index. 2828 unsigned int 2829 got_mod_index_entry(Symbol_table* symtab, Layout* layout, 2830 Sized_relobj_file<32, big_endian>* object); 2831 2832 // Get the PLT section. 2833 const Output_data_plt_arm<big_endian>* 2834 plt_section() const 2835 { 2836 gold_assert(this->plt_ != NULL); 2837 return this->plt_; 2838 } 2839 2840 // Get the dynamic reloc section, creating it if necessary. 2841 Reloc_section* 2842 rel_dyn_section(Layout*); 2843 2844 // Get the section to use for TLS_DESC relocations. 2845 Reloc_section* 2846 rel_tls_desc_section(Layout*) const; 2847 2848 // Return true if the symbol may need a COPY relocation. 2849 // References from an executable object to non-function symbols 2850 // defined in a dynamic object may need a COPY relocation. 2851 bool 2852 may_need_copy_reloc(Symbol* gsym) 2853 { 2854 return (gsym->type() != elfcpp::STT_ARM_TFUNC 2855 && gsym->may_need_copy_reloc()); 2856 } 2857 2858 // Add a potential copy relocation. 2859 void 2860 copy_reloc(Symbol_table* symtab, Layout* layout, 2861 Sized_relobj_file<32, big_endian>* object, 2862 unsigned int shndx, Output_section* output_section, 2863 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc) 2864 { 2865 unsigned int r_type = elfcpp::elf_r_type<32>(reloc.get_r_info()); 2866 this->copy_relocs_.copy_reloc(symtab, layout, 2867 symtab->get_sized_symbol<32>(sym), 2868 object, shndx, output_section, 2869 r_type, reloc.get_r_offset(), 0, 2870 this->rel_dyn_section(layout)); 2871 } 2872 2873 // Whether two EABI versions are compatible. 2874 static bool 2875 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2); 2876 2877 // Merge processor-specific flags from input object and those in the ELF 2878 // header of the output. 2879 void 2880 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word); 2881 2882 // Get the secondary compatible architecture. 2883 static int 2884 get_secondary_compatible_arch(const Attributes_section_data*); 2885 2886 // Set the secondary compatible architecture. 2887 static void 2888 set_secondary_compatible_arch(Attributes_section_data*, int); 2889 2890 static int 2891 tag_cpu_arch_combine(const char*, int, int*, int, int); 2892 2893 // Helper to print AEABI enum tag value. 2894 static std::string 2895 aeabi_enum_name(unsigned int); 2896 2897 // Return string value for TAG_CPU_name. 2898 static std::string 2899 tag_cpu_name_value(unsigned int); 2900 2901 // Query attributes object to see if integer divide instructions may be 2902 // present in an object. 2903 static bool 2904 attributes_accept_div(int arch, int profile, 2905 const Object_attribute* div_attr); 2906 2907 // Query attributes object to see if integer divide instructions are 2908 // forbidden to be in the object. This is not the inverse of 2909 // attributes_accept_div. 2910 static bool 2911 attributes_forbid_div(const Object_attribute* div_attr); 2912 2913 // Merge object attributes from input object and those in the output. 2914 void 2915 merge_object_attributes(const char*, const Attributes_section_data*); 2916 2917 // Helper to get an AEABI object attribute 2918 Object_attribute* 2919 get_aeabi_object_attribute(int tag) const 2920 { 2921 Attributes_section_data* pasd = this->attributes_section_data_; 2922 gold_assert(pasd != NULL); 2923 Object_attribute* attr = 2924 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag); 2925 gold_assert(attr != NULL); 2926 return attr; 2927 } 2928 2929 // 2930 // Methods to support stub-generations. 2931 // 2932 2933 // Group input sections for stub generation. 2934 void 2935 group_sections(Layout*, section_size_type, bool, const Task*); 2936 2937 // Scan a relocation for stub generation. 2938 void 2939 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int, 2940 const Sized_symbol<32>*, unsigned int, 2941 const Symbol_value<32>*, 2942 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address); 2943 2944 // Scan a relocation section for stub. 2945 template<int sh_type> 2946 void 2947 scan_reloc_section_for_stubs( 2948 const Relocate_info<32, big_endian>* relinfo, 2949 const unsigned char* prelocs, 2950 size_t reloc_count, 2951 Output_section* output_section, 2952 bool needs_special_offset_handling, 2953 const unsigned char* view, 2954 elfcpp::Elf_types<32>::Elf_Addr view_address, 2955 section_size_type); 2956 2957 // Fix .ARM.exidx section coverage. 2958 void 2959 fix_exidx_coverage(Layout*, const Input_objects*, 2960 Arm_output_section<big_endian>*, Symbol_table*, 2961 const Task*); 2962 2963 // Functors for STL set. 2964 struct output_section_address_less_than 2965 { 2966 bool 2967 operator()(const Output_section* s1, const Output_section* s2) const 2968 { return s1->address() < s2->address(); } 2969 }; 2970 2971 // Information about this specific target which we pass to the 2972 // general Target structure. 2973 static const Target::Target_info arm_info; 2974 2975 // The types of GOT entries needed for this platform. 2976 // These values are exposed to the ABI in an incremental link. 2977 // Do not renumber existing values without changing the version 2978 // number of the .gnu_incremental_inputs section. 2979 enum Got_type 2980 { 2981 GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol 2982 GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset 2983 GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset 2984 GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair 2985 GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair 2986 }; 2987 2988 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list; 2989 2990 // Map input section to Arm_input_section. 2991 typedef Unordered_map<Section_id, 2992 Arm_input_section<big_endian>*, 2993 Section_id_hash> 2994 Arm_input_section_map; 2995 2996 // Map output addresses to relocs for Cortex-A8 erratum. 2997 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*> 2998 Cortex_a8_relocs_info; 2999 3000 // The GOT section. 3001 Arm_output_data_got<big_endian>* got_; 3002 // The PLT section. 3003 Output_data_plt_arm<big_endian>* plt_; 3004 // The GOT PLT section. 3005 Output_data_space* got_plt_; 3006 // The GOT section for IRELATIVE relocations. 3007 Output_data_space* got_irelative_; 3008 // The dynamic reloc section. 3009 Reloc_section* rel_dyn_; 3010 // The section to use for IRELATIVE relocs. 3011 Reloc_section* rel_irelative_; 3012 // Relocs saved to avoid a COPY reloc. 3013 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_; 3014 // Offset of the GOT entry for the TLS module index. 3015 unsigned int got_mod_index_offset_; 3016 // True if the _TLS_MODULE_BASE_ symbol has been defined. 3017 bool tls_base_symbol_defined_; 3018 // Vector of Stub_tables created. 3019 Stub_table_list stub_tables_; 3020 // Stub factory. 3021 const Stub_factory &stub_factory_; 3022 // Whether we force PIC branch veneers. 3023 bool should_force_pic_veneer_; 3024 // Map for locating Arm_input_sections. 3025 Arm_input_section_map arm_input_section_map_; 3026 // Attributes section data in output. 3027 Attributes_section_data* attributes_section_data_; 3028 // Whether we want to fix code for Cortex-A8 erratum. 3029 bool fix_cortex_a8_; 3030 // Map addresses to relocs for Cortex-A8 erratum. 3031 Cortex_a8_relocs_info cortex_a8_relocs_info_; 3032 // What R_ARM_TARGET1 maps to. It can be R_ARM_REL32 or R_ARM_ABS32. 3033 unsigned int target1_reloc_; 3034 // What R_ARM_TARGET2 maps to. It should be one of R_ARM_REL32, R_ARM_ABS32 3035 // and R_ARM_GOT_PREL. 3036 unsigned int target2_reloc_; 3037}; 3038 3039template<bool big_endian> 3040const Target::Target_info Target_arm<big_endian>::arm_info = 3041{ 3042 32, // size 3043 big_endian, // is_big_endian 3044 elfcpp::EM_ARM, // machine_code 3045 false, // has_make_symbol 3046 false, // has_resolve 3047 false, // has_code_fill 3048 true, // is_default_stack_executable 3049 false, // can_icf_inline_merge_sections 3050 '\0', // wrap_char 3051 "/usr/lib/libc.so.1", // dynamic_linker 3052 0x8000, // default_text_segment_address 3053 0x1000, // abi_pagesize (overridable by -z max-page-size) 3054 0x1000, // common_pagesize (overridable by -z common-page-size) 3055 false, // isolate_execinstr 3056 0, // rosegment_gap 3057 elfcpp::SHN_UNDEF, // small_common_shndx 3058 elfcpp::SHN_UNDEF, // large_common_shndx 3059 0, // small_common_section_flags 3060 0, // large_common_section_flags 3061 ".ARM.attributes", // attributes_section 3062 "aeabi", // attributes_vendor 3063 "_start", // entry_symbol_name 3064 32, // hash_entry_size 3065}; 3066 3067// Arm relocate functions class 3068// 3069 3070template<bool big_endian> 3071class Arm_relocate_functions : public Relocate_functions<32, big_endian> 3072{ 3073 public: 3074 typedef enum 3075 { 3076 STATUS_OKAY, // No error during relocation. 3077 STATUS_OVERFLOW, // Relocation overflow. 3078 STATUS_BAD_RELOC // Relocation cannot be applied. 3079 } Status; 3080 3081 private: 3082 typedef Relocate_functions<32, big_endian> Base; 3083 typedef Arm_relocate_functions<big_endian> This; 3084 3085 // Encoding of imm16 argument for movt and movw ARM instructions 3086 // from ARM ARM: 3087 // 3088 // imm16 := imm4 | imm12 3089 // 3090 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0 3091 // +-------+---------------+-------+-------+-----------------------+ 3092 // | | |imm4 | |imm12 | 3093 // +-------+---------------+-------+-------+-----------------------+ 3094 3095 // Extract the relocation addend from VAL based on the ARM 3096 // instruction encoding described above. 3097 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3098 extract_arm_movw_movt_addend( 3099 typename elfcpp::Swap<32, big_endian>::Valtype val) 3100 { 3101 // According to the Elf ABI for ARM Architecture the immediate 3102 // field is sign-extended to form the addend. 3103 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff)); 3104 } 3105 3106 // Insert X into VAL based on the ARM instruction encoding described 3107 // above. 3108 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3109 insert_val_arm_movw_movt( 3110 typename elfcpp::Swap<32, big_endian>::Valtype val, 3111 typename elfcpp::Swap<32, big_endian>::Valtype x) 3112 { 3113 val &= 0xfff0f000; 3114 val |= x & 0x0fff; 3115 val |= (x & 0xf000) << 4; 3116 return val; 3117 } 3118 3119 // Encoding of imm16 argument for movt and movw Thumb2 instructions 3120 // from ARM ARM: 3121 // 3122 // imm16 := imm4 | i | imm3 | imm8 3123 // 3124 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0 3125 // +---------+-+-----------+-------++-+-----+-------+---------------+ 3126 // | |i| |imm4 || |imm3 | |imm8 | 3127 // +---------+-+-----------+-------++-+-----+-------+---------------+ 3128 3129 // Extract the relocation addend from VAL based on the Thumb2 3130 // instruction encoding described above. 3131 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3132 extract_thumb_movw_movt_addend( 3133 typename elfcpp::Swap<32, big_endian>::Valtype val) 3134 { 3135 // According to the Elf ABI for ARM Architecture the immediate 3136 // field is sign-extended to form the addend. 3137 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) 3138 | ((val >> 15) & 0x0800) 3139 | ((val >> 4) & 0x0700) 3140 | (val & 0x00ff)); 3141 } 3142 3143 // Insert X into VAL based on the Thumb2 instruction encoding 3144 // described above. 3145 static inline typename elfcpp::Swap<32, big_endian>::Valtype 3146 insert_val_thumb_movw_movt( 3147 typename elfcpp::Swap<32, big_endian>::Valtype val, 3148 typename elfcpp::Swap<32, big_endian>::Valtype x) 3149 { 3150 val &= 0xfbf08f00; 3151 val |= (x & 0xf000) << 4; 3152 val |= (x & 0x0800) << 15; 3153 val |= (x & 0x0700) << 4; 3154 val |= (x & 0x00ff); 3155 return val; 3156 } 3157 3158 // Calculate the smallest constant Kn for the specified residual. 3159 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) 3160 static uint32_t 3161 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual) 3162 { 3163 int32_t msb; 3164 3165 if (residual == 0) 3166 return 0; 3167 // Determine the most significant bit in the residual and 3168 // align the resulting value to a 2-bit boundary. 3169 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2) 3170 ; 3171 // The desired shift is now (msb - 6), or zero, whichever 3172 // is the greater. 3173 return (((msb - 6) < 0) ? 0 : (msb - 6)); 3174 } 3175 3176 // Calculate the final residual for the specified group index. 3177 // If the passed group index is less than zero, the method will return 3178 // the value of the specified residual without any change. 3179 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) 3180 static typename elfcpp::Swap<32, big_endian>::Valtype 3181 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual, 3182 const int group) 3183 { 3184 for (int n = 0; n <= group; n++) 3185 { 3186 // Calculate which part of the value to mask. 3187 uint32_t shift = calc_grp_kn(residual); 3188 // Calculate the residual for the next time around. 3189 residual &= ~(residual & (0xff << shift)); 3190 } 3191 3192 return residual; 3193 } 3194 3195 // Calculate the value of Gn for the specified group index. 3196 // We return it in the form of an encoded constant-and-rotation. 3197 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32) 3198 static typename elfcpp::Swap<32, big_endian>::Valtype 3199 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual, 3200 const int group) 3201 { 3202 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0; 3203 uint32_t shift = 0; 3204 3205 for (int n = 0; n <= group; n++) 3206 { 3207 // Calculate which part of the value to mask. 3208 shift = calc_grp_kn(residual); 3209 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form. 3210 gn = residual & (0xff << shift); 3211 // Calculate the residual for the next time around. 3212 residual &= ~gn; 3213 } 3214 // Return Gn in the form of an encoded constant-and-rotation. 3215 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8)); 3216 } 3217 3218 public: 3219 // Handle ARM long branches. 3220 static typename This::Status 3221 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*, 3222 unsigned char*, const Sized_symbol<32>*, 3223 const Arm_relobj<big_endian>*, unsigned int, 3224 const Symbol_value<32>*, Arm_address, Arm_address, bool); 3225 3226 // Handle THUMB long branches. 3227 static typename This::Status 3228 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*, 3229 unsigned char*, const Sized_symbol<32>*, 3230 const Arm_relobj<big_endian>*, unsigned int, 3231 const Symbol_value<32>*, Arm_address, Arm_address, bool); 3232 3233 3234 // Return the branch offset of a 32-bit THUMB branch. 3235 static inline int32_t 3236 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn) 3237 { 3238 // We use the Thumb-2 encoding (backwards compatible with Thumb-1) 3239 // involving the J1 and J2 bits. 3240 uint32_t s = (upper_insn & (1U << 10)) >> 10; 3241 uint32_t upper = upper_insn & 0x3ffU; 3242 uint32_t lower = lower_insn & 0x7ffU; 3243 uint32_t j1 = (lower_insn & (1U << 13)) >> 13; 3244 uint32_t j2 = (lower_insn & (1U << 11)) >> 11; 3245 uint32_t i1 = j1 ^ s ? 0 : 1; 3246 uint32_t i2 = j2 ^ s ? 0 : 1; 3247 3248 return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22) 3249 | (upper << 12) | (lower << 1)); 3250 } 3251 3252 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction. 3253 // UPPER_INSN is the original upper instruction of the branch. Caller is 3254 // responsible for overflow checking and BLX offset adjustment. 3255 static inline uint16_t 3256 thumb32_branch_upper(uint16_t upper_insn, int32_t offset) 3257 { 3258 uint32_t s = offset < 0 ? 1 : 0; 3259 uint32_t bits = static_cast<uint32_t>(offset); 3260 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10); 3261 } 3262 3263 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction. 3264 // LOWER_INSN is the original lower instruction of the branch. Caller is 3265 // responsible for overflow checking and BLX offset adjustment. 3266 static inline uint16_t 3267 thumb32_branch_lower(uint16_t lower_insn, int32_t offset) 3268 { 3269 uint32_t s = offset < 0 ? 1 : 0; 3270 uint32_t bits = static_cast<uint32_t>(offset); 3271 return ((lower_insn & ~0x2fffU) 3272 | ((((bits >> 23) & 1) ^ !s) << 13) 3273 | ((((bits >> 22) & 1) ^ !s) << 11) 3274 | ((bits >> 1) & 0x7ffU)); 3275 } 3276 3277 // Return the branch offset of a 32-bit THUMB conditional branch. 3278 static inline int32_t 3279 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn) 3280 { 3281 uint32_t s = (upper_insn & 0x0400U) >> 10; 3282 uint32_t j1 = (lower_insn & 0x2000U) >> 13; 3283 uint32_t j2 = (lower_insn & 0x0800U) >> 11; 3284 uint32_t lower = (lower_insn & 0x07ffU); 3285 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU); 3286 3287 return Bits<21>::sign_extend32((upper << 12) | (lower << 1)); 3288 } 3289 3290 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper 3291 // instruction. UPPER_INSN is the original upper instruction of the branch. 3292 // Caller is responsible for overflow checking. 3293 static inline uint16_t 3294 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset) 3295 { 3296 uint32_t s = offset < 0 ? 1 : 0; 3297 uint32_t bits = static_cast<uint32_t>(offset); 3298 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12); 3299 } 3300 3301 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower 3302 // instruction. LOWER_INSN is the original lower instruction of the branch. 3303 // The caller is responsible for overflow checking. 3304 static inline uint16_t 3305 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset) 3306 { 3307 uint32_t bits = static_cast<uint32_t>(offset); 3308 uint32_t j2 = (bits & 0x00080000U) >> 19; 3309 uint32_t j1 = (bits & 0x00040000U) >> 18; 3310 uint32_t lo = (bits & 0x00000ffeU) >> 1; 3311 3312 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo; 3313 } 3314 3315 // R_ARM_ABS8: S + A 3316 static inline typename This::Status 3317 abs8(unsigned char* view, 3318 const Sized_relobj_file<32, big_endian>* object, 3319 const Symbol_value<32>* psymval) 3320 { 3321 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype; 3322 Valtype* wv = reinterpret_cast<Valtype*>(view); 3323 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv); 3324 int32_t addend = Bits<8>::sign_extend32(val); 3325 Arm_address x = psymval->value(object, addend); 3326 val = Bits<32>::bit_select32(val, x, 0xffU); 3327 elfcpp::Swap<8, big_endian>::writeval(wv, val); 3328 3329 // R_ARM_ABS8 permits signed or unsigned results. 3330 return (Bits<8>::has_signed_unsigned_overflow32(x) 3331 ? This::STATUS_OVERFLOW 3332 : This::STATUS_OKAY); 3333 } 3334 3335 // R_ARM_THM_ABS5: S + A 3336 static inline typename This::Status 3337 thm_abs5(unsigned char* view, 3338 const Sized_relobj_file<32, big_endian>* object, 3339 const Symbol_value<32>* psymval) 3340 { 3341 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3342 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3343 Valtype* wv = reinterpret_cast<Valtype*>(view); 3344 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3345 Reltype addend = (val & 0x7e0U) >> 6; 3346 Reltype x = psymval->value(object, addend); 3347 val = Bits<32>::bit_select32(val, x << 6, 0x7e0U); 3348 elfcpp::Swap<16, big_endian>::writeval(wv, val); 3349 return (Bits<5>::has_overflow32(x) 3350 ? This::STATUS_OVERFLOW 3351 : This::STATUS_OKAY); 3352 } 3353 3354 // R_ARM_ABS12: S + A 3355 static inline typename This::Status 3356 abs12(unsigned char* view, 3357 const Sized_relobj_file<32, big_endian>* object, 3358 const Symbol_value<32>* psymval) 3359 { 3360 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3361 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3362 Valtype* wv = reinterpret_cast<Valtype*>(view); 3363 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3364 Reltype addend = val & 0x0fffU; 3365 Reltype x = psymval->value(object, addend); 3366 val = Bits<32>::bit_select32(val, x, 0x0fffU); 3367 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3368 return (Bits<12>::has_overflow32(x) 3369 ? This::STATUS_OVERFLOW 3370 : This::STATUS_OKAY); 3371 } 3372 3373 // R_ARM_ABS16: S + A 3374 static inline typename This::Status 3375 abs16(unsigned char* view, 3376 const Sized_relobj_file<32, big_endian>* object, 3377 const Symbol_value<32>* psymval) 3378 { 3379 typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype; 3380 Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view); 3381 int32_t addend = Bits<16>::sign_extend32(val); 3382 Arm_address x = psymval->value(object, addend); 3383 val = Bits<32>::bit_select32(val, x, 0xffffU); 3384 elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val); 3385 3386 // R_ARM_ABS16 permits signed or unsigned results. 3387 return (Bits<16>::has_signed_unsigned_overflow32(x) 3388 ? This::STATUS_OVERFLOW 3389 : This::STATUS_OKAY); 3390 } 3391 3392 // R_ARM_ABS32: (S + A) | T 3393 static inline typename This::Status 3394 abs32(unsigned char* view, 3395 const Sized_relobj_file<32, big_endian>* object, 3396 const Symbol_value<32>* psymval, 3397 Arm_address thumb_bit) 3398 { 3399 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; 3400 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view); 3401 Valtype x = psymval->value(object, addend) | thumb_bit; 3402 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x); 3403 return This::STATUS_OKAY; 3404 } 3405 3406 // R_ARM_REL32: (S + A) | T - P 3407 static inline typename This::Status 3408 rel32(unsigned char* view, 3409 const Sized_relobj_file<32, big_endian>* object, 3410 const Symbol_value<32>* psymval, 3411 Arm_address address, 3412 Arm_address thumb_bit) 3413 { 3414 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; 3415 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view); 3416 Valtype x = (psymval->value(object, addend) | thumb_bit) - address; 3417 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x); 3418 return This::STATUS_OKAY; 3419 } 3420 3421 // R_ARM_THM_JUMP24: (S + A) | T - P 3422 static typename This::Status 3423 thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object, 3424 const Symbol_value<32>* psymval, Arm_address address, 3425 Arm_address thumb_bit); 3426 3427 // R_ARM_THM_JUMP6: S + A - P 3428 static inline typename This::Status 3429 thm_jump6(unsigned char* view, 3430 const Sized_relobj_file<32, big_endian>* object, 3431 const Symbol_value<32>* psymval, 3432 Arm_address address) 3433 { 3434 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3435 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; 3436 Valtype* wv = reinterpret_cast<Valtype*>(view); 3437 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3438 // bit[9]:bit[7:3]:'0' (mask: 0x02f8) 3439 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2)); 3440 Reltype x = (psymval->value(object, addend) - address); 3441 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2); 3442 elfcpp::Swap<16, big_endian>::writeval(wv, val); 3443 // CZB does only forward jumps. 3444 return ((x > 0x007e) 3445 ? This::STATUS_OVERFLOW 3446 : This::STATUS_OKAY); 3447 } 3448 3449 // R_ARM_THM_JUMP8: S + A - P 3450 static inline typename This::Status 3451 thm_jump8(unsigned char* view, 3452 const Sized_relobj_file<32, big_endian>* object, 3453 const Symbol_value<32>* psymval, 3454 Arm_address address) 3455 { 3456 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3457 Valtype* wv = reinterpret_cast<Valtype*>(view); 3458 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3459 int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1); 3460 int32_t x = (psymval->value(object, addend) - address); 3461 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00) 3462 | ((x & 0x01fe) >> 1))); 3463 // We do a 9-bit overflow check because x is right-shifted by 1 bit. 3464 return (Bits<9>::has_overflow32(x) 3465 ? This::STATUS_OVERFLOW 3466 : This::STATUS_OKAY); 3467 } 3468 3469 // R_ARM_THM_JUMP11: S + A - P 3470 static inline typename This::Status 3471 thm_jump11(unsigned char* view, 3472 const Sized_relobj_file<32, big_endian>* object, 3473 const Symbol_value<32>* psymval, 3474 Arm_address address) 3475 { 3476 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3477 Valtype* wv = reinterpret_cast<Valtype*>(view); 3478 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv); 3479 int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1); 3480 int32_t x = (psymval->value(object, addend) - address); 3481 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800) 3482 | ((x & 0x0ffe) >> 1))); 3483 // We do a 12-bit overflow check because x is right-shifted by 1 bit. 3484 return (Bits<12>::has_overflow32(x) 3485 ? This::STATUS_OVERFLOW 3486 : This::STATUS_OKAY); 3487 } 3488 3489 // R_ARM_BASE_PREL: B(S) + A - P 3490 static inline typename This::Status 3491 base_prel(unsigned char* view, 3492 Arm_address origin, 3493 Arm_address address) 3494 { 3495 Base::rel32(view, origin - address); 3496 return STATUS_OKAY; 3497 } 3498 3499 // R_ARM_BASE_ABS: B(S) + A 3500 static inline typename This::Status 3501 base_abs(unsigned char* view, 3502 Arm_address origin) 3503 { 3504 Base::rel32(view, origin); 3505 return STATUS_OKAY; 3506 } 3507 3508 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG 3509 static inline typename This::Status 3510 got_brel(unsigned char* view, 3511 typename elfcpp::Swap<32, big_endian>::Valtype got_offset) 3512 { 3513 Base::rel32(view, got_offset); 3514 return This::STATUS_OKAY; 3515 } 3516 3517 // R_ARM_GOT_PREL: GOT(S) + A - P 3518 static inline typename This::Status 3519 got_prel(unsigned char* view, 3520 Arm_address got_entry, 3521 Arm_address address) 3522 { 3523 Base::rel32(view, got_entry - address); 3524 return This::STATUS_OKAY; 3525 } 3526 3527 // R_ARM_PREL: (S + A) | T - P 3528 static inline typename This::Status 3529 prel31(unsigned char* view, 3530 const Sized_relobj_file<32, big_endian>* object, 3531 const Symbol_value<32>* psymval, 3532 Arm_address address, 3533 Arm_address thumb_bit) 3534 { 3535 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype; 3536 Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view); 3537 Valtype addend = Bits<31>::sign_extend32(val); 3538 Valtype x = (psymval->value(object, addend) | thumb_bit) - address; 3539 val = Bits<32>::bit_select32(val, x, 0x7fffffffU); 3540 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val); 3541 return (Bits<31>::has_overflow32(x) 3542 ? This::STATUS_OVERFLOW 3543 : This::STATUS_OKAY); 3544 } 3545 3546 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is ) 3547 // R_ARM_MOVW_PREL_NC: (S + A) | T - P 3548 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S) 3549 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S) 3550 static inline typename This::Status 3551 movw(unsigned char* view, 3552 const Sized_relobj_file<32, big_endian>* object, 3553 const Symbol_value<32>* psymval, 3554 Arm_address relative_address_base, 3555 Arm_address thumb_bit, 3556 bool check_overflow) 3557 { 3558 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3559 Valtype* wv = reinterpret_cast<Valtype*>(view); 3560 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3561 Valtype addend = This::extract_arm_movw_movt_addend(val); 3562 Valtype x = ((psymval->value(object, addend) | thumb_bit) 3563 - relative_address_base); 3564 val = This::insert_val_arm_movw_movt(val, x); 3565 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3566 return ((check_overflow && Bits<16>::has_overflow32(x)) 3567 ? This::STATUS_OVERFLOW 3568 : This::STATUS_OKAY); 3569 } 3570 3571 // R_ARM_MOVT_ABS: S + A (relative address base is 0) 3572 // R_ARM_MOVT_PREL: S + A - P 3573 // R_ARM_MOVT_BREL: S + A - B(S) 3574 static inline typename This::Status 3575 movt(unsigned char* view, 3576 const Sized_relobj_file<32, big_endian>* object, 3577 const Symbol_value<32>* psymval, 3578 Arm_address relative_address_base) 3579 { 3580 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3581 Valtype* wv = reinterpret_cast<Valtype*>(view); 3582 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3583 Valtype addend = This::extract_arm_movw_movt_addend(val); 3584 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16; 3585 val = This::insert_val_arm_movw_movt(val, x); 3586 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3587 // FIXME: IHI0044D says that we should check for overflow. 3588 return This::STATUS_OKAY; 3589 } 3590 3591 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0) 3592 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P 3593 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S) 3594 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S) 3595 static inline typename This::Status 3596 thm_movw(unsigned char* view, 3597 const Sized_relobj_file<32, big_endian>* object, 3598 const Symbol_value<32>* psymval, 3599 Arm_address relative_address_base, 3600 Arm_address thumb_bit, 3601 bool check_overflow) 3602 { 3603 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3604 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3605 Valtype* wv = reinterpret_cast<Valtype*>(view); 3606 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3607 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3608 Reltype addend = This::extract_thumb_movw_movt_addend(val); 3609 Reltype x = 3610 (psymval->value(object, addend) | thumb_bit) - relative_address_base; 3611 val = This::insert_val_thumb_movw_movt(val, x); 3612 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); 3613 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); 3614 return ((check_overflow && Bits<16>::has_overflow32(x)) 3615 ? This::STATUS_OVERFLOW 3616 : This::STATUS_OKAY); 3617 } 3618 3619 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0) 3620 // R_ARM_THM_MOVT_PREL: S + A - P 3621 // R_ARM_THM_MOVT_BREL: S + A - B(S) 3622 static inline typename This::Status 3623 thm_movt(unsigned char* view, 3624 const Sized_relobj_file<32, big_endian>* object, 3625 const Symbol_value<32>* psymval, 3626 Arm_address relative_address_base) 3627 { 3628 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3629 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3630 Valtype* wv = reinterpret_cast<Valtype*>(view); 3631 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3632 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3633 Reltype addend = This::extract_thumb_movw_movt_addend(val); 3634 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16; 3635 val = This::insert_val_thumb_movw_movt(val, x); 3636 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16); 3637 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff); 3638 return This::STATUS_OKAY; 3639 } 3640 3641 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32) 3642 static inline typename This::Status 3643 thm_alu11(unsigned char* view, 3644 const Sized_relobj_file<32, big_endian>* object, 3645 const Symbol_value<32>* psymval, 3646 Arm_address address, 3647 Arm_address thumb_bit) 3648 { 3649 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3650 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3651 Valtype* wv = reinterpret_cast<Valtype*>(view); 3652 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3653 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3654 3655 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0 3656 // ----------------------------------------------------------------------- 3657 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8 3658 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8 3659 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8 3660 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8 3661 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8 3662 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8 3663 3664 // Determine a sign for the addend. 3665 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000 3666 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1; 3667 // Thumb2 addend encoding: 3668 // imm12 := i | imm3 | imm8 3669 int32_t addend = (insn & 0xff) 3670 | ((insn & 0x00007000) >> 4) 3671 | ((insn & 0x04000000) >> 15); 3672 // Apply a sign to the added. 3673 addend *= sign; 3674 3675 int32_t x = (psymval->value(object, addend) | thumb_bit) 3676 - (address & 0xfffffffc); 3677 Reltype val = abs(x); 3678 // Mask out the value and a distinct part of the ADD/SUB opcode 3679 // (bits 7:5 of opword). 3680 insn = (insn & 0xfb0f8f00) 3681 | (val & 0xff) 3682 | ((val & 0x700) << 4) 3683 | ((val & 0x800) << 15); 3684 // Set the opcode according to whether the value to go in the 3685 // place is negative. 3686 if (x < 0) 3687 insn |= 0x00a00000; 3688 3689 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16); 3690 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff); 3691 return ((val > 0xfff) ? 3692 This::STATUS_OVERFLOW : This::STATUS_OKAY); 3693 } 3694 3695 // R_ARM_THM_PC8: S + A - Pa (Thumb) 3696 static inline typename This::Status 3697 thm_pc8(unsigned char* view, 3698 const Sized_relobj_file<32, big_endian>* object, 3699 const Symbol_value<32>* psymval, 3700 Arm_address address) 3701 { 3702 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3703 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype; 3704 Valtype* wv = reinterpret_cast<Valtype*>(view); 3705 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv); 3706 Reltype addend = ((insn & 0x00ff) << 2); 3707 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc)); 3708 Reltype val = abs(x); 3709 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2); 3710 3711 elfcpp::Swap<16, big_endian>::writeval(wv, insn); 3712 return ((val > 0x03fc) 3713 ? This::STATUS_OVERFLOW 3714 : This::STATUS_OKAY); 3715 } 3716 3717 // R_ARM_THM_PC12: S + A - Pa (Thumb32) 3718 static inline typename This::Status 3719 thm_pc12(unsigned char* view, 3720 const Sized_relobj_file<32, big_endian>* object, 3721 const Symbol_value<32>* psymval, 3722 Arm_address address) 3723 { 3724 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 3725 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype; 3726 Valtype* wv = reinterpret_cast<Valtype*>(view); 3727 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16) 3728 | elfcpp::Swap<16, big_endian>::readval(wv + 1); 3729 // Determine a sign for the addend (positive if the U bit is 1). 3730 const int sign = (insn & 0x00800000) ? 1 : -1; 3731 int32_t addend = (insn & 0xfff); 3732 // Apply a sign to the added. 3733 addend *= sign; 3734 3735 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc)); 3736 Reltype val = abs(x); 3737 // Mask out and apply the value and the U bit. 3738 insn = (insn & 0xff7ff000) | (val & 0xfff); 3739 // Set the U bit according to whether the value to go in the 3740 // place is positive. 3741 if (x >= 0) 3742 insn |= 0x00800000; 3743 3744 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16); 3745 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff); 3746 return ((val > 0xfff) ? 3747 This::STATUS_OVERFLOW : This::STATUS_OKAY); 3748 } 3749 3750 // R_ARM_V4BX 3751 static inline typename This::Status 3752 v4bx(const Relocate_info<32, big_endian>* relinfo, 3753 unsigned char* view, 3754 const Arm_relobj<big_endian>* object, 3755 const Arm_address address, 3756 const bool is_interworking) 3757 { 3758 3759 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3760 Valtype* wv = reinterpret_cast<Valtype*>(view); 3761 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3762 3763 // Ensure that we have a BX instruction. 3764 gold_assert((val & 0x0ffffff0) == 0x012fff10); 3765 const uint32_t reg = (val & 0xf); 3766 if (is_interworking && reg != 0xf) 3767 { 3768 Stub_table<big_endian>* stub_table = 3769 object->stub_table(relinfo->data_shndx); 3770 gold_assert(stub_table != NULL); 3771 3772 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg); 3773 gold_assert(stub != NULL); 3774 3775 int32_t veneer_address = 3776 stub_table->address() + stub->offset() - 8 - address; 3777 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET) 3778 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET)); 3779 // Replace with a branch to veneer (B <addr>) 3780 val = (val & 0xf0000000) | 0x0a000000 3781 | ((veneer_address >> 2) & 0x00ffffff); 3782 } 3783 else 3784 { 3785 // Preserve Rm (lowest four bits) and the condition code 3786 // (highest four bits). Other bits encode MOV PC,Rm. 3787 val = (val & 0xf000000f) | 0x01a0f000; 3788 } 3789 elfcpp::Swap<32, big_endian>::writeval(wv, val); 3790 return This::STATUS_OKAY; 3791 } 3792 3793 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P 3794 // R_ARM_ALU_PC_G0: ((S + A) | T) - P 3795 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P 3796 // R_ARM_ALU_PC_G1: ((S + A) | T) - P 3797 // R_ARM_ALU_PC_G2: ((S + A) | T) - P 3798 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S) 3799 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S) 3800 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S) 3801 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S) 3802 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S) 3803 static inline typename This::Status 3804 arm_grp_alu(unsigned char* view, 3805 const Sized_relobj_file<32, big_endian>* object, 3806 const Symbol_value<32>* psymval, 3807 const int group, 3808 Arm_address address, 3809 Arm_address thumb_bit, 3810 bool check_overflow) 3811 { 3812 gold_assert(group >= 0 && group < 3); 3813 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3814 Valtype* wv = reinterpret_cast<Valtype*>(view); 3815 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3816 3817 // ALU group relocations are allowed only for the ADD/SUB instructions. 3818 // (0x00800000 - ADD, 0x00400000 - SUB) 3819 const Valtype opcode = insn & 0x01e00000; 3820 if (opcode != 0x00800000 && opcode != 0x00400000) 3821 return This::STATUS_BAD_RELOC; 3822 3823 // Determine a sign for the addend. 3824 const int sign = (opcode == 0x00800000) ? 1 : -1; 3825 // shifter = rotate_imm * 2 3826 const uint32_t shifter = (insn & 0xf00) >> 7; 3827 // Initial addend value. 3828 int32_t addend = insn & 0xff; 3829 // Rotate addend right by shifter. 3830 addend = (addend >> shifter) | (addend << (32 - shifter)); 3831 // Apply a sign to the added. 3832 addend *= sign; 3833 3834 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address); 3835 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group); 3836 // Check for overflow if required 3837 if (check_overflow 3838 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0)) 3839 return This::STATUS_OVERFLOW; 3840 3841 // Mask out the value and the ADD/SUB part of the opcode; take care 3842 // not to destroy the S bit. 3843 insn &= 0xff1ff000; 3844 // Set the opcode according to whether the value to go in the 3845 // place is negative. 3846 insn |= ((x < 0) ? 0x00400000 : 0x00800000); 3847 // Encode the offset (encoded Gn). 3848 insn |= gn; 3849 3850 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3851 return This::STATUS_OKAY; 3852 } 3853 3854 // R_ARM_LDR_PC_G0: S + A - P 3855 // R_ARM_LDR_PC_G1: S + A - P 3856 // R_ARM_LDR_PC_G2: S + A - P 3857 // R_ARM_LDR_SB_G0: S + A - B(S) 3858 // R_ARM_LDR_SB_G1: S + A - B(S) 3859 // R_ARM_LDR_SB_G2: S + A - B(S) 3860 static inline typename This::Status 3861 arm_grp_ldr(unsigned char* view, 3862 const Sized_relobj_file<32, big_endian>* object, 3863 const Symbol_value<32>* psymval, 3864 const int group, 3865 Arm_address address) 3866 { 3867 gold_assert(group >= 0 && group < 3); 3868 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3869 Valtype* wv = reinterpret_cast<Valtype*>(view); 3870 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3871 3872 const int sign = (insn & 0x00800000) ? 1 : -1; 3873 int32_t addend = (insn & 0xfff) * sign; 3874 int32_t x = (psymval->value(object, addend) - address); 3875 // Calculate the relevant G(n-1) value to obtain this stage residual. 3876 Valtype residual = 3877 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); 3878 if (residual >= 0x1000) 3879 return This::STATUS_OVERFLOW; 3880 3881 // Mask out the value and U bit. 3882 insn &= 0xff7ff000; 3883 // Set the U bit for non-negative values. 3884 if (x >= 0) 3885 insn |= 0x00800000; 3886 insn |= residual; 3887 3888 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3889 return This::STATUS_OKAY; 3890 } 3891 3892 // R_ARM_LDRS_PC_G0: S + A - P 3893 // R_ARM_LDRS_PC_G1: S + A - P 3894 // R_ARM_LDRS_PC_G2: S + A - P 3895 // R_ARM_LDRS_SB_G0: S + A - B(S) 3896 // R_ARM_LDRS_SB_G1: S + A - B(S) 3897 // R_ARM_LDRS_SB_G2: S + A - B(S) 3898 static inline typename This::Status 3899 arm_grp_ldrs(unsigned char* view, 3900 const Sized_relobj_file<32, big_endian>* object, 3901 const Symbol_value<32>* psymval, 3902 const int group, 3903 Arm_address address) 3904 { 3905 gold_assert(group >= 0 && group < 3); 3906 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3907 Valtype* wv = reinterpret_cast<Valtype*>(view); 3908 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3909 3910 const int sign = (insn & 0x00800000) ? 1 : -1; 3911 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign; 3912 int32_t x = (psymval->value(object, addend) - address); 3913 // Calculate the relevant G(n-1) value to obtain this stage residual. 3914 Valtype residual = 3915 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); 3916 if (residual >= 0x100) 3917 return This::STATUS_OVERFLOW; 3918 3919 // Mask out the value and U bit. 3920 insn &= 0xff7ff0f0; 3921 // Set the U bit for non-negative values. 3922 if (x >= 0) 3923 insn |= 0x00800000; 3924 insn |= ((residual & 0xf0) << 4) | (residual & 0xf); 3925 3926 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3927 return This::STATUS_OKAY; 3928 } 3929 3930 // R_ARM_LDC_PC_G0: S + A - P 3931 // R_ARM_LDC_PC_G1: S + A - P 3932 // R_ARM_LDC_PC_G2: S + A - P 3933 // R_ARM_LDC_SB_G0: S + A - B(S) 3934 // R_ARM_LDC_SB_G1: S + A - B(S) 3935 // R_ARM_LDC_SB_G2: S + A - B(S) 3936 static inline typename This::Status 3937 arm_grp_ldc(unsigned char* view, 3938 const Sized_relobj_file<32, big_endian>* object, 3939 const Symbol_value<32>* psymval, 3940 const int group, 3941 Arm_address address) 3942 { 3943 gold_assert(group >= 0 && group < 3); 3944 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3945 Valtype* wv = reinterpret_cast<Valtype*>(view); 3946 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv); 3947 3948 const int sign = (insn & 0x00800000) ? 1 : -1; 3949 int32_t addend = ((insn & 0xff) << 2) * sign; 3950 int32_t x = (psymval->value(object, addend) - address); 3951 // Calculate the relevant G(n-1) value to obtain this stage residual. 3952 Valtype residual = 3953 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1); 3954 if ((residual & 0x3) != 0 || residual >= 0x400) 3955 return This::STATUS_OVERFLOW; 3956 3957 // Mask out the value and U bit. 3958 insn &= 0xff7fff00; 3959 // Set the U bit for non-negative values. 3960 if (x >= 0) 3961 insn |= 0x00800000; 3962 insn |= (residual >> 2); 3963 3964 elfcpp::Swap<32, big_endian>::writeval(wv, insn); 3965 return This::STATUS_OKAY; 3966 } 3967}; 3968 3969// Relocate ARM long branches. This handles relocation types 3970// R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25. 3971// If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly 3972// undefined and we do not use PLT in this relocation. In such a case, 3973// the branch is converted into an NOP. 3974 3975template<bool big_endian> 3976typename Arm_relocate_functions<big_endian>::Status 3977Arm_relocate_functions<big_endian>::arm_branch_common( 3978 unsigned int r_type, 3979 const Relocate_info<32, big_endian>* relinfo, 3980 unsigned char* view, 3981 const Sized_symbol<32>* gsym, 3982 const Arm_relobj<big_endian>* object, 3983 unsigned int r_sym, 3984 const Symbol_value<32>* psymval, 3985 Arm_address address, 3986 Arm_address thumb_bit, 3987 bool is_weakly_undefined_without_plt) 3988{ 3989 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 3990 Valtype* wv = reinterpret_cast<Valtype*>(view); 3991 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 3992 3993 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe) 3994 && ((val & 0x0f000000UL) == 0x0a000000UL); 3995 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL; 3996 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe) 3997 && ((val & 0x0f000000UL) == 0x0b000000UL); 3998 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL; 3999 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL; 4000 4001 // Check that the instruction is valid. 4002 if (r_type == elfcpp::R_ARM_CALL) 4003 { 4004 if (!insn_is_uncond_bl && !insn_is_blx) 4005 return This::STATUS_BAD_RELOC; 4006 } 4007 else if (r_type == elfcpp::R_ARM_JUMP24) 4008 { 4009 if (!insn_is_b && !insn_is_cond_bl) 4010 return This::STATUS_BAD_RELOC; 4011 } 4012 else if (r_type == elfcpp::R_ARM_PLT32) 4013 { 4014 if (!insn_is_any_branch) 4015 return This::STATUS_BAD_RELOC; 4016 } 4017 else if (r_type == elfcpp::R_ARM_XPC25) 4018 { 4019 // FIXME: AAELF document IH0044C does not say much about it other 4020 // than it being obsolete. 4021 if (!insn_is_any_branch) 4022 return This::STATUS_BAD_RELOC; 4023 } 4024 else 4025 gold_unreachable(); 4026 4027 // A branch to an undefined weak symbol is turned into a jump to 4028 // the next instruction unless a PLT entry will be created. 4029 // Do the same for local undefined symbols. 4030 // The jump to the next instruction is optimized as a NOP depending 4031 // on the architecture. 4032 const Target_arm<big_endian>* arm_target = 4033 Target_arm<big_endian>::default_target(); 4034 if (is_weakly_undefined_without_plt) 4035 { 4036 gold_assert(!parameters->options().relocatable()); 4037 Valtype cond = val & 0xf0000000U; 4038 if (arm_target->may_use_arm_nop()) 4039 val = cond | 0x0320f000; 4040 else 4041 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0. 4042 elfcpp::Swap<32, big_endian>::writeval(wv, val); 4043 return This::STATUS_OKAY; 4044 } 4045 4046 Valtype addend = Bits<26>::sign_extend32(val << 2); 4047 Valtype branch_target = psymval->value(object, addend); 4048 int32_t branch_offset = branch_target - address; 4049 4050 // We need a stub if the branch offset is too large or if we need 4051 // to switch mode. 4052 bool may_use_blx = arm_target->may_use_v5t_interworking(); 4053 Reloc_stub* stub = NULL; 4054 4055 if (!parameters->options().relocatable() 4056 && (Bits<26>::has_overflow32(branch_offset) 4057 || ((thumb_bit != 0) 4058 && !(may_use_blx && r_type == elfcpp::R_ARM_CALL)))) 4059 { 4060 Valtype unadjusted_branch_target = psymval->value(object, 0); 4061 4062 Stub_type stub_type = 4063 Reloc_stub::stub_type_for_reloc(r_type, address, 4064 unadjusted_branch_target, 4065 (thumb_bit != 0)); 4066 if (stub_type != arm_stub_none) 4067 { 4068 Stub_table<big_endian>* stub_table = 4069 object->stub_table(relinfo->data_shndx); 4070 gold_assert(stub_table != NULL); 4071 4072 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend); 4073 stub = stub_table->find_reloc_stub(stub_key); 4074 gold_assert(stub != NULL); 4075 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0; 4076 branch_target = stub_table->address() + stub->offset() + addend; 4077 branch_offset = branch_target - address; 4078 gold_assert(!Bits<26>::has_overflow32(branch_offset)); 4079 } 4080 } 4081 4082 // At this point, if we still need to switch mode, the instruction 4083 // must either be a BLX or a BL that can be converted to a BLX. 4084 if (thumb_bit != 0) 4085 { 4086 // Turn BL to BLX. 4087 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL); 4088 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23); 4089 } 4090 4091 val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL); 4092 elfcpp::Swap<32, big_endian>::writeval(wv, val); 4093 return (Bits<26>::has_overflow32(branch_offset) 4094 ? This::STATUS_OVERFLOW 4095 : This::STATUS_OKAY); 4096} 4097 4098// Relocate THUMB long branches. This handles relocation types 4099// R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22. 4100// If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly 4101// undefined and we do not use PLT in this relocation. In such a case, 4102// the branch is converted into an NOP. 4103 4104template<bool big_endian> 4105typename Arm_relocate_functions<big_endian>::Status 4106Arm_relocate_functions<big_endian>::thumb_branch_common( 4107 unsigned int r_type, 4108 const Relocate_info<32, big_endian>* relinfo, 4109 unsigned char* view, 4110 const Sized_symbol<32>* gsym, 4111 const Arm_relobj<big_endian>* object, 4112 unsigned int r_sym, 4113 const Symbol_value<32>* psymval, 4114 Arm_address address, 4115 Arm_address thumb_bit, 4116 bool is_weakly_undefined_without_plt) 4117{ 4118 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 4119 Valtype* wv = reinterpret_cast<Valtype*>(view); 4120 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 4121 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 4122 4123 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference 4124 // into account. 4125 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U; 4126 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U; 4127 4128 // Check that the instruction is valid. 4129 if (r_type == elfcpp::R_ARM_THM_CALL) 4130 { 4131 if (!is_bl_insn && !is_blx_insn) 4132 return This::STATUS_BAD_RELOC; 4133 } 4134 else if (r_type == elfcpp::R_ARM_THM_JUMP24) 4135 { 4136 // This cannot be a BLX. 4137 if (!is_bl_insn) 4138 return This::STATUS_BAD_RELOC; 4139 } 4140 else if (r_type == elfcpp::R_ARM_THM_XPC22) 4141 { 4142 // Check for Thumb to Thumb call. 4143 if (!is_blx_insn) 4144 return This::STATUS_BAD_RELOC; 4145 if (thumb_bit != 0) 4146 { 4147 gold_warning(_("%s: Thumb BLX instruction targets " 4148 "thumb function '%s'."), 4149 object->name().c_str(), 4150 (gsym ? gsym->name() : "(local)")); 4151 // Convert BLX to BL. 4152 lower_insn |= 0x1000U; 4153 } 4154 } 4155 else 4156 gold_unreachable(); 4157 4158 // A branch to an undefined weak symbol is turned into a jump to 4159 // the next instruction unless a PLT entry will be created. 4160 // The jump to the next instruction is optimized as a NOP.W for 4161 // Thumb-2 enabled architectures. 4162 const Target_arm<big_endian>* arm_target = 4163 Target_arm<big_endian>::default_target(); 4164 if (is_weakly_undefined_without_plt) 4165 { 4166 gold_assert(!parameters->options().relocatable()); 4167 if (arm_target->may_use_thumb2_nop()) 4168 { 4169 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af); 4170 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000); 4171 } 4172 else 4173 { 4174 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000); 4175 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00); 4176 } 4177 return This::STATUS_OKAY; 4178 } 4179 4180 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn); 4181 Arm_address branch_target = psymval->value(object, addend); 4182 4183 // For BLX, bit 1 of target address comes from bit 1 of base address. 4184 bool may_use_blx = arm_target->may_use_v5t_interworking(); 4185 if (thumb_bit == 0 && may_use_blx) 4186 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2); 4187 4188 int32_t branch_offset = branch_target - address; 4189 4190 // We need a stub if the branch offset is too large or if we need 4191 // to switch mode. 4192 bool thumb2 = arm_target->using_thumb2(); 4193 if (!parameters->options().relocatable() 4194 && ((!thumb2 && Bits<23>::has_overflow32(branch_offset)) 4195 || (thumb2 && Bits<25>::has_overflow32(branch_offset)) 4196 || ((thumb_bit == 0) 4197 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx) 4198 || r_type == elfcpp::R_ARM_THM_JUMP24)))) 4199 { 4200 Arm_address unadjusted_branch_target = psymval->value(object, 0); 4201 4202 Stub_type stub_type = 4203 Reloc_stub::stub_type_for_reloc(r_type, address, 4204 unadjusted_branch_target, 4205 (thumb_bit != 0)); 4206 4207 if (stub_type != arm_stub_none) 4208 { 4209 Stub_table<big_endian>* stub_table = 4210 object->stub_table(relinfo->data_shndx); 4211 gold_assert(stub_table != NULL); 4212 4213 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend); 4214 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key); 4215 gold_assert(stub != NULL); 4216 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0; 4217 branch_target = stub_table->address() + stub->offset() + addend; 4218 if (thumb_bit == 0 && may_use_blx) 4219 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2); 4220 branch_offset = branch_target - address; 4221 } 4222 } 4223 4224 // At this point, if we still need to switch mode, the instruction 4225 // must either be a BLX or a BL that can be converted to a BLX. 4226 if (thumb_bit == 0) 4227 { 4228 gold_assert(may_use_blx 4229 && (r_type == elfcpp::R_ARM_THM_CALL 4230 || r_type == elfcpp::R_ARM_THM_XPC22)); 4231 // Make sure this is a BLX. 4232 lower_insn &= ~0x1000U; 4233 } 4234 else 4235 { 4236 // Make sure this is a BL. 4237 lower_insn |= 0x1000U; 4238 } 4239 4240 // For a BLX instruction, make sure that the relocation is rounded up 4241 // to a word boundary. This follows the semantics of the instruction 4242 // which specifies that bit 1 of the target address will come from bit 4243 // 1 of the base address. 4244 if ((lower_insn & 0x5000U) == 0x4000U) 4245 gold_assert((branch_offset & 3) == 0); 4246 4247 // Put BRANCH_OFFSET back into the insn. Assumes two's complement. 4248 // We use the Thumb-2 encoding, which is safe even if dealing with 4249 // a Thumb-1 instruction by virtue of our overflow check above. */ 4250 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset); 4251 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset); 4252 4253 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); 4254 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); 4255 4256 gold_assert(!Bits<25>::has_overflow32(branch_offset)); 4257 4258 return ((thumb2 4259 ? Bits<25>::has_overflow32(branch_offset) 4260 : Bits<23>::has_overflow32(branch_offset)) 4261 ? This::STATUS_OVERFLOW 4262 : This::STATUS_OKAY); 4263} 4264 4265// Relocate THUMB-2 long conditional branches. 4266// If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly 4267// undefined and we do not use PLT in this relocation. In such a case, 4268// the branch is converted into an NOP. 4269 4270template<bool big_endian> 4271typename Arm_relocate_functions<big_endian>::Status 4272Arm_relocate_functions<big_endian>::thm_jump19( 4273 unsigned char* view, 4274 const Arm_relobj<big_endian>* object, 4275 const Symbol_value<32>* psymval, 4276 Arm_address address, 4277 Arm_address thumb_bit) 4278{ 4279 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 4280 Valtype* wv = reinterpret_cast<Valtype*>(view); 4281 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 4282 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 4283 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn); 4284 4285 Arm_address branch_target = psymval->value(object, addend); 4286 int32_t branch_offset = branch_target - address; 4287 4288 // ??? Should handle interworking? GCC might someday try to 4289 // use this for tail calls. 4290 // FIXME: We do support thumb entry to PLT yet. 4291 if (thumb_bit == 0) 4292 { 4293 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet.")); 4294 return This::STATUS_BAD_RELOC; 4295 } 4296 4297 // Put RELOCATION back into the insn. 4298 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset); 4299 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset); 4300 4301 // Put the relocated value back in the object file: 4302 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); 4303 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); 4304 4305 return (Bits<21>::has_overflow32(branch_offset) 4306 ? This::STATUS_OVERFLOW 4307 : This::STATUS_OKAY); 4308} 4309 4310// Get the GOT section, creating it if necessary. 4311 4312template<bool big_endian> 4313Arm_output_data_got<big_endian>* 4314Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout) 4315{ 4316 if (this->got_ == NULL) 4317 { 4318 gold_assert(symtab != NULL && layout != NULL); 4319 4320 // When using -z now, we can treat .got as a relro section. 4321 // Without -z now, it is modified after program startup by lazy 4322 // PLT relocations. 4323 bool is_got_relro = parameters->options().now(); 4324 Output_section_order got_order = (is_got_relro 4325 ? ORDER_RELRO_LAST 4326 : ORDER_DATA); 4327 4328 // Unlike some targets (.e.g x86), ARM does not use separate .got and 4329 // .got.plt sections in output. The output .got section contains both 4330 // PLT and non-PLT GOT entries. 4331 this->got_ = new Arm_output_data_got<big_endian>(symtab, layout); 4332 4333 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, 4334 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), 4335 this->got_, got_order, is_got_relro); 4336 4337 // The old GNU linker creates a .got.plt section. We just 4338 // create another set of data in the .got section. Note that we 4339 // always create a PLT if we create a GOT, although the PLT 4340 // might be empty. 4341 this->got_plt_ = new Output_data_space(4, "** GOT PLT"); 4342 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, 4343 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), 4344 this->got_plt_, got_order, is_got_relro); 4345 4346 // The first three entries are reserved. 4347 this->got_plt_->set_current_data_size(3 * 4); 4348 4349 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT. 4350 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL, 4351 Symbol_table::PREDEFINED, 4352 this->got_plt_, 4353 0, 0, elfcpp::STT_OBJECT, 4354 elfcpp::STB_LOCAL, 4355 elfcpp::STV_HIDDEN, 0, 4356 false, false); 4357 4358 // If there are any IRELATIVE relocations, they get GOT entries 4359 // in .got.plt after the jump slot entries. 4360 this->got_irelative_ = new Output_data_space(4, "** GOT IRELATIVE PLT"); 4361 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS, 4362 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE), 4363 this->got_irelative_, 4364 got_order, is_got_relro); 4365 4366 } 4367 return this->got_; 4368} 4369 4370// Get the dynamic reloc section, creating it if necessary. 4371 4372template<bool big_endian> 4373typename Target_arm<big_endian>::Reloc_section* 4374Target_arm<big_endian>::rel_dyn_section(Layout* layout) 4375{ 4376 if (this->rel_dyn_ == NULL) 4377 { 4378 gold_assert(layout != NULL); 4379 // Create both relocation sections in the same place, so as to ensure 4380 // their relative order in the output section. 4381 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc()); 4382 this->rel_irelative_ = new Reloc_section(false); 4383 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL, 4384 elfcpp::SHF_ALLOC, this->rel_dyn_, 4385 ORDER_DYNAMIC_RELOCS, false); 4386 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL, 4387 elfcpp::SHF_ALLOC, this->rel_irelative_, 4388 ORDER_DYNAMIC_RELOCS, false); 4389 } 4390 return this->rel_dyn_; 4391} 4392 4393 4394// Get the section to use for IRELATIVE relocs, creating it if necessary. These 4395// go in .rela.dyn, but only after all other dynamic relocations. They need to 4396// follow the other dynamic relocations so that they can refer to global 4397// variables initialized by those relocs. 4398 4399template<bool big_endian> 4400typename Target_arm<big_endian>::Reloc_section* 4401Target_arm<big_endian>::rel_irelative_section(Layout* layout) 4402{ 4403 if (this->rel_irelative_ == NULL) 4404 { 4405 // Delegate the creation to rel_dyn_section so as to ensure their order in 4406 // the output section. 4407 this->rel_dyn_section(layout); 4408 gold_assert(this->rel_irelative_ != NULL 4409 && (this->rel_dyn_->output_section() 4410 == this->rel_irelative_->output_section())); 4411 } 4412 return this->rel_irelative_; 4413} 4414 4415 4416// Insn_template methods. 4417 4418// Return byte size of an instruction template. 4419 4420size_t 4421Insn_template::size() const 4422{ 4423 switch (this->type()) 4424 { 4425 case THUMB16_TYPE: 4426 case THUMB16_SPECIAL_TYPE: 4427 return 2; 4428 case ARM_TYPE: 4429 case THUMB32_TYPE: 4430 case DATA_TYPE: 4431 return 4; 4432 default: 4433 gold_unreachable(); 4434 } 4435} 4436 4437// Return alignment of an instruction template. 4438 4439unsigned 4440Insn_template::alignment() const 4441{ 4442 switch (this->type()) 4443 { 4444 case THUMB16_TYPE: 4445 case THUMB16_SPECIAL_TYPE: 4446 case THUMB32_TYPE: 4447 return 2; 4448 case ARM_TYPE: 4449 case DATA_TYPE: 4450 return 4; 4451 default: 4452 gold_unreachable(); 4453 } 4454} 4455 4456// Stub_template methods. 4457 4458Stub_template::Stub_template( 4459 Stub_type type, const Insn_template* insns, 4460 size_t insn_count) 4461 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1), 4462 entry_in_thumb_mode_(false), relocs_() 4463{ 4464 off_t offset = 0; 4465 4466 // Compute byte size and alignment of stub template. 4467 for (size_t i = 0; i < insn_count; i++) 4468 { 4469 unsigned insn_alignment = insns[i].alignment(); 4470 size_t insn_size = insns[i].size(); 4471 gold_assert((offset & (insn_alignment - 1)) == 0); 4472 this->alignment_ = std::max(this->alignment_, insn_alignment); 4473 switch (insns[i].type()) 4474 { 4475 case Insn_template::THUMB16_TYPE: 4476 case Insn_template::THUMB16_SPECIAL_TYPE: 4477 if (i == 0) 4478 this->entry_in_thumb_mode_ = true; 4479 break; 4480 4481 case Insn_template::THUMB32_TYPE: 4482 if (insns[i].r_type() != elfcpp::R_ARM_NONE) 4483 this->relocs_.push_back(Reloc(i, offset)); 4484 if (i == 0) 4485 this->entry_in_thumb_mode_ = true; 4486 break; 4487 4488 case Insn_template::ARM_TYPE: 4489 // Handle cases where the target is encoded within the 4490 // instruction. 4491 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24) 4492 this->relocs_.push_back(Reloc(i, offset)); 4493 break; 4494 4495 case Insn_template::DATA_TYPE: 4496 // Entry point cannot be data. 4497 gold_assert(i != 0); 4498 this->relocs_.push_back(Reloc(i, offset)); 4499 break; 4500 4501 default: 4502 gold_unreachable(); 4503 } 4504 offset += insn_size; 4505 } 4506 this->size_ = offset; 4507} 4508 4509// Stub methods. 4510 4511// Template to implement do_write for a specific target endianness. 4512 4513template<bool big_endian> 4514void inline 4515Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size) 4516{ 4517 const Stub_template* stub_template = this->stub_template(); 4518 const Insn_template* insns = stub_template->insns(); 4519 4520 // FIXME: We do not handle BE8 encoding yet. 4521 unsigned char* pov = view; 4522 for (size_t i = 0; i < stub_template->insn_count(); i++) 4523 { 4524 switch (insns[i].type()) 4525 { 4526 case Insn_template::THUMB16_TYPE: 4527 elfcpp::Swap<16, big_endian>::writeval(pov, insns[i].data() & 0xffff); 4528 break; 4529 case Insn_template::THUMB16_SPECIAL_TYPE: 4530 elfcpp::Swap<16, big_endian>::writeval( 4531 pov, 4532 this->thumb16_special(i)); 4533 break; 4534 case Insn_template::THUMB32_TYPE: 4535 { 4536 uint32_t hi = (insns[i].data() >> 16) & 0xffff; 4537 uint32_t lo = insns[i].data() & 0xffff; 4538 elfcpp::Swap<16, big_endian>::writeval(pov, hi); 4539 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo); 4540 } 4541 break; 4542 case Insn_template::ARM_TYPE: 4543 case Insn_template::DATA_TYPE: 4544 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data()); 4545 break; 4546 default: 4547 gold_unreachable(); 4548 } 4549 pov += insns[i].size(); 4550 } 4551 gold_assert(static_cast<section_size_type>(pov - view) == view_size); 4552} 4553 4554// Reloc_stub::Key methods. 4555 4556// Dump a Key as a string for debugging. 4557 4558std::string 4559Reloc_stub::Key::name() const 4560{ 4561 if (this->r_sym_ == invalid_index) 4562 { 4563 // Global symbol key name 4564 // <stub-type>:<symbol name>:<addend>. 4565 const std::string sym_name = this->u_.symbol->name(); 4566 // We need to print two hex number and two colons. So just add 100 bytes 4567 // to the symbol name size. 4568 size_t len = sym_name.size() + 100; 4569 char* buffer = new char[len]; 4570 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_, 4571 sym_name.c_str(), this->addend_); 4572 gold_assert(c > 0 && c < static_cast<int>(len)); 4573 delete[] buffer; 4574 return std::string(buffer); 4575 } 4576 else 4577 { 4578 // local symbol key name 4579 // <stub-type>:<object>:<r_sym>:<addend>. 4580 const size_t len = 200; 4581 char buffer[len]; 4582 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_, 4583 this->u_.relobj, this->r_sym_, this->addend_); 4584 gold_assert(c > 0 && c < static_cast<int>(len)); 4585 return std::string(buffer); 4586 } 4587} 4588 4589// Reloc_stub methods. 4590 4591// Determine the type of stub needed, if any, for a relocation of R_TYPE at 4592// LOCATION to DESTINATION. 4593// This code is based on the arm_type_of_stub function in 4594// bfd/elf32-arm.c. We have changed the interface a little to keep the Stub 4595// class simple. 4596 4597Stub_type 4598Reloc_stub::stub_type_for_reloc( 4599 unsigned int r_type, 4600 Arm_address location, 4601 Arm_address destination, 4602 bool target_is_thumb) 4603{ 4604 Stub_type stub_type = arm_stub_none; 4605 4606 // This is a bit ugly but we want to avoid using a templated class for 4607 // big and little endianities. 4608 bool may_use_blx; 4609 bool should_force_pic_veneer = parameters->options().pic_veneer(); 4610 bool thumb2; 4611 bool thumb_only; 4612 if (parameters->target().is_big_endian()) 4613 { 4614 const Target_arm<true>* big_endian_target = 4615 Target_arm<true>::default_target(); 4616 may_use_blx = big_endian_target->may_use_v5t_interworking(); 4617 should_force_pic_veneer |= big_endian_target->should_force_pic_veneer(); 4618 thumb2 = big_endian_target->using_thumb2(); 4619 thumb_only = big_endian_target->using_thumb_only(); 4620 } 4621 else 4622 { 4623 const Target_arm<false>* little_endian_target = 4624 Target_arm<false>::default_target(); 4625 may_use_blx = little_endian_target->may_use_v5t_interworking(); 4626 should_force_pic_veneer |= 4627 little_endian_target->should_force_pic_veneer(); 4628 thumb2 = little_endian_target->using_thumb2(); 4629 thumb_only = little_endian_target->using_thumb_only(); 4630 } 4631 4632 int64_t branch_offset; 4633 bool output_is_position_independent = 4634 parameters->options().output_is_position_independent(); 4635 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24) 4636 { 4637 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the 4638 // base address (instruction address + 4). 4639 if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb) 4640 destination = Bits<32>::bit_select32(destination, location, 0x2); 4641 branch_offset = static_cast<int64_t>(destination) - location; 4642 4643 // Handle cases where: 4644 // - this call goes too far (different Thumb/Thumb2 max 4645 // distance) 4646 // - it's a Thumb->Arm call and blx is not available, or it's a 4647 // Thumb->Arm branch (not bl). A stub is needed in this case. 4648 if ((!thumb2 4649 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET 4650 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) 4651 || (thumb2 4652 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET 4653 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) 4654 || ((!target_is_thumb) 4655 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx) 4656 || (r_type == elfcpp::R_ARM_THM_JUMP24)))) 4657 { 4658 if (target_is_thumb) 4659 { 4660 // Thumb to thumb. 4661 if (!thumb_only) 4662 { 4663 stub_type = (output_is_position_independent 4664 || should_force_pic_veneer) 4665 // PIC stubs. 4666 ? ((may_use_blx 4667 && (r_type == elfcpp::R_ARM_THM_CALL)) 4668 // V5T and above. Stub starts with ARM code, so 4669 // we must be able to switch mode before 4670 // reaching it, which is only possible for 'bl' 4671 // (ie R_ARM_THM_CALL relocation). 4672 ? arm_stub_long_branch_any_thumb_pic 4673 // On V4T, use Thumb code only. 4674 : arm_stub_long_branch_v4t_thumb_thumb_pic) 4675 4676 // non-PIC stubs. 4677 : ((may_use_blx 4678 && (r_type == elfcpp::R_ARM_THM_CALL)) 4679 ? arm_stub_long_branch_any_any // V5T and above. 4680 : arm_stub_long_branch_v4t_thumb_thumb); // V4T. 4681 } 4682 else 4683 { 4684 stub_type = (output_is_position_independent 4685 || should_force_pic_veneer) 4686 ? arm_stub_long_branch_thumb_only_pic // PIC stub. 4687 : arm_stub_long_branch_thumb_only; // non-PIC stub. 4688 } 4689 } 4690 else 4691 { 4692 // Thumb to arm. 4693 4694 // FIXME: We should check that the input section is from an 4695 // object that has interwork enabled. 4696 4697 stub_type = (output_is_position_independent 4698 || should_force_pic_veneer) 4699 // PIC stubs. 4700 ? ((may_use_blx 4701 && (r_type == elfcpp::R_ARM_THM_CALL)) 4702 ? arm_stub_long_branch_any_arm_pic // V5T and above. 4703 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T. 4704 4705 // non-PIC stubs. 4706 : ((may_use_blx 4707 && (r_type == elfcpp::R_ARM_THM_CALL)) 4708 ? arm_stub_long_branch_any_any // V5T and above. 4709 : arm_stub_long_branch_v4t_thumb_arm); // V4T. 4710 4711 // Handle v4t short branches. 4712 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) 4713 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) 4714 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) 4715 stub_type = arm_stub_short_branch_v4t_thumb_arm; 4716 } 4717 } 4718 } 4719 else if (r_type == elfcpp::R_ARM_CALL 4720 || r_type == elfcpp::R_ARM_JUMP24 4721 || r_type == elfcpp::R_ARM_PLT32) 4722 { 4723 branch_offset = static_cast<int64_t>(destination) - location; 4724 if (target_is_thumb) 4725 { 4726 // Arm to thumb. 4727 4728 // FIXME: We should check that the input section is from an 4729 // object that has interwork enabled. 4730 4731 // We have an extra 2-bytes reach because of 4732 // the mode change (bit 24 (H) of BLX encoding). 4733 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) 4734 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) 4735 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx) 4736 || (r_type == elfcpp::R_ARM_JUMP24) 4737 || (r_type == elfcpp::R_ARM_PLT32)) 4738 { 4739 stub_type = (output_is_position_independent 4740 || should_force_pic_veneer) 4741 // PIC stubs. 4742 ? (may_use_blx 4743 ? arm_stub_long_branch_any_thumb_pic// V5T and above. 4744 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub. 4745 4746 // non-PIC stubs. 4747 : (may_use_blx 4748 ? arm_stub_long_branch_any_any // V5T and above. 4749 : arm_stub_long_branch_v4t_arm_thumb); // V4T. 4750 } 4751 } 4752 else 4753 { 4754 // Arm to arm. 4755 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET 4756 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) 4757 { 4758 stub_type = (output_is_position_independent 4759 || should_force_pic_veneer) 4760 ? arm_stub_long_branch_any_arm_pic // PIC stubs. 4761 : arm_stub_long_branch_any_any; /// non-PIC. 4762 } 4763 } 4764 } 4765 4766 return stub_type; 4767} 4768 4769// Cortex_a8_stub methods. 4770 4771// Return the instruction for a THUMB16_SPECIAL_TYPE instruction template. 4772// I is the position of the instruction template in the stub template. 4773 4774uint16_t 4775Cortex_a8_stub::do_thumb16_special(size_t i) 4776{ 4777 // The only use of this is to copy condition code from a conditional 4778 // branch being worked around to the corresponding conditional branch in 4779 // to the stub. 4780 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond 4781 && i == 0); 4782 uint16_t data = this->stub_template()->insns()[i].data(); 4783 gold_assert((data & 0xff00U) == 0xd000U); 4784 data |= ((this->original_insn_ >> 22) & 0xf) << 8; 4785 return data; 4786} 4787 4788// Stub_factory methods. 4789 4790Stub_factory::Stub_factory() 4791{ 4792 // The instruction template sequences are declared as static 4793 // objects and initialized first time the constructor runs. 4794 4795 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx 4796 // to reach the stub if necessary. 4797 static const Insn_template elf32_arm_stub_long_branch_any_any[] = 4798 { 4799 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4] 4800 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4801 // dcd R_ARM_ABS32(X) 4802 }; 4803 4804 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not 4805 // available. 4806 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] = 4807 { 4808 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] 4809 Insn_template::arm_insn(0xe12fff1c), // bx ip 4810 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4811 // dcd R_ARM_ABS32(X) 4812 }; 4813 4814 // Thumb -> Thumb long branch stub. Used on M-profile architectures. 4815 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] = 4816 { 4817 Insn_template::thumb16_insn(0xb401), // push {r0} 4818 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8] 4819 Insn_template::thumb16_insn(0x4684), // mov ip, r0 4820 Insn_template::thumb16_insn(0xbc01), // pop {r0} 4821 Insn_template::thumb16_insn(0x4760), // bx ip 4822 Insn_template::thumb16_insn(0xbf00), // nop 4823 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4824 // dcd R_ARM_ABS32(X) 4825 }; 4826 4827 // V4T Thumb -> Thumb long branch stub. Using the stack is not 4828 // allowed. 4829 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] = 4830 { 4831 Insn_template::thumb16_insn(0x4778), // bx pc 4832 Insn_template::thumb16_insn(0x46c0), // nop 4833 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] 4834 Insn_template::arm_insn(0xe12fff1c), // bx ip 4835 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4836 // dcd R_ARM_ABS32(X) 4837 }; 4838 4839 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not 4840 // available. 4841 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] = 4842 { 4843 Insn_template::thumb16_insn(0x4778), // bx pc 4844 Insn_template::thumb16_insn(0x46c0), // nop 4845 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4] 4846 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0), 4847 // dcd R_ARM_ABS32(X) 4848 }; 4849 4850 // V4T Thumb -> ARM short branch stub. Shorter variant of the above 4851 // one, when the destination is close enough. 4852 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] = 4853 { 4854 Insn_template::thumb16_insn(0x4778), // bx pc 4855 Insn_template::thumb16_insn(0x46c0), // nop 4856 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8) 4857 }; 4858 4859 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use 4860 // blx to reach the stub if necessary. 4861 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] = 4862 { 4863 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc] 4864 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip 4865 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4), 4866 // dcd R_ARM_REL32(X-4) 4867 }; 4868 4869 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use 4870 // blx to reach the stub if necessary. We can not add into pc; 4871 // it is not guaranteed to mode switch (different in ARMv6 and 4872 // ARMv7). 4873 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] = 4874 { 4875 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4] 4876 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip 4877 Insn_template::arm_insn(0xe12fff1c), // bx ip 4878 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), 4879 // dcd R_ARM_REL32(X) 4880 }; 4881 4882 // V4T ARM -> ARM long branch stub, PIC. 4883 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = 4884 { 4885 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4] 4886 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip 4887 Insn_template::arm_insn(0xe12fff1c), // bx ip 4888 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), 4889 // dcd R_ARM_REL32(X) 4890 }; 4891 4892 // V4T Thumb -> ARM long branch stub, PIC. 4893 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = 4894 { 4895 Insn_template::thumb16_insn(0x4778), // bx pc 4896 Insn_template::thumb16_insn(0x46c0), // nop 4897 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0] 4898 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc 4899 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4), 4900 // dcd R_ARM_REL32(X) 4901 }; 4902 4903 // Thumb -> Thumb long branch stub, PIC. Used on M-profile 4904 // architectures. 4905 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] = 4906 { 4907 Insn_template::thumb16_insn(0xb401), // push {r0} 4908 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8] 4909 Insn_template::thumb16_insn(0x46fc), // mov ip, pc 4910 Insn_template::thumb16_insn(0x4484), // add ip, r0 4911 Insn_template::thumb16_insn(0xbc01), // pop {r0} 4912 Insn_template::thumb16_insn(0x4760), // bx ip 4913 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4), 4914 // dcd R_ARM_REL32(X) 4915 }; 4916 4917 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not 4918 // allowed. 4919 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = 4920 { 4921 Insn_template::thumb16_insn(0x4778), // bx pc 4922 Insn_template::thumb16_insn(0x46c0), // nop 4923 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4] 4924 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip 4925 Insn_template::arm_insn(0xe12fff1c), // bx ip 4926 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0), 4927 // dcd R_ARM_REL32(X) 4928 }; 4929 4930 // Cortex-A8 erratum-workaround stubs. 4931 4932 // Stub used for conditional branches (which may be beyond +/-1MB away, 4933 // so we can't use a conditional branch to reach this stub). 4934 4935 // original code: 4936 // 4937 // b<cond> X 4938 // after: 4939 // 4940 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] = 4941 { 4942 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true 4943 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after 4944 Insn_template::thumb32_b_insn(0xf000b800, -4) // true: 4945 // b.w X 4946 }; 4947 4948 // Stub used for b.w and bl.w instructions. 4949 4950 static const Insn_template elf32_arm_stub_a8_veneer_b[] = 4951 { 4952 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest 4953 }; 4954 4955 static const Insn_template elf32_arm_stub_a8_veneer_bl[] = 4956 { 4957 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest 4958 }; 4959 4960 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w 4961 // instruction (which switches to ARM mode) to point to this stub. Jump to 4962 // the real destination using an ARM-mode branch. 4963 static const Insn_template elf32_arm_stub_a8_veneer_blx[] = 4964 { 4965 Insn_template::arm_rel_insn(0xea000000, -8) // b dest 4966 }; 4967 4968 // Stub used to provide an interworking for R_ARM_V4BX relocation 4969 // (bx r[n] instruction). 4970 static const Insn_template elf32_arm_stub_v4_veneer_bx[] = 4971 { 4972 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1 4973 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n> 4974 Insn_template::arm_insn(0xe12fff10) // bx r<n> 4975 }; 4976 4977 // Fill in the stub template look-up table. Stub templates are constructed 4978 // per instance of Stub_factory for fast look-up without locking 4979 // in a thread-enabled environment. 4980 4981 this->stub_templates_[arm_stub_none] = 4982 new Stub_template(arm_stub_none, NULL, 0); 4983 4984#define DEF_STUB(x) \ 4985 do \ 4986 { \ 4987 size_t array_size \ 4988 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \ 4989 Stub_type type = arm_stub_##x; \ 4990 this->stub_templates_[type] = \ 4991 new Stub_template(type, elf32_arm_stub_##x, array_size); \ 4992 } \ 4993 while (0); 4994 4995 DEF_STUBS 4996#undef DEF_STUB 4997} 4998 4999// Stub_table methods. 5000 5001// Remove all Cortex-A8 stub. 5002 5003template<bool big_endian> 5004void 5005Stub_table<big_endian>::remove_all_cortex_a8_stubs() 5006{ 5007 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin(); 5008 p != this->cortex_a8_stubs_.end(); 5009 ++p) 5010 delete p->second; 5011 this->cortex_a8_stubs_.clear(); 5012} 5013 5014// Relocate one stub. This is a helper for Stub_table::relocate_stubs(). 5015 5016template<bool big_endian> 5017void 5018Stub_table<big_endian>::relocate_stub( 5019 Stub* stub, 5020 const Relocate_info<32, big_endian>* relinfo, 5021 Target_arm<big_endian>* arm_target, 5022 Output_section* output_section, 5023 unsigned char* view, 5024 Arm_address address, 5025 section_size_type view_size) 5026{ 5027 const Stub_template* stub_template = stub->stub_template(); 5028 if (stub_template->reloc_count() != 0) 5029 { 5030 // Adjust view to cover the stub only. 5031 section_size_type offset = stub->offset(); 5032 section_size_type stub_size = stub_template->size(); 5033 gold_assert(offset + stub_size <= view_size); 5034 5035 arm_target->relocate_stub(stub, relinfo, output_section, view + offset, 5036 address + offset, stub_size); 5037 } 5038} 5039 5040// Relocate all stubs in this stub table. 5041 5042template<bool big_endian> 5043void 5044Stub_table<big_endian>::relocate_stubs( 5045 const Relocate_info<32, big_endian>* relinfo, 5046 Target_arm<big_endian>* arm_target, 5047 Output_section* output_section, 5048 unsigned char* view, 5049 Arm_address address, 5050 section_size_type view_size) 5051{ 5052 // If we are passed a view bigger than the stub table's. we need to 5053 // adjust the view. 5054 gold_assert(address == this->address() 5055 && (view_size 5056 == static_cast<section_size_type>(this->data_size()))); 5057 5058 // Relocate all relocation stubs. 5059 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); 5060 p != this->reloc_stubs_.end(); 5061 ++p) 5062 this->relocate_stub(p->second, relinfo, arm_target, output_section, view, 5063 address, view_size); 5064 5065 // Relocate all Cortex-A8 stubs. 5066 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin(); 5067 p != this->cortex_a8_stubs_.end(); 5068 ++p) 5069 this->relocate_stub(p->second, relinfo, arm_target, output_section, view, 5070 address, view_size); 5071 5072 // Relocate all ARM V4BX stubs. 5073 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin(); 5074 p != this->arm_v4bx_stubs_.end(); 5075 ++p) 5076 { 5077 if (*p != NULL) 5078 this->relocate_stub(*p, relinfo, arm_target, output_section, view, 5079 address, view_size); 5080 } 5081} 5082 5083// Write out the stubs to file. 5084 5085template<bool big_endian> 5086void 5087Stub_table<big_endian>::do_write(Output_file* of) 5088{ 5089 off_t offset = this->offset(); 5090 const section_size_type oview_size = 5091 convert_to_section_size_type(this->data_size()); 5092 unsigned char* const oview = of->get_output_view(offset, oview_size); 5093 5094 // Write relocation stubs. 5095 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin(); 5096 p != this->reloc_stubs_.end(); 5097 ++p) 5098 { 5099 Reloc_stub* stub = p->second; 5100 Arm_address address = this->address() + stub->offset(); 5101 gold_assert(address 5102 == align_address(address, 5103 stub->stub_template()->alignment())); 5104 stub->write(oview + stub->offset(), stub->stub_template()->size(), 5105 big_endian); 5106 } 5107 5108 // Write Cortex-A8 stubs. 5109 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); 5110 p != this->cortex_a8_stubs_.end(); 5111 ++p) 5112 { 5113 Cortex_a8_stub* stub = p->second; 5114 Arm_address address = this->address() + stub->offset(); 5115 gold_assert(address 5116 == align_address(address, 5117 stub->stub_template()->alignment())); 5118 stub->write(oview + stub->offset(), stub->stub_template()->size(), 5119 big_endian); 5120 } 5121 5122 // Write ARM V4BX relocation stubs. 5123 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); 5124 p != this->arm_v4bx_stubs_.end(); 5125 ++p) 5126 { 5127 if (*p == NULL) 5128 continue; 5129 5130 Arm_address address = this->address() + (*p)->offset(); 5131 gold_assert(address 5132 == align_address(address, 5133 (*p)->stub_template()->alignment())); 5134 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(), 5135 big_endian); 5136 } 5137 5138 of->write_output_view(this->offset(), oview_size, oview); 5139} 5140 5141// Update the data size and address alignment of the stub table at the end 5142// of a relaxation pass. Return true if either the data size or the 5143// alignment changed in this relaxation pass. 5144 5145template<bool big_endian> 5146bool 5147Stub_table<big_endian>::update_data_size_and_addralign() 5148{ 5149 // Go over all stubs in table to compute data size and address alignment. 5150 off_t size = this->reloc_stubs_size_; 5151 unsigned addralign = this->reloc_stubs_addralign_; 5152 5153 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); 5154 p != this->cortex_a8_stubs_.end(); 5155 ++p) 5156 { 5157 const Stub_template* stub_template = p->second->stub_template(); 5158 addralign = std::max(addralign, stub_template->alignment()); 5159 size = (align_address(size, stub_template->alignment()) 5160 + stub_template->size()); 5161 } 5162 5163 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); 5164 p != this->arm_v4bx_stubs_.end(); 5165 ++p) 5166 { 5167 if (*p == NULL) 5168 continue; 5169 5170 const Stub_template* stub_template = (*p)->stub_template(); 5171 addralign = std::max(addralign, stub_template->alignment()); 5172 size = (align_address(size, stub_template->alignment()) 5173 + stub_template->size()); 5174 } 5175 5176 // Check if either data size or alignment changed in this pass. 5177 // Update prev_data_size_ and prev_addralign_. These will be used 5178 // as the current data size and address alignment for the next pass. 5179 bool changed = size != this->prev_data_size_; 5180 this->prev_data_size_ = size; 5181 5182 if (addralign != this->prev_addralign_) 5183 changed = true; 5184 this->prev_addralign_ = addralign; 5185 5186 return changed; 5187} 5188 5189// Finalize the stubs. This sets the offsets of the stubs within the stub 5190// table. It also marks all input sections needing Cortex-A8 workaround. 5191 5192template<bool big_endian> 5193void 5194Stub_table<big_endian>::finalize_stubs() 5195{ 5196 off_t off = this->reloc_stubs_size_; 5197 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin(); 5198 p != this->cortex_a8_stubs_.end(); 5199 ++p) 5200 { 5201 Cortex_a8_stub* stub = p->second; 5202 const Stub_template* stub_template = stub->stub_template(); 5203 uint64_t stub_addralign = stub_template->alignment(); 5204 off = align_address(off, stub_addralign); 5205 stub->set_offset(off); 5206 off += stub_template->size(); 5207 5208 // Mark input section so that we can determine later if a code section 5209 // needs the Cortex-A8 workaround quickly. 5210 Arm_relobj<big_endian>* arm_relobj = 5211 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj()); 5212 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx()); 5213 } 5214 5215 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin(); 5216 p != this->arm_v4bx_stubs_.end(); 5217 ++p) 5218 { 5219 if (*p == NULL) 5220 continue; 5221 5222 const Stub_template* stub_template = (*p)->stub_template(); 5223 uint64_t stub_addralign = stub_template->alignment(); 5224 off = align_address(off, stub_addralign); 5225 (*p)->set_offset(off); 5226 off += stub_template->size(); 5227 } 5228 5229 gold_assert(off <= this->prev_data_size_); 5230} 5231 5232// Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS 5233// and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address 5234// of the address range seen by the linker. 5235 5236template<bool big_endian> 5237void 5238Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range( 5239 Target_arm<big_endian>* arm_target, 5240 unsigned char* view, 5241 Arm_address view_address, 5242 section_size_type view_size) 5243{ 5244 // Cortex-A8 stubs are sorted by addresses of branches being fixed up. 5245 for (Cortex_a8_stub_list::const_iterator p = 5246 this->cortex_a8_stubs_.lower_bound(view_address); 5247 ((p != this->cortex_a8_stubs_.end()) 5248 && (p->first < (view_address + view_size))); 5249 ++p) 5250 { 5251 // We do not store the THUMB bit in the LSB of either the branch address 5252 // or the stub offset. There is no need to strip the LSB. 5253 Arm_address branch_address = p->first; 5254 const Cortex_a8_stub* stub = p->second; 5255 Arm_address stub_address = this->address() + stub->offset(); 5256 5257 // Offset of the branch instruction relative to this view. 5258 section_size_type offset = 5259 convert_to_section_size_type(branch_address - view_address); 5260 gold_assert((offset + 4) <= view_size); 5261 5262 arm_target->apply_cortex_a8_workaround(stub, stub_address, 5263 view + offset, branch_address); 5264 } 5265} 5266 5267// Arm_input_section methods. 5268 5269// Initialize an Arm_input_section. 5270 5271template<bool big_endian> 5272void 5273Arm_input_section<big_endian>::init() 5274{ 5275 Relobj* relobj = this->relobj(); 5276 unsigned int shndx = this->shndx(); 5277 5278 // We have to cache original size, alignment and contents to avoid locking 5279 // the original file. 5280 this->original_addralign_ = 5281 convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx)); 5282 5283 // This is not efficient but we expect only a small number of relaxed 5284 // input sections for stubs. 5285 section_size_type section_size; 5286 const unsigned char* section_contents = 5287 relobj->section_contents(shndx, §ion_size, false); 5288 this->original_size_ = 5289 convert_types<uint32_t, uint64_t>(relobj->section_size(shndx)); 5290 5291 gold_assert(this->original_contents_ == NULL); 5292 this->original_contents_ = new unsigned char[section_size]; 5293 memcpy(this->original_contents_, section_contents, section_size); 5294 5295 // We want to make this look like the original input section after 5296 // output sections are finalized. 5297 Output_section* os = relobj->output_section(shndx); 5298 off_t offset = relobj->output_section_offset(shndx); 5299 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx)); 5300 this->set_address(os->address() + offset); 5301 this->set_file_offset(os->offset() + offset); 5302 5303 this->set_current_data_size(this->original_size_); 5304 this->finalize_data_size(); 5305} 5306 5307template<bool big_endian> 5308void 5309Arm_input_section<big_endian>::do_write(Output_file* of) 5310{ 5311 // We have to write out the original section content. 5312 gold_assert(this->original_contents_ != NULL); 5313 of->write(this->offset(), this->original_contents_, 5314 this->original_size_); 5315 5316 // If this owns a stub table and it is not empty, write it. 5317 if (this->is_stub_table_owner() && !this->stub_table_->empty()) 5318 this->stub_table_->write(of); 5319} 5320 5321// Finalize data size. 5322 5323template<bool big_endian> 5324void 5325Arm_input_section<big_endian>::set_final_data_size() 5326{ 5327 off_t off = convert_types<off_t, uint64_t>(this->original_size_); 5328 5329 if (this->is_stub_table_owner()) 5330 { 5331 this->stub_table_->finalize_data_size(); 5332 off = align_address(off, this->stub_table_->addralign()); 5333 off += this->stub_table_->data_size(); 5334 } 5335 this->set_data_size(off); 5336} 5337 5338// Reset address and file offset. 5339 5340template<bool big_endian> 5341void 5342Arm_input_section<big_endian>::do_reset_address_and_file_offset() 5343{ 5344 // Size of the original input section contents. 5345 off_t off = convert_types<off_t, uint64_t>(this->original_size_); 5346 5347 // If this is a stub table owner, account for the stub table size. 5348 if (this->is_stub_table_owner()) 5349 { 5350 Stub_table<big_endian>* stub_table = this->stub_table_; 5351 5352 // Reset the stub table's address and file offset. The 5353 // current data size for child will be updated after that. 5354 stub_table_->reset_address_and_file_offset(); 5355 off = align_address(off, stub_table_->addralign()); 5356 off += stub_table->current_data_size(); 5357 } 5358 5359 this->set_current_data_size(off); 5360} 5361 5362// Arm_exidx_cantunwind methods. 5363 5364// Write this to Output file OF for a fixed endianness. 5365 5366template<bool big_endian> 5367void 5368Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of) 5369{ 5370 off_t offset = this->offset(); 5371 const section_size_type oview_size = 8; 5372 unsigned char* const oview = of->get_output_view(offset, oview_size); 5373 5374 Output_section* os = this->relobj_->output_section(this->shndx_); 5375 gold_assert(os != NULL); 5376 5377 Arm_relobj<big_endian>* arm_relobj = 5378 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_); 5379 Arm_address output_offset = 5380 arm_relobj->get_output_section_offset(this->shndx_); 5381 Arm_address section_start; 5382 section_size_type section_size; 5383 5384 // Find out the end of the text section referred by this. 5385 if (output_offset != Arm_relobj<big_endian>::invalid_address) 5386 { 5387 section_start = os->address() + output_offset; 5388 const Arm_exidx_input_section* exidx_input_section = 5389 arm_relobj->exidx_input_section_by_link(this->shndx_); 5390 gold_assert(exidx_input_section != NULL); 5391 section_size = 5392 convert_to_section_size_type(exidx_input_section->text_size()); 5393 } 5394 else 5395 { 5396 // Currently this only happens for a relaxed section. 5397 const Output_relaxed_input_section* poris = 5398 os->find_relaxed_input_section(this->relobj_, this->shndx_); 5399 gold_assert(poris != NULL); 5400 section_start = poris->address(); 5401 section_size = convert_to_section_size_type(poris->data_size()); 5402 } 5403 5404 // We always append this to the end of an EXIDX section. 5405 Arm_address output_address = section_start + section_size; 5406 5407 // Write out the entry. The first word either points to the beginning 5408 // or after the end of a text section. The second word is the special 5409 // EXIDX_CANTUNWIND value. 5410 uint32_t prel31_offset = output_address - this->address(); 5411 if (Bits<31>::has_overflow32(offset)) 5412 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry")); 5413 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview, 5414 prel31_offset & 0x7fffffffU); 5415 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4, 5416 elfcpp::EXIDX_CANTUNWIND); 5417 5418 of->write_output_view(this->offset(), oview_size, oview); 5419} 5420 5421// Arm_exidx_merged_section methods. 5422 5423// Constructor for Arm_exidx_merged_section. 5424// EXIDX_INPUT_SECTION points to the unmodified EXIDX input section. 5425// SECTION_OFFSET_MAP points to a section offset map describing how 5426// parts of the input section are mapped to output. DELETED_BYTES is 5427// the number of bytes deleted from the EXIDX input section. 5428 5429Arm_exidx_merged_section::Arm_exidx_merged_section( 5430 const Arm_exidx_input_section& exidx_input_section, 5431 const Arm_exidx_section_offset_map& section_offset_map, 5432 uint32_t deleted_bytes) 5433 : Output_relaxed_input_section(exidx_input_section.relobj(), 5434 exidx_input_section.shndx(), 5435 exidx_input_section.addralign()), 5436 exidx_input_section_(exidx_input_section), 5437 section_offset_map_(section_offset_map) 5438{ 5439 // If we retain or discard the whole EXIDX input section, we would 5440 // not be here. 5441 gold_assert(deleted_bytes != 0 5442 && deleted_bytes != this->exidx_input_section_.size()); 5443 5444 // Fix size here so that we do not need to implement set_final_data_size. 5445 uint32_t size = exidx_input_section.size() - deleted_bytes; 5446 this->set_data_size(size); 5447 this->fix_data_size(); 5448 5449 // Allocate buffer for section contents and build contents. 5450 this->section_contents_ = new unsigned char[size]; 5451} 5452 5453// Build the contents of a merged EXIDX output section. 5454 5455void 5456Arm_exidx_merged_section::build_contents( 5457 const unsigned char* original_contents, 5458 section_size_type original_size) 5459{ 5460 // Go over spans of input offsets and write only those that are not 5461 // discarded. 5462 section_offset_type in_start = 0; 5463 section_offset_type out_start = 0; 5464 section_offset_type in_max = 5465 convert_types<section_offset_type>(original_size); 5466 section_offset_type out_max = 5467 convert_types<section_offset_type>(this->data_size()); 5468 for (Arm_exidx_section_offset_map::const_iterator p = 5469 this->section_offset_map_.begin(); 5470 p != this->section_offset_map_.end(); 5471 ++p) 5472 { 5473 section_offset_type in_end = p->first; 5474 gold_assert(in_end >= in_start); 5475 section_offset_type out_end = p->second; 5476 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1); 5477 if (out_end != -1) 5478 { 5479 size_t out_chunk_size = 5480 convert_types<size_t>(out_end - out_start + 1); 5481 5482 gold_assert(out_chunk_size == in_chunk_size 5483 && in_end < in_max && out_end < out_max); 5484 5485 memcpy(this->section_contents_ + out_start, 5486 original_contents + in_start, 5487 out_chunk_size); 5488 out_start += out_chunk_size; 5489 } 5490 in_start += in_chunk_size; 5491 } 5492} 5493 5494// Given an input OBJECT, an input section index SHNDX within that 5495// object, and an OFFSET relative to the start of that input 5496// section, return whether or not the corresponding offset within 5497// the output section is known. If this function returns true, it 5498// sets *POUTPUT to the output offset. The value -1 indicates that 5499// this input offset is being discarded. 5500 5501bool 5502Arm_exidx_merged_section::do_output_offset( 5503 const Relobj* relobj, 5504 unsigned int shndx, 5505 section_offset_type offset, 5506 section_offset_type* poutput) const 5507{ 5508 // We only handle offsets for the original EXIDX input section. 5509 if (relobj != this->exidx_input_section_.relobj() 5510 || shndx != this->exidx_input_section_.shndx()) 5511 return false; 5512 5513 section_offset_type section_size = 5514 convert_types<section_offset_type>(this->exidx_input_section_.size()); 5515 if (offset < 0 || offset >= section_size) 5516 // Input offset is out of valid range. 5517 *poutput = -1; 5518 else 5519 { 5520 // We need to look up the section offset map to determine the output 5521 // offset. Find the reference point in map that is first offset 5522 // bigger than or equal to this offset. 5523 Arm_exidx_section_offset_map::const_iterator p = 5524 this->section_offset_map_.lower_bound(offset); 5525 5526 // The section offset maps are build such that this should not happen if 5527 // input offset is in the valid range. 5528 gold_assert(p != this->section_offset_map_.end()); 5529 5530 // We need to check if this is dropped. 5531 section_offset_type ref = p->first; 5532 section_offset_type mapped_ref = p->second; 5533 5534 if (mapped_ref != Arm_exidx_input_section::invalid_offset) 5535 // Offset is present in output. 5536 *poutput = mapped_ref + (offset - ref); 5537 else 5538 // Offset is discarded owing to EXIDX entry merging. 5539 *poutput = -1; 5540 } 5541 5542 return true; 5543} 5544 5545// Write this to output file OF. 5546 5547void 5548Arm_exidx_merged_section::do_write(Output_file* of) 5549{ 5550 off_t offset = this->offset(); 5551 const section_size_type oview_size = this->data_size(); 5552 unsigned char* const oview = of->get_output_view(offset, oview_size); 5553 5554 Output_section* os = this->relobj()->output_section(this->shndx()); 5555 gold_assert(os != NULL); 5556 5557 memcpy(oview, this->section_contents_, oview_size); 5558 of->write_output_view(this->offset(), oview_size, oview); 5559} 5560 5561// Arm_exidx_fixup methods. 5562 5563// Append an EXIDX_CANTUNWIND in the current output section if the last entry 5564// is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry 5565// points to the end of the last seen EXIDX section. 5566 5567void 5568Arm_exidx_fixup::add_exidx_cantunwind_as_needed() 5569{ 5570 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND 5571 && this->last_input_section_ != NULL) 5572 { 5573 Relobj* relobj = this->last_input_section_->relobj(); 5574 unsigned int text_shndx = this->last_input_section_->link(); 5575 Arm_exidx_cantunwind* cantunwind = 5576 new Arm_exidx_cantunwind(relobj, text_shndx); 5577 this->exidx_output_section_->add_output_section_data(cantunwind); 5578 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND; 5579 } 5580} 5581 5582// Process an EXIDX section entry in input. Return whether this entry 5583// can be deleted in the output. SECOND_WORD in the second word of the 5584// EXIDX entry. 5585 5586bool 5587Arm_exidx_fixup::process_exidx_entry(uint32_t second_word) 5588{ 5589 bool delete_entry; 5590 if (second_word == elfcpp::EXIDX_CANTUNWIND) 5591 { 5592 // Merge if previous entry is also an EXIDX_CANTUNWIND. 5593 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND; 5594 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND; 5595 } 5596 else if ((second_word & 0x80000000) != 0) 5597 { 5598 // Inlined unwinding data. Merge if equal to previous. 5599 delete_entry = (merge_exidx_entries_ 5600 && this->last_unwind_type_ == UT_INLINED_ENTRY 5601 && this->last_inlined_entry_ == second_word); 5602 this->last_unwind_type_ = UT_INLINED_ENTRY; 5603 this->last_inlined_entry_ = second_word; 5604 } 5605 else 5606 { 5607 // Normal table entry. In theory we could merge these too, 5608 // but duplicate entries are likely to be much less common. 5609 delete_entry = false; 5610 this->last_unwind_type_ = UT_NORMAL_ENTRY; 5611 } 5612 return delete_entry; 5613} 5614 5615// Update the current section offset map during EXIDX section fix-up. 5616// If there is no map, create one. INPUT_OFFSET is the offset of a 5617// reference point, DELETED_BYTES is the number of deleted by in the 5618// section so far. If DELETE_ENTRY is true, the reference point and 5619// all offsets after the previous reference point are discarded. 5620 5621void 5622Arm_exidx_fixup::update_offset_map( 5623 section_offset_type input_offset, 5624 section_size_type deleted_bytes, 5625 bool delete_entry) 5626{ 5627 if (this->section_offset_map_ == NULL) 5628 this->section_offset_map_ = new Arm_exidx_section_offset_map(); 5629 section_offset_type output_offset; 5630 if (delete_entry) 5631 output_offset = Arm_exidx_input_section::invalid_offset; 5632 else 5633 output_offset = input_offset - deleted_bytes; 5634 (*this->section_offset_map_)[input_offset] = output_offset; 5635} 5636 5637// Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of 5638// bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX 5639// section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS. 5640// If some entries are merged, also store a pointer to a newly created 5641// Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller 5642// owns the map and is responsible for releasing it after use. 5643 5644template<bool big_endian> 5645uint32_t 5646Arm_exidx_fixup::process_exidx_section( 5647 const Arm_exidx_input_section* exidx_input_section, 5648 const unsigned char* section_contents, 5649 section_size_type section_size, 5650 Arm_exidx_section_offset_map** psection_offset_map) 5651{ 5652 Relobj* relobj = exidx_input_section->relobj(); 5653 unsigned shndx = exidx_input_section->shndx(); 5654 5655 if ((section_size % 8) != 0) 5656 { 5657 // Something is wrong with this section. Better not touch it. 5658 gold_error(_("uneven .ARM.exidx section size in %s section %u"), 5659 relobj->name().c_str(), shndx); 5660 this->last_input_section_ = exidx_input_section; 5661 this->last_unwind_type_ = UT_NONE; 5662 return 0; 5663 } 5664 5665 uint32_t deleted_bytes = 0; 5666 bool prev_delete_entry = false; 5667 gold_assert(this->section_offset_map_ == NULL); 5668 5669 for (section_size_type i = 0; i < section_size; i += 8) 5670 { 5671 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 5672 const Valtype* wv = 5673 reinterpret_cast<const Valtype*>(section_contents + i + 4); 5674 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv); 5675 5676 bool delete_entry = this->process_exidx_entry(second_word); 5677 5678 // Entry deletion causes changes in output offsets. We use a std::map 5679 // to record these. And entry (x, y) means input offset x 5680 // is mapped to output offset y. If y is invalid_offset, then x is 5681 // dropped in the output. Because of the way std::map::lower_bound 5682 // works, we record the last offset in a region w.r.t to keeping or 5683 // dropping. If there is no entry (x0, y0) for an input offset x0, 5684 // the output offset y0 of it is determined by the output offset y1 of 5685 // the smallest input offset x1 > x0 that there is an (x1, y1) entry 5686 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1 5687 // y0 is also -1. 5688 if (delete_entry != prev_delete_entry && i != 0) 5689 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry); 5690 5691 // Update total deleted bytes for this entry. 5692 if (delete_entry) 5693 deleted_bytes += 8; 5694 5695 prev_delete_entry = delete_entry; 5696 } 5697 5698 // If section offset map is not NULL, make an entry for the end of 5699 // section. 5700 if (this->section_offset_map_ != NULL) 5701 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry); 5702 5703 *psection_offset_map = this->section_offset_map_; 5704 this->section_offset_map_ = NULL; 5705 this->last_input_section_ = exidx_input_section; 5706 5707 // Set the first output text section so that we can link the EXIDX output 5708 // section to it. Ignore any EXIDX input section that is completely merged. 5709 if (this->first_output_text_section_ == NULL 5710 && deleted_bytes != section_size) 5711 { 5712 unsigned int link = exidx_input_section->link(); 5713 Output_section* os = relobj->output_section(link); 5714 gold_assert(os != NULL); 5715 this->first_output_text_section_ = os; 5716 } 5717 5718 return deleted_bytes; 5719} 5720 5721// Arm_output_section methods. 5722 5723// Create a stub group for input sections from BEGIN to END. OWNER 5724// points to the input section to be the owner a new stub table. 5725 5726template<bool big_endian> 5727void 5728Arm_output_section<big_endian>::create_stub_group( 5729 Input_section_list::const_iterator begin, 5730 Input_section_list::const_iterator end, 5731 Input_section_list::const_iterator owner, 5732 Target_arm<big_endian>* target, 5733 std::vector<Output_relaxed_input_section*>* new_relaxed_sections, 5734 const Task* task) 5735{ 5736 // We use a different kind of relaxed section in an EXIDX section. 5737 // The static casting from Output_relaxed_input_section to 5738 // Arm_input_section is invalid in an EXIDX section. We are okay 5739 // because we should not be calling this for an EXIDX section. 5740 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX); 5741 5742 // Currently we convert ordinary input sections into relaxed sections only 5743 // at this point but we may want to support creating relaxed input section 5744 // very early. So we check here to see if owner is already a relaxed 5745 // section. 5746 5747 Arm_input_section<big_endian>* arm_input_section; 5748 if (owner->is_relaxed_input_section()) 5749 { 5750 arm_input_section = 5751 Arm_input_section<big_endian>::as_arm_input_section( 5752 owner->relaxed_input_section()); 5753 } 5754 else 5755 { 5756 gold_assert(owner->is_input_section()); 5757 // Create a new relaxed input section. We need to lock the original 5758 // file. 5759 Task_lock_obj<Object> tl(task, owner->relobj()); 5760 arm_input_section = 5761 target->new_arm_input_section(owner->relobj(), owner->shndx()); 5762 new_relaxed_sections->push_back(arm_input_section); 5763 } 5764 5765 // Create a stub table. 5766 Stub_table<big_endian>* stub_table = 5767 target->new_stub_table(arm_input_section); 5768 5769 arm_input_section->set_stub_table(stub_table); 5770 5771 Input_section_list::const_iterator p = begin; 5772 Input_section_list::const_iterator prev_p; 5773 5774 // Look for input sections or relaxed input sections in [begin ... end]. 5775 do 5776 { 5777 if (p->is_input_section() || p->is_relaxed_input_section()) 5778 { 5779 // The stub table information for input sections live 5780 // in their objects. 5781 Arm_relobj<big_endian>* arm_relobj = 5782 Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); 5783 arm_relobj->set_stub_table(p->shndx(), stub_table); 5784 } 5785 prev_p = p++; 5786 } 5787 while (prev_p != end); 5788} 5789 5790// Group input sections for stub generation. GROUP_SIZE is roughly the limit 5791// of stub groups. We grow a stub group by adding input section until the 5792// size is just below GROUP_SIZE. The last input section will be converted 5793// into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add 5794// input section after the stub table, effectively double the group size. 5795// 5796// This is similar to the group_sections() function in elf32-arm.c but is 5797// implemented differently. 5798 5799template<bool big_endian> 5800void 5801Arm_output_section<big_endian>::group_sections( 5802 section_size_type group_size, 5803 bool stubs_always_after_branch, 5804 Target_arm<big_endian>* target, 5805 const Task* task) 5806{ 5807 // States for grouping. 5808 typedef enum 5809 { 5810 // No group is being built. 5811 NO_GROUP, 5812 // A group is being built but the stub table is not found yet. 5813 // We keep group a stub group until the size is just under GROUP_SIZE. 5814 // The last input section in the group will be used as the stub table. 5815 FINDING_STUB_SECTION, 5816 // A group is being built and we have already found a stub table. 5817 // We enter this state to grow a stub group by adding input section 5818 // after the stub table. This effectively doubles the group size. 5819 HAS_STUB_SECTION 5820 } State; 5821 5822 // Any newly created relaxed sections are stored here. 5823 std::vector<Output_relaxed_input_section*> new_relaxed_sections; 5824 5825 State state = NO_GROUP; 5826 section_size_type off = 0; 5827 section_size_type group_begin_offset = 0; 5828 section_size_type group_end_offset = 0; 5829 section_size_type stub_table_end_offset = 0; 5830 Input_section_list::const_iterator group_begin = 5831 this->input_sections().end(); 5832 Input_section_list::const_iterator stub_table = 5833 this->input_sections().end(); 5834 Input_section_list::const_iterator group_end = this->input_sections().end(); 5835 for (Input_section_list::const_iterator p = this->input_sections().begin(); 5836 p != this->input_sections().end(); 5837 ++p) 5838 { 5839 section_size_type section_begin_offset = 5840 align_address(off, p->addralign()); 5841 section_size_type section_end_offset = 5842 section_begin_offset + p->data_size(); 5843 5844 // Check to see if we should group the previously seen sections. 5845 switch (state) 5846 { 5847 case NO_GROUP: 5848 break; 5849 5850 case FINDING_STUB_SECTION: 5851 // Adding this section makes the group larger than GROUP_SIZE. 5852 if (section_end_offset - group_begin_offset >= group_size) 5853 { 5854 if (stubs_always_after_branch) 5855 { 5856 gold_assert(group_end != this->input_sections().end()); 5857 this->create_stub_group(group_begin, group_end, group_end, 5858 target, &new_relaxed_sections, 5859 task); 5860 state = NO_GROUP; 5861 } 5862 else 5863 { 5864 // But wait, there's more! Input sections up to 5865 // stub_group_size bytes after the stub table can be 5866 // handled by it too. 5867 state = HAS_STUB_SECTION; 5868 stub_table = group_end; 5869 stub_table_end_offset = group_end_offset; 5870 } 5871 } 5872 break; 5873 5874 case HAS_STUB_SECTION: 5875 // Adding this section makes the post stub-section group larger 5876 // than GROUP_SIZE. 5877 if (section_end_offset - stub_table_end_offset >= group_size) 5878 { 5879 gold_assert(group_end != this->input_sections().end()); 5880 this->create_stub_group(group_begin, group_end, stub_table, 5881 target, &new_relaxed_sections, task); 5882 state = NO_GROUP; 5883 } 5884 break; 5885 5886 default: 5887 gold_unreachable(); 5888 } 5889 5890 // If we see an input section and currently there is no group, start 5891 // a new one. Skip any empty sections. We look at the data size 5892 // instead of calling p->relobj()->section_size() to avoid locking. 5893 if ((p->is_input_section() || p->is_relaxed_input_section()) 5894 && (p->data_size() != 0)) 5895 { 5896 if (state == NO_GROUP) 5897 { 5898 state = FINDING_STUB_SECTION; 5899 group_begin = p; 5900 group_begin_offset = section_begin_offset; 5901 } 5902 5903 // Keep track of the last input section seen. 5904 group_end = p; 5905 group_end_offset = section_end_offset; 5906 } 5907 5908 off = section_end_offset; 5909 } 5910 5911 // Create a stub group for any ungrouped sections. 5912 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION) 5913 { 5914 gold_assert(group_end != this->input_sections().end()); 5915 this->create_stub_group(group_begin, group_end, 5916 (state == FINDING_STUB_SECTION 5917 ? group_end 5918 : stub_table), 5919 target, &new_relaxed_sections, task); 5920 } 5921 5922 // Convert input section into relaxed input section in a batch. 5923 if (!new_relaxed_sections.empty()) 5924 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections); 5925 5926 // Update the section offsets 5927 for (size_t i = 0; i < new_relaxed_sections.size(); ++i) 5928 { 5929 Arm_relobj<big_endian>* arm_relobj = 5930 Arm_relobj<big_endian>::as_arm_relobj( 5931 new_relaxed_sections[i]->relobj()); 5932 unsigned int shndx = new_relaxed_sections[i]->shndx(); 5933 // Tell Arm_relobj that this input section is converted. 5934 arm_relobj->convert_input_section_to_relaxed_section(shndx); 5935 } 5936} 5937 5938// Append non empty text sections in this to LIST in ascending 5939// order of their position in this. 5940 5941template<bool big_endian> 5942void 5943Arm_output_section<big_endian>::append_text_sections_to_list( 5944 Text_section_list* list) 5945{ 5946 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0); 5947 5948 for (Input_section_list::const_iterator p = this->input_sections().begin(); 5949 p != this->input_sections().end(); 5950 ++p) 5951 { 5952 // We only care about plain or relaxed input sections. We also 5953 // ignore any merged sections. 5954 if (p->is_input_section() || p->is_relaxed_input_section()) 5955 list->push_back(Text_section_list::value_type(p->relobj(), 5956 p->shndx())); 5957 } 5958} 5959 5960template<bool big_endian> 5961void 5962Arm_output_section<big_endian>::fix_exidx_coverage( 5963 Layout* layout, 5964 const Text_section_list& sorted_text_sections, 5965 Symbol_table* symtab, 5966 bool merge_exidx_entries, 5967 const Task* task) 5968{ 5969 // We should only do this for the EXIDX output section. 5970 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX); 5971 5972 // We don't want the relaxation loop to undo these changes, so we discard 5973 // the current saved states and take another one after the fix-up. 5974 this->discard_states(); 5975 5976 // Remove all input sections. 5977 uint64_t address = this->address(); 5978 typedef std::list<Output_section::Input_section> Input_section_list; 5979 Input_section_list input_sections; 5980 this->reset_address_and_file_offset(); 5981 this->get_input_sections(address, std::string(""), &input_sections); 5982 5983 if (!this->input_sections().empty()) 5984 gold_error(_("Found non-EXIDX input sections in EXIDX output section")); 5985 5986 // Go through all the known input sections and record them. 5987 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set; 5988 typedef Unordered_map<Section_id, const Output_section::Input_section*, 5989 Section_id_hash> Text_to_exidx_map; 5990 Text_to_exidx_map text_to_exidx_map; 5991 for (Input_section_list::const_iterator p = input_sections.begin(); 5992 p != input_sections.end(); 5993 ++p) 5994 { 5995 // This should never happen. At this point, we should only see 5996 // plain EXIDX input sections. 5997 gold_assert(!p->is_relaxed_input_section()); 5998 text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p); 5999 } 6000 6001 Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries); 6002 6003 // Go over the sorted text sections. 6004 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set; 6005 Section_id_set processed_input_sections; 6006 for (Text_section_list::const_iterator p = sorted_text_sections.begin(); 6007 p != sorted_text_sections.end(); 6008 ++p) 6009 { 6010 Relobj* relobj = p->first; 6011 unsigned int shndx = p->second; 6012 6013 Arm_relobj<big_endian>* arm_relobj = 6014 Arm_relobj<big_endian>::as_arm_relobj(relobj); 6015 const Arm_exidx_input_section* exidx_input_section = 6016 arm_relobj->exidx_input_section_by_link(shndx); 6017 6018 // If this text section has no EXIDX section or if the EXIDX section 6019 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end 6020 // of the last seen EXIDX section. 6021 if (exidx_input_section == NULL || exidx_input_section->has_errors()) 6022 { 6023 exidx_fixup.add_exidx_cantunwind_as_needed(); 6024 continue; 6025 } 6026 6027 Relobj* exidx_relobj = exidx_input_section->relobj(); 6028 unsigned int exidx_shndx = exidx_input_section->shndx(); 6029 Section_id sid(exidx_relobj, exidx_shndx); 6030 Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid); 6031 if (iter == text_to_exidx_map.end()) 6032 { 6033 // This is odd. We have not seen this EXIDX input section before. 6034 // We cannot do fix-up. If we saw a SECTIONS clause in a script, 6035 // issue a warning instead. We assume the user knows what he 6036 // or she is doing. Otherwise, this is an error. 6037 if (layout->script_options()->saw_sections_clause()) 6038 gold_warning(_("unwinding may not work because EXIDX input section" 6039 " %u of %s is not in EXIDX output section"), 6040 exidx_shndx, exidx_relobj->name().c_str()); 6041 else 6042 gold_error(_("unwinding may not work because EXIDX input section" 6043 " %u of %s is not in EXIDX output section"), 6044 exidx_shndx, exidx_relobj->name().c_str()); 6045 6046 exidx_fixup.add_exidx_cantunwind_as_needed(); 6047 continue; 6048 } 6049 6050 // We need to access the contents of the EXIDX section, lock the 6051 // object here. 6052 Task_lock_obj<Object> tl(task, exidx_relobj); 6053 section_size_type exidx_size; 6054 const unsigned char* exidx_contents = 6055 exidx_relobj->section_contents(exidx_shndx, &exidx_size, false); 6056 6057 // Fix up coverage and append input section to output data list. 6058 Arm_exidx_section_offset_map* section_offset_map = NULL; 6059 uint32_t deleted_bytes = 6060 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section, 6061 exidx_contents, 6062 exidx_size, 6063 §ion_offset_map); 6064 6065 if (deleted_bytes == exidx_input_section->size()) 6066 { 6067 // The whole EXIDX section got merged. Remove it from output. 6068 gold_assert(section_offset_map == NULL); 6069 exidx_relobj->set_output_section(exidx_shndx, NULL); 6070 6071 // All local symbols defined in this input section will be dropped. 6072 // We need to adjust output local symbol count. 6073 arm_relobj->set_output_local_symbol_count_needs_update(); 6074 } 6075 else if (deleted_bytes > 0) 6076 { 6077 // Some entries are merged. We need to convert this EXIDX input 6078 // section into a relaxed section. 6079 gold_assert(section_offset_map != NULL); 6080 6081 Arm_exidx_merged_section* merged_section = 6082 new Arm_exidx_merged_section(*exidx_input_section, 6083 *section_offset_map, deleted_bytes); 6084 merged_section->build_contents(exidx_contents, exidx_size); 6085 6086 const std::string secname = exidx_relobj->section_name(exidx_shndx); 6087 this->add_relaxed_input_section(layout, merged_section, secname); 6088 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx); 6089 6090 // All local symbols defined in discarded portions of this input 6091 // section will be dropped. We need to adjust output local symbol 6092 // count. 6093 arm_relobj->set_output_local_symbol_count_needs_update(); 6094 } 6095 else 6096 { 6097 // Just add back the EXIDX input section. 6098 gold_assert(section_offset_map == NULL); 6099 const Output_section::Input_section* pis = iter->second; 6100 gold_assert(pis->is_input_section()); 6101 this->add_script_input_section(*pis); 6102 } 6103 6104 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx)); 6105 } 6106 6107 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary. 6108 exidx_fixup.add_exidx_cantunwind_as_needed(); 6109 6110 // Remove any known EXIDX input sections that are not processed. 6111 for (Input_section_list::const_iterator p = input_sections.begin(); 6112 p != input_sections.end(); 6113 ++p) 6114 { 6115 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx())) 6116 == processed_input_sections.end()) 6117 { 6118 // We discard a known EXIDX section because its linked 6119 // text section has been folded by ICF. We also discard an 6120 // EXIDX section with error, the output does not matter in this 6121 // case. We do this to avoid triggering asserts. 6122 Arm_relobj<big_endian>* arm_relobj = 6123 Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); 6124 const Arm_exidx_input_section* exidx_input_section = 6125 arm_relobj->exidx_input_section_by_shndx(p->shndx()); 6126 gold_assert(exidx_input_section != NULL); 6127 if (!exidx_input_section->has_errors()) 6128 { 6129 unsigned int text_shndx = exidx_input_section->link(); 6130 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx)); 6131 } 6132 6133 // Remove this from link. We also need to recount the 6134 // local symbols. 6135 p->relobj()->set_output_section(p->shndx(), NULL); 6136 arm_relobj->set_output_local_symbol_count_needs_update(); 6137 } 6138 } 6139 6140 // Link exidx output section to the first seen output section and 6141 // set correct entry size. 6142 this->set_link_section(exidx_fixup.first_output_text_section()); 6143 this->set_entsize(8); 6144 6145 // Make changes permanent. 6146 this->save_states(); 6147 this->set_section_offsets_need_adjustment(); 6148} 6149 6150// Link EXIDX output sections to text output sections. 6151 6152template<bool big_endian> 6153void 6154Arm_output_section<big_endian>::set_exidx_section_link() 6155{ 6156 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX); 6157 if (!this->input_sections().empty()) 6158 { 6159 Input_section_list::const_iterator p = this->input_sections().begin(); 6160 Arm_relobj<big_endian>* arm_relobj = 6161 Arm_relobj<big_endian>::as_arm_relobj(p->relobj()); 6162 unsigned exidx_shndx = p->shndx(); 6163 const Arm_exidx_input_section* exidx_input_section = 6164 arm_relobj->exidx_input_section_by_shndx(exidx_shndx); 6165 gold_assert(exidx_input_section != NULL); 6166 unsigned int text_shndx = exidx_input_section->link(); 6167 Output_section* os = arm_relobj->output_section(text_shndx); 6168 this->set_link_section(os); 6169 } 6170} 6171 6172// Arm_relobj methods. 6173 6174// Determine if an input section is scannable for stub processing. SHDR is 6175// the header of the section and SHNDX is the section index. OS is the output 6176// section for the input section and SYMTAB is the global symbol table used to 6177// look up ICF information. 6178 6179template<bool big_endian> 6180bool 6181Arm_relobj<big_endian>::section_is_scannable( 6182 const elfcpp::Shdr<32, big_endian>& shdr, 6183 unsigned int shndx, 6184 const Output_section* os, 6185 const Symbol_table* symtab) 6186{ 6187 // Skip any empty sections, unallocated sections or sections whose 6188 // type are not SHT_PROGBITS. 6189 if (shdr.get_sh_size() == 0 6190 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0 6191 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS) 6192 return false; 6193 6194 // Skip any discarded or ICF'ed sections. 6195 if (os == NULL || symtab->is_section_folded(this, shndx)) 6196 return false; 6197 6198 // If this requires special offset handling, check to see if it is 6199 // a relaxed section. If this is not, then it is a merged section that 6200 // we cannot handle. 6201 if (this->is_output_section_offset_invalid(shndx)) 6202 { 6203 const Output_relaxed_input_section* poris = 6204 os->find_relaxed_input_section(this, shndx); 6205 if (poris == NULL) 6206 return false; 6207 } 6208 6209 return true; 6210} 6211 6212// Determine if we want to scan the SHNDX-th section for relocation stubs. 6213// This is a helper for Arm_relobj::scan_sections_for_stubs() below. 6214 6215template<bool big_endian> 6216bool 6217Arm_relobj<big_endian>::section_needs_reloc_stub_scanning( 6218 const elfcpp::Shdr<32, big_endian>& shdr, 6219 const Relobj::Output_sections& out_sections, 6220 const Symbol_table* symtab, 6221 const unsigned char* pshdrs) 6222{ 6223 unsigned int sh_type = shdr.get_sh_type(); 6224 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA) 6225 return false; 6226 6227 // Ignore empty section. 6228 off_t sh_size = shdr.get_sh_size(); 6229 if (sh_size == 0) 6230 return false; 6231 6232 // Ignore reloc section with unexpected symbol table. The 6233 // error will be reported in the final link. 6234 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx()) 6235 return false; 6236 6237 unsigned int reloc_size; 6238 if (sh_type == elfcpp::SHT_REL) 6239 reloc_size = elfcpp::Elf_sizes<32>::rel_size; 6240 else 6241 reloc_size = elfcpp::Elf_sizes<32>::rela_size; 6242 6243 // Ignore reloc section with unexpected entsize or uneven size. 6244 // The error will be reported in the final link. 6245 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0) 6246 return false; 6247 6248 // Ignore reloc section with bad info. This error will be 6249 // reported in the final link. 6250 unsigned int index = this->adjust_shndx(shdr.get_sh_info()); 6251 if (index >= this->shnum()) 6252 return false; 6253 6254 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 6255 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size); 6256 return this->section_is_scannable(text_shdr, index, 6257 out_sections[index], symtab); 6258} 6259 6260// Return the output address of either a plain input section or a relaxed 6261// input section. SHNDX is the section index. We define and use this 6262// instead of calling Output_section::output_address because that is slow 6263// for large output. 6264 6265template<bool big_endian> 6266Arm_address 6267Arm_relobj<big_endian>::simple_input_section_output_address( 6268 unsigned int shndx, 6269 Output_section* os) 6270{ 6271 if (this->is_output_section_offset_invalid(shndx)) 6272 { 6273 const Output_relaxed_input_section* poris = 6274 os->find_relaxed_input_section(this, shndx); 6275 // We do not handle merged sections here. 6276 gold_assert(poris != NULL); 6277 return poris->address(); 6278 } 6279 else 6280 return os->address() + this->get_output_section_offset(shndx); 6281} 6282 6283// Determine if we want to scan the SHNDX-th section for non-relocation stubs. 6284// This is a helper for Arm_relobj::scan_sections_for_stubs() below. 6285 6286template<bool big_endian> 6287bool 6288Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning( 6289 const elfcpp::Shdr<32, big_endian>& shdr, 6290 unsigned int shndx, 6291 Output_section* os, 6292 const Symbol_table* symtab) 6293{ 6294 if (!this->section_is_scannable(shdr, shndx, os, symtab)) 6295 return false; 6296 6297 // If the section does not cross any 4K-boundaries, it does not need to 6298 // be scanned. 6299 Arm_address address = this->simple_input_section_output_address(shndx, os); 6300 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU)) 6301 return false; 6302 6303 return true; 6304} 6305 6306// Scan a section for Cortex-A8 workaround. 6307 6308template<bool big_endian> 6309void 6310Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum( 6311 const elfcpp::Shdr<32, big_endian>& shdr, 6312 unsigned int shndx, 6313 Output_section* os, 6314 Target_arm<big_endian>* arm_target) 6315{ 6316 // Look for the first mapping symbol in this section. It should be 6317 // at (shndx, 0). 6318 Mapping_symbol_position section_start(shndx, 0); 6319 typename Mapping_symbols_info::const_iterator p = 6320 this->mapping_symbols_info_.lower_bound(section_start); 6321 6322 // There are no mapping symbols for this section. Treat it as a data-only 6323 // section. 6324 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx) 6325 return; 6326 6327 Arm_address output_address = 6328 this->simple_input_section_output_address(shndx, os); 6329 6330 // Get the section contents. 6331 section_size_type input_view_size = 0; 6332 const unsigned char* input_view = 6333 this->section_contents(shndx, &input_view_size, false); 6334 6335 // We need to go through the mapping symbols to determine what to 6336 // scan. There are two reasons. First, we should look at THUMB code and 6337 // THUMB code only. Second, we only want to look at the 4K-page boundary 6338 // to speed up the scanning. 6339 6340 while (p != this->mapping_symbols_info_.end() 6341 && p->first.first == shndx) 6342 { 6343 typename Mapping_symbols_info::const_iterator next = 6344 this->mapping_symbols_info_.upper_bound(p->first); 6345 6346 // Only scan part of a section with THUMB code. 6347 if (p->second == 't') 6348 { 6349 // Determine the end of this range. 6350 section_size_type span_start = 6351 convert_to_section_size_type(p->first.second); 6352 section_size_type span_end; 6353 if (next != this->mapping_symbols_info_.end() 6354 && next->first.first == shndx) 6355 span_end = convert_to_section_size_type(next->first.second); 6356 else 6357 span_end = convert_to_section_size_type(shdr.get_sh_size()); 6358 6359 if (((span_start + output_address) & ~0xfffUL) 6360 != ((span_end + output_address - 1) & ~0xfffUL)) 6361 { 6362 arm_target->scan_span_for_cortex_a8_erratum(this, shndx, 6363 span_start, span_end, 6364 input_view, 6365 output_address); 6366 } 6367 } 6368 6369 p = next; 6370 } 6371} 6372 6373// Scan relocations for stub generation. 6374 6375template<bool big_endian> 6376void 6377Arm_relobj<big_endian>::scan_sections_for_stubs( 6378 Target_arm<big_endian>* arm_target, 6379 const Symbol_table* symtab, 6380 const Layout* layout) 6381{ 6382 unsigned int shnum = this->shnum(); 6383 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 6384 6385 // Read the section headers. 6386 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(), 6387 shnum * shdr_size, 6388 true, true); 6389 6390 // To speed up processing, we set up hash tables for fast lookup of 6391 // input offsets to output addresses. 6392 this->initialize_input_to_output_maps(); 6393 6394 const Relobj::Output_sections& out_sections(this->output_sections()); 6395 6396 Relocate_info<32, big_endian> relinfo; 6397 relinfo.symtab = symtab; 6398 relinfo.layout = layout; 6399 relinfo.object = this; 6400 6401 // Do relocation stubs scanning. 6402 const unsigned char* p = pshdrs + shdr_size; 6403 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size) 6404 { 6405 const elfcpp::Shdr<32, big_endian> shdr(p); 6406 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab, 6407 pshdrs)) 6408 { 6409 unsigned int index = this->adjust_shndx(shdr.get_sh_info()); 6410 Arm_address output_offset = this->get_output_section_offset(index); 6411 Arm_address output_address; 6412 if (output_offset != invalid_address) 6413 output_address = out_sections[index]->address() + output_offset; 6414 else 6415 { 6416 // Currently this only happens for a relaxed section. 6417 const Output_relaxed_input_section* poris = 6418 out_sections[index]->find_relaxed_input_section(this, index); 6419 gold_assert(poris != NULL); 6420 output_address = poris->address(); 6421 } 6422 6423 // Get the relocations. 6424 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(), 6425 shdr.get_sh_size(), 6426 true, false); 6427 6428 // Get the section contents. This does work for the case in which 6429 // we modify the contents of an input section. We need to pass the 6430 // output view under such circumstances. 6431 section_size_type input_view_size = 0; 6432 const unsigned char* input_view = 6433 this->section_contents(index, &input_view_size, false); 6434 6435 relinfo.reloc_shndx = i; 6436 relinfo.data_shndx = index; 6437 unsigned int sh_type = shdr.get_sh_type(); 6438 unsigned int reloc_size; 6439 if (sh_type == elfcpp::SHT_REL) 6440 reloc_size = elfcpp::Elf_sizes<32>::rel_size; 6441 else 6442 reloc_size = elfcpp::Elf_sizes<32>::rela_size; 6443 6444 Output_section* os = out_sections[index]; 6445 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs, 6446 shdr.get_sh_size() / reloc_size, 6447 os, 6448 output_offset == invalid_address, 6449 input_view, output_address, 6450 input_view_size); 6451 } 6452 } 6453 6454 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section 6455 // after its relocation section, if there is one, is processed for 6456 // relocation stubs. Merging this loop with the one above would have been 6457 // complicated since we would have had to make sure that relocation stub 6458 // scanning is done first. 6459 if (arm_target->fix_cortex_a8()) 6460 { 6461 const unsigned char* p = pshdrs + shdr_size; 6462 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size) 6463 { 6464 const elfcpp::Shdr<32, big_endian> shdr(p); 6465 if (this->section_needs_cortex_a8_stub_scanning(shdr, i, 6466 out_sections[i], 6467 symtab)) 6468 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i], 6469 arm_target); 6470 } 6471 } 6472 6473 // After we've done the relocations, we release the hash tables, 6474 // since we no longer need them. 6475 this->free_input_to_output_maps(); 6476} 6477 6478// Count the local symbols. The ARM backend needs to know if a symbol 6479// is a THUMB function or not. For global symbols, it is easy because 6480// the Symbol object keeps the ELF symbol type. For local symbol it is 6481// harder because we cannot access this information. So we override the 6482// do_count_local_symbol in parent and scan local symbols to mark 6483// THUMB functions. This is not the most efficient way but I do not want to 6484// slow down other ports by calling a per symbol target hook inside 6485// Sized_relobj_file<size, big_endian>::do_count_local_symbols. 6486 6487template<bool big_endian> 6488void 6489Arm_relobj<big_endian>::do_count_local_symbols( 6490 Stringpool_template<char>* pool, 6491 Stringpool_template<char>* dynpool) 6492{ 6493 // We need to fix-up the values of any local symbols whose type are 6494 // STT_ARM_TFUNC. 6495 6496 // Ask parent to count the local symbols. 6497 Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool); 6498 const unsigned int loccount = this->local_symbol_count(); 6499 if (loccount == 0) 6500 return; 6501 6502 // Initialize the thumb function bit-vector. 6503 std::vector<bool> empty_vector(loccount, false); 6504 this->local_symbol_is_thumb_function_.swap(empty_vector); 6505 6506 // Read the symbol table section header. 6507 const unsigned int symtab_shndx = this->symtab_shndx(); 6508 elfcpp::Shdr<32, big_endian> 6509 symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); 6510 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); 6511 6512 // Read the local symbols. 6513 const int sym_size =elfcpp::Elf_sizes<32>::sym_size; 6514 gold_assert(loccount == symtabshdr.get_sh_info()); 6515 off_t locsize = loccount * sym_size; 6516 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), 6517 locsize, true, true); 6518 6519 // For mapping symbol processing, we need to read the symbol names. 6520 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link()); 6521 if (strtab_shndx >= this->shnum()) 6522 { 6523 this->error(_("invalid symbol table name index: %u"), strtab_shndx); 6524 return; 6525 } 6526 6527 elfcpp::Shdr<32, big_endian> 6528 strtabshdr(this, this->elf_file()->section_header(strtab_shndx)); 6529 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB) 6530 { 6531 this->error(_("symbol table name section has wrong type: %u"), 6532 static_cast<unsigned int>(strtabshdr.get_sh_type())); 6533 return; 6534 } 6535 const char* pnames = 6536 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(), 6537 strtabshdr.get_sh_size(), 6538 false, false)); 6539 6540 // Loop over the local symbols and mark any local symbols pointing 6541 // to THUMB functions. 6542 6543 // Skip the first dummy symbol. 6544 psyms += sym_size; 6545 typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values = 6546 this->local_values(); 6547 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) 6548 { 6549 elfcpp::Sym<32, big_endian> sym(psyms); 6550 elfcpp::STT st_type = sym.get_st_type(); 6551 Symbol_value<32>& lv((*plocal_values)[i]); 6552 Arm_address input_value = lv.input_value(); 6553 6554 // Check to see if this is a mapping symbol. 6555 const char* sym_name = pnames + sym.get_st_name(); 6556 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name)) 6557 { 6558 bool is_ordinary; 6559 unsigned int input_shndx = 6560 this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary); 6561 gold_assert(is_ordinary); 6562 6563 // Strip of LSB in case this is a THUMB symbol. 6564 Mapping_symbol_position msp(input_shndx, input_value & ~1U); 6565 this->mapping_symbols_info_[msp] = sym_name[1]; 6566 } 6567 6568 if (st_type == elfcpp::STT_ARM_TFUNC 6569 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0))) 6570 { 6571 // This is a THUMB function. Mark this and canonicalize the 6572 // symbol value by setting LSB. 6573 this->local_symbol_is_thumb_function_[i] = true; 6574 if ((input_value & 1) == 0) 6575 lv.set_input_value(input_value | 1); 6576 } 6577 } 6578} 6579 6580// Relocate sections. 6581template<bool big_endian> 6582void 6583Arm_relobj<big_endian>::do_relocate_sections( 6584 const Symbol_table* symtab, 6585 const Layout* layout, 6586 const unsigned char* pshdrs, 6587 Output_file* of, 6588 typename Sized_relobj_file<32, big_endian>::Views* pviews) 6589{ 6590 // Relocate the section data. 6591 this->relocate_section_range(symtab, layout, pshdrs, of, pviews, 6592 1, this->shnum() - 1); 6593 6594 // We do not generate stubs if doing a relocatable link. 6595 if (parameters->options().relocatable()) 6596 return; 6597 6598 // Relocate stub tables. 6599 unsigned int shnum = this->shnum(); 6600 6601 Target_arm<big_endian>* arm_target = 6602 Target_arm<big_endian>::default_target(); 6603 6604 Relocate_info<32, big_endian> relinfo; 6605 relinfo.symtab = symtab; 6606 relinfo.layout = layout; 6607 relinfo.object = this; 6608 6609 for (unsigned int i = 1; i < shnum; ++i) 6610 { 6611 Arm_input_section<big_endian>* arm_input_section = 6612 arm_target->find_arm_input_section(this, i); 6613 6614 if (arm_input_section != NULL 6615 && arm_input_section->is_stub_table_owner() 6616 && !arm_input_section->stub_table()->empty()) 6617 { 6618 // We cannot discard a section if it owns a stub table. 6619 Output_section* os = this->output_section(i); 6620 gold_assert(os != NULL); 6621 6622 relinfo.reloc_shndx = elfcpp::SHN_UNDEF; 6623 relinfo.reloc_shdr = NULL; 6624 relinfo.data_shndx = i; 6625 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size; 6626 6627 gold_assert((*pviews)[i].view != NULL); 6628 6629 // We are passed the output section view. Adjust it to cover the 6630 // stub table only. 6631 Stub_table<big_endian>* stub_table = arm_input_section->stub_table(); 6632 gold_assert((stub_table->address() >= (*pviews)[i].address) 6633 && ((stub_table->address() + stub_table->data_size()) 6634 <= (*pviews)[i].address + (*pviews)[i].view_size)); 6635 6636 off_t offset = stub_table->address() - (*pviews)[i].address; 6637 unsigned char* view = (*pviews)[i].view + offset; 6638 Arm_address address = stub_table->address(); 6639 section_size_type view_size = stub_table->data_size(); 6640 6641 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address, 6642 view_size); 6643 } 6644 6645 // Apply Cortex A8 workaround if applicable. 6646 if (this->section_has_cortex_a8_workaround(i)) 6647 { 6648 unsigned char* view = (*pviews)[i].view; 6649 Arm_address view_address = (*pviews)[i].address; 6650 section_size_type view_size = (*pviews)[i].view_size; 6651 Stub_table<big_endian>* stub_table = this->stub_tables_[i]; 6652 6653 // Adjust view to cover section. 6654 Output_section* os = this->output_section(i); 6655 gold_assert(os != NULL); 6656 Arm_address section_address = 6657 this->simple_input_section_output_address(i, os); 6658 uint64_t section_size = this->section_size(i); 6659 6660 gold_assert(section_address >= view_address 6661 && ((section_address + section_size) 6662 <= (view_address + view_size))); 6663 6664 unsigned char* section_view = view + (section_address - view_address); 6665 6666 // Apply the Cortex-A8 workaround to the output address range 6667 // corresponding to this input section. 6668 stub_table->apply_cortex_a8_workaround_to_address_range( 6669 arm_target, 6670 section_view, 6671 section_address, 6672 section_size); 6673 } 6674 // BE8 swapping 6675 if (parameters->options().be8()) 6676 { 6677 section_size_type span_start, span_end; 6678 elfcpp::Shdr<32, big_endian> 6679 shdr(pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size); 6680 Mapping_symbol_position section_start(i, 0); 6681 typename Mapping_symbols_info::const_iterator p = 6682 this->mapping_symbols_info_.lower_bound(section_start); 6683 unsigned char* view = (*pviews)[i].view; 6684 Arm_address view_address = (*pviews)[i].address; 6685 section_size_type view_size = (*pviews)[i].view_size; 6686 while (p != this->mapping_symbols_info_.end() 6687 && p->first.first == i) 6688 { 6689 typename Mapping_symbols_info::const_iterator next = 6690 this->mapping_symbols_info_.upper_bound(p->first); 6691 6692 // Only swap arm or thumb code. 6693 if ((p->second == 'a') || (p->second == 't')) 6694 { 6695 Output_section* os = this->output_section(i); 6696 gold_assert(os != NULL); 6697 Arm_address section_address = 6698 this->simple_input_section_output_address(i, os); 6699 span_start = convert_to_section_size_type(p->first.second); 6700 if (next != this->mapping_symbols_info_.end() 6701 && next->first.first == i) 6702 span_end = 6703 convert_to_section_size_type(next->first.second); 6704 else 6705 span_end = 6706 convert_to_section_size_type(shdr.get_sh_size()); 6707 unsigned char* section_view = 6708 view + (section_address - view_address); 6709 uint64_t section_size = this->section_size(i); 6710 6711 gold_assert(section_address >= view_address 6712 && ((section_address + section_size) 6713 <= (view_address + view_size))); 6714 6715 // Set Output view for swapping 6716 unsigned char *oview = section_view + span_start; 6717 unsigned int index = 0; 6718 if (p->second == 'a') 6719 { 6720 while (index + 3 < (span_end - span_start)) 6721 { 6722 typedef typename elfcpp::Swap<32, big_endian> 6723 ::Valtype Valtype; 6724 Valtype* wv = 6725 reinterpret_cast<Valtype*>(oview+index); 6726 uint32_t val = elfcpp::Swap<32, false>::readval(wv); 6727 elfcpp::Swap<32, true>::writeval(wv, val); 6728 index += 4; 6729 } 6730 } 6731 else if (p->second == 't') 6732 { 6733 while (index + 1 < (span_end - span_start)) 6734 { 6735 typedef typename elfcpp::Swap<16, big_endian> 6736 ::Valtype Valtype; 6737 Valtype* wv = 6738 reinterpret_cast<Valtype*>(oview+index); 6739 uint16_t val = elfcpp::Swap<16, false>::readval(wv); 6740 elfcpp::Swap<16, true>::writeval(wv, val); 6741 index += 2; 6742 } 6743 } 6744 } 6745 p = next; 6746 } 6747 } 6748 } 6749} 6750 6751// Find the linked text section of an EXIDX section by looking at the first 6752// relocation. 4.4.1 of the EHABI specifications says that an EXIDX section 6753// must be linked to its associated code section via the sh_link field of 6754// its section header. However, some tools are broken and the link is not 6755// always set. LD just drops such an EXIDX section silently, causing the 6756// associated code not unwindabled. Here we try a little bit harder to 6757// discover the linked code section. 6758// 6759// PSHDR points to the section header of a relocation section of an EXIDX 6760// section. If we can find a linked text section, return true and 6761// store the text section index in the location PSHNDX. Otherwise 6762// return false. 6763 6764template<bool big_endian> 6765bool 6766Arm_relobj<big_endian>::find_linked_text_section( 6767 const unsigned char* pshdr, 6768 const unsigned char* psyms, 6769 unsigned int* pshndx) 6770{ 6771 elfcpp::Shdr<32, big_endian> shdr(pshdr); 6772 6773 // If there is no relocation, we cannot find the linked text section. 6774 size_t reloc_size; 6775 if (shdr.get_sh_type() == elfcpp::SHT_REL) 6776 reloc_size = elfcpp::Elf_sizes<32>::rel_size; 6777 else 6778 reloc_size = elfcpp::Elf_sizes<32>::rela_size; 6779 size_t reloc_count = shdr.get_sh_size() / reloc_size; 6780 6781 // Get the relocations. 6782 const unsigned char* prelocs = 6783 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false); 6784 6785 // Find the REL31 relocation for the first word of the first EXIDX entry. 6786 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size) 6787 { 6788 Arm_address r_offset; 6789 typename elfcpp::Elf_types<32>::Elf_WXword r_info; 6790 if (shdr.get_sh_type() == elfcpp::SHT_REL) 6791 { 6792 typename elfcpp::Rel<32, big_endian> reloc(prelocs); 6793 r_info = reloc.get_r_info(); 6794 r_offset = reloc.get_r_offset(); 6795 } 6796 else 6797 { 6798 typename elfcpp::Rela<32, big_endian> reloc(prelocs); 6799 r_info = reloc.get_r_info(); 6800 r_offset = reloc.get_r_offset(); 6801 } 6802 6803 unsigned int r_type = elfcpp::elf_r_type<32>(r_info); 6804 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31) 6805 continue; 6806 6807 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 6808 if (r_sym == 0 6809 || r_sym >= this->local_symbol_count() 6810 || r_offset != 0) 6811 continue; 6812 6813 // This is the relocation for the first word of the first EXIDX entry. 6814 // We expect to see a local section symbol. 6815 const int sym_size = elfcpp::Elf_sizes<32>::sym_size; 6816 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size); 6817 if (sym.get_st_type() == elfcpp::STT_SECTION) 6818 { 6819 bool is_ordinary; 6820 *pshndx = 6821 this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary); 6822 gold_assert(is_ordinary); 6823 return true; 6824 } 6825 else 6826 return false; 6827 } 6828 6829 return false; 6830} 6831 6832// Make an EXIDX input section object for an EXIDX section whose index is 6833// SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX 6834// is the section index of the linked text section. 6835 6836template<bool big_endian> 6837void 6838Arm_relobj<big_endian>::make_exidx_input_section( 6839 unsigned int shndx, 6840 const elfcpp::Shdr<32, big_endian>& shdr, 6841 unsigned int text_shndx, 6842 const elfcpp::Shdr<32, big_endian>& text_shdr) 6843{ 6844 // Create an Arm_exidx_input_section object for this EXIDX section. 6845 Arm_exidx_input_section* exidx_input_section = 6846 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(), 6847 shdr.get_sh_addralign(), 6848 text_shdr.get_sh_size()); 6849 6850 gold_assert(this->exidx_section_map_[shndx] == NULL); 6851 this->exidx_section_map_[shndx] = exidx_input_section; 6852 6853 if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum()) 6854 { 6855 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"), 6856 this->section_name(shndx).c_str(), shndx, text_shndx, 6857 this->name().c_str()); 6858 exidx_input_section->set_has_errors(); 6859 } 6860 else if (this->exidx_section_map_[text_shndx] != NULL) 6861 { 6862 unsigned other_exidx_shndx = 6863 this->exidx_section_map_[text_shndx]->shndx(); 6864 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section" 6865 "%s(%u) in %s"), 6866 this->section_name(shndx).c_str(), shndx, 6867 this->section_name(other_exidx_shndx).c_str(), 6868 other_exidx_shndx, this->section_name(text_shndx).c_str(), 6869 text_shndx, this->name().c_str()); 6870 exidx_input_section->set_has_errors(); 6871 } 6872 else 6873 this->exidx_section_map_[text_shndx] = exidx_input_section; 6874 6875 // Check section flags of text section. 6876 if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0) 6877 { 6878 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) " 6879 " in %s"), 6880 this->section_name(shndx).c_str(), shndx, 6881 this->section_name(text_shndx).c_str(), text_shndx, 6882 this->name().c_str()); 6883 exidx_input_section->set_has_errors(); 6884 } 6885 else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0) 6886 // I would like to make this an error but currently ld just ignores 6887 // this. 6888 gold_warning(_("EXIDX section %s(%u) links to non-executable section " 6889 "%s(%u) in %s"), 6890 this->section_name(shndx).c_str(), shndx, 6891 this->section_name(text_shndx).c_str(), text_shndx, 6892 this->name().c_str()); 6893} 6894 6895// Read the symbol information. 6896 6897template<bool big_endian> 6898void 6899Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd) 6900{ 6901 // Call parent class to read symbol information. 6902 this->base_read_symbols(sd); 6903 6904 // If this input file is a binary file, it has no processor 6905 // specific flags and attributes section. 6906 Input_file::Format format = this->input_file()->format(); 6907 if (format != Input_file::FORMAT_ELF) 6908 { 6909 gold_assert(format == Input_file::FORMAT_BINARY); 6910 this->merge_flags_and_attributes_ = false; 6911 return; 6912 } 6913 6914 // Read processor-specific flags in ELF file header. 6915 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset, 6916 elfcpp::Elf_sizes<32>::ehdr_size, 6917 true, false); 6918 elfcpp::Ehdr<32, big_endian> ehdr(pehdr); 6919 this->processor_specific_flags_ = ehdr.get_e_flags(); 6920 6921 // Go over the section headers and look for .ARM.attributes and .ARM.exidx 6922 // sections. 6923 std::vector<unsigned int> deferred_exidx_sections; 6924 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 6925 const unsigned char* pshdrs = sd->section_headers->data(); 6926 const unsigned char* ps = pshdrs + shdr_size; 6927 bool must_merge_flags_and_attributes = false; 6928 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size) 6929 { 6930 elfcpp::Shdr<32, big_endian> shdr(ps); 6931 6932 // Sometimes an object has no contents except the section name string 6933 // table and an empty symbol table with the undefined symbol. We 6934 // don't want to merge processor-specific flags from such an object. 6935 if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB) 6936 { 6937 // Symbol table is not empty. 6938 const elfcpp::Elf_types<32>::Elf_WXword sym_size = 6939 elfcpp::Elf_sizes<32>::sym_size; 6940 if (shdr.get_sh_size() > sym_size) 6941 must_merge_flags_and_attributes = true; 6942 } 6943 else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB) 6944 // If this is neither an empty symbol table nor a string table, 6945 // be conservative. 6946 must_merge_flags_and_attributes = true; 6947 6948 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES) 6949 { 6950 gold_assert(this->attributes_section_data_ == NULL); 6951 section_offset_type section_offset = shdr.get_sh_offset(); 6952 section_size_type section_size = 6953 convert_to_section_size_type(shdr.get_sh_size()); 6954 const unsigned char* view = 6955 this->get_view(section_offset, section_size, true, false); 6956 this->attributes_section_data_ = 6957 new Attributes_section_data(view, section_size); 6958 } 6959 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) 6960 { 6961 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link()); 6962 if (text_shndx == elfcpp::SHN_UNDEF) 6963 deferred_exidx_sections.push_back(i); 6964 else 6965 { 6966 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs 6967 + text_shndx * shdr_size); 6968 this->make_exidx_input_section(i, shdr, text_shndx, text_shdr); 6969 } 6970 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set. 6971 if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0) 6972 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"), 6973 this->section_name(i).c_str(), this->name().c_str()); 6974 } 6975 } 6976 6977 // This is rare. 6978 if (!must_merge_flags_and_attributes) 6979 { 6980 gold_assert(deferred_exidx_sections.empty()); 6981 this->merge_flags_and_attributes_ = false; 6982 return; 6983 } 6984 6985 // Some tools are broken and they do not set the link of EXIDX sections. 6986 // We look at the first relocation to figure out the linked sections. 6987 if (!deferred_exidx_sections.empty()) 6988 { 6989 // We need to go over the section headers again to find the mapping 6990 // from sections being relocated to their relocation sections. This is 6991 // a bit inefficient as we could do that in the loop above. However, 6992 // we do not expect any deferred EXIDX sections normally. So we do not 6993 // want to slow down the most common path. 6994 typedef Unordered_map<unsigned int, unsigned int> Reloc_map; 6995 Reloc_map reloc_map; 6996 ps = pshdrs + shdr_size; 6997 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size) 6998 { 6999 elfcpp::Shdr<32, big_endian> shdr(ps); 7000 elfcpp::Elf_Word sh_type = shdr.get_sh_type(); 7001 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA) 7002 { 7003 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info()); 7004 if (info_shndx >= this->shnum()) 7005 gold_error(_("relocation section %u has invalid info %u"), 7006 i, info_shndx); 7007 Reloc_map::value_type value(info_shndx, i); 7008 std::pair<Reloc_map::iterator, bool> result = 7009 reloc_map.insert(value); 7010 if (!result.second) 7011 gold_error(_("section %u has multiple relocation sections " 7012 "%u and %u"), 7013 info_shndx, i, reloc_map[info_shndx]); 7014 } 7015 } 7016 7017 // Read the symbol table section header. 7018 const unsigned int symtab_shndx = this->symtab_shndx(); 7019 elfcpp::Shdr<32, big_endian> 7020 symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); 7021 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); 7022 7023 // Read the local symbols. 7024 const int sym_size =elfcpp::Elf_sizes<32>::sym_size; 7025 const unsigned int loccount = this->local_symbol_count(); 7026 gold_assert(loccount == symtabshdr.get_sh_info()); 7027 off_t locsize = loccount * sym_size; 7028 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), 7029 locsize, true, true); 7030 7031 // Process the deferred EXIDX sections. 7032 for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i) 7033 { 7034 unsigned int shndx = deferred_exidx_sections[i]; 7035 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size); 7036 unsigned int text_shndx = elfcpp::SHN_UNDEF; 7037 Reloc_map::const_iterator it = reloc_map.find(shndx); 7038 if (it != reloc_map.end()) 7039 find_linked_text_section(pshdrs + it->second * shdr_size, 7040 psyms, &text_shndx); 7041 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs 7042 + text_shndx * shdr_size); 7043 this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr); 7044 } 7045 } 7046} 7047 7048// Process relocations for garbage collection. The ARM target uses .ARM.exidx 7049// sections for unwinding. These sections are referenced implicitly by 7050// text sections linked in the section headers. If we ignore these implicit 7051// references, the .ARM.exidx sections and any .ARM.extab sections they use 7052// will be garbage-collected incorrectly. Hence we override the same function 7053// in the base class to handle these implicit references. 7054 7055template<bool big_endian> 7056void 7057Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab, 7058 Layout* layout, 7059 Read_relocs_data* rd) 7060{ 7061 // First, call base class method to process relocations in this object. 7062 Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd); 7063 7064 // If --gc-sections is not specified, there is nothing more to do. 7065 // This happens when --icf is used but --gc-sections is not. 7066 if (!parameters->options().gc_sections()) 7067 return; 7068 7069 unsigned int shnum = this->shnum(); 7070 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 7071 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(), 7072 shnum * shdr_size, 7073 true, true); 7074 7075 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references 7076 // to these from the linked text sections. 7077 const unsigned char* ps = pshdrs + shdr_size; 7078 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size) 7079 { 7080 elfcpp::Shdr<32, big_endian> shdr(ps); 7081 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX) 7082 { 7083 // Found an .ARM.exidx section, add it to the set of reachable 7084 // sections from its linked text section. 7085 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link()); 7086 symtab->gc()->add_reference(this, text_shndx, this, i); 7087 } 7088 } 7089} 7090 7091// Update output local symbol count. Owing to EXIDX entry merging, some local 7092// symbols will be removed in output. Adjust output local symbol count 7093// accordingly. We can only changed the static output local symbol count. It 7094// is too late to change the dynamic symbols. 7095 7096template<bool big_endian> 7097void 7098Arm_relobj<big_endian>::update_output_local_symbol_count() 7099{ 7100 // Caller should check that this needs updating. We want caller checking 7101 // because output_local_symbol_count_needs_update() is most likely inlined. 7102 gold_assert(this->output_local_symbol_count_needs_update_); 7103 7104 gold_assert(this->symtab_shndx() != -1U); 7105 if (this->symtab_shndx() == 0) 7106 { 7107 // This object has no symbols. Weird but legal. 7108 return; 7109 } 7110 7111 // Read the symbol table section header. 7112 const unsigned int symtab_shndx = this->symtab_shndx(); 7113 elfcpp::Shdr<32, big_endian> 7114 symtabshdr(this, this->elf_file()->section_header(symtab_shndx)); 7115 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB); 7116 7117 // Read the local symbols. 7118 const int sym_size = elfcpp::Elf_sizes<32>::sym_size; 7119 const unsigned int loccount = this->local_symbol_count(); 7120 gold_assert(loccount == symtabshdr.get_sh_info()); 7121 off_t locsize = loccount * sym_size; 7122 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(), 7123 locsize, true, true); 7124 7125 // Loop over the local symbols. 7126 7127 typedef typename Sized_relobj_file<32, big_endian>::Output_sections 7128 Output_sections; 7129 const Output_sections& out_sections(this->output_sections()); 7130 unsigned int shnum = this->shnum(); 7131 unsigned int count = 0; 7132 // Skip the first, dummy, symbol. 7133 psyms += sym_size; 7134 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size) 7135 { 7136 elfcpp::Sym<32, big_endian> sym(psyms); 7137 7138 Symbol_value<32>& lv((*this->local_values())[i]); 7139 7140 // This local symbol was already discarded by do_count_local_symbols. 7141 if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry()) 7142 continue; 7143 7144 bool is_ordinary; 7145 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(), 7146 &is_ordinary); 7147 7148 if (shndx < shnum) 7149 { 7150 Output_section* os = out_sections[shndx]; 7151 7152 // This local symbol no longer has an output section. Discard it. 7153 if (os == NULL) 7154 { 7155 lv.set_no_output_symtab_entry(); 7156 continue; 7157 } 7158 7159 // Currently we only discard parts of EXIDX input sections. 7160 // We explicitly check for a merged EXIDX input section to avoid 7161 // calling Output_section_data::output_offset unless necessary. 7162 if ((this->get_output_section_offset(shndx) == invalid_address) 7163 && (this->exidx_input_section_by_shndx(shndx) != NULL)) 7164 { 7165 section_offset_type output_offset = 7166 os->output_offset(this, shndx, lv.input_value()); 7167 if (output_offset == -1) 7168 { 7169 // This symbol is defined in a part of an EXIDX input section 7170 // that is discarded due to entry merging. 7171 lv.set_no_output_symtab_entry(); 7172 continue; 7173 } 7174 } 7175 } 7176 7177 ++count; 7178 } 7179 7180 this->set_output_local_symbol_count(count); 7181 this->output_local_symbol_count_needs_update_ = false; 7182} 7183 7184// Arm_dynobj methods. 7185 7186// Read the symbol information. 7187 7188template<bool big_endian> 7189void 7190Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd) 7191{ 7192 // Call parent class to read symbol information. 7193 this->base_read_symbols(sd); 7194 7195 // Read processor-specific flags in ELF file header. 7196 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset, 7197 elfcpp::Elf_sizes<32>::ehdr_size, 7198 true, false); 7199 elfcpp::Ehdr<32, big_endian> ehdr(pehdr); 7200 this->processor_specific_flags_ = ehdr.get_e_flags(); 7201 7202 // Read the attributes section if there is one. 7203 // We read from the end because gas seems to put it near the end of 7204 // the section headers. 7205 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size; 7206 const unsigned char* ps = 7207 sd->section_headers->data() + shdr_size * (this->shnum() - 1); 7208 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size) 7209 { 7210 elfcpp::Shdr<32, big_endian> shdr(ps); 7211 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES) 7212 { 7213 section_offset_type section_offset = shdr.get_sh_offset(); 7214 section_size_type section_size = 7215 convert_to_section_size_type(shdr.get_sh_size()); 7216 const unsigned char* view = 7217 this->get_view(section_offset, section_size, true, false); 7218 this->attributes_section_data_ = 7219 new Attributes_section_data(view, section_size); 7220 break; 7221 } 7222 } 7223} 7224 7225// Stub_addend_reader methods. 7226 7227// Read the addend of a REL relocation of type R_TYPE at VIEW. 7228 7229template<bool big_endian> 7230elfcpp::Elf_types<32>::Elf_Swxword 7231Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()( 7232 unsigned int r_type, 7233 const unsigned char* view, 7234 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const 7235{ 7236 typedef class Arm_relocate_functions<big_endian> RelocFuncs; 7237 7238 switch (r_type) 7239 { 7240 case elfcpp::R_ARM_CALL: 7241 case elfcpp::R_ARM_JUMP24: 7242 case elfcpp::R_ARM_PLT32: 7243 { 7244 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 7245 const Valtype* wv = reinterpret_cast<const Valtype*>(view); 7246 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv); 7247 return Bits<26>::sign_extend32(val << 2); 7248 } 7249 7250 case elfcpp::R_ARM_THM_CALL: 7251 case elfcpp::R_ARM_THM_JUMP24: 7252 case elfcpp::R_ARM_THM_XPC22: 7253 { 7254 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 7255 const Valtype* wv = reinterpret_cast<const Valtype*>(view); 7256 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 7257 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 7258 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn); 7259 } 7260 7261 case elfcpp::R_ARM_THM_JUMP19: 7262 { 7263 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 7264 const Valtype* wv = reinterpret_cast<const Valtype*>(view); 7265 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 7266 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 7267 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn); 7268 } 7269 7270 default: 7271 gold_unreachable(); 7272 } 7273} 7274 7275// Arm_output_data_got methods. 7276 7277// Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries. 7278// The first one is initialized to be 1, which is the module index for 7279// the main executable and the second one 0. A reloc of the type 7280// R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will 7281// be applied by gold. GSYM is a global symbol. 7282// 7283template<bool big_endian> 7284void 7285Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc( 7286 unsigned int got_type, 7287 Symbol* gsym) 7288{ 7289 if (gsym->has_got_offset(got_type)) 7290 return; 7291 7292 // We are doing a static link. Just mark it as belong to module 1, 7293 // the executable. 7294 unsigned int got_offset = this->add_constant(1); 7295 gsym->set_got_offset(got_type, got_offset); 7296 got_offset = this->add_constant(0); 7297 this->static_relocs_.push_back(Static_reloc(got_offset, 7298 elfcpp::R_ARM_TLS_DTPOFF32, 7299 gsym)); 7300} 7301 7302// Same as the above but for a local symbol. 7303 7304template<bool big_endian> 7305void 7306Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc( 7307 unsigned int got_type, 7308 Sized_relobj_file<32, big_endian>* object, 7309 unsigned int index) 7310{ 7311 if (object->local_has_got_offset(index, got_type)) 7312 return; 7313 7314 // We are doing a static link. Just mark it as belong to module 1, 7315 // the executable. 7316 unsigned int got_offset = this->add_constant(1); 7317 object->set_local_got_offset(index, got_type, got_offset); 7318 got_offset = this->add_constant(0); 7319 this->static_relocs_.push_back(Static_reloc(got_offset, 7320 elfcpp::R_ARM_TLS_DTPOFF32, 7321 object, index)); 7322} 7323 7324template<bool big_endian> 7325void 7326Arm_output_data_got<big_endian>::do_write(Output_file* of) 7327{ 7328 // Call parent to write out GOT. 7329 Output_data_got<32, big_endian>::do_write(of); 7330 7331 // We are done if there is no fix up. 7332 if (this->static_relocs_.empty()) 7333 return; 7334 7335 gold_assert(parameters->doing_static_link()); 7336 7337 const off_t offset = this->offset(); 7338 const section_size_type oview_size = 7339 convert_to_section_size_type(this->data_size()); 7340 unsigned char* const oview = of->get_output_view(offset, oview_size); 7341 7342 Output_segment* tls_segment = this->layout_->tls_segment(); 7343 gold_assert(tls_segment != NULL); 7344 7345 // The thread pointer $tp points to the TCB, which is followed by the 7346 // TLS. So we need to adjust $tp relative addressing by this amount. 7347 Arm_address aligned_tcb_size = 7348 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment()); 7349 7350 for (size_t i = 0; i < this->static_relocs_.size(); ++i) 7351 { 7352 Static_reloc& reloc(this->static_relocs_[i]); 7353 7354 Arm_address value; 7355 if (!reloc.symbol_is_global()) 7356 { 7357 Sized_relobj_file<32, big_endian>* object = reloc.relobj(); 7358 const Symbol_value<32>* psymval = 7359 reloc.relobj()->local_symbol(reloc.index()); 7360 7361 // We are doing static linking. Issue an error and skip this 7362 // relocation if the symbol is undefined or in a discarded_section. 7363 bool is_ordinary; 7364 unsigned int shndx = psymval->input_shndx(&is_ordinary); 7365 if ((shndx == elfcpp::SHN_UNDEF) 7366 || (is_ordinary 7367 && shndx != elfcpp::SHN_UNDEF 7368 && !object->is_section_included(shndx) 7369 && !this->symbol_table_->is_section_folded(object, shndx))) 7370 { 7371 gold_error(_("undefined or discarded local symbol %u from " 7372 " object %s in GOT"), 7373 reloc.index(), reloc.relobj()->name().c_str()); 7374 continue; 7375 } 7376 7377 value = psymval->value(object, 0); 7378 } 7379 else 7380 { 7381 const Symbol* gsym = reloc.symbol(); 7382 gold_assert(gsym != NULL); 7383 if (gsym->is_forwarder()) 7384 gsym = this->symbol_table_->resolve_forwards(gsym); 7385 7386 // We are doing static linking. Issue an error and skip this 7387 // relocation if the symbol is undefined or in a discarded_section 7388 // unless it is a weakly_undefined symbol. 7389 if ((gsym->is_defined_in_discarded_section() 7390 || gsym->is_undefined()) 7391 && !gsym->is_weak_undefined()) 7392 { 7393 gold_error(_("undefined or discarded symbol %s in GOT"), 7394 gsym->name()); 7395 continue; 7396 } 7397 7398 if (!gsym->is_weak_undefined()) 7399 { 7400 const Sized_symbol<32>* sym = 7401 static_cast<const Sized_symbol<32>*>(gsym); 7402 value = sym->value(); 7403 } 7404 else 7405 value = 0; 7406 } 7407 7408 unsigned got_offset = reloc.got_offset(); 7409 gold_assert(got_offset < oview_size); 7410 7411 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 7412 Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset); 7413 Valtype x; 7414 switch (reloc.r_type()) 7415 { 7416 case elfcpp::R_ARM_TLS_DTPOFF32: 7417 x = value; 7418 break; 7419 case elfcpp::R_ARM_TLS_TPOFF32: 7420 x = value + aligned_tcb_size; 7421 break; 7422 default: 7423 gold_unreachable(); 7424 } 7425 elfcpp::Swap<32, big_endian>::writeval(wv, x); 7426 } 7427 7428 of->write_output_view(offset, oview_size, oview); 7429} 7430 7431// A class to handle the PLT data. 7432// This is an abstract base class that handles most of the linker details 7433// but does not know the actual contents of PLT entries. The derived 7434// classes below fill in those details. 7435 7436template<bool big_endian> 7437class Output_data_plt_arm : public Output_section_data 7438{ 7439 public: 7440 // Unlike aarch64, which records symbol value in "addend" field of relocations 7441 // and could be done at the same time an IRelative reloc is created for the 7442 // symbol, arm puts the symbol value into "GOT" table, which, however, is 7443 // issued later in Output_data_plt_arm::do_write(). So we have a struct here 7444 // to keep necessary symbol information for later use in do_write. We usually 7445 // have only a very limited number of ifuncs, so the extra data required here 7446 // is also limited. 7447 7448 struct IRelative_data 7449 { 7450 IRelative_data(Sized_symbol<32>* sized_symbol) 7451 : symbol_is_global_(true) 7452 { 7453 u_.global = sized_symbol; 7454 } 7455 7456 IRelative_data(Sized_relobj_file<32, big_endian>* relobj, 7457 unsigned int index) 7458 : symbol_is_global_(false) 7459 { 7460 u_.local.relobj = relobj; 7461 u_.local.index = index; 7462 } 7463 7464 union 7465 { 7466 Sized_symbol<32>* global; 7467 7468 struct 7469 { 7470 Sized_relobj_file<32, big_endian>* relobj; 7471 unsigned int index; 7472 } local; 7473 } u_; 7474 7475 bool symbol_is_global_; 7476 }; 7477 7478 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian> 7479 Reloc_section; 7480 7481 Output_data_plt_arm(Layout* layout, uint64_t addralign, 7482 Arm_output_data_got<big_endian>* got, 7483 Output_data_space* got_plt, 7484 Output_data_space* got_irelative); 7485 7486 // Add an entry to the PLT. 7487 void 7488 add_entry(Symbol_table* symtab, Layout* layout, Symbol* gsym); 7489 7490 // Add the relocation for a plt entry. 7491 void 7492 add_relocation(Symbol_table* symtab, Layout* layout, 7493 Symbol* gsym, unsigned int got_offset); 7494 7495 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. 7496 unsigned int 7497 add_local_ifunc_entry(Symbol_table* symtab, Layout*, 7498 Sized_relobj_file<32, big_endian>* relobj, 7499 unsigned int local_sym_index); 7500 7501 // Return the .rel.plt section data. 7502 const Reloc_section* 7503 rel_plt() const 7504 { return this->rel_; } 7505 7506 // Return the PLT relocation container for IRELATIVE. 7507 Reloc_section* 7508 rel_irelative(Symbol_table*, Layout*); 7509 7510 // Return the number of PLT entries. 7511 unsigned int 7512 entry_count() const 7513 { return this->count_ + this->irelative_count_; } 7514 7515 // Return the offset of the first non-reserved PLT entry. 7516 unsigned int 7517 first_plt_entry_offset() const 7518 { return this->do_first_plt_entry_offset(); } 7519 7520 // Return the size of a PLT entry. 7521 unsigned int 7522 get_plt_entry_size() const 7523 { return this->do_get_plt_entry_size(); } 7524 7525 // Return the PLT address for globals. 7526 uint32_t 7527 address_for_global(const Symbol*) const; 7528 7529 // Return the PLT address for locals. 7530 uint32_t 7531 address_for_local(const Relobj*, unsigned int symndx) const; 7532 7533 protected: 7534 // Fill in the first PLT entry. 7535 void 7536 fill_first_plt_entry(unsigned char* pov, 7537 Arm_address got_address, 7538 Arm_address plt_address) 7539 { this->do_fill_first_plt_entry(pov, got_address, plt_address); } 7540 7541 void 7542 fill_plt_entry(unsigned char* pov, 7543 Arm_address got_address, 7544 Arm_address plt_address, 7545 unsigned int got_offset, 7546 unsigned int plt_offset) 7547 { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); } 7548 7549 virtual unsigned int 7550 do_first_plt_entry_offset() const = 0; 7551 7552 virtual unsigned int 7553 do_get_plt_entry_size() const = 0; 7554 7555 virtual void 7556 do_fill_first_plt_entry(unsigned char* pov, 7557 Arm_address got_address, 7558 Arm_address plt_address) = 0; 7559 7560 virtual void 7561 do_fill_plt_entry(unsigned char* pov, 7562 Arm_address got_address, 7563 Arm_address plt_address, 7564 unsigned int got_offset, 7565 unsigned int plt_offset) = 0; 7566 7567 void 7568 do_adjust_output_section(Output_section* os); 7569 7570 // Write to a map file. 7571 void 7572 do_print_to_mapfile(Mapfile* mapfile) const 7573 { mapfile->print_output_data(this, _("** PLT")); } 7574 7575 private: 7576 // Set the final size. 7577 void 7578 set_final_data_size() 7579 { 7580 this->set_data_size(this->first_plt_entry_offset() 7581 + ((this->count_ + this->irelative_count_) 7582 * this->get_plt_entry_size())); 7583 } 7584 7585 // Write out the PLT data. 7586 void 7587 do_write(Output_file*); 7588 7589 // Record irelative symbol data. 7590 void insert_irelative_data(const IRelative_data& idata) 7591 { irelative_data_vec_.push_back(idata); } 7592 7593 // The reloc section. 7594 Reloc_section* rel_; 7595 // The IRELATIVE relocs, if necessary. These must follow the 7596 // regular PLT relocations. 7597 Reloc_section* irelative_rel_; 7598 // The .got section. 7599 Arm_output_data_got<big_endian>* got_; 7600 // The .got.plt section. 7601 Output_data_space* got_plt_; 7602 // The part of the .got.plt section used for IRELATIVE relocs. 7603 Output_data_space* got_irelative_; 7604 // The number of PLT entries. 7605 unsigned int count_; 7606 // Number of PLT entries with R_ARM_IRELATIVE relocs. These 7607 // follow the regular PLT entries. 7608 unsigned int irelative_count_; 7609 // Vector for irelative data. 7610 typedef std::vector<IRelative_data> IRelative_data_vec; 7611 IRelative_data_vec irelative_data_vec_; 7612}; 7613 7614// Create the PLT section. The ordinary .got section is an argument, 7615// since we need to refer to the start. We also create our own .got 7616// section just for PLT entries. 7617 7618template<bool big_endian> 7619Output_data_plt_arm<big_endian>::Output_data_plt_arm( 7620 Layout* layout, uint64_t addralign, 7621 Arm_output_data_got<big_endian>* got, 7622 Output_data_space* got_plt, 7623 Output_data_space* got_irelative) 7624 : Output_section_data(addralign), irelative_rel_(NULL), 7625 got_(got), got_plt_(got_plt), got_irelative_(got_irelative), 7626 count_(0), irelative_count_(0) 7627{ 7628 this->rel_ = new Reloc_section(false); 7629 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL, 7630 elfcpp::SHF_ALLOC, this->rel_, 7631 ORDER_DYNAMIC_PLT_RELOCS, false); 7632} 7633 7634template<bool big_endian> 7635void 7636Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os) 7637{ 7638 os->set_entsize(0); 7639} 7640 7641// Add an entry to the PLT. 7642 7643template<bool big_endian> 7644void 7645Output_data_plt_arm<big_endian>::add_entry(Symbol_table* symtab, 7646 Layout* layout, 7647 Symbol* gsym) 7648{ 7649 gold_assert(!gsym->has_plt_offset()); 7650 7651 unsigned int* entry_count; 7652 Output_section_data_build* got; 7653 7654 // We have 2 different types of plt entry here, normal and ifunc. 7655 7656 // For normal plt, the offset begins with first_plt_entry_offset(20), and the 7657 // 1st entry offset would be 20, the second 32, third 44 ... etc. 7658 7659 // For ifunc plt, the offset begins with 0. So the first offset would 0, 7660 // second 12, third 24 ... etc. 7661 7662 // IFunc plt entries *always* come after *normal* plt entries. 7663 7664 // Notice, when computing the plt address of a certain symbol, "plt_address + 7665 // plt_offset" is no longer correct. Use target->plt_address_for_global() or 7666 // target->plt_address_for_local() instead. 7667 7668 int begin_offset = 0; 7669 if (gsym->type() == elfcpp::STT_GNU_IFUNC 7670 && gsym->can_use_relative_reloc(false)) 7671 { 7672 entry_count = &this->irelative_count_; 7673 got = this->got_irelative_; 7674 // For irelative plt entries, offset is relative to the end of normal plt 7675 // entries, so it starts from 0. 7676 begin_offset = 0; 7677 // Record symbol information. 7678 this->insert_irelative_data( 7679 IRelative_data(symtab->get_sized_symbol<32>(gsym))); 7680 } 7681 else 7682 { 7683 entry_count = &this->count_; 7684 got = this->got_plt_; 7685 // Note that for normal plt entries, when setting the PLT offset we skip 7686 // the initial reserved PLT entry. 7687 begin_offset = this->first_plt_entry_offset(); 7688 } 7689 7690 gsym->set_plt_offset(begin_offset 7691 + (*entry_count) * this->get_plt_entry_size()); 7692 7693 ++(*entry_count); 7694 7695 section_offset_type got_offset = got->current_data_size(); 7696 7697 // Every PLT entry needs a GOT entry which points back to the PLT 7698 // entry (this will be changed by the dynamic linker, normally 7699 // lazily when the function is called). 7700 got->set_current_data_size(got_offset + 4); 7701 7702 // Every PLT entry needs a reloc. 7703 this->add_relocation(symtab, layout, gsym, got_offset); 7704 7705 // Note that we don't need to save the symbol. The contents of the 7706 // PLT are independent of which symbols are used. The symbols only 7707 // appear in the relocations. 7708} 7709 7710// Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return 7711// the PLT offset. 7712 7713template<bool big_endian> 7714unsigned int 7715Output_data_plt_arm<big_endian>::add_local_ifunc_entry( 7716 Symbol_table* symtab, 7717 Layout* layout, 7718 Sized_relobj_file<32, big_endian>* relobj, 7719 unsigned int local_sym_index) 7720{ 7721 this->insert_irelative_data(IRelative_data(relobj, local_sym_index)); 7722 7723 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is 7724 // no longer correct. Use target->plt_address_for_local() instead. 7725 unsigned int plt_offset = this->irelative_count_ * this->get_plt_entry_size(); 7726 ++this->irelative_count_; 7727 7728 section_offset_type got_offset = this->got_irelative_->current_data_size(); 7729 7730 // Every PLT entry needs a GOT entry which points back to the PLT 7731 // entry. 7732 this->got_irelative_->set_current_data_size(got_offset + 4); 7733 7734 7735 // Every PLT entry needs a reloc. 7736 Reloc_section* rel = this->rel_irelative(symtab, layout); 7737 rel->add_symbolless_local_addend(relobj, local_sym_index, 7738 elfcpp::R_ARM_IRELATIVE, 7739 this->got_irelative_, got_offset); 7740 return plt_offset; 7741} 7742 7743 7744// Add the relocation for a PLT entry. 7745 7746template<bool big_endian> 7747void 7748Output_data_plt_arm<big_endian>::add_relocation( 7749 Symbol_table* symtab, Layout* layout, Symbol* gsym, unsigned int got_offset) 7750{ 7751 if (gsym->type() == elfcpp::STT_GNU_IFUNC 7752 && gsym->can_use_relative_reloc(false)) 7753 { 7754 Reloc_section* rel = this->rel_irelative(symtab, layout); 7755 rel->add_symbolless_global_addend(gsym, elfcpp::R_ARM_IRELATIVE, 7756 this->got_irelative_, got_offset); 7757 } 7758 else 7759 { 7760 gsym->set_needs_dynsym_entry(); 7761 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_, 7762 got_offset); 7763 } 7764} 7765 7766 7767// Create the irelative relocation data. 7768 7769template<bool big_endian> 7770typename Output_data_plt_arm<big_endian>::Reloc_section* 7771Output_data_plt_arm<big_endian>::rel_irelative(Symbol_table* symtab, 7772 Layout* layout) 7773{ 7774 if (this->irelative_rel_ == NULL) 7775 { 7776 // Since irelative relocations goes into 'rel.dyn', we delegate the 7777 // creation of irelative_rel_ to where rel_dyn section gets created. 7778 Target_arm<big_endian>* arm_target = 7779 Target_arm<big_endian>::default_target(); 7780 this->irelative_rel_ = arm_target->rel_irelative_section(layout); 7781 7782 // Make sure we have a place for the TLSDESC relocations, in 7783 // case we see any later on. 7784 // this->rel_tlsdesc(layout); 7785 if (parameters->doing_static_link()) 7786 { 7787 // A statically linked executable will only have a .rel.plt section to 7788 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library 7789 // will use these symbols to locate the IRELATIVE relocs at program 7790 // startup time. 7791 symtab->define_in_output_data("__rel_iplt_start", NULL, 7792 Symbol_table::PREDEFINED, 7793 this->irelative_rel_, 0, 0, 7794 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, 7795 elfcpp::STV_HIDDEN, 0, false, true); 7796 symtab->define_in_output_data("__rel_iplt_end", NULL, 7797 Symbol_table::PREDEFINED, 7798 this->irelative_rel_, 0, 0, 7799 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL, 7800 elfcpp::STV_HIDDEN, 0, true, true); 7801 } 7802 } 7803 return this->irelative_rel_; 7804} 7805 7806 7807// Return the PLT address for a global symbol. 7808 7809template<bool big_endian> 7810uint32_t 7811Output_data_plt_arm<big_endian>::address_for_global(const Symbol* gsym) const 7812{ 7813 uint64_t begin_offset = 0; 7814 if (gsym->type() == elfcpp::STT_GNU_IFUNC 7815 && gsym->can_use_relative_reloc(false)) 7816 { 7817 begin_offset = (this->first_plt_entry_offset() + 7818 this->count_ * this->get_plt_entry_size()); 7819 } 7820 return this->address() + begin_offset + gsym->plt_offset(); 7821} 7822 7823 7824// Return the PLT address for a local symbol. These are always 7825// IRELATIVE relocs. 7826 7827template<bool big_endian> 7828uint32_t 7829Output_data_plt_arm<big_endian>::address_for_local( 7830 const Relobj* object, 7831 unsigned int r_sym) const 7832{ 7833 return (this->address() 7834 + this->first_plt_entry_offset() 7835 + this->count_ * this->get_plt_entry_size() 7836 + object->local_plt_offset(r_sym)); 7837} 7838 7839 7840template<bool big_endian> 7841class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian> 7842{ 7843 public: 7844 Output_data_plt_arm_standard(Layout* layout, 7845 Arm_output_data_got<big_endian>* got, 7846 Output_data_space* got_plt, 7847 Output_data_space* got_irelative) 7848 : Output_data_plt_arm<big_endian>(layout, 4, got, got_plt, got_irelative) 7849 { } 7850 7851 protected: 7852 // Return the offset of the first non-reserved PLT entry. 7853 virtual unsigned int 7854 do_first_plt_entry_offset() const 7855 { return sizeof(first_plt_entry); } 7856 7857 virtual void 7858 do_fill_first_plt_entry(unsigned char* pov, 7859 Arm_address got_address, 7860 Arm_address plt_address); 7861 7862 private: 7863 // Template for the first PLT entry. 7864 static const uint32_t first_plt_entry[5]; 7865}; 7866 7867// ARM PLTs. 7868// FIXME: This is not very flexible. Right now this has only been tested 7869// on armv5te. If we are to support additional architecture features like 7870// Thumb-2 or BE8, we need to make this more flexible like GNU ld. 7871 7872// The first entry in the PLT. 7873template<bool big_endian> 7874const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] = 7875{ 7876 0xe52de004, // str lr, [sp, #-4]! 7877 0xe59fe004, // ldr lr, [pc, #4] 7878 0xe08fe00e, // add lr, pc, lr 7879 0xe5bef008, // ldr pc, [lr, #8]! 7880 0x00000000, // &GOT[0] - . 7881}; 7882 7883template<bool big_endian> 7884void 7885Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry( 7886 unsigned char* pov, 7887 Arm_address got_address, 7888 Arm_address plt_address) 7889{ 7890 // Write first PLT entry. All but the last word are constants. 7891 const size_t num_first_plt_words = (sizeof(first_plt_entry) 7892 / sizeof(first_plt_entry[0])); 7893 for (size_t i = 0; i < num_first_plt_words - 1; i++) 7894 { 7895 if (parameters->options().be8()) 7896 { 7897 elfcpp::Swap<32, false>::writeval(pov + i * 4, 7898 first_plt_entry[i]); 7899 } 7900 else 7901 { 7902 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, 7903 first_plt_entry[i]); 7904 } 7905 } 7906 // Last word in first PLT entry is &GOT[0] - . 7907 elfcpp::Swap<32, big_endian>::writeval(pov + 16, 7908 got_address - (plt_address + 16)); 7909} 7910 7911// Subsequent entries in the PLT. 7912// This class generates short (12-byte) entries, for displacements up to 2^28. 7913 7914template<bool big_endian> 7915class Output_data_plt_arm_short : public Output_data_plt_arm_standard<big_endian> 7916{ 7917 public: 7918 Output_data_plt_arm_short(Layout* layout, 7919 Arm_output_data_got<big_endian>* got, 7920 Output_data_space* got_plt, 7921 Output_data_space* got_irelative) 7922 : Output_data_plt_arm_standard<big_endian>(layout, got, got_plt, got_irelative) 7923 { } 7924 7925 protected: 7926 // Return the size of a PLT entry. 7927 virtual unsigned int 7928 do_get_plt_entry_size() const 7929 { return sizeof(plt_entry); } 7930 7931 virtual void 7932 do_fill_plt_entry(unsigned char* pov, 7933 Arm_address got_address, 7934 Arm_address plt_address, 7935 unsigned int got_offset, 7936 unsigned int plt_offset); 7937 7938 private: 7939 // Template for subsequent PLT entries. 7940 static const uint32_t plt_entry[3]; 7941}; 7942 7943template<bool big_endian> 7944const uint32_t Output_data_plt_arm_short<big_endian>::plt_entry[3] = 7945{ 7946 0xe28fc600, // add ip, pc, #0xNN00000 7947 0xe28cca00, // add ip, ip, #0xNN000 7948 0xe5bcf000, // ldr pc, [ip, #0xNNN]! 7949}; 7950 7951template<bool big_endian> 7952void 7953Output_data_plt_arm_short<big_endian>::do_fill_plt_entry( 7954 unsigned char* pov, 7955 Arm_address got_address, 7956 Arm_address plt_address, 7957 unsigned int got_offset, 7958 unsigned int plt_offset) 7959{ 7960 int32_t offset = ((got_address + got_offset) 7961 - (plt_address + plt_offset + 8)); 7962 if (offset < 0 || offset > 0x0fffffff) 7963 gold_error(_("PLT offset too large, try linking with --long-plt")); 7964 7965 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff); 7966 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff); 7967 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff); 7968 7969 if (parameters->options().be8()) 7970 { 7971 elfcpp::Swap<32, false>::writeval(pov, plt_insn0); 7972 elfcpp::Swap<32, false>::writeval(pov + 4, plt_insn1); 7973 elfcpp::Swap<32, false>::writeval(pov + 8, plt_insn2); 7974 } 7975 else 7976 { 7977 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); 7978 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); 7979 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); 7980 } 7981} 7982 7983// This class generates long (16-byte) entries, for arbitrary displacements. 7984 7985template<bool big_endian> 7986class Output_data_plt_arm_long : public Output_data_plt_arm_standard<big_endian> 7987{ 7988 public: 7989 Output_data_plt_arm_long(Layout* layout, 7990 Arm_output_data_got<big_endian>* got, 7991 Output_data_space* got_plt, 7992 Output_data_space* got_irelative) 7993 : Output_data_plt_arm_standard<big_endian>(layout, got, got_plt, got_irelative) 7994 { } 7995 7996 protected: 7997 // Return the size of a PLT entry. 7998 virtual unsigned int 7999 do_get_plt_entry_size() const 8000 { return sizeof(plt_entry); } 8001 8002 virtual void 8003 do_fill_plt_entry(unsigned char* pov, 8004 Arm_address got_address, 8005 Arm_address plt_address, 8006 unsigned int got_offset, 8007 unsigned int plt_offset); 8008 8009 private: 8010 // Template for subsequent PLT entries. 8011 static const uint32_t plt_entry[4]; 8012}; 8013 8014template<bool big_endian> 8015const uint32_t Output_data_plt_arm_long<big_endian>::plt_entry[4] = 8016{ 8017 0xe28fc200, // add ip, pc, #0xN0000000 8018 0xe28cc600, // add ip, ip, #0xNN00000 8019 0xe28cca00, // add ip, ip, #0xNN000 8020 0xe5bcf000, // ldr pc, [ip, #0xNNN]! 8021}; 8022 8023template<bool big_endian> 8024void 8025Output_data_plt_arm_long<big_endian>::do_fill_plt_entry( 8026 unsigned char* pov, 8027 Arm_address got_address, 8028 Arm_address plt_address, 8029 unsigned int got_offset, 8030 unsigned int plt_offset) 8031{ 8032 int32_t offset = ((got_address + got_offset) 8033 - (plt_address + plt_offset + 8)); 8034 8035 uint32_t plt_insn0 = plt_entry[0] | (offset >> 28); 8036 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 20) & 0xff); 8037 uint32_t plt_insn2 = plt_entry[2] | ((offset >> 12) & 0xff); 8038 uint32_t plt_insn3 = plt_entry[3] | (offset & 0xfff); 8039 8040 if (parameters->options().be8()) 8041 { 8042 elfcpp::Swap<32, false>::writeval(pov, plt_insn0); 8043 elfcpp::Swap<32, false>::writeval(pov + 4, plt_insn1); 8044 elfcpp::Swap<32, false>::writeval(pov + 8, plt_insn2); 8045 elfcpp::Swap<32, false>::writeval(pov + 12, plt_insn3); 8046 } 8047 else 8048 { 8049 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); 8050 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); 8051 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); 8052 elfcpp::Swap<32, big_endian>::writeval(pov + 12, plt_insn3); 8053 } 8054} 8055 8056// Write out the PLT. This uses the hand-coded instructions above, 8057// and adjusts them as needed. This is all specified by the arm ELF 8058// Processor Supplement. 8059 8060template<bool big_endian> 8061void 8062Output_data_plt_arm<big_endian>::do_write(Output_file* of) 8063{ 8064 const off_t offset = this->offset(); 8065 const section_size_type oview_size = 8066 convert_to_section_size_type(this->data_size()); 8067 unsigned char* const oview = of->get_output_view(offset, oview_size); 8068 8069 const off_t got_file_offset = this->got_plt_->offset(); 8070 gold_assert(got_file_offset + this->got_plt_->data_size() 8071 == this->got_irelative_->offset()); 8072 const section_size_type got_size = 8073 convert_to_section_size_type(this->got_plt_->data_size() 8074 + this->got_irelative_->data_size()); 8075 unsigned char* const got_view = of->get_output_view(got_file_offset, 8076 got_size); 8077 unsigned char* pov = oview; 8078 8079 Arm_address plt_address = this->address(); 8080 Arm_address got_address = this->got_plt_->address(); 8081 8082 // Write first PLT entry. 8083 this->fill_first_plt_entry(pov, got_address, plt_address); 8084 pov += this->first_plt_entry_offset(); 8085 8086 unsigned char* got_pov = got_view; 8087 8088 memset(got_pov, 0, 12); 8089 got_pov += 12; 8090 8091 unsigned int plt_offset = this->first_plt_entry_offset(); 8092 unsigned int got_offset = 12; 8093 const unsigned int count = this->count_ + this->irelative_count_; 8094 gold_assert(this->irelative_count_ == this->irelative_data_vec_.size()); 8095 for (unsigned int i = 0; 8096 i < count; 8097 ++i, 8098 pov += this->get_plt_entry_size(), 8099 got_pov += 4, 8100 plt_offset += this->get_plt_entry_size(), 8101 got_offset += 4) 8102 { 8103 // Set and adjust the PLT entry itself. 8104 this->fill_plt_entry(pov, got_address, plt_address, 8105 got_offset, plt_offset); 8106 8107 Arm_address value; 8108 if (i < this->count_) 8109 { 8110 // For non-irelative got entries, the value is the beginning of plt. 8111 value = plt_address; 8112 } 8113 else 8114 { 8115 // For irelative got entries, the value is the (global/local) symbol 8116 // address. 8117 const IRelative_data& idata = 8118 this->irelative_data_vec_[i - this->count_]; 8119 if (idata.symbol_is_global_) 8120 { 8121 // Set the entry in the GOT for irelative symbols. The content is 8122 // the address of the ifunc, not the address of plt start. 8123 const Sized_symbol<32>* sized_symbol = idata.u_.global; 8124 gold_assert(sized_symbol->type() == elfcpp::STT_GNU_IFUNC); 8125 value = sized_symbol->value(); 8126 } 8127 else 8128 { 8129 value = idata.u_.local.relobj->local_symbol_value( 8130 idata.u_.local.index, 0); 8131 } 8132 } 8133 elfcpp::Swap<32, big_endian>::writeval(got_pov, value); 8134 } 8135 8136 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size); 8137 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size); 8138 8139 of->write_output_view(offset, oview_size, oview); 8140 of->write_output_view(got_file_offset, got_size, got_view); 8141} 8142 8143 8144// Create a PLT entry for a global symbol. 8145 8146template<bool big_endian> 8147void 8148Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout, 8149 Symbol* gsym) 8150{ 8151 if (gsym->has_plt_offset()) 8152 return; 8153 8154 if (this->plt_ == NULL) 8155 this->make_plt_section(symtab, layout); 8156 8157 this->plt_->add_entry(symtab, layout, gsym); 8158} 8159 8160 8161// Create the PLT section. 8162template<bool big_endian> 8163void 8164Target_arm<big_endian>::make_plt_section( 8165 Symbol_table* symtab, Layout* layout) 8166{ 8167 if (this->plt_ == NULL) 8168 { 8169 // Create the GOT section first. 8170 this->got_section(symtab, layout); 8171 8172 // GOT for irelatives is create along with got.plt. 8173 gold_assert(this->got_ != NULL 8174 && this->got_plt_ != NULL 8175 && this->got_irelative_ != NULL); 8176 this->plt_ = this->make_data_plt(layout, this->got_, this->got_plt_, 8177 this->got_irelative_); 8178 8179 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS, 8180 (elfcpp::SHF_ALLOC 8181 | elfcpp::SHF_EXECINSTR), 8182 this->plt_, ORDER_PLT, false); 8183 symtab->define_in_output_data("$a", NULL, 8184 Symbol_table::PREDEFINED, 8185 this->plt_, 8186 0, 0, elfcpp::STT_NOTYPE, 8187 elfcpp::STB_LOCAL, 8188 elfcpp::STV_DEFAULT, 0, 8189 false, false); 8190 } 8191} 8192 8193 8194// Make a PLT entry for a local STT_GNU_IFUNC symbol. 8195 8196template<bool big_endian> 8197void 8198Target_arm<big_endian>::make_local_ifunc_plt_entry( 8199 Symbol_table* symtab, Layout* layout, 8200 Sized_relobj_file<32, big_endian>* relobj, 8201 unsigned int local_sym_index) 8202{ 8203 if (relobj->local_has_plt_offset(local_sym_index)) 8204 return; 8205 if (this->plt_ == NULL) 8206 this->make_plt_section(symtab, layout); 8207 unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout, 8208 relobj, 8209 local_sym_index); 8210 relobj->set_local_plt_offset(local_sym_index, plt_offset); 8211} 8212 8213 8214// Return the number of entries in the PLT. 8215 8216template<bool big_endian> 8217unsigned int 8218Target_arm<big_endian>::plt_entry_count() const 8219{ 8220 if (this->plt_ == NULL) 8221 return 0; 8222 return this->plt_->entry_count(); 8223} 8224 8225// Return the offset of the first non-reserved PLT entry. 8226 8227template<bool big_endian> 8228unsigned int 8229Target_arm<big_endian>::first_plt_entry_offset() const 8230{ 8231 return this->plt_->first_plt_entry_offset(); 8232} 8233 8234// Return the size of each PLT entry. 8235 8236template<bool big_endian> 8237unsigned int 8238Target_arm<big_endian>::plt_entry_size() const 8239{ 8240 return this->plt_->get_plt_entry_size(); 8241} 8242 8243// Get the section to use for TLS_DESC relocations. 8244 8245template<bool big_endian> 8246typename Target_arm<big_endian>::Reloc_section* 8247Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const 8248{ 8249 return this->plt_section()->rel_tls_desc(layout); 8250} 8251 8252// Define the _TLS_MODULE_BASE_ symbol in the TLS segment. 8253 8254template<bool big_endian> 8255void 8256Target_arm<big_endian>::define_tls_base_symbol( 8257 Symbol_table* symtab, 8258 Layout* layout) 8259{ 8260 if (this->tls_base_symbol_defined_) 8261 return; 8262 8263 Output_segment* tls_segment = layout->tls_segment(); 8264 if (tls_segment != NULL) 8265 { 8266 bool is_exec = parameters->options().output_is_executable(); 8267 symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL, 8268 Symbol_table::PREDEFINED, 8269 tls_segment, 0, 0, 8270 elfcpp::STT_TLS, 8271 elfcpp::STB_LOCAL, 8272 elfcpp::STV_HIDDEN, 0, 8273 (is_exec 8274 ? Symbol::SEGMENT_END 8275 : Symbol::SEGMENT_START), 8276 true); 8277 } 8278 this->tls_base_symbol_defined_ = true; 8279} 8280 8281// Create a GOT entry for the TLS module index. 8282 8283template<bool big_endian> 8284unsigned int 8285Target_arm<big_endian>::got_mod_index_entry( 8286 Symbol_table* symtab, 8287 Layout* layout, 8288 Sized_relobj_file<32, big_endian>* object) 8289{ 8290 if (this->got_mod_index_offset_ == -1U) 8291 { 8292 gold_assert(symtab != NULL && layout != NULL && object != NULL); 8293 Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout); 8294 unsigned int got_offset; 8295 if (!parameters->doing_static_link()) 8296 { 8297 got_offset = got->add_constant(0); 8298 Reloc_section* rel_dyn = this->rel_dyn_section(layout); 8299 rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got, 8300 got_offset); 8301 } 8302 else 8303 { 8304 // We are doing a static link. Just mark it as belong to module 1, 8305 // the executable. 8306 got_offset = got->add_constant(1); 8307 } 8308 8309 got->add_constant(0); 8310 this->got_mod_index_offset_ = got_offset; 8311 } 8312 return this->got_mod_index_offset_; 8313} 8314 8315// Optimize the TLS relocation type based on what we know about the 8316// symbol. IS_FINAL is true if the final address of this symbol is 8317// known at link time. 8318 8319template<bool big_endian> 8320tls::Tls_optimization 8321Target_arm<big_endian>::optimize_tls_reloc(bool, int) 8322{ 8323 // FIXME: Currently we do not do any TLS optimization. 8324 return tls::TLSOPT_NONE; 8325} 8326 8327// Get the Reference_flags for a particular relocation. 8328 8329template<bool big_endian> 8330int 8331Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type) 8332{ 8333 switch (r_type) 8334 { 8335 case elfcpp::R_ARM_NONE: 8336 case elfcpp::R_ARM_V4BX: 8337 case elfcpp::R_ARM_GNU_VTENTRY: 8338 case elfcpp::R_ARM_GNU_VTINHERIT: 8339 // No symbol reference. 8340 return 0; 8341 8342 case elfcpp::R_ARM_ABS32: 8343 case elfcpp::R_ARM_ABS16: 8344 case elfcpp::R_ARM_ABS12: 8345 case elfcpp::R_ARM_THM_ABS5: 8346 case elfcpp::R_ARM_ABS8: 8347 case elfcpp::R_ARM_BASE_ABS: 8348 case elfcpp::R_ARM_MOVW_ABS_NC: 8349 case elfcpp::R_ARM_MOVT_ABS: 8350 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 8351 case elfcpp::R_ARM_THM_MOVT_ABS: 8352 case elfcpp::R_ARM_ABS32_NOI: 8353 return Symbol::ABSOLUTE_REF; 8354 8355 case elfcpp::R_ARM_REL32: 8356 case elfcpp::R_ARM_LDR_PC_G0: 8357 case elfcpp::R_ARM_SBREL32: 8358 case elfcpp::R_ARM_THM_PC8: 8359 case elfcpp::R_ARM_BASE_PREL: 8360 case elfcpp::R_ARM_MOVW_PREL_NC: 8361 case elfcpp::R_ARM_MOVT_PREL: 8362 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 8363 case elfcpp::R_ARM_THM_MOVT_PREL: 8364 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 8365 case elfcpp::R_ARM_THM_PC12: 8366 case elfcpp::R_ARM_REL32_NOI: 8367 case elfcpp::R_ARM_ALU_PC_G0_NC: 8368 case elfcpp::R_ARM_ALU_PC_G0: 8369 case elfcpp::R_ARM_ALU_PC_G1_NC: 8370 case elfcpp::R_ARM_ALU_PC_G1: 8371 case elfcpp::R_ARM_ALU_PC_G2: 8372 case elfcpp::R_ARM_LDR_PC_G1: 8373 case elfcpp::R_ARM_LDR_PC_G2: 8374 case elfcpp::R_ARM_LDRS_PC_G0: 8375 case elfcpp::R_ARM_LDRS_PC_G1: 8376 case elfcpp::R_ARM_LDRS_PC_G2: 8377 case elfcpp::R_ARM_LDC_PC_G0: 8378 case elfcpp::R_ARM_LDC_PC_G1: 8379 case elfcpp::R_ARM_LDC_PC_G2: 8380 case elfcpp::R_ARM_ALU_SB_G0_NC: 8381 case elfcpp::R_ARM_ALU_SB_G0: 8382 case elfcpp::R_ARM_ALU_SB_G1_NC: 8383 case elfcpp::R_ARM_ALU_SB_G1: 8384 case elfcpp::R_ARM_ALU_SB_G2: 8385 case elfcpp::R_ARM_LDR_SB_G0: 8386 case elfcpp::R_ARM_LDR_SB_G1: 8387 case elfcpp::R_ARM_LDR_SB_G2: 8388 case elfcpp::R_ARM_LDRS_SB_G0: 8389 case elfcpp::R_ARM_LDRS_SB_G1: 8390 case elfcpp::R_ARM_LDRS_SB_G2: 8391 case elfcpp::R_ARM_LDC_SB_G0: 8392 case elfcpp::R_ARM_LDC_SB_G1: 8393 case elfcpp::R_ARM_LDC_SB_G2: 8394 case elfcpp::R_ARM_MOVW_BREL_NC: 8395 case elfcpp::R_ARM_MOVT_BREL: 8396 case elfcpp::R_ARM_MOVW_BREL: 8397 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 8398 case elfcpp::R_ARM_THM_MOVT_BREL: 8399 case elfcpp::R_ARM_THM_MOVW_BREL: 8400 case elfcpp::R_ARM_GOTOFF32: 8401 case elfcpp::R_ARM_GOTOFF12: 8402 case elfcpp::R_ARM_SBREL31: 8403 return Symbol::RELATIVE_REF; 8404 8405 case elfcpp::R_ARM_PLT32: 8406 case elfcpp::R_ARM_CALL: 8407 case elfcpp::R_ARM_JUMP24: 8408 case elfcpp::R_ARM_THM_CALL: 8409 case elfcpp::R_ARM_THM_JUMP24: 8410 case elfcpp::R_ARM_THM_JUMP19: 8411 case elfcpp::R_ARM_THM_JUMP6: 8412 case elfcpp::R_ARM_THM_JUMP11: 8413 case elfcpp::R_ARM_THM_JUMP8: 8414 // R_ARM_PREL31 is not used to relocate call/jump instructions but 8415 // in unwind tables. It may point to functions via PLTs. 8416 // So we treat it like call/jump relocations above. 8417 case elfcpp::R_ARM_PREL31: 8418 return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF; 8419 8420 case elfcpp::R_ARM_GOT_BREL: 8421 case elfcpp::R_ARM_GOT_ABS: 8422 case elfcpp::R_ARM_GOT_PREL: 8423 // Absolute in GOT. 8424 return Symbol::ABSOLUTE_REF; 8425 8426 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 8427 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 8428 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 8429 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 8430 case elfcpp::R_ARM_TLS_LE32: // Local-exec 8431 return Symbol::TLS_REF; 8432 8433 case elfcpp::R_ARM_TARGET1: 8434 case elfcpp::R_ARM_TARGET2: 8435 case elfcpp::R_ARM_COPY: 8436 case elfcpp::R_ARM_GLOB_DAT: 8437 case elfcpp::R_ARM_JUMP_SLOT: 8438 case elfcpp::R_ARM_RELATIVE: 8439 case elfcpp::R_ARM_PC24: 8440 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 8441 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 8442 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 8443 default: 8444 // Not expected. We will give an error later. 8445 return 0; 8446 } 8447} 8448 8449// Report an unsupported relocation against a local symbol. 8450 8451template<bool big_endian> 8452void 8453Target_arm<big_endian>::Scan::unsupported_reloc_local( 8454 Sized_relobj_file<32, big_endian>* object, 8455 unsigned int r_type) 8456{ 8457 gold_error(_("%s: unsupported reloc %u against local symbol"), 8458 object->name().c_str(), r_type); 8459} 8460 8461// We are about to emit a dynamic relocation of type R_TYPE. If the 8462// dynamic linker does not support it, issue an error. The GNU linker 8463// only issues a non-PIC error for an allocated read-only section. 8464// Here we know the section is allocated, but we don't know that it is 8465// read-only. But we check for all the relocation types which the 8466// glibc dynamic linker supports, so it seems appropriate to issue an 8467// error even if the section is not read-only. 8468 8469template<bool big_endian> 8470void 8471Target_arm<big_endian>::Scan::check_non_pic(Relobj* object, 8472 unsigned int r_type) 8473{ 8474 switch (r_type) 8475 { 8476 // These are the relocation types supported by glibc for ARM. 8477 case elfcpp::R_ARM_RELATIVE: 8478 case elfcpp::R_ARM_COPY: 8479 case elfcpp::R_ARM_GLOB_DAT: 8480 case elfcpp::R_ARM_JUMP_SLOT: 8481 case elfcpp::R_ARM_ABS32: 8482 case elfcpp::R_ARM_ABS32_NOI: 8483 case elfcpp::R_ARM_IRELATIVE: 8484 case elfcpp::R_ARM_PC24: 8485 // FIXME: The following 3 types are not supported by Android's dynamic 8486 // linker. 8487 case elfcpp::R_ARM_TLS_DTPMOD32: 8488 case elfcpp::R_ARM_TLS_DTPOFF32: 8489 case elfcpp::R_ARM_TLS_TPOFF32: 8490 return; 8491 8492 default: 8493 { 8494 // This prevents us from issuing more than one error per reloc 8495 // section. But we can still wind up issuing more than one 8496 // error per object file. 8497 if (this->issued_non_pic_error_) 8498 return; 8499 const Arm_reloc_property* reloc_property = 8500 arm_reloc_property_table->get_reloc_property(r_type); 8501 gold_assert(reloc_property != NULL); 8502 object->error(_("requires unsupported dynamic reloc %s; " 8503 "recompile with -fPIC"), 8504 reloc_property->name().c_str()); 8505 this->issued_non_pic_error_ = true; 8506 return; 8507 } 8508 8509 case elfcpp::R_ARM_NONE: 8510 gold_unreachable(); 8511 } 8512} 8513 8514 8515// Return whether we need to make a PLT entry for a relocation of the 8516// given type against a STT_GNU_IFUNC symbol. 8517 8518template<bool big_endian> 8519bool 8520Target_arm<big_endian>::Scan::reloc_needs_plt_for_ifunc( 8521 Sized_relobj_file<32, big_endian>* object, 8522 unsigned int r_type) 8523{ 8524 int flags = Scan::get_reference_flags(r_type); 8525 if (flags & Symbol::TLS_REF) 8526 { 8527 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"), 8528 object->name().c_str(), r_type); 8529 return false; 8530 } 8531 return flags != 0; 8532} 8533 8534 8535// Scan a relocation for a local symbol. 8536// FIXME: This only handles a subset of relocation types used by Android 8537// on ARM v5te devices. 8538 8539template<bool big_endian> 8540inline void 8541Target_arm<big_endian>::Scan::local(Symbol_table* symtab, 8542 Layout* layout, 8543 Target_arm* target, 8544 Sized_relobj_file<32, big_endian>* object, 8545 unsigned int data_shndx, 8546 Output_section* output_section, 8547 const elfcpp::Rel<32, big_endian>& reloc, 8548 unsigned int r_type, 8549 const elfcpp::Sym<32, big_endian>& lsym, 8550 bool is_discarded) 8551{ 8552 if (is_discarded) 8553 return; 8554 8555 r_type = target->get_real_reloc_type(r_type); 8556 8557 // A local STT_GNU_IFUNC symbol may require a PLT entry. 8558 bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC; 8559 if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type)) 8560 { 8561 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8562 target->make_local_ifunc_plt_entry(symtab, layout, object, r_sym); 8563 } 8564 8565 switch (r_type) 8566 { 8567 case elfcpp::R_ARM_NONE: 8568 case elfcpp::R_ARM_V4BX: 8569 case elfcpp::R_ARM_GNU_VTENTRY: 8570 case elfcpp::R_ARM_GNU_VTINHERIT: 8571 break; 8572 8573 case elfcpp::R_ARM_ABS32: 8574 case elfcpp::R_ARM_ABS32_NOI: 8575 // If building a shared library (or a position-independent 8576 // executable), we need to create a dynamic relocation for 8577 // this location. The relocation applied at link time will 8578 // apply the link-time value, so we flag the location with 8579 // an R_ARM_RELATIVE relocation so the dynamic loader can 8580 // relocate it easily. 8581 if (parameters->options().output_is_position_independent()) 8582 { 8583 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8584 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8585 // If we are to add more other reloc types than R_ARM_ABS32, 8586 // we need to add check_non_pic(object, r_type) here. 8587 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE, 8588 output_section, data_shndx, 8589 reloc.get_r_offset(), is_ifunc); 8590 } 8591 break; 8592 8593 case elfcpp::R_ARM_ABS16: 8594 case elfcpp::R_ARM_ABS12: 8595 case elfcpp::R_ARM_THM_ABS5: 8596 case elfcpp::R_ARM_ABS8: 8597 case elfcpp::R_ARM_BASE_ABS: 8598 case elfcpp::R_ARM_MOVW_ABS_NC: 8599 case elfcpp::R_ARM_MOVT_ABS: 8600 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 8601 case elfcpp::R_ARM_THM_MOVT_ABS: 8602 // If building a shared library (or a position-independent 8603 // executable), we need to create a dynamic relocation for 8604 // this location. Because the addend needs to remain in the 8605 // data section, we need to be careful not to apply this 8606 // relocation statically. 8607 if (parameters->options().output_is_position_independent()) 8608 { 8609 check_non_pic(object, r_type); 8610 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8611 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8612 if (lsym.get_st_type() != elfcpp::STT_SECTION) 8613 rel_dyn->add_local(object, r_sym, r_type, output_section, 8614 data_shndx, reloc.get_r_offset()); 8615 else 8616 { 8617 gold_assert(lsym.get_st_value() == 0); 8618 unsigned int shndx = lsym.get_st_shndx(); 8619 bool is_ordinary; 8620 shndx = object->adjust_sym_shndx(r_sym, shndx, 8621 &is_ordinary); 8622 if (!is_ordinary) 8623 object->error(_("section symbol %u has bad shndx %u"), 8624 r_sym, shndx); 8625 else 8626 rel_dyn->add_local_section(object, shndx, 8627 r_type, output_section, 8628 data_shndx, reloc.get_r_offset()); 8629 } 8630 } 8631 break; 8632 8633 case elfcpp::R_ARM_REL32: 8634 case elfcpp::R_ARM_LDR_PC_G0: 8635 case elfcpp::R_ARM_SBREL32: 8636 case elfcpp::R_ARM_THM_CALL: 8637 case elfcpp::R_ARM_THM_PC8: 8638 case elfcpp::R_ARM_BASE_PREL: 8639 case elfcpp::R_ARM_PLT32: 8640 case elfcpp::R_ARM_CALL: 8641 case elfcpp::R_ARM_JUMP24: 8642 case elfcpp::R_ARM_THM_JUMP24: 8643 case elfcpp::R_ARM_SBREL31: 8644 case elfcpp::R_ARM_PREL31: 8645 case elfcpp::R_ARM_MOVW_PREL_NC: 8646 case elfcpp::R_ARM_MOVT_PREL: 8647 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 8648 case elfcpp::R_ARM_THM_MOVT_PREL: 8649 case elfcpp::R_ARM_THM_JUMP19: 8650 case elfcpp::R_ARM_THM_JUMP6: 8651 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 8652 case elfcpp::R_ARM_THM_PC12: 8653 case elfcpp::R_ARM_REL32_NOI: 8654 case elfcpp::R_ARM_ALU_PC_G0_NC: 8655 case elfcpp::R_ARM_ALU_PC_G0: 8656 case elfcpp::R_ARM_ALU_PC_G1_NC: 8657 case elfcpp::R_ARM_ALU_PC_G1: 8658 case elfcpp::R_ARM_ALU_PC_G2: 8659 case elfcpp::R_ARM_LDR_PC_G1: 8660 case elfcpp::R_ARM_LDR_PC_G2: 8661 case elfcpp::R_ARM_LDRS_PC_G0: 8662 case elfcpp::R_ARM_LDRS_PC_G1: 8663 case elfcpp::R_ARM_LDRS_PC_G2: 8664 case elfcpp::R_ARM_LDC_PC_G0: 8665 case elfcpp::R_ARM_LDC_PC_G1: 8666 case elfcpp::R_ARM_LDC_PC_G2: 8667 case elfcpp::R_ARM_ALU_SB_G0_NC: 8668 case elfcpp::R_ARM_ALU_SB_G0: 8669 case elfcpp::R_ARM_ALU_SB_G1_NC: 8670 case elfcpp::R_ARM_ALU_SB_G1: 8671 case elfcpp::R_ARM_ALU_SB_G2: 8672 case elfcpp::R_ARM_LDR_SB_G0: 8673 case elfcpp::R_ARM_LDR_SB_G1: 8674 case elfcpp::R_ARM_LDR_SB_G2: 8675 case elfcpp::R_ARM_LDRS_SB_G0: 8676 case elfcpp::R_ARM_LDRS_SB_G1: 8677 case elfcpp::R_ARM_LDRS_SB_G2: 8678 case elfcpp::R_ARM_LDC_SB_G0: 8679 case elfcpp::R_ARM_LDC_SB_G1: 8680 case elfcpp::R_ARM_LDC_SB_G2: 8681 case elfcpp::R_ARM_MOVW_BREL_NC: 8682 case elfcpp::R_ARM_MOVT_BREL: 8683 case elfcpp::R_ARM_MOVW_BREL: 8684 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 8685 case elfcpp::R_ARM_THM_MOVT_BREL: 8686 case elfcpp::R_ARM_THM_MOVW_BREL: 8687 case elfcpp::R_ARM_THM_JUMP11: 8688 case elfcpp::R_ARM_THM_JUMP8: 8689 // We don't need to do anything for a relative addressing relocation 8690 // against a local symbol if it does not reference the GOT. 8691 break; 8692 8693 case elfcpp::R_ARM_GOTOFF32: 8694 case elfcpp::R_ARM_GOTOFF12: 8695 // We need a GOT section: 8696 target->got_section(symtab, layout); 8697 break; 8698 8699 case elfcpp::R_ARM_GOT_BREL: 8700 case elfcpp::R_ARM_GOT_PREL: 8701 { 8702 // The symbol requires a GOT entry. 8703 Arm_output_data_got<big_endian>* got = 8704 target->got_section(symtab, layout); 8705 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8706 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD)) 8707 { 8708 // If we are generating a shared object, we need to add a 8709 // dynamic RELATIVE relocation for this symbol's GOT entry. 8710 if (parameters->options().output_is_position_independent()) 8711 { 8712 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8713 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8714 rel_dyn->add_local_relative( 8715 object, r_sym, elfcpp::R_ARM_RELATIVE, got, 8716 object->local_got_offset(r_sym, GOT_TYPE_STANDARD)); 8717 } 8718 } 8719 } 8720 break; 8721 8722 case elfcpp::R_ARM_TARGET1: 8723 case elfcpp::R_ARM_TARGET2: 8724 // This should have been mapped to another type already. 8725 // Fall through. 8726 case elfcpp::R_ARM_COPY: 8727 case elfcpp::R_ARM_GLOB_DAT: 8728 case elfcpp::R_ARM_JUMP_SLOT: 8729 case elfcpp::R_ARM_RELATIVE: 8730 // These are relocations which should only be seen by the 8731 // dynamic linker, and should never be seen here. 8732 gold_error(_("%s: unexpected reloc %u in object file"), 8733 object->name().c_str(), r_type); 8734 break; 8735 8736 8737 // These are initial TLS relocs, which are expected when 8738 // linking. 8739 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 8740 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 8741 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 8742 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 8743 case elfcpp::R_ARM_TLS_LE32: // Local-exec 8744 { 8745 bool output_is_shared = parameters->options().shared(); 8746 const tls::Tls_optimization optimized_type 8747 = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared, 8748 r_type); 8749 switch (r_type) 8750 { 8751 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 8752 if (optimized_type == tls::TLSOPT_NONE) 8753 { 8754 // Create a pair of GOT entries for the module index and 8755 // dtv-relative offset. 8756 Arm_output_data_got<big_endian>* got 8757 = target->got_section(symtab, layout); 8758 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8759 unsigned int shndx = lsym.get_st_shndx(); 8760 bool is_ordinary; 8761 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary); 8762 if (!is_ordinary) 8763 { 8764 object->error(_("local symbol %u has bad shndx %u"), 8765 r_sym, shndx); 8766 break; 8767 } 8768 8769 if (!parameters->doing_static_link()) 8770 got->add_local_pair_with_rel(object, r_sym, shndx, 8771 GOT_TYPE_TLS_PAIR, 8772 target->rel_dyn_section(layout), 8773 elfcpp::R_ARM_TLS_DTPMOD32); 8774 else 8775 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, 8776 object, r_sym); 8777 } 8778 else 8779 // FIXME: TLS optimization not supported yet. 8780 gold_unreachable(); 8781 break; 8782 8783 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 8784 if (optimized_type == tls::TLSOPT_NONE) 8785 { 8786 // Create a GOT entry for the module index. 8787 target->got_mod_index_entry(symtab, layout, object); 8788 } 8789 else 8790 // FIXME: TLS optimization not supported yet. 8791 gold_unreachable(); 8792 break; 8793 8794 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 8795 break; 8796 8797 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 8798 layout->set_has_static_tls(); 8799 if (optimized_type == tls::TLSOPT_NONE) 8800 { 8801 // Create a GOT entry for the tp-relative offset. 8802 Arm_output_data_got<big_endian>* got 8803 = target->got_section(symtab, layout); 8804 unsigned int r_sym = 8805 elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8806 if (!parameters->doing_static_link()) 8807 got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET, 8808 target->rel_dyn_section(layout), 8809 elfcpp::R_ARM_TLS_TPOFF32); 8810 else if (!object->local_has_got_offset(r_sym, 8811 GOT_TYPE_TLS_OFFSET)) 8812 { 8813 got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET); 8814 unsigned int got_offset = 8815 object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET); 8816 got->add_static_reloc(got_offset, 8817 elfcpp::R_ARM_TLS_TPOFF32, object, 8818 r_sym); 8819 } 8820 } 8821 else 8822 // FIXME: TLS optimization not supported yet. 8823 gold_unreachable(); 8824 break; 8825 8826 case elfcpp::R_ARM_TLS_LE32: // Local-exec 8827 layout->set_has_static_tls(); 8828 if (output_is_shared) 8829 { 8830 // We need to create a dynamic relocation. 8831 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION); 8832 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info()); 8833 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 8834 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32, 8835 output_section, data_shndx, 8836 reloc.get_r_offset()); 8837 } 8838 break; 8839 8840 default: 8841 gold_unreachable(); 8842 } 8843 } 8844 break; 8845 8846 case elfcpp::R_ARM_PC24: 8847 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 8848 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 8849 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 8850 default: 8851 unsupported_reloc_local(object, r_type); 8852 break; 8853 } 8854} 8855 8856// Report an unsupported relocation against a global symbol. 8857 8858template<bool big_endian> 8859void 8860Target_arm<big_endian>::Scan::unsupported_reloc_global( 8861 Sized_relobj_file<32, big_endian>* object, 8862 unsigned int r_type, 8863 Symbol* gsym) 8864{ 8865 gold_error(_("%s: unsupported reloc %u against global symbol %s"), 8866 object->name().c_str(), r_type, gsym->demangled_name().c_str()); 8867} 8868 8869template<bool big_endian> 8870inline bool 8871Target_arm<big_endian>::Scan::possible_function_pointer_reloc( 8872 unsigned int r_type) 8873{ 8874 switch (r_type) 8875 { 8876 case elfcpp::R_ARM_PC24: 8877 case elfcpp::R_ARM_THM_CALL: 8878 case elfcpp::R_ARM_PLT32: 8879 case elfcpp::R_ARM_CALL: 8880 case elfcpp::R_ARM_JUMP24: 8881 case elfcpp::R_ARM_THM_JUMP24: 8882 case elfcpp::R_ARM_SBREL31: 8883 case elfcpp::R_ARM_PREL31: 8884 case elfcpp::R_ARM_THM_JUMP19: 8885 case elfcpp::R_ARM_THM_JUMP6: 8886 case elfcpp::R_ARM_THM_JUMP11: 8887 case elfcpp::R_ARM_THM_JUMP8: 8888 // All the relocations above are branches except SBREL31 and PREL31. 8889 return false; 8890 8891 default: 8892 // Be conservative and assume this is a function pointer. 8893 return true; 8894 } 8895} 8896 8897template<bool big_endian> 8898inline bool 8899Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer( 8900 Symbol_table*, 8901 Layout*, 8902 Target_arm<big_endian>* target, 8903 Sized_relobj_file<32, big_endian>*, 8904 unsigned int, 8905 Output_section*, 8906 const elfcpp::Rel<32, big_endian>&, 8907 unsigned int r_type, 8908 const elfcpp::Sym<32, big_endian>&) 8909{ 8910 r_type = target->get_real_reloc_type(r_type); 8911 return possible_function_pointer_reloc(r_type); 8912} 8913 8914template<bool big_endian> 8915inline bool 8916Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer( 8917 Symbol_table*, 8918 Layout*, 8919 Target_arm<big_endian>* target, 8920 Sized_relobj_file<32, big_endian>*, 8921 unsigned int, 8922 Output_section*, 8923 const elfcpp::Rel<32, big_endian>&, 8924 unsigned int r_type, 8925 Symbol* gsym) 8926{ 8927 // GOT is not a function. 8928 if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0) 8929 return false; 8930 8931 r_type = target->get_real_reloc_type(r_type); 8932 return possible_function_pointer_reloc(r_type); 8933} 8934 8935// Scan a relocation for a global symbol. 8936 8937template<bool big_endian> 8938inline void 8939Target_arm<big_endian>::Scan::global(Symbol_table* symtab, 8940 Layout* layout, 8941 Target_arm* target, 8942 Sized_relobj_file<32, big_endian>* object, 8943 unsigned int data_shndx, 8944 Output_section* output_section, 8945 const elfcpp::Rel<32, big_endian>& reloc, 8946 unsigned int r_type, 8947 Symbol* gsym) 8948{ 8949 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got 8950 // section. We check here to avoid creating a dynamic reloc against 8951 // _GLOBAL_OFFSET_TABLE_. 8952 if (!target->has_got_section() 8953 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0) 8954 target->got_section(symtab, layout); 8955 8956 // A STT_GNU_IFUNC symbol may require a PLT entry. 8957 if (gsym->type() == elfcpp::STT_GNU_IFUNC 8958 && this->reloc_needs_plt_for_ifunc(object, r_type)) 8959 target->make_plt_entry(symtab, layout, gsym); 8960 8961 r_type = target->get_real_reloc_type(r_type); 8962 switch (r_type) 8963 { 8964 case elfcpp::R_ARM_NONE: 8965 case elfcpp::R_ARM_V4BX: 8966 case elfcpp::R_ARM_GNU_VTENTRY: 8967 case elfcpp::R_ARM_GNU_VTINHERIT: 8968 break; 8969 8970 case elfcpp::R_ARM_ABS32: 8971 case elfcpp::R_ARM_ABS16: 8972 case elfcpp::R_ARM_ABS12: 8973 case elfcpp::R_ARM_THM_ABS5: 8974 case elfcpp::R_ARM_ABS8: 8975 case elfcpp::R_ARM_BASE_ABS: 8976 case elfcpp::R_ARM_MOVW_ABS_NC: 8977 case elfcpp::R_ARM_MOVT_ABS: 8978 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 8979 case elfcpp::R_ARM_THM_MOVT_ABS: 8980 case elfcpp::R_ARM_ABS32_NOI: 8981 // Absolute addressing relocations. 8982 { 8983 // Make a PLT entry if necessary. 8984 if (this->symbol_needs_plt_entry(gsym)) 8985 { 8986 target->make_plt_entry(symtab, layout, gsym); 8987 // Since this is not a PC-relative relocation, we may be 8988 // taking the address of a function. In that case we need to 8989 // set the entry in the dynamic symbol table to the address of 8990 // the PLT entry. 8991 if (gsym->is_from_dynobj() && !parameters->options().shared()) 8992 gsym->set_needs_dynsym_value(); 8993 } 8994 // Make a dynamic relocation if necessary. 8995 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type))) 8996 { 8997 if (!parameters->options().output_is_position_independent() 8998 && gsym->may_need_copy_reloc()) 8999 { 9000 target->copy_reloc(symtab, layout, object, 9001 data_shndx, output_section, gsym, reloc); 9002 } 9003 else if ((r_type == elfcpp::R_ARM_ABS32 9004 || r_type == elfcpp::R_ARM_ABS32_NOI) 9005 && gsym->type() == elfcpp::STT_GNU_IFUNC 9006 && gsym->can_use_relative_reloc(false) 9007 && !gsym->is_from_dynobj() 9008 && !gsym->is_undefined() 9009 && !gsym->is_preemptible()) 9010 { 9011 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC 9012 // symbol. This makes a function address in a PIE executable 9013 // match the address in a shared library that it links against. 9014 Reloc_section* rel_irelative = 9015 target->rel_irelative_section(layout); 9016 unsigned int r_type = elfcpp::R_ARM_IRELATIVE; 9017 rel_irelative->add_symbolless_global_addend( 9018 gsym, r_type, output_section, object, 9019 data_shndx, reloc.get_r_offset()); 9020 } 9021 else if ((r_type == elfcpp::R_ARM_ABS32 9022 || r_type == elfcpp::R_ARM_ABS32_NOI) 9023 && gsym->can_use_relative_reloc(false)) 9024 { 9025 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9026 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE, 9027 output_section, object, 9028 data_shndx, reloc.get_r_offset()); 9029 } 9030 else 9031 { 9032 check_non_pic(object, r_type); 9033 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9034 rel_dyn->add_global(gsym, r_type, output_section, object, 9035 data_shndx, reloc.get_r_offset()); 9036 } 9037 } 9038 } 9039 break; 9040 9041 case elfcpp::R_ARM_GOTOFF32: 9042 case elfcpp::R_ARM_GOTOFF12: 9043 // We need a GOT section. 9044 target->got_section(symtab, layout); 9045 break; 9046 9047 case elfcpp::R_ARM_REL32: 9048 case elfcpp::R_ARM_LDR_PC_G0: 9049 case elfcpp::R_ARM_SBREL32: 9050 case elfcpp::R_ARM_THM_PC8: 9051 case elfcpp::R_ARM_BASE_PREL: 9052 case elfcpp::R_ARM_MOVW_PREL_NC: 9053 case elfcpp::R_ARM_MOVT_PREL: 9054 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 9055 case elfcpp::R_ARM_THM_MOVT_PREL: 9056 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 9057 case elfcpp::R_ARM_THM_PC12: 9058 case elfcpp::R_ARM_REL32_NOI: 9059 case elfcpp::R_ARM_ALU_PC_G0_NC: 9060 case elfcpp::R_ARM_ALU_PC_G0: 9061 case elfcpp::R_ARM_ALU_PC_G1_NC: 9062 case elfcpp::R_ARM_ALU_PC_G1: 9063 case elfcpp::R_ARM_ALU_PC_G2: 9064 case elfcpp::R_ARM_LDR_PC_G1: 9065 case elfcpp::R_ARM_LDR_PC_G2: 9066 case elfcpp::R_ARM_LDRS_PC_G0: 9067 case elfcpp::R_ARM_LDRS_PC_G1: 9068 case elfcpp::R_ARM_LDRS_PC_G2: 9069 case elfcpp::R_ARM_LDC_PC_G0: 9070 case elfcpp::R_ARM_LDC_PC_G1: 9071 case elfcpp::R_ARM_LDC_PC_G2: 9072 case elfcpp::R_ARM_ALU_SB_G0_NC: 9073 case elfcpp::R_ARM_ALU_SB_G0: 9074 case elfcpp::R_ARM_ALU_SB_G1_NC: 9075 case elfcpp::R_ARM_ALU_SB_G1: 9076 case elfcpp::R_ARM_ALU_SB_G2: 9077 case elfcpp::R_ARM_LDR_SB_G0: 9078 case elfcpp::R_ARM_LDR_SB_G1: 9079 case elfcpp::R_ARM_LDR_SB_G2: 9080 case elfcpp::R_ARM_LDRS_SB_G0: 9081 case elfcpp::R_ARM_LDRS_SB_G1: 9082 case elfcpp::R_ARM_LDRS_SB_G2: 9083 case elfcpp::R_ARM_LDC_SB_G0: 9084 case elfcpp::R_ARM_LDC_SB_G1: 9085 case elfcpp::R_ARM_LDC_SB_G2: 9086 case elfcpp::R_ARM_MOVW_BREL_NC: 9087 case elfcpp::R_ARM_MOVT_BREL: 9088 case elfcpp::R_ARM_MOVW_BREL: 9089 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 9090 case elfcpp::R_ARM_THM_MOVT_BREL: 9091 case elfcpp::R_ARM_THM_MOVW_BREL: 9092 // Relative addressing relocations. 9093 { 9094 // Make a dynamic relocation if necessary. 9095 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type))) 9096 { 9097 if (parameters->options().output_is_executable() 9098 && target->may_need_copy_reloc(gsym)) 9099 { 9100 target->copy_reloc(symtab, layout, object, 9101 data_shndx, output_section, gsym, reloc); 9102 } 9103 else 9104 { 9105 check_non_pic(object, r_type); 9106 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9107 rel_dyn->add_global(gsym, r_type, output_section, object, 9108 data_shndx, reloc.get_r_offset()); 9109 } 9110 } 9111 } 9112 break; 9113 9114 case elfcpp::R_ARM_THM_CALL: 9115 case elfcpp::R_ARM_PLT32: 9116 case elfcpp::R_ARM_CALL: 9117 case elfcpp::R_ARM_JUMP24: 9118 case elfcpp::R_ARM_THM_JUMP24: 9119 case elfcpp::R_ARM_SBREL31: 9120 case elfcpp::R_ARM_PREL31: 9121 case elfcpp::R_ARM_THM_JUMP19: 9122 case elfcpp::R_ARM_THM_JUMP6: 9123 case elfcpp::R_ARM_THM_JUMP11: 9124 case elfcpp::R_ARM_THM_JUMP8: 9125 // All the relocation above are branches except for the PREL31 ones. 9126 // A PREL31 relocation can point to a personality function in a shared 9127 // library. In that case we want to use a PLT because we want to 9128 // call the personality routine and the dynamic linkers we care about 9129 // do not support dynamic PREL31 relocations. An REL31 relocation may 9130 // point to a function whose unwinding behaviour is being described but 9131 // we will not mistakenly generate a PLT for that because we should use 9132 // a local section symbol. 9133 9134 // If the symbol is fully resolved, this is just a relative 9135 // local reloc. Otherwise we need a PLT entry. 9136 if (gsym->final_value_is_known()) 9137 break; 9138 // If building a shared library, we can also skip the PLT entry 9139 // if the symbol is defined in the output file and is protected 9140 // or hidden. 9141 if (gsym->is_defined() 9142 && !gsym->is_from_dynobj() 9143 && !gsym->is_preemptible()) 9144 break; 9145 target->make_plt_entry(symtab, layout, gsym); 9146 break; 9147 9148 case elfcpp::R_ARM_GOT_BREL: 9149 case elfcpp::R_ARM_GOT_ABS: 9150 case elfcpp::R_ARM_GOT_PREL: 9151 { 9152 // The symbol requires a GOT entry. 9153 Arm_output_data_got<big_endian>* got = 9154 target->got_section(symtab, layout); 9155 if (gsym->final_value_is_known()) 9156 { 9157 // For a STT_GNU_IFUNC symbol we want the PLT address. 9158 if (gsym->type() == elfcpp::STT_GNU_IFUNC) 9159 got->add_global_plt(gsym, GOT_TYPE_STANDARD); 9160 else 9161 got->add_global(gsym, GOT_TYPE_STANDARD); 9162 } 9163 else 9164 { 9165 // If this symbol is not fully resolved, we need to add a 9166 // GOT entry with a dynamic relocation. 9167 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9168 if (gsym->is_from_dynobj() 9169 || gsym->is_undefined() 9170 || gsym->is_preemptible() 9171 || (gsym->visibility() == elfcpp::STV_PROTECTED 9172 && parameters->options().shared()) 9173 || (gsym->type() == elfcpp::STT_GNU_IFUNC 9174 && parameters->options().output_is_position_independent())) 9175 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD, 9176 rel_dyn, elfcpp::R_ARM_GLOB_DAT); 9177 else 9178 { 9179 // For a STT_GNU_IFUNC symbol we want to write the PLT 9180 // offset into the GOT, so that function pointer 9181 // comparisons work correctly. 9182 bool is_new; 9183 if (gsym->type() != elfcpp::STT_GNU_IFUNC) 9184 is_new = got->add_global(gsym, GOT_TYPE_STANDARD); 9185 else 9186 { 9187 is_new = got->add_global_plt(gsym, GOT_TYPE_STANDARD); 9188 // Tell the dynamic linker to use the PLT address 9189 // when resolving relocations. 9190 if (gsym->is_from_dynobj() 9191 && !parameters->options().shared()) 9192 gsym->set_needs_dynsym_value(); 9193 } 9194 if (is_new) 9195 rel_dyn->add_global_relative( 9196 gsym, elfcpp::R_ARM_RELATIVE, got, 9197 gsym->got_offset(GOT_TYPE_STANDARD)); 9198 } 9199 } 9200 } 9201 break; 9202 9203 case elfcpp::R_ARM_TARGET1: 9204 case elfcpp::R_ARM_TARGET2: 9205 // These should have been mapped to other types already. 9206 // Fall through. 9207 case elfcpp::R_ARM_COPY: 9208 case elfcpp::R_ARM_GLOB_DAT: 9209 case elfcpp::R_ARM_JUMP_SLOT: 9210 case elfcpp::R_ARM_RELATIVE: 9211 // These are relocations which should only be seen by the 9212 // dynamic linker, and should never be seen here. 9213 gold_error(_("%s: unexpected reloc %u in object file"), 9214 object->name().c_str(), r_type); 9215 break; 9216 9217 // These are initial tls relocs, which are expected when 9218 // linking. 9219 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 9220 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 9221 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 9222 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 9223 case elfcpp::R_ARM_TLS_LE32: // Local-exec 9224 { 9225 const bool is_final = gsym->final_value_is_known(); 9226 const tls::Tls_optimization optimized_type 9227 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type); 9228 switch (r_type) 9229 { 9230 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 9231 if (optimized_type == tls::TLSOPT_NONE) 9232 { 9233 // Create a pair of GOT entries for the module index and 9234 // dtv-relative offset. 9235 Arm_output_data_got<big_endian>* got 9236 = target->got_section(symtab, layout); 9237 if (!parameters->doing_static_link()) 9238 got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR, 9239 target->rel_dyn_section(layout), 9240 elfcpp::R_ARM_TLS_DTPMOD32, 9241 elfcpp::R_ARM_TLS_DTPOFF32); 9242 else 9243 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym); 9244 } 9245 else 9246 // FIXME: TLS optimization not supported yet. 9247 gold_unreachable(); 9248 break; 9249 9250 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 9251 if (optimized_type == tls::TLSOPT_NONE) 9252 { 9253 // Create a GOT entry for the module index. 9254 target->got_mod_index_entry(symtab, layout, object); 9255 } 9256 else 9257 // FIXME: TLS optimization not supported yet. 9258 gold_unreachable(); 9259 break; 9260 9261 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 9262 break; 9263 9264 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 9265 layout->set_has_static_tls(); 9266 if (optimized_type == tls::TLSOPT_NONE) 9267 { 9268 // Create a GOT entry for the tp-relative offset. 9269 Arm_output_data_got<big_endian>* got 9270 = target->got_section(symtab, layout); 9271 if (!parameters->doing_static_link()) 9272 got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET, 9273 target->rel_dyn_section(layout), 9274 elfcpp::R_ARM_TLS_TPOFF32); 9275 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET)) 9276 { 9277 got->add_global(gsym, GOT_TYPE_TLS_OFFSET); 9278 unsigned int got_offset = 9279 gsym->got_offset(GOT_TYPE_TLS_OFFSET); 9280 got->add_static_reloc(got_offset, 9281 elfcpp::R_ARM_TLS_TPOFF32, gsym); 9282 } 9283 } 9284 else 9285 // FIXME: TLS optimization not supported yet. 9286 gold_unreachable(); 9287 break; 9288 9289 case elfcpp::R_ARM_TLS_LE32: // Local-exec 9290 layout->set_has_static_tls(); 9291 if (parameters->options().shared()) 9292 { 9293 // We need to create a dynamic relocation. 9294 Reloc_section* rel_dyn = target->rel_dyn_section(layout); 9295 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32, 9296 output_section, object, 9297 data_shndx, reloc.get_r_offset()); 9298 } 9299 break; 9300 9301 default: 9302 gold_unreachable(); 9303 } 9304 } 9305 break; 9306 9307 case elfcpp::R_ARM_PC24: 9308 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 9309 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 9310 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 9311 default: 9312 unsupported_reloc_global(object, r_type, gsym); 9313 break; 9314 } 9315} 9316 9317// Process relocations for gc. 9318 9319template<bool big_endian> 9320void 9321Target_arm<big_endian>::gc_process_relocs( 9322 Symbol_table* symtab, 9323 Layout* layout, 9324 Sized_relobj_file<32, big_endian>* object, 9325 unsigned int data_shndx, 9326 unsigned int, 9327 const unsigned char* prelocs, 9328 size_t reloc_count, 9329 Output_section* output_section, 9330 bool needs_special_offset_handling, 9331 size_t local_symbol_count, 9332 const unsigned char* plocal_symbols) 9333{ 9334 typedef Target_arm<big_endian> Arm; 9335 typedef typename Target_arm<big_endian>::Scan Scan; 9336 9337 gold::gc_process_relocs<32, big_endian, Arm, Scan, Classify_reloc>( 9338 symtab, 9339 layout, 9340 this, 9341 object, 9342 data_shndx, 9343 prelocs, 9344 reloc_count, 9345 output_section, 9346 needs_special_offset_handling, 9347 local_symbol_count, 9348 plocal_symbols); 9349} 9350 9351// Scan relocations for a section. 9352 9353template<bool big_endian> 9354void 9355Target_arm<big_endian>::scan_relocs(Symbol_table* symtab, 9356 Layout* layout, 9357 Sized_relobj_file<32, big_endian>* object, 9358 unsigned int data_shndx, 9359 unsigned int sh_type, 9360 const unsigned char* prelocs, 9361 size_t reloc_count, 9362 Output_section* output_section, 9363 bool needs_special_offset_handling, 9364 size_t local_symbol_count, 9365 const unsigned char* plocal_symbols) 9366{ 9367 if (sh_type == elfcpp::SHT_RELA) 9368 { 9369 gold_error(_("%s: unsupported RELA reloc section"), 9370 object->name().c_str()); 9371 return; 9372 } 9373 9374 gold::scan_relocs<32, big_endian, Target_arm, Scan, Classify_reloc>( 9375 symtab, 9376 layout, 9377 this, 9378 object, 9379 data_shndx, 9380 prelocs, 9381 reloc_count, 9382 output_section, 9383 needs_special_offset_handling, 9384 local_symbol_count, 9385 plocal_symbols); 9386} 9387 9388// Finalize the sections. 9389 9390template<bool big_endian> 9391void 9392Target_arm<big_endian>::do_finalize_sections( 9393 Layout* layout, 9394 const Input_objects* input_objects, 9395 Symbol_table*) 9396{ 9397 bool merged_any_attributes = false; 9398 // Merge processor-specific flags. 9399 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin(); 9400 p != input_objects->relobj_end(); 9401 ++p) 9402 { 9403 Arm_relobj<big_endian>* arm_relobj = 9404 Arm_relobj<big_endian>::as_arm_relobj(*p); 9405 if (arm_relobj->merge_flags_and_attributes()) 9406 { 9407 this->merge_processor_specific_flags( 9408 arm_relobj->name(), 9409 arm_relobj->processor_specific_flags()); 9410 this->merge_object_attributes(arm_relobj->name().c_str(), 9411 arm_relobj->attributes_section_data()); 9412 merged_any_attributes = true; 9413 } 9414 } 9415 9416 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin(); 9417 p != input_objects->dynobj_end(); 9418 ++p) 9419 { 9420 Arm_dynobj<big_endian>* arm_dynobj = 9421 Arm_dynobj<big_endian>::as_arm_dynobj(*p); 9422 this->merge_processor_specific_flags( 9423 arm_dynobj->name(), 9424 arm_dynobj->processor_specific_flags()); 9425 this->merge_object_attributes(arm_dynobj->name().c_str(), 9426 arm_dynobj->attributes_section_data()); 9427 merged_any_attributes = true; 9428 } 9429 9430 // Create an empty uninitialized attribute section if we still don't have it 9431 // at this moment. This happens if there is no attributes sections in all 9432 // inputs. 9433 if (this->attributes_section_data_ == NULL) 9434 this->attributes_section_data_ = new Attributes_section_data(NULL, 0); 9435 9436 const Object_attribute* cpu_arch_attr = 9437 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch); 9438 // Check if we need to use Cortex-A8 workaround. 9439 if (parameters->options().user_set_fix_cortex_a8()) 9440 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8(); 9441 else 9442 { 9443 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on 9444 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown 9445 // profile. 9446 const Object_attribute* cpu_arch_profile_attr = 9447 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile); 9448 this->fix_cortex_a8_ = 9449 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7 9450 && (cpu_arch_profile_attr->int_value() == 'A' 9451 || cpu_arch_profile_attr->int_value() == 0)); 9452 } 9453 9454 // Check if we can use V4BX interworking. 9455 // The V4BX interworking stub contains BX instruction, 9456 // which is not specified for some profiles. 9457 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING 9458 && !this->may_use_v4t_interworking()) 9459 gold_error(_("unable to provide V4BX reloc interworking fix up; " 9460 "the target profile does not support BX instruction")); 9461 9462 // Fill in some more dynamic tags. 9463 const Reloc_section* rel_plt = (this->plt_ == NULL 9464 ? NULL 9465 : this->plt_->rel_plt()); 9466 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt, 9467 this->rel_dyn_, true, false); 9468 9469 // Emit any relocs we saved in an attempt to avoid generating COPY 9470 // relocs. 9471 if (this->copy_relocs_.any_saved_relocs()) 9472 this->copy_relocs_.emit(this->rel_dyn_section(layout)); 9473 9474 // Handle the .ARM.exidx section. 9475 Output_section* exidx_section = layout->find_output_section(".ARM.exidx"); 9476 9477 if (!parameters->options().relocatable()) 9478 { 9479 if (exidx_section != NULL 9480 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX) 9481 { 9482 // For the ARM target, we need to add a PT_ARM_EXIDX segment for 9483 // the .ARM.exidx section. 9484 if (!layout->script_options()->saw_phdrs_clause()) 9485 { 9486 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0, 9487 0) 9488 == NULL); 9489 Output_segment* exidx_segment = 9490 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R); 9491 exidx_segment->add_output_section_to_nonload(exidx_section, 9492 elfcpp::PF_R); 9493 } 9494 } 9495 } 9496 9497 // Create an .ARM.attributes section if we have merged any attributes 9498 // from inputs. 9499 if (merged_any_attributes) 9500 { 9501 Output_attributes_section_data* attributes_section = 9502 new Output_attributes_section_data(*this->attributes_section_data_); 9503 layout->add_output_section_data(".ARM.attributes", 9504 elfcpp::SHT_ARM_ATTRIBUTES, 0, 9505 attributes_section, ORDER_INVALID, 9506 false); 9507 } 9508 9509 // Fix up links in section EXIDX headers. 9510 for (Layout::Section_list::const_iterator p = layout->section_list().begin(); 9511 p != layout->section_list().end(); 9512 ++p) 9513 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX) 9514 { 9515 Arm_output_section<big_endian>* os = 9516 Arm_output_section<big_endian>::as_arm_output_section(*p); 9517 os->set_exidx_section_link(); 9518 } 9519} 9520 9521// Return whether a direct absolute static relocation needs to be applied. 9522// In cases where Scan::local() or Scan::global() has created 9523// a dynamic relocation other than R_ARM_RELATIVE, the addend 9524// of the relocation is carried in the data, and we must not 9525// apply the static relocation. 9526 9527template<bool big_endian> 9528inline bool 9529Target_arm<big_endian>::Relocate::should_apply_static_reloc( 9530 const Sized_symbol<32>* gsym, 9531 unsigned int r_type, 9532 bool is_32bit, 9533 Output_section* output_section) 9534{ 9535 // If the output section is not allocated, then we didn't call 9536 // scan_relocs, we didn't create a dynamic reloc, and we must apply 9537 // the reloc here. 9538 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0) 9539 return true; 9540 9541 int ref_flags = Scan::get_reference_flags(r_type); 9542 9543 // For local symbols, we will have created a non-RELATIVE dynamic 9544 // relocation only if (a) the output is position independent, 9545 // (b) the relocation is absolute (not pc- or segment-relative), and 9546 // (c) the relocation is not 32 bits wide. 9547 if (gsym == NULL) 9548 return !(parameters->options().output_is_position_independent() 9549 && (ref_flags & Symbol::ABSOLUTE_REF) 9550 && !is_32bit); 9551 9552 // For global symbols, we use the same helper routines used in the 9553 // scan pass. If we did not create a dynamic relocation, or if we 9554 // created a RELATIVE dynamic relocation, we should apply the static 9555 // relocation. 9556 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags); 9557 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF) 9558 && gsym->can_use_relative_reloc(ref_flags 9559 & Symbol::FUNCTION_CALL); 9560 return !has_dyn || is_rel; 9561} 9562 9563// Perform a relocation. 9564 9565template<bool big_endian> 9566inline bool 9567Target_arm<big_endian>::Relocate::relocate( 9568 const Relocate_info<32, big_endian>* relinfo, 9569 unsigned int, 9570 Target_arm* target, 9571 Output_section* output_section, 9572 size_t relnum, 9573 const unsigned char* preloc, 9574 const Sized_symbol<32>* gsym, 9575 const Symbol_value<32>* psymval, 9576 unsigned char* view, 9577 Arm_address address, 9578 section_size_type view_size) 9579{ 9580 if (view == NULL) 9581 return true; 9582 9583 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions; 9584 9585 const elfcpp::Rel<32, big_endian> rel(preloc); 9586 unsigned int r_type = elfcpp::elf_r_type<32>(rel.get_r_info()); 9587 r_type = target->get_real_reloc_type(r_type); 9588 const Arm_reloc_property* reloc_property = 9589 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 9590 if (reloc_property == NULL) 9591 { 9592 std::string reloc_name = 9593 arm_reloc_property_table->reloc_name_in_error_message(r_type); 9594 gold_error_at_location(relinfo, relnum, rel.get_r_offset(), 9595 _("cannot relocate %s in object file"), 9596 reloc_name.c_str()); 9597 return true; 9598 } 9599 9600 const Arm_relobj<big_endian>* object = 9601 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 9602 9603 // If the final branch target of a relocation is THUMB instruction, this 9604 // is 1. Otherwise it is 0. 9605 Arm_address thumb_bit = 0; 9606 Symbol_value<32> symval; 9607 bool is_weakly_undefined_without_plt = false; 9608 bool have_got_offset = false; 9609 unsigned int got_offset = 0; 9610 9611 // If the relocation uses the GOT entry of a symbol instead of the symbol 9612 // itself, we don't care about whether the symbol is defined or what kind 9613 // of symbol it is. 9614 if (reloc_property->uses_got_entry()) 9615 { 9616 // Get the GOT offset. 9617 // The GOT pointer points to the end of the GOT section. 9618 // We need to subtract the size of the GOT section to get 9619 // the actual offset to use in the relocation. 9620 // TODO: We should move GOT offset computing code in TLS relocations 9621 // to here. 9622 switch (r_type) 9623 { 9624 case elfcpp::R_ARM_GOT_BREL: 9625 case elfcpp::R_ARM_GOT_PREL: 9626 if (gsym != NULL) 9627 { 9628 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD)); 9629 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD) 9630 - target->got_size()); 9631 } 9632 else 9633 { 9634 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 9635 gold_assert(object->local_has_got_offset(r_sym, 9636 GOT_TYPE_STANDARD)); 9637 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD) 9638 - target->got_size()); 9639 } 9640 have_got_offset = true; 9641 break; 9642 9643 default: 9644 break; 9645 } 9646 } 9647 else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs) 9648 { 9649 if (gsym != NULL) 9650 { 9651 // This is a global symbol. Determine if we use PLT and if the 9652 // final target is THUMB. 9653 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type))) 9654 { 9655 // This uses a PLT, change the symbol value. 9656 symval.set_output_value(target->plt_address_for_global(gsym)); 9657 psymval = &symval; 9658 } 9659 else if (gsym->is_weak_undefined()) 9660 { 9661 // This is a weakly undefined symbol and we do not use PLT 9662 // for this relocation. A branch targeting this symbol will 9663 // be converted into an NOP. 9664 is_weakly_undefined_without_plt = true; 9665 } 9666 else if (gsym->is_undefined() && reloc_property->uses_symbol()) 9667 { 9668 // This relocation uses the symbol value but the symbol is 9669 // undefined. Exit early and have the caller reporting an 9670 // error. 9671 return true; 9672 } 9673 else 9674 { 9675 // Set thumb bit if symbol: 9676 // -Has type STT_ARM_TFUNC or 9677 // -Has type STT_FUNC, is defined and with LSB in value set. 9678 thumb_bit = 9679 (((gsym->type() == elfcpp::STT_ARM_TFUNC) 9680 || (gsym->type() == elfcpp::STT_FUNC 9681 && !gsym->is_undefined() 9682 && ((psymval->value(object, 0) & 1) != 0))) 9683 ? 1 9684 : 0); 9685 } 9686 } 9687 else 9688 { 9689 // This is a local symbol. Determine if the final target is THUMB. 9690 // We saved this information when all the local symbols were read. 9691 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info(); 9692 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 9693 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0; 9694 9695 if (psymval->is_ifunc_symbol() && object->local_has_plt_offset(r_sym)) 9696 { 9697 symval.set_output_value( 9698 target->plt_address_for_local(object, r_sym)); 9699 psymval = &symval; 9700 } 9701 } 9702 } 9703 else 9704 { 9705 // This is a fake relocation synthesized for a stub. It does not have 9706 // a real symbol. We just look at the LSB of the symbol value to 9707 // determine if the target is THUMB or not. 9708 thumb_bit = ((psymval->value(object, 0) & 1) != 0); 9709 } 9710 9711 // Strip LSB if this points to a THUMB target. 9712 if (thumb_bit != 0 9713 && reloc_property->uses_thumb_bit() 9714 && ((psymval->value(object, 0) & 1) != 0)) 9715 { 9716 Arm_address stripped_value = 9717 psymval->value(object, 0) & ~static_cast<Arm_address>(1); 9718 symval.set_output_value(stripped_value); 9719 psymval = &symval; 9720 } 9721 9722 // To look up relocation stubs, we need to pass the symbol table index of 9723 // a local symbol. 9724 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 9725 9726 // Get the addressing origin of the output segment defining the 9727 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types). 9728 Arm_address sym_origin = 0; 9729 if (reloc_property->uses_symbol_base()) 9730 { 9731 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL) 9732 // R_ARM_BASE_ABS with the NULL symbol will give the 9733 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI 9734 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations). 9735 sym_origin = target->got_plt_section()->address(); 9736 else if (gsym == NULL) 9737 sym_origin = 0; 9738 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT) 9739 sym_origin = gsym->output_segment()->vaddr(); 9740 else if (gsym->source() == Symbol::IN_OUTPUT_DATA) 9741 sym_origin = gsym->output_data()->address(); 9742 9743 // TODO: Assumes the segment base to be zero for the global symbols 9744 // till the proper support for the segment-base-relative addressing 9745 // will be implemented. This is consistent with GNU ld. 9746 } 9747 9748 // For relative addressing relocation, find out the relative address base. 9749 Arm_address relative_address_base = 0; 9750 switch(reloc_property->relative_address_base()) 9751 { 9752 case Arm_reloc_property::RAB_NONE: 9753 // Relocations with relative address bases RAB_TLS and RAB_tp are 9754 // handled by relocate_tls. So we do not need to do anything here. 9755 case Arm_reloc_property::RAB_TLS: 9756 case Arm_reloc_property::RAB_tp: 9757 break; 9758 case Arm_reloc_property::RAB_B_S: 9759 relative_address_base = sym_origin; 9760 break; 9761 case Arm_reloc_property::RAB_GOT_ORG: 9762 relative_address_base = target->got_plt_section()->address(); 9763 break; 9764 case Arm_reloc_property::RAB_P: 9765 relative_address_base = address; 9766 break; 9767 case Arm_reloc_property::RAB_Pa: 9768 relative_address_base = address & 0xfffffffcU; 9769 break; 9770 default: 9771 gold_unreachable(); 9772 } 9773 9774 typename Arm_relocate_functions::Status reloc_status = 9775 Arm_relocate_functions::STATUS_OKAY; 9776 bool check_overflow = reloc_property->checks_overflow(); 9777 switch (r_type) 9778 { 9779 case elfcpp::R_ARM_NONE: 9780 break; 9781 9782 case elfcpp::R_ARM_ABS8: 9783 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9784 reloc_status = Arm_relocate_functions::abs8(view, object, psymval); 9785 break; 9786 9787 case elfcpp::R_ARM_ABS12: 9788 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9789 reloc_status = Arm_relocate_functions::abs12(view, object, psymval); 9790 break; 9791 9792 case elfcpp::R_ARM_ABS16: 9793 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9794 reloc_status = Arm_relocate_functions::abs16(view, object, psymval); 9795 break; 9796 9797 case elfcpp::R_ARM_ABS32: 9798 if (should_apply_static_reloc(gsym, r_type, true, output_section)) 9799 reloc_status = Arm_relocate_functions::abs32(view, object, psymval, 9800 thumb_bit); 9801 break; 9802 9803 case elfcpp::R_ARM_ABS32_NOI: 9804 if (should_apply_static_reloc(gsym, r_type, true, output_section)) 9805 // No thumb bit for this relocation: (S + A) 9806 reloc_status = Arm_relocate_functions::abs32(view, object, psymval, 9807 0); 9808 break; 9809 9810 case elfcpp::R_ARM_MOVW_ABS_NC: 9811 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9812 reloc_status = Arm_relocate_functions::movw(view, object, psymval, 9813 0, thumb_bit, 9814 check_overflow); 9815 break; 9816 9817 case elfcpp::R_ARM_MOVT_ABS: 9818 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9819 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0); 9820 break; 9821 9822 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 9823 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9824 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval, 9825 0, thumb_bit, false); 9826 break; 9827 9828 case elfcpp::R_ARM_THM_MOVT_ABS: 9829 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9830 reloc_status = Arm_relocate_functions::thm_movt(view, object, 9831 psymval, 0); 9832 break; 9833 9834 case elfcpp::R_ARM_MOVW_PREL_NC: 9835 case elfcpp::R_ARM_MOVW_BREL_NC: 9836 case elfcpp::R_ARM_MOVW_BREL: 9837 reloc_status = 9838 Arm_relocate_functions::movw(view, object, psymval, 9839 relative_address_base, thumb_bit, 9840 check_overflow); 9841 break; 9842 9843 case elfcpp::R_ARM_MOVT_PREL: 9844 case elfcpp::R_ARM_MOVT_BREL: 9845 reloc_status = 9846 Arm_relocate_functions::movt(view, object, psymval, 9847 relative_address_base); 9848 break; 9849 9850 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 9851 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 9852 case elfcpp::R_ARM_THM_MOVW_BREL: 9853 reloc_status = 9854 Arm_relocate_functions::thm_movw(view, object, psymval, 9855 relative_address_base, 9856 thumb_bit, check_overflow); 9857 break; 9858 9859 case elfcpp::R_ARM_THM_MOVT_PREL: 9860 case elfcpp::R_ARM_THM_MOVT_BREL: 9861 reloc_status = 9862 Arm_relocate_functions::thm_movt(view, object, psymval, 9863 relative_address_base); 9864 break; 9865 9866 case elfcpp::R_ARM_REL32: 9867 reloc_status = Arm_relocate_functions::rel32(view, object, psymval, 9868 address, thumb_bit); 9869 break; 9870 9871 case elfcpp::R_ARM_THM_ABS5: 9872 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9873 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval); 9874 break; 9875 9876 // Thumb long branches. 9877 case elfcpp::R_ARM_THM_CALL: 9878 case elfcpp::R_ARM_THM_XPC22: 9879 case elfcpp::R_ARM_THM_JUMP24: 9880 reloc_status = 9881 Arm_relocate_functions::thumb_branch_common( 9882 r_type, relinfo, view, gsym, object, r_sym, psymval, address, 9883 thumb_bit, is_weakly_undefined_without_plt); 9884 break; 9885 9886 case elfcpp::R_ARM_GOTOFF32: 9887 { 9888 Arm_address got_origin; 9889 got_origin = target->got_plt_section()->address(); 9890 reloc_status = Arm_relocate_functions::rel32(view, object, psymval, 9891 got_origin, thumb_bit); 9892 } 9893 break; 9894 9895 case elfcpp::R_ARM_BASE_PREL: 9896 gold_assert(gsym != NULL); 9897 reloc_status = 9898 Arm_relocate_functions::base_prel(view, sym_origin, address); 9899 break; 9900 9901 case elfcpp::R_ARM_BASE_ABS: 9902 if (should_apply_static_reloc(gsym, r_type, false, output_section)) 9903 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin); 9904 break; 9905 9906 case elfcpp::R_ARM_GOT_BREL: 9907 gold_assert(have_got_offset); 9908 reloc_status = Arm_relocate_functions::got_brel(view, got_offset); 9909 break; 9910 9911 case elfcpp::R_ARM_GOT_PREL: 9912 gold_assert(have_got_offset); 9913 // Get the address origin for GOT PLT, which is allocated right 9914 // after the GOT section, to calculate an absolute address of 9915 // the symbol GOT entry (got_origin + got_offset). 9916 Arm_address got_origin; 9917 got_origin = target->got_plt_section()->address(); 9918 reloc_status = Arm_relocate_functions::got_prel(view, 9919 got_origin + got_offset, 9920 address); 9921 break; 9922 9923 case elfcpp::R_ARM_PLT32: 9924 case elfcpp::R_ARM_CALL: 9925 case elfcpp::R_ARM_JUMP24: 9926 case elfcpp::R_ARM_XPC25: 9927 gold_assert(gsym == NULL 9928 || gsym->has_plt_offset() 9929 || gsym->final_value_is_known() 9930 || (gsym->is_defined() 9931 && !gsym->is_from_dynobj() 9932 && !gsym->is_preemptible())); 9933 reloc_status = 9934 Arm_relocate_functions::arm_branch_common( 9935 r_type, relinfo, view, gsym, object, r_sym, psymval, address, 9936 thumb_bit, is_weakly_undefined_without_plt); 9937 break; 9938 9939 case elfcpp::R_ARM_THM_JUMP19: 9940 reloc_status = 9941 Arm_relocate_functions::thm_jump19(view, object, psymval, address, 9942 thumb_bit); 9943 break; 9944 9945 case elfcpp::R_ARM_THM_JUMP6: 9946 reloc_status = 9947 Arm_relocate_functions::thm_jump6(view, object, psymval, address); 9948 break; 9949 9950 case elfcpp::R_ARM_THM_JUMP8: 9951 reloc_status = 9952 Arm_relocate_functions::thm_jump8(view, object, psymval, address); 9953 break; 9954 9955 case elfcpp::R_ARM_THM_JUMP11: 9956 reloc_status = 9957 Arm_relocate_functions::thm_jump11(view, object, psymval, address); 9958 break; 9959 9960 case elfcpp::R_ARM_PREL31: 9961 reloc_status = Arm_relocate_functions::prel31(view, object, psymval, 9962 address, thumb_bit); 9963 break; 9964 9965 case elfcpp::R_ARM_V4BX: 9966 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE) 9967 { 9968 const bool is_v4bx_interworking = 9969 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING); 9970 reloc_status = 9971 Arm_relocate_functions::v4bx(relinfo, view, object, address, 9972 is_v4bx_interworking); 9973 } 9974 break; 9975 9976 case elfcpp::R_ARM_THM_PC8: 9977 reloc_status = 9978 Arm_relocate_functions::thm_pc8(view, object, psymval, address); 9979 break; 9980 9981 case elfcpp::R_ARM_THM_PC12: 9982 reloc_status = 9983 Arm_relocate_functions::thm_pc12(view, object, psymval, address); 9984 break; 9985 9986 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 9987 reloc_status = 9988 Arm_relocate_functions::thm_alu11(view, object, psymval, address, 9989 thumb_bit); 9990 break; 9991 9992 case elfcpp::R_ARM_ALU_PC_G0_NC: 9993 case elfcpp::R_ARM_ALU_PC_G0: 9994 case elfcpp::R_ARM_ALU_PC_G1_NC: 9995 case elfcpp::R_ARM_ALU_PC_G1: 9996 case elfcpp::R_ARM_ALU_PC_G2: 9997 case elfcpp::R_ARM_ALU_SB_G0_NC: 9998 case elfcpp::R_ARM_ALU_SB_G0: 9999 case elfcpp::R_ARM_ALU_SB_G1_NC: 10000 case elfcpp::R_ARM_ALU_SB_G1: 10001 case elfcpp::R_ARM_ALU_SB_G2: 10002 reloc_status = 10003 Arm_relocate_functions::arm_grp_alu(view, object, psymval, 10004 reloc_property->group_index(), 10005 relative_address_base, 10006 thumb_bit, check_overflow); 10007 break; 10008 10009 case elfcpp::R_ARM_LDR_PC_G0: 10010 case elfcpp::R_ARM_LDR_PC_G1: 10011 case elfcpp::R_ARM_LDR_PC_G2: 10012 case elfcpp::R_ARM_LDR_SB_G0: 10013 case elfcpp::R_ARM_LDR_SB_G1: 10014 case elfcpp::R_ARM_LDR_SB_G2: 10015 reloc_status = 10016 Arm_relocate_functions::arm_grp_ldr(view, object, psymval, 10017 reloc_property->group_index(), 10018 relative_address_base); 10019 break; 10020 10021 case elfcpp::R_ARM_LDRS_PC_G0: 10022 case elfcpp::R_ARM_LDRS_PC_G1: 10023 case elfcpp::R_ARM_LDRS_PC_G2: 10024 case elfcpp::R_ARM_LDRS_SB_G0: 10025 case elfcpp::R_ARM_LDRS_SB_G1: 10026 case elfcpp::R_ARM_LDRS_SB_G2: 10027 reloc_status = 10028 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval, 10029 reloc_property->group_index(), 10030 relative_address_base); 10031 break; 10032 10033 case elfcpp::R_ARM_LDC_PC_G0: 10034 case elfcpp::R_ARM_LDC_PC_G1: 10035 case elfcpp::R_ARM_LDC_PC_G2: 10036 case elfcpp::R_ARM_LDC_SB_G0: 10037 case elfcpp::R_ARM_LDC_SB_G1: 10038 case elfcpp::R_ARM_LDC_SB_G2: 10039 reloc_status = 10040 Arm_relocate_functions::arm_grp_ldc(view, object, psymval, 10041 reloc_property->group_index(), 10042 relative_address_base); 10043 break; 10044 10045 // These are initial tls relocs, which are expected when 10046 // linking. 10047 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 10048 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 10049 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 10050 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 10051 case elfcpp::R_ARM_TLS_LE32: // Local-exec 10052 reloc_status = 10053 this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval, 10054 view, address, view_size); 10055 break; 10056 10057 // The known and unknown unsupported and/or deprecated relocations. 10058 case elfcpp::R_ARM_PC24: 10059 case elfcpp::R_ARM_LDR_SBREL_11_0_NC: 10060 case elfcpp::R_ARM_ALU_SBREL_19_12_NC: 10061 case elfcpp::R_ARM_ALU_SBREL_27_20_CK: 10062 default: 10063 // Just silently leave the method. We should get an appropriate error 10064 // message in the scan methods. 10065 break; 10066 } 10067 10068 // Report any errors. 10069 switch (reloc_status) 10070 { 10071 case Arm_relocate_functions::STATUS_OKAY: 10072 break; 10073 case Arm_relocate_functions::STATUS_OVERFLOW: 10074 gold_error_at_location(relinfo, relnum, rel.get_r_offset(), 10075 _("relocation overflow in %s"), 10076 reloc_property->name().c_str()); 10077 break; 10078 case Arm_relocate_functions::STATUS_BAD_RELOC: 10079 gold_error_at_location( 10080 relinfo, 10081 relnum, 10082 rel.get_r_offset(), 10083 _("unexpected opcode while processing relocation %s"), 10084 reloc_property->name().c_str()); 10085 break; 10086 default: 10087 gold_unreachable(); 10088 } 10089 10090 return true; 10091} 10092 10093// Perform a TLS relocation. 10094 10095template<bool big_endian> 10096inline typename Arm_relocate_functions<big_endian>::Status 10097Target_arm<big_endian>::Relocate::relocate_tls( 10098 const Relocate_info<32, big_endian>* relinfo, 10099 Target_arm<big_endian>* target, 10100 size_t relnum, 10101 const elfcpp::Rel<32, big_endian>& rel, 10102 unsigned int r_type, 10103 const Sized_symbol<32>* gsym, 10104 const Symbol_value<32>* psymval, 10105 unsigned char* view, 10106 elfcpp::Elf_types<32>::Elf_Addr address, 10107 section_size_type /*view_size*/ ) 10108{ 10109 typedef Arm_relocate_functions<big_endian> ArmRelocFuncs; 10110 typedef Relocate_functions<32, big_endian> RelocFuncs; 10111 Output_segment* tls_segment = relinfo->layout->tls_segment(); 10112 10113 const Sized_relobj_file<32, big_endian>* object = relinfo->object; 10114 10115 elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0); 10116 10117 const bool is_final = (gsym == NULL 10118 ? !parameters->options().shared() 10119 : gsym->final_value_is_known()); 10120 const tls::Tls_optimization optimized_type 10121 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type); 10122 switch (r_type) 10123 { 10124 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic 10125 { 10126 unsigned int got_type = GOT_TYPE_TLS_PAIR; 10127 unsigned int got_offset; 10128 if (gsym != NULL) 10129 { 10130 gold_assert(gsym->has_got_offset(got_type)); 10131 got_offset = gsym->got_offset(got_type) - target->got_size(); 10132 } 10133 else 10134 { 10135 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 10136 gold_assert(object->local_has_got_offset(r_sym, got_type)); 10137 got_offset = (object->local_got_offset(r_sym, got_type) 10138 - target->got_size()); 10139 } 10140 if (optimized_type == tls::TLSOPT_NONE) 10141 { 10142 Arm_address got_entry = 10143 target->got_plt_section()->address() + got_offset; 10144 10145 // Relocate the field with the PC relative offset of the pair of 10146 // GOT entries. 10147 RelocFuncs::pcrel32_unaligned(view, got_entry, address); 10148 return ArmRelocFuncs::STATUS_OKAY; 10149 } 10150 } 10151 break; 10152 10153 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic 10154 if (optimized_type == tls::TLSOPT_NONE) 10155 { 10156 // Relocate the field with the offset of the GOT entry for 10157 // the module index. 10158 unsigned int got_offset; 10159 got_offset = (target->got_mod_index_entry(NULL, NULL, NULL) 10160 - target->got_size()); 10161 Arm_address got_entry = 10162 target->got_plt_section()->address() + got_offset; 10163 10164 // Relocate the field with the PC relative offset of the pair of 10165 // GOT entries. 10166 RelocFuncs::pcrel32_unaligned(view, got_entry, address); 10167 return ArmRelocFuncs::STATUS_OKAY; 10168 } 10169 break; 10170 10171 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic 10172 RelocFuncs::rel32_unaligned(view, value); 10173 return ArmRelocFuncs::STATUS_OKAY; 10174 10175 case elfcpp::R_ARM_TLS_IE32: // Initial-exec 10176 if (optimized_type == tls::TLSOPT_NONE) 10177 { 10178 // Relocate the field with the offset of the GOT entry for 10179 // the tp-relative offset of the symbol. 10180 unsigned int got_type = GOT_TYPE_TLS_OFFSET; 10181 unsigned int got_offset; 10182 if (gsym != NULL) 10183 { 10184 gold_assert(gsym->has_got_offset(got_type)); 10185 got_offset = gsym->got_offset(got_type); 10186 } 10187 else 10188 { 10189 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info()); 10190 gold_assert(object->local_has_got_offset(r_sym, got_type)); 10191 got_offset = object->local_got_offset(r_sym, got_type); 10192 } 10193 10194 // All GOT offsets are relative to the end of the GOT. 10195 got_offset -= target->got_size(); 10196 10197 Arm_address got_entry = 10198 target->got_plt_section()->address() + got_offset; 10199 10200 // Relocate the field with the PC relative offset of the GOT entry. 10201 RelocFuncs::pcrel32_unaligned(view, got_entry, address); 10202 return ArmRelocFuncs::STATUS_OKAY; 10203 } 10204 break; 10205 10206 case elfcpp::R_ARM_TLS_LE32: // Local-exec 10207 // If we're creating a shared library, a dynamic relocation will 10208 // have been created for this location, so do not apply it now. 10209 if (!parameters->options().shared()) 10210 { 10211 gold_assert(tls_segment != NULL); 10212 10213 // $tp points to the TCB, which is followed by the TLS, so we 10214 // need to add TCB size to the offset. 10215 Arm_address aligned_tcb_size = 10216 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment()); 10217 RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size); 10218 10219 } 10220 return ArmRelocFuncs::STATUS_OKAY; 10221 10222 default: 10223 gold_unreachable(); 10224 } 10225 10226 gold_error_at_location(relinfo, relnum, rel.get_r_offset(), 10227 _("unsupported reloc %u"), 10228 r_type); 10229 return ArmRelocFuncs::STATUS_BAD_RELOC; 10230} 10231 10232// Relocate section data. 10233 10234template<bool big_endian> 10235void 10236Target_arm<big_endian>::relocate_section( 10237 const Relocate_info<32, big_endian>* relinfo, 10238 unsigned int sh_type, 10239 const unsigned char* prelocs, 10240 size_t reloc_count, 10241 Output_section* output_section, 10242 bool needs_special_offset_handling, 10243 unsigned char* view, 10244 Arm_address address, 10245 section_size_type view_size, 10246 const Reloc_symbol_changes* reloc_symbol_changes) 10247{ 10248 typedef typename Target_arm<big_endian>::Relocate Arm_relocate; 10249 gold_assert(sh_type == elfcpp::SHT_REL); 10250 10251 // See if we are relocating a relaxed input section. If so, the view 10252 // covers the whole output section and we need to adjust accordingly. 10253 if (needs_special_offset_handling) 10254 { 10255 const Output_relaxed_input_section* poris = 10256 output_section->find_relaxed_input_section(relinfo->object, 10257 relinfo->data_shndx); 10258 if (poris != NULL) 10259 { 10260 Arm_address section_address = poris->address(); 10261 section_size_type section_size = poris->data_size(); 10262 10263 gold_assert((section_address >= address) 10264 && ((section_address + section_size) 10265 <= (address + view_size))); 10266 10267 off_t offset = section_address - address; 10268 view += offset; 10269 address += offset; 10270 view_size = section_size; 10271 } 10272 } 10273 10274 gold::relocate_section<32, big_endian, Target_arm, Arm_relocate, 10275 gold::Default_comdat_behavior, Classify_reloc>( 10276 relinfo, 10277 this, 10278 prelocs, 10279 reloc_count, 10280 output_section, 10281 needs_special_offset_handling, 10282 view, 10283 address, 10284 view_size, 10285 reloc_symbol_changes); 10286} 10287 10288// Return the size of a relocation while scanning during a relocatable 10289// link. 10290 10291template<bool big_endian> 10292unsigned int 10293Target_arm<big_endian>::Classify_reloc::get_size_for_reloc( 10294 unsigned int r_type, 10295 Relobj* object) 10296{ 10297 Target_arm<big_endian>* arm_target = 10298 Target_arm<big_endian>::default_target(); 10299 r_type = arm_target->get_real_reloc_type(r_type); 10300 const Arm_reloc_property* arp = 10301 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 10302 if (arp != NULL) 10303 return arp->size(); 10304 else 10305 { 10306 std::string reloc_name = 10307 arm_reloc_property_table->reloc_name_in_error_message(r_type); 10308 gold_error(_("%s: unexpected %s in object file"), 10309 object->name().c_str(), reloc_name.c_str()); 10310 return 0; 10311 } 10312} 10313 10314// Scan the relocs during a relocatable link. 10315 10316template<bool big_endian> 10317void 10318Target_arm<big_endian>::scan_relocatable_relocs( 10319 Symbol_table* symtab, 10320 Layout* layout, 10321 Sized_relobj_file<32, big_endian>* object, 10322 unsigned int data_shndx, 10323 unsigned int sh_type, 10324 const unsigned char* prelocs, 10325 size_t reloc_count, 10326 Output_section* output_section, 10327 bool needs_special_offset_handling, 10328 size_t local_symbol_count, 10329 const unsigned char* plocal_symbols, 10330 Relocatable_relocs* rr) 10331{ 10332 typedef Arm_scan_relocatable_relocs<big_endian, Classify_reloc> 10333 Scan_relocatable_relocs; 10334 10335 gold_assert(sh_type == elfcpp::SHT_REL); 10336 10337 gold::scan_relocatable_relocs<32, big_endian, Scan_relocatable_relocs>( 10338 symtab, 10339 layout, 10340 object, 10341 data_shndx, 10342 prelocs, 10343 reloc_count, 10344 output_section, 10345 needs_special_offset_handling, 10346 local_symbol_count, 10347 plocal_symbols, 10348 rr); 10349} 10350 10351// Scan the relocs for --emit-relocs. 10352 10353template<bool big_endian> 10354void 10355Target_arm<big_endian>::emit_relocs_scan(Symbol_table* symtab, 10356 Layout* layout, 10357 Sized_relobj_file<32, big_endian>* object, 10358 unsigned int data_shndx, 10359 unsigned int sh_type, 10360 const unsigned char* prelocs, 10361 size_t reloc_count, 10362 Output_section* output_section, 10363 bool needs_special_offset_handling, 10364 size_t local_symbol_count, 10365 const unsigned char* plocal_syms, 10366 Relocatable_relocs* rr) 10367{ 10368 typedef gold::Default_classify_reloc<elfcpp::SHT_REL, 32, big_endian> 10369 Classify_reloc; 10370 typedef gold::Default_emit_relocs_strategy<Classify_reloc> 10371 Emit_relocs_strategy; 10372 10373 gold_assert(sh_type == elfcpp::SHT_REL); 10374 10375 gold::scan_relocatable_relocs<32, big_endian, Emit_relocs_strategy>( 10376 symtab, 10377 layout, 10378 object, 10379 data_shndx, 10380 prelocs, 10381 reloc_count, 10382 output_section, 10383 needs_special_offset_handling, 10384 local_symbol_count, 10385 plocal_syms, 10386 rr); 10387} 10388 10389// Emit relocations for a section. 10390 10391template<bool big_endian> 10392void 10393Target_arm<big_endian>::relocate_relocs( 10394 const Relocate_info<32, big_endian>* relinfo, 10395 unsigned int sh_type, 10396 const unsigned char* prelocs, 10397 size_t reloc_count, 10398 Output_section* output_section, 10399 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section, 10400 unsigned char* view, 10401 Arm_address view_address, 10402 section_size_type view_size, 10403 unsigned char* reloc_view, 10404 section_size_type reloc_view_size) 10405{ 10406 gold_assert(sh_type == elfcpp::SHT_REL); 10407 10408 gold::relocate_relocs<32, big_endian, Classify_reloc>( 10409 relinfo, 10410 prelocs, 10411 reloc_count, 10412 output_section, 10413 offset_in_output_section, 10414 view, 10415 view_address, 10416 view_size, 10417 reloc_view, 10418 reloc_view_size); 10419} 10420 10421// Perform target-specific processing in a relocatable link. This is 10422// only used if we use the relocation strategy RELOC_SPECIAL. 10423 10424template<bool big_endian> 10425void 10426Target_arm<big_endian>::relocate_special_relocatable( 10427 const Relocate_info<32, big_endian>* relinfo, 10428 unsigned int sh_type, 10429 const unsigned char* preloc_in, 10430 size_t relnum, 10431 Output_section* output_section, 10432 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section, 10433 unsigned char* view, 10434 elfcpp::Elf_types<32>::Elf_Addr view_address, 10435 section_size_type, 10436 unsigned char* preloc_out) 10437{ 10438 // We can only handle REL type relocation sections. 10439 gold_assert(sh_type == elfcpp::SHT_REL); 10440 10441 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype; 10442 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write 10443 Reltype_write; 10444 const Arm_address invalid_address = static_cast<Arm_address>(0) - 1; 10445 10446 const Arm_relobj<big_endian>* object = 10447 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 10448 const unsigned int local_count = object->local_symbol_count(); 10449 10450 Reltype reloc(preloc_in); 10451 Reltype_write reloc_write(preloc_out); 10452 10453 elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info(); 10454 const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 10455 const unsigned int r_type = elfcpp::elf_r_type<32>(r_info); 10456 10457 const Arm_reloc_property* arp = 10458 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 10459 gold_assert(arp != NULL); 10460 10461 // Get the new symbol index. 10462 // We only use RELOC_SPECIAL strategy in local relocations. 10463 gold_assert(r_sym < local_count); 10464 10465 // We are adjusting a section symbol. We need to find 10466 // the symbol table index of the section symbol for 10467 // the output section corresponding to input section 10468 // in which this symbol is defined. 10469 bool is_ordinary; 10470 unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary); 10471 gold_assert(is_ordinary); 10472 Output_section* os = object->output_section(shndx); 10473 gold_assert(os != NULL); 10474 gold_assert(os->needs_symtab_index()); 10475 unsigned int new_symndx = os->symtab_index(); 10476 10477 // Get the new offset--the location in the output section where 10478 // this relocation should be applied. 10479 10480 Arm_address offset = reloc.get_r_offset(); 10481 Arm_address new_offset; 10482 if (offset_in_output_section != invalid_address) 10483 new_offset = offset + offset_in_output_section; 10484 else 10485 { 10486 section_offset_type sot_offset = 10487 convert_types<section_offset_type, Arm_address>(offset); 10488 section_offset_type new_sot_offset = 10489 output_section->output_offset(object, relinfo->data_shndx, 10490 sot_offset); 10491 gold_assert(new_sot_offset != -1); 10492 new_offset = new_sot_offset; 10493 } 10494 10495 // In an object file, r_offset is an offset within the section. 10496 // In an executable or dynamic object, generated by 10497 // --emit-relocs, r_offset is an absolute address. 10498 if (!parameters->options().relocatable()) 10499 { 10500 new_offset += view_address; 10501 if (offset_in_output_section != invalid_address) 10502 new_offset -= offset_in_output_section; 10503 } 10504 10505 reloc_write.put_r_offset(new_offset); 10506 reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type)); 10507 10508 // Handle the reloc addend. 10509 // The relocation uses a section symbol in the input file. 10510 // We are adjusting it to use a section symbol in the output 10511 // file. The input section symbol refers to some address in 10512 // the input section. We need the relocation in the output 10513 // file to refer to that same address. This adjustment to 10514 // the addend is the same calculation we use for a simple 10515 // absolute relocation for the input section symbol. 10516 10517 const Symbol_value<32>* psymval = object->local_symbol(r_sym); 10518 10519 // Handle THUMB bit. 10520 Symbol_value<32> symval; 10521 Arm_address thumb_bit = 10522 object->local_symbol_is_thumb_function(r_sym) ? 1 : 0; 10523 if (thumb_bit != 0 10524 && arp->uses_thumb_bit() 10525 && ((psymval->value(object, 0) & 1) != 0)) 10526 { 10527 Arm_address stripped_value = 10528 psymval->value(object, 0) & ~static_cast<Arm_address>(1); 10529 symval.set_output_value(stripped_value); 10530 psymval = &symval; 10531 } 10532 10533 unsigned char* paddend = view + offset; 10534 typename Arm_relocate_functions<big_endian>::Status reloc_status = 10535 Arm_relocate_functions<big_endian>::STATUS_OKAY; 10536 switch (r_type) 10537 { 10538 case elfcpp::R_ARM_ABS8: 10539 reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object, 10540 psymval); 10541 break; 10542 10543 case elfcpp::R_ARM_ABS12: 10544 reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object, 10545 psymval); 10546 break; 10547 10548 case elfcpp::R_ARM_ABS16: 10549 reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object, 10550 psymval); 10551 break; 10552 10553 case elfcpp::R_ARM_THM_ABS5: 10554 reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend, 10555 object, 10556 psymval); 10557 break; 10558 10559 case elfcpp::R_ARM_MOVW_ABS_NC: 10560 case elfcpp::R_ARM_MOVW_PREL_NC: 10561 case elfcpp::R_ARM_MOVW_BREL_NC: 10562 case elfcpp::R_ARM_MOVW_BREL: 10563 reloc_status = Arm_relocate_functions<big_endian>::movw( 10564 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow()); 10565 break; 10566 10567 case elfcpp::R_ARM_THM_MOVW_ABS_NC: 10568 case elfcpp::R_ARM_THM_MOVW_PREL_NC: 10569 case elfcpp::R_ARM_THM_MOVW_BREL_NC: 10570 case elfcpp::R_ARM_THM_MOVW_BREL: 10571 reloc_status = Arm_relocate_functions<big_endian>::thm_movw( 10572 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow()); 10573 break; 10574 10575 case elfcpp::R_ARM_THM_CALL: 10576 case elfcpp::R_ARM_THM_XPC22: 10577 case elfcpp::R_ARM_THM_JUMP24: 10578 reloc_status = 10579 Arm_relocate_functions<big_endian>::thumb_branch_common( 10580 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit, 10581 false); 10582 break; 10583 10584 case elfcpp::R_ARM_PLT32: 10585 case elfcpp::R_ARM_CALL: 10586 case elfcpp::R_ARM_JUMP24: 10587 case elfcpp::R_ARM_XPC25: 10588 reloc_status = 10589 Arm_relocate_functions<big_endian>::arm_branch_common( 10590 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit, 10591 false); 10592 break; 10593 10594 case elfcpp::R_ARM_THM_JUMP19: 10595 reloc_status = 10596 Arm_relocate_functions<big_endian>::thm_jump19(paddend, object, 10597 psymval, 0, thumb_bit); 10598 break; 10599 10600 case elfcpp::R_ARM_THM_JUMP6: 10601 reloc_status = 10602 Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval, 10603 0); 10604 break; 10605 10606 case elfcpp::R_ARM_THM_JUMP8: 10607 reloc_status = 10608 Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval, 10609 0); 10610 break; 10611 10612 case elfcpp::R_ARM_THM_JUMP11: 10613 reloc_status = 10614 Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval, 10615 0); 10616 break; 10617 10618 case elfcpp::R_ARM_PREL31: 10619 reloc_status = 10620 Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0, 10621 thumb_bit); 10622 break; 10623 10624 case elfcpp::R_ARM_THM_PC8: 10625 reloc_status = 10626 Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval, 10627 0); 10628 break; 10629 10630 case elfcpp::R_ARM_THM_PC12: 10631 reloc_status = 10632 Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval, 10633 0); 10634 break; 10635 10636 case elfcpp::R_ARM_THM_ALU_PREL_11_0: 10637 reloc_status = 10638 Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval, 10639 0, thumb_bit); 10640 break; 10641 10642 // These relocation truncate relocation results so we cannot handle them 10643 // in a relocatable link. 10644 case elfcpp::R_ARM_MOVT_ABS: 10645 case elfcpp::R_ARM_THM_MOVT_ABS: 10646 case elfcpp::R_ARM_MOVT_PREL: 10647 case elfcpp::R_ARM_MOVT_BREL: 10648 case elfcpp::R_ARM_THM_MOVT_PREL: 10649 case elfcpp::R_ARM_THM_MOVT_BREL: 10650 case elfcpp::R_ARM_ALU_PC_G0_NC: 10651 case elfcpp::R_ARM_ALU_PC_G0: 10652 case elfcpp::R_ARM_ALU_PC_G1_NC: 10653 case elfcpp::R_ARM_ALU_PC_G1: 10654 case elfcpp::R_ARM_ALU_PC_G2: 10655 case elfcpp::R_ARM_ALU_SB_G0_NC: 10656 case elfcpp::R_ARM_ALU_SB_G0: 10657 case elfcpp::R_ARM_ALU_SB_G1_NC: 10658 case elfcpp::R_ARM_ALU_SB_G1: 10659 case elfcpp::R_ARM_ALU_SB_G2: 10660 case elfcpp::R_ARM_LDR_PC_G0: 10661 case elfcpp::R_ARM_LDR_PC_G1: 10662 case elfcpp::R_ARM_LDR_PC_G2: 10663 case elfcpp::R_ARM_LDR_SB_G0: 10664 case elfcpp::R_ARM_LDR_SB_G1: 10665 case elfcpp::R_ARM_LDR_SB_G2: 10666 case elfcpp::R_ARM_LDRS_PC_G0: 10667 case elfcpp::R_ARM_LDRS_PC_G1: 10668 case elfcpp::R_ARM_LDRS_PC_G2: 10669 case elfcpp::R_ARM_LDRS_SB_G0: 10670 case elfcpp::R_ARM_LDRS_SB_G1: 10671 case elfcpp::R_ARM_LDRS_SB_G2: 10672 case elfcpp::R_ARM_LDC_PC_G0: 10673 case elfcpp::R_ARM_LDC_PC_G1: 10674 case elfcpp::R_ARM_LDC_PC_G2: 10675 case elfcpp::R_ARM_LDC_SB_G0: 10676 case elfcpp::R_ARM_LDC_SB_G1: 10677 case elfcpp::R_ARM_LDC_SB_G2: 10678 gold_error(_("cannot handle %s in a relocatable link"), 10679 arp->name().c_str()); 10680 break; 10681 10682 default: 10683 gold_unreachable(); 10684 } 10685 10686 // Report any errors. 10687 switch (reloc_status) 10688 { 10689 case Arm_relocate_functions<big_endian>::STATUS_OKAY: 10690 break; 10691 case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW: 10692 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(), 10693 _("relocation overflow in %s"), 10694 arp->name().c_str()); 10695 break; 10696 case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC: 10697 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(), 10698 _("unexpected opcode while processing relocation %s"), 10699 arp->name().c_str()); 10700 break; 10701 default: 10702 gold_unreachable(); 10703 } 10704} 10705 10706// Return the value to use for a dynamic symbol which requires special 10707// treatment. This is how we support equality comparisons of function 10708// pointers across shared library boundaries, as described in the 10709// processor specific ABI supplement. 10710 10711template<bool big_endian> 10712uint64_t 10713Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const 10714{ 10715 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset()); 10716 return this->plt_address_for_global(gsym); 10717} 10718 10719// Map platform-specific relocs to real relocs 10720// 10721template<bool big_endian> 10722unsigned int 10723Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type) const 10724{ 10725 switch (r_type) 10726 { 10727 case elfcpp::R_ARM_TARGET1: 10728 return this->target1_reloc_; 10729 10730 case elfcpp::R_ARM_TARGET2: 10731 return this->target2_reloc_; 10732 10733 default: 10734 return r_type; 10735 } 10736} 10737 10738// Whether if two EABI versions V1 and V2 are compatible. 10739 10740template<bool big_endian> 10741bool 10742Target_arm<big_endian>::are_eabi_versions_compatible( 10743 elfcpp::Elf_Word v1, 10744 elfcpp::Elf_Word v2) 10745{ 10746 // v4 and v5 are the same spec before and after it was released, 10747 // so allow mixing them. 10748 if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN) 10749 || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5) 10750 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4)) 10751 return true; 10752 10753 return v1 == v2; 10754} 10755 10756// Combine FLAGS from an input object called NAME and the processor-specific 10757// flags in the ELF header of the output. Much of this is adapted from the 10758// processor-specific flags merging code in elf32_arm_merge_private_bfd_data 10759// in bfd/elf32-arm.c. 10760 10761template<bool big_endian> 10762void 10763Target_arm<big_endian>::merge_processor_specific_flags( 10764 const std::string& name, 10765 elfcpp::Elf_Word flags) 10766{ 10767 if (this->are_processor_specific_flags_set()) 10768 { 10769 elfcpp::Elf_Word out_flags = this->processor_specific_flags(); 10770 10771 // Nothing to merge if flags equal to those in output. 10772 if (flags == out_flags) 10773 return; 10774 10775 // Complain about various flag mismatches. 10776 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags); 10777 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags); 10778 if (!this->are_eabi_versions_compatible(version1, version2) 10779 && parameters->options().warn_mismatch()) 10780 gold_error(_("Source object %s has EABI version %d but output has " 10781 "EABI version %d."), 10782 name.c_str(), 10783 (flags & elfcpp::EF_ARM_EABIMASK) >> 24, 10784 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24); 10785 } 10786 else 10787 { 10788 // If the input is the default architecture and had the default 10789 // flags then do not bother setting the flags for the output 10790 // architecture, instead allow future merges to do this. If no 10791 // future merges ever set these flags then they will retain their 10792 // uninitialised values, which surprise surprise, correspond 10793 // to the default values. 10794 if (flags == 0) 10795 return; 10796 10797 // This is the first time, just copy the flags. 10798 // We only copy the EABI version for now. 10799 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK); 10800 } 10801} 10802 10803// Adjust ELF file header. 10804template<bool big_endian> 10805void 10806Target_arm<big_endian>::do_adjust_elf_header( 10807 unsigned char* view, 10808 int len) 10809{ 10810 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size); 10811 10812 elfcpp::Ehdr<32, big_endian> ehdr(view); 10813 elfcpp::Elf_Word flags = this->processor_specific_flags(); 10814 unsigned char e_ident[elfcpp::EI_NIDENT]; 10815 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT); 10816 10817 if (elfcpp::arm_eabi_version(flags) 10818 == elfcpp::EF_ARM_EABI_UNKNOWN) 10819 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM; 10820 else 10821 e_ident[elfcpp::EI_OSABI] = 0; 10822 e_ident[elfcpp::EI_ABIVERSION] = 0; 10823 10824 // Do EF_ARM_BE8 adjustment. 10825 if (parameters->options().be8() && !big_endian) 10826 gold_error("BE8 images only valid in big-endian mode."); 10827 if (parameters->options().be8()) 10828 { 10829 flags |= elfcpp::EF_ARM_BE8; 10830 this->set_processor_specific_flags(flags); 10831 } 10832 10833 // If we're working in EABI_VER5, set the hard/soft float ABI flags 10834 // as appropriate. 10835 if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5) 10836 { 10837 elfcpp::Elf_Half type = ehdr.get_e_type(); 10838 if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN) 10839 { 10840 Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args); 10841 if (attr->int_value() == elfcpp::AEABI_VFP_args_vfp) 10842 flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD; 10843 else 10844 flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT; 10845 this->set_processor_specific_flags(flags); 10846 } 10847 } 10848 elfcpp::Ehdr_write<32, big_endian> oehdr(view); 10849 oehdr.put_e_ident(e_ident); 10850 oehdr.put_e_flags(this->processor_specific_flags()); 10851} 10852 10853// do_make_elf_object to override the same function in the base class. 10854// We need to use a target-specific sub-class of 10855// Sized_relobj_file<32, big_endian> to store ARM specific information. 10856// Hence we need to have our own ELF object creation. 10857 10858template<bool big_endian> 10859Object* 10860Target_arm<big_endian>::do_make_elf_object( 10861 const std::string& name, 10862 Input_file* input_file, 10863 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr) 10864{ 10865 int et = ehdr.get_e_type(); 10866 // ET_EXEC files are valid input for --just-symbols/-R, 10867 // and we treat them as relocatable objects. 10868 if (et == elfcpp::ET_REL 10869 || (et == elfcpp::ET_EXEC && input_file->just_symbols())) 10870 { 10871 Arm_relobj<big_endian>* obj = 10872 new Arm_relobj<big_endian>(name, input_file, offset, ehdr); 10873 obj->setup(); 10874 return obj; 10875 } 10876 else if (et == elfcpp::ET_DYN) 10877 { 10878 Sized_dynobj<32, big_endian>* obj = 10879 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr); 10880 obj->setup(); 10881 return obj; 10882 } 10883 else 10884 { 10885 gold_error(_("%s: unsupported ELF file type %d"), 10886 name.c_str(), et); 10887 return NULL; 10888 } 10889} 10890 10891// Read the architecture from the Tag_also_compatible_with attribute, if any. 10892// Returns -1 if no architecture could be read. 10893// This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c. 10894 10895template<bool big_endian> 10896int 10897Target_arm<big_endian>::get_secondary_compatible_arch( 10898 const Attributes_section_data* pasd) 10899{ 10900 const Object_attribute* known_attributes = 10901 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC); 10902 10903 // Note: the tag and its argument below are uleb128 values, though 10904 // currently-defined values fit in one byte for each. 10905 const std::string& sv = 10906 known_attributes[elfcpp::Tag_also_compatible_with].string_value(); 10907 if (sv.size() == 2 10908 && sv.data()[0] == elfcpp::Tag_CPU_arch 10909 && (sv.data()[1] & 128) != 128) 10910 return sv.data()[1]; 10911 10912 // This tag is "safely ignorable", so don't complain if it looks funny. 10913 return -1; 10914} 10915 10916// Set, or unset, the architecture of the Tag_also_compatible_with attribute. 10917// The tag is removed if ARCH is -1. 10918// This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c. 10919 10920template<bool big_endian> 10921void 10922Target_arm<big_endian>::set_secondary_compatible_arch( 10923 Attributes_section_data* pasd, 10924 int arch) 10925{ 10926 Object_attribute* known_attributes = 10927 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC); 10928 10929 if (arch == -1) 10930 { 10931 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(""); 10932 return; 10933 } 10934 10935 // Note: the tag and its argument below are uleb128 values, though 10936 // currently-defined values fit in one byte for each. 10937 char sv[3]; 10938 sv[0] = elfcpp::Tag_CPU_arch; 10939 gold_assert(arch != 0); 10940 sv[1] = arch; 10941 sv[2] = '\0'; 10942 10943 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv); 10944} 10945 10946// Combine two values for Tag_CPU_arch, taking secondary compatibility tags 10947// into account. 10948// This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c. 10949 10950template<bool big_endian> 10951int 10952Target_arm<big_endian>::tag_cpu_arch_combine( 10953 const char* name, 10954 int oldtag, 10955 int* secondary_compat_out, 10956 int newtag, 10957 int secondary_compat) 10958{ 10959#define T(X) elfcpp::TAG_CPU_ARCH_##X 10960 static const int v6t2[] = 10961 { 10962 T(V6T2), // PRE_V4. 10963 T(V6T2), // V4. 10964 T(V6T2), // V4T. 10965 T(V6T2), // V5T. 10966 T(V6T2), // V5TE. 10967 T(V6T2), // V5TEJ. 10968 T(V6T2), // V6. 10969 T(V7), // V6KZ. 10970 T(V6T2) // V6T2. 10971 }; 10972 static const int v6k[] = 10973 { 10974 T(V6K), // PRE_V4. 10975 T(V6K), // V4. 10976 T(V6K), // V4T. 10977 T(V6K), // V5T. 10978 T(V6K), // V5TE. 10979 T(V6K), // V5TEJ. 10980 T(V6K), // V6. 10981 T(V6KZ), // V6KZ. 10982 T(V7), // V6T2. 10983 T(V6K) // V6K. 10984 }; 10985 static const int v7[] = 10986 { 10987 T(V7), // PRE_V4. 10988 T(V7), // V4. 10989 T(V7), // V4T. 10990 T(V7), // V5T. 10991 T(V7), // V5TE. 10992 T(V7), // V5TEJ. 10993 T(V7), // V6. 10994 T(V7), // V6KZ. 10995 T(V7), // V6T2. 10996 T(V7), // V6K. 10997 T(V7) // V7. 10998 }; 10999 static const int v6_m[] = 11000 { 11001 -1, // PRE_V4. 11002 -1, // V4. 11003 T(V6K), // V4T. 11004 T(V6K), // V5T. 11005 T(V6K), // V5TE. 11006 T(V6K), // V5TEJ. 11007 T(V6K), // V6. 11008 T(V6KZ), // V6KZ. 11009 T(V7), // V6T2. 11010 T(V6K), // V6K. 11011 T(V7), // V7. 11012 T(V6_M) // V6_M. 11013 }; 11014 static const int v6s_m[] = 11015 { 11016 -1, // PRE_V4. 11017 -1, // V4. 11018 T(V6K), // V4T. 11019 T(V6K), // V5T. 11020 T(V6K), // V5TE. 11021 T(V6K), // V5TEJ. 11022 T(V6K), // V6. 11023 T(V6KZ), // V6KZ. 11024 T(V7), // V6T2. 11025 T(V6K), // V6K. 11026 T(V7), // V7. 11027 T(V6S_M), // V6_M. 11028 T(V6S_M) // V6S_M. 11029 }; 11030 static const int v7e_m[] = 11031 { 11032 -1, // PRE_V4. 11033 -1, // V4. 11034 T(V7E_M), // V4T. 11035 T(V7E_M), // V5T. 11036 T(V7E_M), // V5TE. 11037 T(V7E_M), // V5TEJ. 11038 T(V7E_M), // V6. 11039 T(V7E_M), // V6KZ. 11040 T(V7E_M), // V6T2. 11041 T(V7E_M), // V6K. 11042 T(V7E_M), // V7. 11043 T(V7E_M), // V6_M. 11044 T(V7E_M), // V6S_M. 11045 T(V7E_M) // V7E_M. 11046 }; 11047 static const int v8[] = 11048 { 11049 T(V8), // PRE_V4. 11050 T(V8), // V4. 11051 T(V8), // V4T. 11052 T(V8), // V5T. 11053 T(V8), // V5TE. 11054 T(V8), // V5TEJ. 11055 T(V8), // V6. 11056 T(V8), // V6KZ. 11057 T(V8), // V6T2. 11058 T(V8), // V6K. 11059 T(V8), // V7. 11060 T(V8), // V6_M. 11061 T(V8), // V6S_M. 11062 T(V8), // V7E_M. 11063 T(V8) // V8. 11064 }; 11065 static const int v4t_plus_v6_m[] = 11066 { 11067 -1, // PRE_V4. 11068 -1, // V4. 11069 T(V4T), // V4T. 11070 T(V5T), // V5T. 11071 T(V5TE), // V5TE. 11072 T(V5TEJ), // V5TEJ. 11073 T(V6), // V6. 11074 T(V6KZ), // V6KZ. 11075 T(V6T2), // V6T2. 11076 T(V6K), // V6K. 11077 T(V7), // V7. 11078 T(V6_M), // V6_M. 11079 T(V6S_M), // V6S_M. 11080 T(V7E_M), // V7E_M. 11081 T(V8), // V8. 11082 T(V4T_PLUS_V6_M) // V4T plus V6_M. 11083 }; 11084 static const int* comb[] = 11085 { 11086 v6t2, 11087 v6k, 11088 v7, 11089 v6_m, 11090 v6s_m, 11091 v7e_m, 11092 v8, 11093 // Pseudo-architecture. 11094 v4t_plus_v6_m 11095 }; 11096 11097 // Check we've not got a higher architecture than we know about. 11098 11099 if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH) 11100 { 11101 gold_error(_("%s: unknown CPU architecture"), name); 11102 return -1; 11103 } 11104 11105 // Override old tag if we have a Tag_also_compatible_with on the output. 11106 11107 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) 11108 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) 11109 oldtag = T(V4T_PLUS_V6_M); 11110 11111 // And override the new tag if we have a Tag_also_compatible_with on the 11112 // input. 11113 11114 if ((newtag == T(V6_M) && secondary_compat == T(V4T)) 11115 || (newtag == T(V4T) && secondary_compat == T(V6_M))) 11116 newtag = T(V4T_PLUS_V6_M); 11117 11118 // Architectures before V6KZ add features monotonically. 11119 int tagh = std::max(oldtag, newtag); 11120 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ) 11121 return tagh; 11122 11123 int tagl = std::min(oldtag, newtag); 11124 int result = comb[tagh - T(V6T2)][tagl]; 11125 11126 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) 11127 // as the canonical version. 11128 if (result == T(V4T_PLUS_V6_M)) 11129 { 11130 result = T(V4T); 11131 *secondary_compat_out = T(V6_M); 11132 } 11133 else 11134 *secondary_compat_out = -1; 11135 11136 if (result == -1) 11137 { 11138 gold_error(_("%s: conflicting CPU architectures %d/%d"), 11139 name, oldtag, newtag); 11140 return -1; 11141 } 11142 11143 return result; 11144#undef T 11145} 11146 11147// Helper to print AEABI enum tag value. 11148 11149template<bool big_endian> 11150std::string 11151Target_arm<big_endian>::aeabi_enum_name(unsigned int value) 11152{ 11153 static const char* aeabi_enum_names[] = 11154 { "", "variable-size", "32-bit", "" }; 11155 const size_t aeabi_enum_names_size = 11156 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]); 11157 11158 if (value < aeabi_enum_names_size) 11159 return std::string(aeabi_enum_names[value]); 11160 else 11161 { 11162 char buffer[100]; 11163 sprintf(buffer, "<unknown value %u>", value); 11164 return std::string(buffer); 11165 } 11166} 11167 11168// Return the string value to store in TAG_CPU_name. 11169 11170template<bool big_endian> 11171std::string 11172Target_arm<big_endian>::tag_cpu_name_value(unsigned int value) 11173{ 11174 static const char* name_table[] = { 11175 // These aren't real CPU names, but we can't guess 11176 // that from the architecture version alone. 11177 "Pre v4", 11178 "ARM v4", 11179 "ARM v4T", 11180 "ARM v5T", 11181 "ARM v5TE", 11182 "ARM v5TEJ", 11183 "ARM v6", 11184 "ARM v6KZ", 11185 "ARM v6T2", 11186 "ARM v6K", 11187 "ARM v7", 11188 "ARM v6-M", 11189 "ARM v6S-M", 11190 "ARM v7E-M", 11191 "ARM v8" 11192 }; 11193 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]); 11194 11195 if (value < name_table_size) 11196 return std::string(name_table[value]); 11197 else 11198 { 11199 char buffer[100]; 11200 sprintf(buffer, "<unknown CPU value %u>", value); 11201 return std::string(buffer); 11202 } 11203} 11204 11205// Query attributes object to see if integer divide instructions may be 11206// present in an object. 11207 11208template<bool big_endian> 11209bool 11210Target_arm<big_endian>::attributes_accept_div(int arch, int profile, 11211 const Object_attribute* div_attr) 11212{ 11213 switch (div_attr->int_value()) 11214 { 11215 case 0: 11216 // Integer divide allowed if instruction contained in 11217 // architecture. 11218 if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M')) 11219 return true; 11220 else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M) 11221 return true; 11222 else 11223 return false; 11224 11225 case 1: 11226 // Integer divide explicitly prohibited. 11227 return false; 11228 11229 default: 11230 // Unrecognised case - treat as allowing divide everywhere. 11231 case 2: 11232 // Integer divide allowed in ARM state. 11233 return true; 11234 } 11235} 11236 11237// Query attributes object to see if integer divide instructions are 11238// forbidden to be in the object. This is not the inverse of 11239// attributes_accept_div. 11240 11241template<bool big_endian> 11242bool 11243Target_arm<big_endian>::attributes_forbid_div(const Object_attribute* div_attr) 11244{ 11245 return div_attr->int_value() == 1; 11246} 11247 11248// Merge object attributes from input file called NAME with those of the 11249// output. The input object attributes are in the object pointed by PASD. 11250 11251template<bool big_endian> 11252void 11253Target_arm<big_endian>::merge_object_attributes( 11254 const char* name, 11255 const Attributes_section_data* pasd) 11256{ 11257 // Return if there is no attributes section data. 11258 if (pasd == NULL) 11259 return; 11260 11261 // If output has no object attributes, just copy. 11262 const int vendor = Object_attribute::OBJ_ATTR_PROC; 11263 if (this->attributes_section_data_ == NULL) 11264 { 11265 this->attributes_section_data_ = new Attributes_section_data(*pasd); 11266 Object_attribute* out_attr = 11267 this->attributes_section_data_->known_attributes(vendor); 11268 11269 // We do not output objects with Tag_MPextension_use_legacy - we move 11270 // the attribute's value to Tag_MPextension_use. */ 11271 if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0) 11272 { 11273 if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0 11274 && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() 11275 != out_attr[elfcpp::Tag_MPextension_use].int_value()) 11276 { 11277 gold_error(_("%s has both the current and legacy " 11278 "Tag_MPextension_use attributes"), 11279 name); 11280 } 11281 11282 out_attr[elfcpp::Tag_MPextension_use] = 11283 out_attr[elfcpp::Tag_MPextension_use_legacy]; 11284 out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0); 11285 out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0); 11286 } 11287 11288 return; 11289 } 11290 11291 const Object_attribute* in_attr = pasd->known_attributes(vendor); 11292 Object_attribute* out_attr = 11293 this->attributes_section_data_->known_attributes(vendor); 11294 11295 // This needs to happen before Tag_ABI_FP_number_model is merged. */ 11296 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value() 11297 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value()) 11298 { 11299 // Ignore mismatches if the object doesn't use floating point. */ 11300 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value() 11301 == elfcpp::AEABI_FP_number_model_none 11302 || (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() 11303 != elfcpp::AEABI_FP_number_model_none 11304 && out_attr[elfcpp::Tag_ABI_VFP_args].int_value() 11305 == elfcpp::AEABI_VFP_args_compatible)) 11306 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value( 11307 in_attr[elfcpp::Tag_ABI_VFP_args].int_value()); 11308 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value() 11309 != elfcpp::AEABI_FP_number_model_none 11310 && in_attr[elfcpp::Tag_ABI_VFP_args].int_value() 11311 != elfcpp::AEABI_VFP_args_compatible 11312 && parameters->options().warn_mismatch()) 11313 gold_error(_("%s uses VFP register arguments, output does not"), 11314 name); 11315 } 11316 11317 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i) 11318 { 11319 // Merge this attribute with existing attributes. 11320 switch (i) 11321 { 11322 case elfcpp::Tag_CPU_raw_name: 11323 case elfcpp::Tag_CPU_name: 11324 // These are merged after Tag_CPU_arch. 11325 break; 11326 11327 case elfcpp::Tag_ABI_optimization_goals: 11328 case elfcpp::Tag_ABI_FP_optimization_goals: 11329 // Use the first value seen. 11330 break; 11331 11332 case elfcpp::Tag_CPU_arch: 11333 { 11334 unsigned int saved_out_attr = out_attr->int_value(); 11335 // Merge Tag_CPU_arch and Tag_also_compatible_with. 11336 int secondary_compat = 11337 this->get_secondary_compatible_arch(pasd); 11338 int secondary_compat_out = 11339 this->get_secondary_compatible_arch( 11340 this->attributes_section_data_); 11341 out_attr[i].set_int_value( 11342 tag_cpu_arch_combine(name, out_attr[i].int_value(), 11343 &secondary_compat_out, 11344 in_attr[i].int_value(), 11345 secondary_compat)); 11346 this->set_secondary_compatible_arch(this->attributes_section_data_, 11347 secondary_compat_out); 11348 11349 // Merge Tag_CPU_name and Tag_CPU_raw_name. 11350 if (out_attr[i].int_value() == saved_out_attr) 11351 ; // Leave the names alone. 11352 else if (out_attr[i].int_value() == in_attr[i].int_value()) 11353 { 11354 // The output architecture has been changed to match the 11355 // input architecture. Use the input names. 11356 out_attr[elfcpp::Tag_CPU_name].set_string_value( 11357 in_attr[elfcpp::Tag_CPU_name].string_value()); 11358 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value( 11359 in_attr[elfcpp::Tag_CPU_raw_name].string_value()); 11360 } 11361 else 11362 { 11363 out_attr[elfcpp::Tag_CPU_name].set_string_value(""); 11364 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(""); 11365 } 11366 11367 // If we still don't have a value for Tag_CPU_name, 11368 // make one up now. Tag_CPU_raw_name remains blank. 11369 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "") 11370 { 11371 const std::string cpu_name = 11372 this->tag_cpu_name_value(out_attr[i].int_value()); 11373 // FIXME: If we see an unknown CPU, this will be set 11374 // to "<unknown CPU n>", where n is the attribute value. 11375 // This is different from BFD, which leaves the name alone. 11376 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name); 11377 } 11378 } 11379 break; 11380 11381 case elfcpp::Tag_ARM_ISA_use: 11382 case elfcpp::Tag_THUMB_ISA_use: 11383 case elfcpp::Tag_WMMX_arch: 11384 case elfcpp::Tag_Advanced_SIMD_arch: 11385 // ??? Do Advanced_SIMD (NEON) and WMMX conflict? 11386 case elfcpp::Tag_ABI_FP_rounding: 11387 case elfcpp::Tag_ABI_FP_exceptions: 11388 case elfcpp::Tag_ABI_FP_user_exceptions: 11389 case elfcpp::Tag_ABI_FP_number_model: 11390 case elfcpp::Tag_VFP_HP_extension: 11391 case elfcpp::Tag_CPU_unaligned_access: 11392 case elfcpp::Tag_T2EE_use: 11393 case elfcpp::Tag_Virtualization_use: 11394 case elfcpp::Tag_MPextension_use: 11395 // Use the largest value specified. 11396 if (in_attr[i].int_value() > out_attr[i].int_value()) 11397 out_attr[i].set_int_value(in_attr[i].int_value()); 11398 break; 11399 11400 case elfcpp::Tag_ABI_align8_preserved: 11401 case elfcpp::Tag_ABI_PCS_RO_data: 11402 // Use the smallest value specified. 11403 if (in_attr[i].int_value() < out_attr[i].int_value()) 11404 out_attr[i].set_int_value(in_attr[i].int_value()); 11405 break; 11406 11407 case elfcpp::Tag_ABI_align8_needed: 11408 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0) 11409 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0 11410 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value() 11411 == 0))) 11412 { 11413 // This error message should be enabled once all non-conforming 11414 // binaries in the toolchain have had the attributes set 11415 // properly. 11416 // gold_error(_("output 8-byte data alignment conflicts with %s"), 11417 // name); 11418 } 11419 // Fall through. 11420 case elfcpp::Tag_ABI_FP_denormal: 11421 case elfcpp::Tag_ABI_PCS_GOT_use: 11422 { 11423 // These tags have 0 = don't care, 1 = strong requirement, 11424 // 2 = weak requirement. 11425 static const int order_021[3] = {0, 2, 1}; 11426 11427 // Use the "greatest" from the sequence 0, 2, 1, or the largest 11428 // value if greater than 2 (for future-proofing). 11429 if ((in_attr[i].int_value() > 2 11430 && in_attr[i].int_value() > out_attr[i].int_value()) 11431 || (in_attr[i].int_value() <= 2 11432 && out_attr[i].int_value() <= 2 11433 && (order_021[in_attr[i].int_value()] 11434 > order_021[out_attr[i].int_value()]))) 11435 out_attr[i].set_int_value(in_attr[i].int_value()); 11436 } 11437 break; 11438 11439 case elfcpp::Tag_CPU_arch_profile: 11440 if (out_attr[i].int_value() != in_attr[i].int_value()) 11441 { 11442 // 0 will merge with anything. 11443 // 'A' and 'S' merge to 'A'. 11444 // 'R' and 'S' merge to 'R'. 11445 // 'M' and 'A|R|S' is an error. 11446 if (out_attr[i].int_value() == 0 11447 || (out_attr[i].int_value() == 'S' 11448 && (in_attr[i].int_value() == 'A' 11449 || in_attr[i].int_value() == 'R'))) 11450 out_attr[i].set_int_value(in_attr[i].int_value()); 11451 else if (in_attr[i].int_value() == 0 11452 || (in_attr[i].int_value() == 'S' 11453 && (out_attr[i].int_value() == 'A' 11454 || out_attr[i].int_value() == 'R'))) 11455 ; // Do nothing. 11456 else if (parameters->options().warn_mismatch()) 11457 { 11458 gold_error 11459 (_("conflicting architecture profiles %c/%c"), 11460 in_attr[i].int_value() ? in_attr[i].int_value() : '0', 11461 out_attr[i].int_value() ? out_attr[i].int_value() : '0'); 11462 } 11463 } 11464 break; 11465 case elfcpp::Tag_VFP_arch: 11466 { 11467 static const struct 11468 { 11469 int ver; 11470 int regs; 11471 } vfp_versions[7] = 11472 { 11473 {0, 0}, 11474 {1, 16}, 11475 {2, 16}, 11476 {3, 32}, 11477 {3, 16}, 11478 {4, 32}, 11479 {4, 16} 11480 }; 11481 11482 // Values greater than 6 aren't defined, so just pick the 11483 // biggest. 11484 if (in_attr[i].int_value() > 6 11485 && in_attr[i].int_value() > out_attr[i].int_value()) 11486 { 11487 *out_attr = *in_attr; 11488 break; 11489 } 11490 // The output uses the superset of input features 11491 // (ISA version) and registers. 11492 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver, 11493 vfp_versions[out_attr[i].int_value()].ver); 11494 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs, 11495 vfp_versions[out_attr[i].int_value()].regs); 11496 // This assumes all possible supersets are also a valid 11497 // options. 11498 int newval; 11499 for (newval = 6; newval > 0; newval--) 11500 { 11501 if (regs == vfp_versions[newval].regs 11502 && ver == vfp_versions[newval].ver) 11503 break; 11504 } 11505 out_attr[i].set_int_value(newval); 11506 } 11507 break; 11508 case elfcpp::Tag_PCS_config: 11509 if (out_attr[i].int_value() == 0) 11510 out_attr[i].set_int_value(in_attr[i].int_value()); 11511 else if (in_attr[i].int_value() != 0 11512 && out_attr[i].int_value() != 0 11513 && parameters->options().warn_mismatch()) 11514 { 11515 // It's sometimes ok to mix different configs, so this is only 11516 // a warning. 11517 gold_warning(_("%s: conflicting platform configuration"), name); 11518 } 11519 break; 11520 case elfcpp::Tag_ABI_PCS_R9_use: 11521 if (in_attr[i].int_value() != out_attr[i].int_value() 11522 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused 11523 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused 11524 && parameters->options().warn_mismatch()) 11525 { 11526 gold_error(_("%s: conflicting use of R9"), name); 11527 } 11528 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused) 11529 out_attr[i].set_int_value(in_attr[i].int_value()); 11530 break; 11531 case elfcpp::Tag_ABI_PCS_RW_data: 11532 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel 11533 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value() 11534 != elfcpp::AEABI_R9_SB) 11535 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value() 11536 != elfcpp::AEABI_R9_unused) 11537 && parameters->options().warn_mismatch()) 11538 { 11539 gold_error(_("%s: SB relative addressing conflicts with use " 11540 "of R9"), 11541 name); 11542 } 11543 // Use the smallest value specified. 11544 if (in_attr[i].int_value() < out_attr[i].int_value()) 11545 out_attr[i].set_int_value(in_attr[i].int_value()); 11546 break; 11547 case elfcpp::Tag_ABI_PCS_wchar_t: 11548 if (out_attr[i].int_value() 11549 && in_attr[i].int_value() 11550 && out_attr[i].int_value() != in_attr[i].int_value() 11551 && parameters->options().warn_mismatch() 11552 && parameters->options().wchar_size_warning()) 11553 { 11554 gold_warning(_("%s uses %u-byte wchar_t yet the output is to " 11555 "use %u-byte wchar_t; use of wchar_t values " 11556 "across objects may fail"), 11557 name, in_attr[i].int_value(), 11558 out_attr[i].int_value()); 11559 } 11560 else if (in_attr[i].int_value() && !out_attr[i].int_value()) 11561 out_attr[i].set_int_value(in_attr[i].int_value()); 11562 break; 11563 case elfcpp::Tag_ABI_enum_size: 11564 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused) 11565 { 11566 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused 11567 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide) 11568 { 11569 // The existing object is compatible with anything. 11570 // Use whatever requirements the new object has. 11571 out_attr[i].set_int_value(in_attr[i].int_value()); 11572 } 11573 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide 11574 && out_attr[i].int_value() != in_attr[i].int_value() 11575 && parameters->options().warn_mismatch() 11576 && parameters->options().enum_size_warning()) 11577 { 11578 unsigned int in_value = in_attr[i].int_value(); 11579 unsigned int out_value = out_attr[i].int_value(); 11580 gold_warning(_("%s uses %s enums yet the output is to use " 11581 "%s enums; use of enum values across objects " 11582 "may fail"), 11583 name, 11584 this->aeabi_enum_name(in_value).c_str(), 11585 this->aeabi_enum_name(out_value).c_str()); 11586 } 11587 } 11588 break; 11589 case elfcpp::Tag_ABI_VFP_args: 11590 // Already done. 11591 break; 11592 case elfcpp::Tag_ABI_WMMX_args: 11593 if (in_attr[i].int_value() != out_attr[i].int_value() 11594 && parameters->options().warn_mismatch()) 11595 { 11596 gold_error(_("%s uses iWMMXt register arguments, output does " 11597 "not"), 11598 name); 11599 } 11600 break; 11601 case Object_attribute::Tag_compatibility: 11602 // Merged in target-independent code. 11603 break; 11604 case elfcpp::Tag_ABI_HardFP_use: 11605 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP). 11606 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2) 11607 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1)) 11608 out_attr[i].set_int_value(3); 11609 else if (in_attr[i].int_value() > out_attr[i].int_value()) 11610 out_attr[i].set_int_value(in_attr[i].int_value()); 11611 break; 11612 case elfcpp::Tag_ABI_FP_16bit_format: 11613 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0) 11614 { 11615 if (in_attr[i].int_value() != out_attr[i].int_value() 11616 && parameters->options().warn_mismatch()) 11617 gold_error(_("fp16 format mismatch between %s and output"), 11618 name); 11619 } 11620 if (in_attr[i].int_value() != 0) 11621 out_attr[i].set_int_value(in_attr[i].int_value()); 11622 break; 11623 11624 case elfcpp::Tag_DIV_use: 11625 { 11626 // A value of zero on input means that the divide 11627 // instruction may be used if available in the base 11628 // architecture as specified via Tag_CPU_arch and 11629 // Tag_CPU_arch_profile. A value of 1 means that the user 11630 // did not want divide instructions. A value of 2 11631 // explicitly means that divide instructions were allowed 11632 // in ARM and Thumb state. 11633 int arch = this-> 11634 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch)-> 11635 int_value(); 11636 int profile = this-> 11637 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile)-> 11638 int_value(); 11639 if (in_attr[i].int_value() == out_attr[i].int_value()) 11640 { 11641 // Do nothing. 11642 } 11643 else if (attributes_forbid_div(&in_attr[i]) 11644 && !attributes_accept_div(arch, profile, &out_attr[i])) 11645 out_attr[i].set_int_value(1); 11646 else if (attributes_forbid_div(&out_attr[i]) 11647 && attributes_accept_div(arch, profile, &in_attr[i])) 11648 out_attr[i].set_int_value(in_attr[i].int_value()); 11649 else if (in_attr[i].int_value() == 2) 11650 out_attr[i].set_int_value(in_attr[i].int_value()); 11651 } 11652 break; 11653 11654 case elfcpp::Tag_MPextension_use_legacy: 11655 // We don't output objects with Tag_MPextension_use_legacy - we 11656 // move the value to Tag_MPextension_use. 11657 if (in_attr[i].int_value() != 0 11658 && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0) 11659 { 11660 if (in_attr[elfcpp::Tag_MPextension_use].int_value() 11661 != in_attr[i].int_value()) 11662 { 11663 gold_error(_("%s has has both the current and legacy " 11664 "Tag_MPextension_use attributes"), 11665 name); 11666 } 11667 } 11668 11669 if (in_attr[i].int_value() 11670 > out_attr[elfcpp::Tag_MPextension_use].int_value()) 11671 out_attr[elfcpp::Tag_MPextension_use] = in_attr[i]; 11672 11673 break; 11674 11675 case elfcpp::Tag_nodefaults: 11676 // This tag is set if it exists, but the value is unused (and is 11677 // typically zero). We don't actually need to do anything here - 11678 // the merge happens automatically when the type flags are merged 11679 // below. 11680 break; 11681 case elfcpp::Tag_also_compatible_with: 11682 // Already done in Tag_CPU_arch. 11683 break; 11684 case elfcpp::Tag_conformance: 11685 // Keep the attribute if it matches. Throw it away otherwise. 11686 // No attribute means no claim to conform. 11687 if (in_attr[i].string_value() != out_attr[i].string_value()) 11688 out_attr[i].set_string_value(""); 11689 break; 11690 11691 default: 11692 { 11693 const char* err_object = NULL; 11694 11695 // The "known_obj_attributes" table does contain some undefined 11696 // attributes. Ensure that there are unused. 11697 if (out_attr[i].int_value() != 0 11698 || out_attr[i].string_value() != "") 11699 err_object = "output"; 11700 else if (in_attr[i].int_value() != 0 11701 || in_attr[i].string_value() != "") 11702 err_object = name; 11703 11704 if (err_object != NULL 11705 && parameters->options().warn_mismatch()) 11706 { 11707 // Attribute numbers >=64 (mod 128) can be safely ignored. 11708 if ((i & 127) < 64) 11709 gold_error(_("%s: unknown mandatory EABI object attribute " 11710 "%d"), 11711 err_object, i); 11712 else 11713 gold_warning(_("%s: unknown EABI object attribute %d"), 11714 err_object, i); 11715 } 11716 11717 // Only pass on attributes that match in both inputs. 11718 if (!in_attr[i].matches(out_attr[i])) 11719 { 11720 out_attr[i].set_int_value(0); 11721 out_attr[i].set_string_value(""); 11722 } 11723 } 11724 } 11725 11726 // If out_attr was copied from in_attr then it won't have a type yet. 11727 if (in_attr[i].type() && !out_attr[i].type()) 11728 out_attr[i].set_type(in_attr[i].type()); 11729 } 11730 11731 // Merge Tag_compatibility attributes and any common GNU ones. 11732 this->attributes_section_data_->merge(name, pasd); 11733 11734 // Check for any attributes not known on ARM. 11735 typedef Vendor_object_attributes::Other_attributes Other_attributes; 11736 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor); 11737 Other_attributes::const_iterator in_iter = in_other_attributes->begin(); 11738 Other_attributes* out_other_attributes = 11739 this->attributes_section_data_->other_attributes(vendor); 11740 Other_attributes::iterator out_iter = out_other_attributes->begin(); 11741 11742 while (in_iter != in_other_attributes->end() 11743 || out_iter != out_other_attributes->end()) 11744 { 11745 const char* err_object = NULL; 11746 int err_tag = 0; 11747 11748 // The tags for each list are in numerical order. 11749 // If the tags are equal, then merge. 11750 if (out_iter != out_other_attributes->end() 11751 && (in_iter == in_other_attributes->end() 11752 || in_iter->first > out_iter->first)) 11753 { 11754 // This attribute only exists in output. We can't merge, and we 11755 // don't know what the tag means, so delete it. 11756 err_object = "output"; 11757 err_tag = out_iter->first; 11758 int saved_tag = out_iter->first; 11759 delete out_iter->second; 11760 out_other_attributes->erase(out_iter); 11761 out_iter = out_other_attributes->upper_bound(saved_tag); 11762 } 11763 else if (in_iter != in_other_attributes->end() 11764 && (out_iter != out_other_attributes->end() 11765 || in_iter->first < out_iter->first)) 11766 { 11767 // This attribute only exists in input. We can't merge, and we 11768 // don't know what the tag means, so ignore it. 11769 err_object = name; 11770 err_tag = in_iter->first; 11771 ++in_iter; 11772 } 11773 else // The tags are equal. 11774 { 11775 // As present, all attributes in the list are unknown, and 11776 // therefore can't be merged meaningfully. 11777 err_object = "output"; 11778 err_tag = out_iter->first; 11779 11780 // Only pass on attributes that match in both inputs. 11781 if (!in_iter->second->matches(*(out_iter->second))) 11782 { 11783 // No match. Delete the attribute. 11784 int saved_tag = out_iter->first; 11785 delete out_iter->second; 11786 out_other_attributes->erase(out_iter); 11787 out_iter = out_other_attributes->upper_bound(saved_tag); 11788 } 11789 else 11790 { 11791 // Matched. Keep the attribute and move to the next. 11792 ++out_iter; 11793 ++in_iter; 11794 } 11795 } 11796 11797 if (err_object && parameters->options().warn_mismatch()) 11798 { 11799 // Attribute numbers >=64 (mod 128) can be safely ignored. */ 11800 if ((err_tag & 127) < 64) 11801 { 11802 gold_error(_("%s: unknown mandatory EABI object attribute %d"), 11803 err_object, err_tag); 11804 } 11805 else 11806 { 11807 gold_warning(_("%s: unknown EABI object attribute %d"), 11808 err_object, err_tag); 11809 } 11810 } 11811 } 11812} 11813 11814// Stub-generation methods for Target_arm. 11815 11816// Make a new Arm_input_section object. 11817 11818template<bool big_endian> 11819Arm_input_section<big_endian>* 11820Target_arm<big_endian>::new_arm_input_section( 11821 Relobj* relobj, 11822 unsigned int shndx) 11823{ 11824 Section_id sid(relobj, shndx); 11825 11826 Arm_input_section<big_endian>* arm_input_section = 11827 new Arm_input_section<big_endian>(relobj, shndx); 11828 arm_input_section->init(); 11829 11830 // Register new Arm_input_section in map for look-up. 11831 std::pair<typename Arm_input_section_map::iterator, bool> ins = 11832 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section)); 11833 11834 // Make sure that it we have not created another Arm_input_section 11835 // for this input section already. 11836 gold_assert(ins.second); 11837 11838 return arm_input_section; 11839} 11840 11841// Find the Arm_input_section object corresponding to the SHNDX-th input 11842// section of RELOBJ. 11843 11844template<bool big_endian> 11845Arm_input_section<big_endian>* 11846Target_arm<big_endian>::find_arm_input_section( 11847 Relobj* relobj, 11848 unsigned int shndx) const 11849{ 11850 Section_id sid(relobj, shndx); 11851 typename Arm_input_section_map::const_iterator p = 11852 this->arm_input_section_map_.find(sid); 11853 return (p != this->arm_input_section_map_.end()) ? p->second : NULL; 11854} 11855 11856// Make a new stub table. 11857 11858template<bool big_endian> 11859Stub_table<big_endian>* 11860Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner) 11861{ 11862 Stub_table<big_endian>* stub_table = 11863 new Stub_table<big_endian>(owner); 11864 this->stub_tables_.push_back(stub_table); 11865 11866 stub_table->set_address(owner->address() + owner->data_size()); 11867 stub_table->set_file_offset(owner->offset() + owner->data_size()); 11868 stub_table->finalize_data_size(); 11869 11870 return stub_table; 11871} 11872 11873// Scan a relocation for stub generation. 11874 11875template<bool big_endian> 11876void 11877Target_arm<big_endian>::scan_reloc_for_stub( 11878 const Relocate_info<32, big_endian>* relinfo, 11879 unsigned int r_type, 11880 const Sized_symbol<32>* gsym, 11881 unsigned int r_sym, 11882 const Symbol_value<32>* psymval, 11883 elfcpp::Elf_types<32>::Elf_Swxword addend, 11884 Arm_address address) 11885{ 11886 const Arm_relobj<big_endian>* arm_relobj = 11887 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 11888 11889 bool target_is_thumb; 11890 Symbol_value<32> symval; 11891 if (gsym != NULL) 11892 { 11893 // This is a global symbol. Determine if we use PLT and if the 11894 // final target is THUMB. 11895 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type))) 11896 { 11897 // This uses a PLT, change the symbol value. 11898 symval.set_output_value(this->plt_address_for_global(gsym)); 11899 psymval = &symval; 11900 target_is_thumb = false; 11901 } 11902 else if (gsym->is_undefined()) 11903 // There is no need to generate a stub symbol is undefined. 11904 return; 11905 else 11906 { 11907 target_is_thumb = 11908 ((gsym->type() == elfcpp::STT_ARM_TFUNC) 11909 || (gsym->type() == elfcpp::STT_FUNC 11910 && !gsym->is_undefined() 11911 && ((psymval->value(arm_relobj, 0) & 1) != 0))); 11912 } 11913 } 11914 else 11915 { 11916 // This is a local symbol. Determine if the final target is THUMB. 11917 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym); 11918 } 11919 11920 // Strip LSB if this points to a THUMB target. 11921 const Arm_reloc_property* reloc_property = 11922 arm_reloc_property_table->get_implemented_static_reloc_property(r_type); 11923 gold_assert(reloc_property != NULL); 11924 if (target_is_thumb 11925 && reloc_property->uses_thumb_bit() 11926 && ((psymval->value(arm_relobj, 0) & 1) != 0)) 11927 { 11928 Arm_address stripped_value = 11929 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1); 11930 symval.set_output_value(stripped_value); 11931 psymval = &symval; 11932 } 11933 11934 // Get the symbol value. 11935 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0); 11936 11937 // Owing to pipelining, the PC relative branches below actually skip 11938 // two instructions when the branch offset is 0. 11939 Arm_address destination; 11940 switch (r_type) 11941 { 11942 case elfcpp::R_ARM_CALL: 11943 case elfcpp::R_ARM_JUMP24: 11944 case elfcpp::R_ARM_PLT32: 11945 // ARM branches. 11946 destination = value + addend + 8; 11947 break; 11948 case elfcpp::R_ARM_THM_CALL: 11949 case elfcpp::R_ARM_THM_XPC22: 11950 case elfcpp::R_ARM_THM_JUMP24: 11951 case elfcpp::R_ARM_THM_JUMP19: 11952 // THUMB branches. 11953 destination = value + addend + 4; 11954 break; 11955 default: 11956 gold_unreachable(); 11957 } 11958 11959 Reloc_stub* stub = NULL; 11960 Stub_type stub_type = 11961 Reloc_stub::stub_type_for_reloc(r_type, address, destination, 11962 target_is_thumb); 11963 if (stub_type != arm_stub_none) 11964 { 11965 // Try looking up an existing stub from a stub table. 11966 Stub_table<big_endian>* stub_table = 11967 arm_relobj->stub_table(relinfo->data_shndx); 11968 gold_assert(stub_table != NULL); 11969 11970 // Locate stub by destination. 11971 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend); 11972 11973 // Create a stub if there is not one already 11974 stub = stub_table->find_reloc_stub(stub_key); 11975 if (stub == NULL) 11976 { 11977 // create a new stub and add it to stub table. 11978 stub = this->stub_factory().make_reloc_stub(stub_type); 11979 stub_table->add_reloc_stub(stub, stub_key); 11980 } 11981 11982 // Record the destination address. 11983 stub->set_destination_address(destination 11984 | (target_is_thumb ? 1 : 0)); 11985 } 11986 11987 // For Cortex-A8, we need to record a relocation at 4K page boundary. 11988 if (this->fix_cortex_a8_ 11989 && (r_type == elfcpp::R_ARM_THM_JUMP24 11990 || r_type == elfcpp::R_ARM_THM_JUMP19 11991 || r_type == elfcpp::R_ARM_THM_CALL 11992 || r_type == elfcpp::R_ARM_THM_XPC22) 11993 && (address & 0xfffU) == 0xffeU) 11994 { 11995 // Found a candidate. Note we haven't checked the destination is 11996 // within 4K here: if we do so (and don't create a record) we can't 11997 // tell that a branch should have been relocated when scanning later. 11998 this->cortex_a8_relocs_info_[address] = 11999 new Cortex_a8_reloc(stub, r_type, 12000 destination | (target_is_thumb ? 1 : 0)); 12001 } 12002} 12003 12004// This function scans a relocation sections for stub generation. 12005// The template parameter Relocate must be a class type which provides 12006// a single function, relocate(), which implements the machine 12007// specific part of a relocation. 12008 12009// BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type: 12010// SHT_REL or SHT_RELA. 12011 12012// PRELOCS points to the relocation data. RELOC_COUNT is the number 12013// of relocs. OUTPUT_SECTION is the output section. 12014// NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be 12015// mapped to output offsets. 12016 12017// VIEW is the section data, VIEW_ADDRESS is its memory address, and 12018// VIEW_SIZE is the size. These refer to the input section, unless 12019// NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to 12020// the output section. 12021 12022template<bool big_endian> 12023template<int sh_type> 12024void inline 12025Target_arm<big_endian>::scan_reloc_section_for_stubs( 12026 const Relocate_info<32, big_endian>* relinfo, 12027 const unsigned char* prelocs, 12028 size_t reloc_count, 12029 Output_section* output_section, 12030 bool needs_special_offset_handling, 12031 const unsigned char* view, 12032 elfcpp::Elf_types<32>::Elf_Addr view_address, 12033 section_size_type) 12034{ 12035 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype; 12036 const int reloc_size = 12037 Reloc_types<sh_type, 32, big_endian>::reloc_size; 12038 12039 Arm_relobj<big_endian>* arm_object = 12040 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object); 12041 unsigned int local_count = arm_object->local_symbol_count(); 12042 12043 gold::Default_comdat_behavior default_comdat_behavior; 12044 Comdat_behavior comdat_behavior = CB_UNDETERMINED; 12045 12046 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size) 12047 { 12048 Reltype reloc(prelocs); 12049 12050 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info(); 12051 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info); 12052 unsigned int r_type = elfcpp::elf_r_type<32>(r_info); 12053 12054 r_type = this->get_real_reloc_type(r_type); 12055 12056 // Only a few relocation types need stubs. 12057 if ((r_type != elfcpp::R_ARM_CALL) 12058 && (r_type != elfcpp::R_ARM_JUMP24) 12059 && (r_type != elfcpp::R_ARM_PLT32) 12060 && (r_type != elfcpp::R_ARM_THM_CALL) 12061 && (r_type != elfcpp::R_ARM_THM_XPC22) 12062 && (r_type != elfcpp::R_ARM_THM_JUMP24) 12063 && (r_type != elfcpp::R_ARM_THM_JUMP19) 12064 && (r_type != elfcpp::R_ARM_V4BX)) 12065 continue; 12066 12067 section_offset_type offset = 12068 convert_to_section_size_type(reloc.get_r_offset()); 12069 12070 if (needs_special_offset_handling) 12071 { 12072 offset = output_section->output_offset(relinfo->object, 12073 relinfo->data_shndx, 12074 offset); 12075 if (offset == -1) 12076 continue; 12077 } 12078 12079 // Create a v4bx stub if --fix-v4bx-interworking is used. 12080 if (r_type == elfcpp::R_ARM_V4BX) 12081 { 12082 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING) 12083 { 12084 // Get the BX instruction. 12085 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype; 12086 const Valtype* wv = 12087 reinterpret_cast<const Valtype*>(view + offset); 12088 elfcpp::Elf_types<32>::Elf_Swxword insn = 12089 elfcpp::Swap<32, big_endian>::readval(wv); 12090 const uint32_t reg = (insn & 0xf); 12091 12092 if (reg < 0xf) 12093 { 12094 // Try looking up an existing stub from a stub table. 12095 Stub_table<big_endian>* stub_table = 12096 arm_object->stub_table(relinfo->data_shndx); 12097 gold_assert(stub_table != NULL); 12098 12099 if (stub_table->find_arm_v4bx_stub(reg) == NULL) 12100 { 12101 // create a new stub and add it to stub table. 12102 Arm_v4bx_stub* stub = 12103 this->stub_factory().make_arm_v4bx_stub(reg); 12104 gold_assert(stub != NULL); 12105 stub_table->add_arm_v4bx_stub(stub); 12106 } 12107 } 12108 } 12109 continue; 12110 } 12111 12112 // Get the addend. 12113 Stub_addend_reader<sh_type, big_endian> stub_addend_reader; 12114 elfcpp::Elf_types<32>::Elf_Swxword addend = 12115 stub_addend_reader(r_type, view + offset, reloc); 12116 12117 const Sized_symbol<32>* sym; 12118 12119 Symbol_value<32> symval; 12120 const Symbol_value<32> *psymval; 12121 bool is_defined_in_discarded_section; 12122 unsigned int shndx; 12123 if (r_sym < local_count) 12124 { 12125 sym = NULL; 12126 psymval = arm_object->local_symbol(r_sym); 12127 12128 // If the local symbol belongs to a section we are discarding, 12129 // and that section is a debug section, try to find the 12130 // corresponding kept section and map this symbol to its 12131 // counterpart in the kept section. The symbol must not 12132 // correspond to a section we are folding. 12133 bool is_ordinary; 12134 shndx = psymval->input_shndx(&is_ordinary); 12135 is_defined_in_discarded_section = 12136 (is_ordinary 12137 && shndx != elfcpp::SHN_UNDEF 12138 && !arm_object->is_section_included(shndx) 12139 && !relinfo->symtab->is_section_folded(arm_object, shndx)); 12140 12141 // We need to compute the would-be final value of this local 12142 // symbol. 12143 if (!is_defined_in_discarded_section) 12144 { 12145 typedef Sized_relobj_file<32, big_endian> ObjType; 12146 if (psymval->is_section_symbol()) 12147 symval.set_is_section_symbol(); 12148 typename ObjType::Compute_final_local_value_status status = 12149 arm_object->compute_final_local_value(r_sym, psymval, &symval, 12150 relinfo->symtab); 12151 if (status == ObjType::CFLV_OK) 12152 { 12153 // Currently we cannot handle a branch to a target in 12154 // a merged section. If this is the case, issue an error 12155 // and also free the merge symbol value. 12156 if (!symval.has_output_value()) 12157 { 12158 const std::string& section_name = 12159 arm_object->section_name(shndx); 12160 arm_object->error(_("cannot handle branch to local %u " 12161 "in a merged section %s"), 12162 r_sym, section_name.c_str()); 12163 } 12164 psymval = &symval; 12165 } 12166 else 12167 { 12168 // We cannot determine the final value. 12169 continue; 12170 } 12171 } 12172 } 12173 else 12174 { 12175 const Symbol* gsym; 12176 gsym = arm_object->global_symbol(r_sym); 12177 gold_assert(gsym != NULL); 12178 if (gsym->is_forwarder()) 12179 gsym = relinfo->symtab->resolve_forwards(gsym); 12180 12181 sym = static_cast<const Sized_symbol<32>*>(gsym); 12182 if (sym->has_symtab_index() && sym->symtab_index() != -1U) 12183 symval.set_output_symtab_index(sym->symtab_index()); 12184 else 12185 symval.set_no_output_symtab_entry(); 12186 12187 // We need to compute the would-be final value of this global 12188 // symbol. 12189 const Symbol_table* symtab = relinfo->symtab; 12190 const Sized_symbol<32>* sized_symbol = 12191 symtab->get_sized_symbol<32>(gsym); 12192 Symbol_table::Compute_final_value_status status; 12193 Arm_address value = 12194 symtab->compute_final_value<32>(sized_symbol, &status); 12195 12196 // Skip this if the symbol has not output section. 12197 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION) 12198 continue; 12199 symval.set_output_value(value); 12200 12201 if (gsym->type() == elfcpp::STT_TLS) 12202 symval.set_is_tls_symbol(); 12203 else if (gsym->type() == elfcpp::STT_GNU_IFUNC) 12204 symval.set_is_ifunc_symbol(); 12205 psymval = &symval; 12206 12207 is_defined_in_discarded_section = 12208 (gsym->is_defined_in_discarded_section() 12209 && gsym->is_undefined()); 12210 shndx = 0; 12211 } 12212 12213 Symbol_value<32> symval2; 12214 if (is_defined_in_discarded_section) 12215 { 12216 if (comdat_behavior == CB_UNDETERMINED) 12217 { 12218 std::string name = arm_object->section_name(relinfo->data_shndx); 12219 comdat_behavior = default_comdat_behavior.get(name.c_str()); 12220 } 12221 if (comdat_behavior == CB_PRETEND) 12222 { 12223 // FIXME: This case does not work for global symbols. 12224 // We have no place to store the original section index. 12225 // Fortunately this does not matter for comdat sections, 12226 // only for sections explicitly discarded by a linker 12227 // script. 12228 bool found; 12229 typename elfcpp::Elf_types<32>::Elf_Addr value = 12230 arm_object->map_to_kept_section(shndx, &found); 12231 if (found) 12232 symval2.set_output_value(value + psymval->input_value()); 12233 else 12234 symval2.set_output_value(0); 12235 } 12236 else 12237 { 12238 if (comdat_behavior == CB_WARNING) 12239 gold_warning_at_location(relinfo, i, offset, 12240 _("relocation refers to discarded " 12241 "section")); 12242 symval2.set_output_value(0); 12243 } 12244 symval2.set_no_output_symtab_entry(); 12245 psymval = &symval2; 12246 } 12247 12248 // If symbol is a section symbol, we don't know the actual type of 12249 // destination. Give up. 12250 if (psymval->is_section_symbol()) 12251 continue; 12252 12253 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval, 12254 addend, view_address + offset); 12255 } 12256} 12257 12258// Scan an input section for stub generation. 12259 12260template<bool big_endian> 12261void 12262Target_arm<big_endian>::scan_section_for_stubs( 12263 const Relocate_info<32, big_endian>* relinfo, 12264 unsigned int sh_type, 12265 const unsigned char* prelocs, 12266 size_t reloc_count, 12267 Output_section* output_section, 12268 bool needs_special_offset_handling, 12269 const unsigned char* view, 12270 Arm_address view_address, 12271 section_size_type view_size) 12272{ 12273 if (sh_type == elfcpp::SHT_REL) 12274 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>( 12275 relinfo, 12276 prelocs, 12277 reloc_count, 12278 output_section, 12279 needs_special_offset_handling, 12280 view, 12281 view_address, 12282 view_size); 12283 else if (sh_type == elfcpp::SHT_RELA) 12284 // We do not support RELA type relocations yet. This is provided for 12285 // completeness. 12286 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>( 12287 relinfo, 12288 prelocs, 12289 reloc_count, 12290 output_section, 12291 needs_special_offset_handling, 12292 view, 12293 view_address, 12294 view_size); 12295 else 12296 gold_unreachable(); 12297} 12298 12299// Group input sections for stub generation. 12300// 12301// We group input sections in an output section so that the total size, 12302// including any padding space due to alignment is smaller than GROUP_SIZE 12303// unless the only input section in group is bigger than GROUP_SIZE already. 12304// Then an ARM stub table is created to follow the last input section 12305// in group. For each group an ARM stub table is created an is placed 12306// after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further 12307// extend the group after the stub table. 12308 12309template<bool big_endian> 12310void 12311Target_arm<big_endian>::group_sections( 12312 Layout* layout, 12313 section_size_type group_size, 12314 bool stubs_always_after_branch, 12315 const Task* task) 12316{ 12317 // Group input sections and insert stub table 12318 Layout::Section_list section_list; 12319 layout->get_executable_sections(§ion_list); 12320 for (Layout::Section_list::const_iterator p = section_list.begin(); 12321 p != section_list.end(); 12322 ++p) 12323 { 12324 Arm_output_section<big_endian>* output_section = 12325 Arm_output_section<big_endian>::as_arm_output_section(*p); 12326 output_section->group_sections(group_size, stubs_always_after_branch, 12327 this, task); 12328 } 12329} 12330 12331// Relaxation hook. This is where we do stub generation. 12332 12333template<bool big_endian> 12334bool 12335Target_arm<big_endian>::do_relax( 12336 int pass, 12337 const Input_objects* input_objects, 12338 Symbol_table* symtab, 12339 Layout* layout, 12340 const Task* task) 12341{ 12342 // No need to generate stubs if this is a relocatable link. 12343 gold_assert(!parameters->options().relocatable()); 12344 12345 // If this is the first pass, we need to group input sections into 12346 // stub groups. 12347 bool done_exidx_fixup = false; 12348 typedef typename Stub_table_list::iterator Stub_table_iterator; 12349 if (pass == 1) 12350 { 12351 // Determine the stub group size. The group size is the absolute 12352 // value of the parameter --stub-group-size. If --stub-group-size 12353 // is passed a negative value, we restrict stubs to be always after 12354 // the stubbed branches. 12355 int32_t stub_group_size_param = 12356 parameters->options().stub_group_size(); 12357 bool stubs_always_after_branch = stub_group_size_param < 0; 12358 section_size_type stub_group_size = abs(stub_group_size_param); 12359 12360 if (stub_group_size == 1) 12361 { 12362 // Default value. 12363 // Thumb branch range is +-4MB has to be used as the default 12364 // maximum size (a given section can contain both ARM and Thumb 12365 // code, so the worst case has to be taken into account). If we are 12366 // fixing cortex-a8 errata, the branch range has to be even smaller, 12367 // since wide conditional branch has a range of +-1MB only. 12368 // 12369 // This value is 48K less than that, which allows for 4096 12370 // 12-byte stubs. If we exceed that, then we will fail to link. 12371 // The user will have to relink with an explicit group size 12372 // option. 12373 stub_group_size = 4145152; 12374 } 12375 12376 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K 12377 // page as the first half of a 32-bit branch straddling two 4K pages. 12378 // This is a crude way of enforcing that. In addition, long conditional 12379 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8 12380 // erratum, limit the group size to (1M - 12k) to avoid unreachable 12381 // cortex-A8 stubs from long conditional branches. 12382 if (this->fix_cortex_a8_) 12383 { 12384 stubs_always_after_branch = true; 12385 const section_size_type cortex_a8_group_size = 1024 * (1024 - 12); 12386 stub_group_size = std::max(stub_group_size, cortex_a8_group_size); 12387 } 12388 12389 group_sections(layout, stub_group_size, stubs_always_after_branch, task); 12390 12391 // Also fix .ARM.exidx section coverage. 12392 Arm_output_section<big_endian>* exidx_output_section = NULL; 12393 for (Layout::Section_list::const_iterator p = 12394 layout->section_list().begin(); 12395 p != layout->section_list().end(); 12396 ++p) 12397 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX) 12398 { 12399 if (exidx_output_section == NULL) 12400 exidx_output_section = 12401 Arm_output_section<big_endian>::as_arm_output_section(*p); 12402 else 12403 // We cannot handle this now. 12404 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a " 12405 "non-relocatable link"), 12406 exidx_output_section->name(), 12407 (*p)->name()); 12408 } 12409 12410 if (exidx_output_section != NULL) 12411 { 12412 this->fix_exidx_coverage(layout, input_objects, exidx_output_section, 12413 symtab, task); 12414 done_exidx_fixup = true; 12415 } 12416 } 12417 else 12418 { 12419 // If this is not the first pass, addresses and file offsets have 12420 // been reset at this point, set them here. 12421 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12422 sp != this->stub_tables_.end(); 12423 ++sp) 12424 { 12425 Arm_input_section<big_endian>* owner = (*sp)->owner(); 12426 off_t off = align_address(owner->original_size(), 12427 (*sp)->addralign()); 12428 (*sp)->set_address_and_file_offset(owner->address() + off, 12429 owner->offset() + off); 12430 } 12431 } 12432 12433 // The Cortex-A8 stubs are sensitive to layout of code sections. At the 12434 // beginning of each relaxation pass, just blow away all the stubs. 12435 // Alternatively, we could selectively remove only the stubs and reloc 12436 // information for code sections that have moved since the last pass. 12437 // That would require more book-keeping. 12438 if (this->fix_cortex_a8_) 12439 { 12440 // Clear all Cortex-A8 reloc information. 12441 for (typename Cortex_a8_relocs_info::const_iterator p = 12442 this->cortex_a8_relocs_info_.begin(); 12443 p != this->cortex_a8_relocs_info_.end(); 12444 ++p) 12445 delete p->second; 12446 this->cortex_a8_relocs_info_.clear(); 12447 12448 // Remove all Cortex-A8 stubs. 12449 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12450 sp != this->stub_tables_.end(); 12451 ++sp) 12452 (*sp)->remove_all_cortex_a8_stubs(); 12453 } 12454 12455 // Scan relocs for relocation stubs 12456 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin(); 12457 op != input_objects->relobj_end(); 12458 ++op) 12459 { 12460 Arm_relobj<big_endian>* arm_relobj = 12461 Arm_relobj<big_endian>::as_arm_relobj(*op); 12462 // Lock the object so we can read from it. This is only called 12463 // single-threaded from Layout::finalize, so it is OK to lock. 12464 Task_lock_obj<Object> tl(task, arm_relobj); 12465 arm_relobj->scan_sections_for_stubs(this, symtab, layout); 12466 } 12467 12468 // Check all stub tables to see if any of them have their data sizes 12469 // or addresses alignments changed. These are the only things that 12470 // matter. 12471 bool any_stub_table_changed = false; 12472 Unordered_set<const Output_section*> sections_needing_adjustment; 12473 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12474 (sp != this->stub_tables_.end()) && !any_stub_table_changed; 12475 ++sp) 12476 { 12477 if ((*sp)->update_data_size_and_addralign()) 12478 { 12479 // Update data size of stub table owner. 12480 Arm_input_section<big_endian>* owner = (*sp)->owner(); 12481 uint64_t address = owner->address(); 12482 off_t offset = owner->offset(); 12483 owner->reset_address_and_file_offset(); 12484 owner->set_address_and_file_offset(address, offset); 12485 12486 sections_needing_adjustment.insert(owner->output_section()); 12487 any_stub_table_changed = true; 12488 } 12489 } 12490 12491 // Output_section_data::output_section() returns a const pointer but we 12492 // need to update output sections, so we record all output sections needing 12493 // update above and scan the sections here to find out what sections need 12494 // to be updated. 12495 for (Layout::Section_list::const_iterator p = layout->section_list().begin(); 12496 p != layout->section_list().end(); 12497 ++p) 12498 { 12499 if (sections_needing_adjustment.find(*p) 12500 != sections_needing_adjustment.end()) 12501 (*p)->set_section_offsets_need_adjustment(); 12502 } 12503 12504 // Stop relaxation if no EXIDX fix-up and no stub table change. 12505 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed; 12506 12507 // Finalize the stubs in the last relaxation pass. 12508 if (!continue_relaxation) 12509 { 12510 for (Stub_table_iterator sp = this->stub_tables_.begin(); 12511 (sp != this->stub_tables_.end()) && !any_stub_table_changed; 12512 ++sp) 12513 (*sp)->finalize_stubs(); 12514 12515 // Update output local symbol counts of objects if necessary. 12516 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin(); 12517 op != input_objects->relobj_end(); 12518 ++op) 12519 { 12520 Arm_relobj<big_endian>* arm_relobj = 12521 Arm_relobj<big_endian>::as_arm_relobj(*op); 12522 12523 // Update output local symbol counts. We need to discard local 12524 // symbols defined in parts of input sections that are discarded by 12525 // relaxation. 12526 if (arm_relobj->output_local_symbol_count_needs_update()) 12527 { 12528 // We need to lock the object's file to update it. 12529 Task_lock_obj<Object> tl(task, arm_relobj); 12530 arm_relobj->update_output_local_symbol_count(); 12531 } 12532 } 12533 } 12534 12535 return continue_relaxation; 12536} 12537 12538// Relocate a stub. 12539 12540template<bool big_endian> 12541void 12542Target_arm<big_endian>::relocate_stub( 12543 Stub* stub, 12544 const Relocate_info<32, big_endian>* relinfo, 12545 Output_section* output_section, 12546 unsigned char* view, 12547 Arm_address address, 12548 section_size_type view_size) 12549{ 12550 Relocate relocate; 12551 const Stub_template* stub_template = stub->stub_template(); 12552 for (size_t i = 0; i < stub_template->reloc_count(); i++) 12553 { 12554 size_t reloc_insn_index = stub_template->reloc_insn_index(i); 12555 const Insn_template* insn = &stub_template->insns()[reloc_insn_index]; 12556 12557 unsigned int r_type = insn->r_type(); 12558 section_size_type reloc_offset = stub_template->reloc_offset(i); 12559 section_size_type reloc_size = insn->size(); 12560 gold_assert(reloc_offset + reloc_size <= view_size); 12561 12562 // This is the address of the stub destination. 12563 Arm_address target = stub->reloc_target(i) + insn->reloc_addend(); 12564 Symbol_value<32> symval; 12565 symval.set_output_value(target); 12566 12567 // Synthesize a fake reloc just in case. We don't have a symbol so 12568 // we use 0. 12569 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size]; 12570 memset(reloc_buffer, 0, sizeof(reloc_buffer)); 12571 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer); 12572 reloc_write.put_r_offset(reloc_offset); 12573 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type)); 12574 12575 relocate.relocate(relinfo, elfcpp::SHT_REL, this, output_section, 12576 this->fake_relnum_for_stubs, reloc_buffer, 12577 NULL, &symval, view + reloc_offset, 12578 address + reloc_offset, reloc_size); 12579 } 12580} 12581 12582// Determine whether an object attribute tag takes an integer, a 12583// string or both. 12584 12585template<bool big_endian> 12586int 12587Target_arm<big_endian>::do_attribute_arg_type(int tag) const 12588{ 12589 if (tag == Object_attribute::Tag_compatibility) 12590 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL 12591 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL); 12592 else if (tag == elfcpp::Tag_nodefaults) 12593 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL 12594 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT); 12595 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name) 12596 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL; 12597 else if (tag < 32) 12598 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL; 12599 else 12600 return ((tag & 1) != 0 12601 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL 12602 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL); 12603} 12604 12605// Reorder attributes. 12606// 12607// The ABI defines that Tag_conformance should be emitted first, and that 12608// Tag_nodefaults should be second (if either is defined). This sets those 12609// two positions, and bumps up the position of all the remaining tags to 12610// compensate. 12611 12612template<bool big_endian> 12613int 12614Target_arm<big_endian>::do_attributes_order(int num) const 12615{ 12616 // Reorder the known object attributes in output. We want to move 12617 // Tag_conformance to position 4 and Tag_conformance to position 5 12618 // and shift everything between 4 .. Tag_conformance - 1 to make room. 12619 if (num == 4) 12620 return elfcpp::Tag_conformance; 12621 if (num == 5) 12622 return elfcpp::Tag_nodefaults; 12623 if ((num - 2) < elfcpp::Tag_nodefaults) 12624 return num - 2; 12625 if ((num - 1) < elfcpp::Tag_conformance) 12626 return num - 1; 12627 return num; 12628} 12629 12630// Scan a span of THUMB code for Cortex-A8 erratum. 12631 12632template<bool big_endian> 12633void 12634Target_arm<big_endian>::scan_span_for_cortex_a8_erratum( 12635 Arm_relobj<big_endian>* arm_relobj, 12636 unsigned int shndx, 12637 section_size_type span_start, 12638 section_size_type span_end, 12639 const unsigned char* view, 12640 Arm_address address) 12641{ 12642 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where: 12643 // 12644 // The opcode is BLX.W, BL.W, B.W, Bcc.W 12645 // The branch target is in the same 4KB region as the 12646 // first half of the branch. 12647 // The instruction before the branch is a 32-bit 12648 // length non-branch instruction. 12649 section_size_type i = span_start; 12650 bool last_was_32bit = false; 12651 bool last_was_branch = false; 12652 while (i < span_end) 12653 { 12654 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 12655 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i); 12656 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv); 12657 bool is_blx = false, is_b = false; 12658 bool is_bl = false, is_bcc = false; 12659 12660 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000; 12661 if (insn_32bit) 12662 { 12663 // Load the rest of the insn (in manual-friendly order). 12664 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1); 12665 12666 // Encoding T4: B<c>.W. 12667 is_b = (insn & 0xf800d000U) == 0xf0009000U; 12668 // Encoding T1: BL<c>.W. 12669 is_bl = (insn & 0xf800d000U) == 0xf000d000U; 12670 // Encoding T2: BLX<c>.W. 12671 is_blx = (insn & 0xf800d000U) == 0xf000c000U; 12672 // Encoding T3: B<c>.W (not permitted in IT block). 12673 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U 12674 && (insn & 0x07f00000U) != 0x03800000U); 12675 } 12676 12677 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc; 12678 12679 // If this instruction is a 32-bit THUMB branch that crosses a 4K 12680 // page boundary and it follows 32-bit non-branch instruction, 12681 // we need to work around. 12682 if (is_32bit_branch 12683 && ((address + i) & 0xfffU) == 0xffeU 12684 && last_was_32bit 12685 && !last_was_branch) 12686 { 12687 // Check to see if there is a relocation stub for this branch. 12688 bool force_target_arm = false; 12689 bool force_target_thumb = false; 12690 const Cortex_a8_reloc* cortex_a8_reloc = NULL; 12691 Cortex_a8_relocs_info::const_iterator p = 12692 this->cortex_a8_relocs_info_.find(address + i); 12693 12694 if (p != this->cortex_a8_relocs_info_.end()) 12695 { 12696 cortex_a8_reloc = p->second; 12697 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0; 12698 12699 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL 12700 && !target_is_thumb) 12701 force_target_arm = true; 12702 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL 12703 && target_is_thumb) 12704 force_target_thumb = true; 12705 } 12706 12707 off_t offset; 12708 Stub_type stub_type = arm_stub_none; 12709 12710 // Check if we have an offending branch instruction. 12711 uint16_t upper_insn = (insn >> 16) & 0xffffU; 12712 uint16_t lower_insn = insn & 0xffffU; 12713 typedef class Arm_relocate_functions<big_endian> RelocFuncs; 12714 12715 if (cortex_a8_reloc != NULL 12716 && cortex_a8_reloc->reloc_stub() != NULL) 12717 // We've already made a stub for this instruction, e.g. 12718 // it's a long branch or a Thumb->ARM stub. Assume that 12719 // stub will suffice to work around the A8 erratum (see 12720 // setting of always_after_branch above). 12721 ; 12722 else if (is_bcc) 12723 { 12724 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn, 12725 lower_insn); 12726 stub_type = arm_stub_a8_veneer_b_cond; 12727 } 12728 else if (is_b || is_bl || is_blx) 12729 { 12730 offset = RelocFuncs::thumb32_branch_offset(upper_insn, 12731 lower_insn); 12732 if (is_blx) 12733 offset &= ~3; 12734 12735 stub_type = (is_blx 12736 ? arm_stub_a8_veneer_blx 12737 : (is_bl 12738 ? arm_stub_a8_veneer_bl 12739 : arm_stub_a8_veneer_b)); 12740 } 12741 12742 if (stub_type != arm_stub_none) 12743 { 12744 Arm_address pc_for_insn = address + i + 4; 12745 12746 // The original instruction is a BL, but the target is 12747 // an ARM instruction. If we were not making a stub, 12748 // the BL would have been converted to a BLX. Use the 12749 // BLX stub instead in that case. 12750 if (this->may_use_v5t_interworking() && force_target_arm 12751 && stub_type == arm_stub_a8_veneer_bl) 12752 { 12753 stub_type = arm_stub_a8_veneer_blx; 12754 is_blx = true; 12755 is_bl = false; 12756 } 12757 // Conversely, if the original instruction was 12758 // BLX but the target is Thumb mode, use the BL stub. 12759 else if (force_target_thumb 12760 && stub_type == arm_stub_a8_veneer_blx) 12761 { 12762 stub_type = arm_stub_a8_veneer_bl; 12763 is_blx = false; 12764 is_bl = true; 12765 } 12766 12767 if (is_blx) 12768 pc_for_insn &= ~3; 12769 12770 // If we found a relocation, use the proper destination, 12771 // not the offset in the (unrelocated) instruction. 12772 // Note this is always done if we switched the stub type above. 12773 if (cortex_a8_reloc != NULL) 12774 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn); 12775 12776 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1); 12777 12778 // Add a new stub if destination address in in the same page. 12779 if (((address + i) & ~0xfffU) == (target & ~0xfffU)) 12780 { 12781 Cortex_a8_stub* stub = 12782 this->stub_factory_.make_cortex_a8_stub(stub_type, 12783 arm_relobj, shndx, 12784 address + i, 12785 target, insn); 12786 Stub_table<big_endian>* stub_table = 12787 arm_relobj->stub_table(shndx); 12788 gold_assert(stub_table != NULL); 12789 stub_table->add_cortex_a8_stub(address + i, stub); 12790 } 12791 } 12792 } 12793 12794 i += insn_32bit ? 4 : 2; 12795 last_was_32bit = insn_32bit; 12796 last_was_branch = is_32bit_branch; 12797 } 12798} 12799 12800// Apply the Cortex-A8 workaround. 12801 12802template<bool big_endian> 12803void 12804Target_arm<big_endian>::apply_cortex_a8_workaround( 12805 const Cortex_a8_stub* stub, 12806 Arm_address stub_address, 12807 unsigned char* insn_view, 12808 Arm_address insn_address) 12809{ 12810 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype; 12811 Valtype* wv = reinterpret_cast<Valtype*>(insn_view); 12812 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv); 12813 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1); 12814 off_t branch_offset = stub_address - (insn_address + 4); 12815 12816 typedef class Arm_relocate_functions<big_endian> RelocFuncs; 12817 switch (stub->stub_template()->type()) 12818 { 12819 case arm_stub_a8_veneer_b_cond: 12820 // For a conditional branch, we re-write it to be an unconditional 12821 // branch to the stub. We use the THUMB-2 encoding here. 12822 upper_insn = 0xf000U; 12823 lower_insn = 0xb800U; 12824 // Fall through. 12825 case arm_stub_a8_veneer_b: 12826 case arm_stub_a8_veneer_bl: 12827 case arm_stub_a8_veneer_blx: 12828 if ((lower_insn & 0x5000U) == 0x4000U) 12829 // For a BLX instruction, make sure that the relocation is 12830 // rounded up to a word boundary. This follows the semantics of 12831 // the instruction which specifies that bit 1 of the target 12832 // address will come from bit 1 of the base address. 12833 branch_offset = (branch_offset + 2) & ~3; 12834 12835 // Put BRANCH_OFFSET back into the insn. 12836 gold_assert(!Bits<25>::has_overflow32(branch_offset)); 12837 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset); 12838 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset); 12839 break; 12840 12841 default: 12842 gold_unreachable(); 12843 } 12844 12845 // Put the relocated value back in the object file: 12846 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn); 12847 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn); 12848} 12849 12850// Target selector for ARM. Note this is never instantiated directly. 12851// It's only used in Target_selector_arm_nacl, below. 12852 12853template<bool big_endian> 12854class Target_selector_arm : public Target_selector 12855{ 12856 public: 12857 Target_selector_arm() 12858 : Target_selector(elfcpp::EM_ARM, 32, big_endian, 12859 (big_endian ? "elf32-bigarm" : "elf32-littlearm"), 12860 (big_endian ? "armelfb" : "armelf")) 12861 { } 12862 12863 Target* 12864 do_instantiate_target() 12865 { return new Target_arm<big_endian>(); } 12866}; 12867 12868// Fix .ARM.exidx section coverage. 12869 12870template<bool big_endian> 12871void 12872Target_arm<big_endian>::fix_exidx_coverage( 12873 Layout* layout, 12874 const Input_objects* input_objects, 12875 Arm_output_section<big_endian>* exidx_section, 12876 Symbol_table* symtab, 12877 const Task* task) 12878{ 12879 // We need to look at all the input sections in output in ascending 12880 // order of of output address. We do that by building a sorted list 12881 // of output sections by addresses. Then we looks at the output sections 12882 // in order. The input sections in an output section are already sorted 12883 // by addresses within the output section. 12884 12885 typedef std::set<Output_section*, output_section_address_less_than> 12886 Sorted_output_section_list; 12887 Sorted_output_section_list sorted_output_sections; 12888 12889 // Find out all the output sections of input sections pointed by 12890 // EXIDX input sections. 12891 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin(); 12892 p != input_objects->relobj_end(); 12893 ++p) 12894 { 12895 Arm_relobj<big_endian>* arm_relobj = 12896 Arm_relobj<big_endian>::as_arm_relobj(*p); 12897 std::vector<unsigned int> shndx_list; 12898 arm_relobj->get_exidx_shndx_list(&shndx_list); 12899 for (size_t i = 0; i < shndx_list.size(); ++i) 12900 { 12901 const Arm_exidx_input_section* exidx_input_section = 12902 arm_relobj->exidx_input_section_by_shndx(shndx_list[i]); 12903 gold_assert(exidx_input_section != NULL); 12904 if (!exidx_input_section->has_errors()) 12905 { 12906 unsigned int text_shndx = exidx_input_section->link(); 12907 Output_section* os = arm_relobj->output_section(text_shndx); 12908 if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0) 12909 sorted_output_sections.insert(os); 12910 } 12911 } 12912 } 12913 12914 // Go over the output sections in ascending order of output addresses. 12915 typedef typename Arm_output_section<big_endian>::Text_section_list 12916 Text_section_list; 12917 Text_section_list sorted_text_sections; 12918 for (typename Sorted_output_section_list::iterator p = 12919 sorted_output_sections.begin(); 12920 p != sorted_output_sections.end(); 12921 ++p) 12922 { 12923 Arm_output_section<big_endian>* arm_output_section = 12924 Arm_output_section<big_endian>::as_arm_output_section(*p); 12925 arm_output_section->append_text_sections_to_list(&sorted_text_sections); 12926 } 12927 12928 exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab, 12929 merge_exidx_entries(), task); 12930} 12931 12932template<bool big_endian> 12933void 12934Target_arm<big_endian>::do_define_standard_symbols( 12935 Symbol_table* symtab, 12936 Layout* layout) 12937{ 12938 // Handle the .ARM.exidx section. 12939 Output_section* exidx_section = layout->find_output_section(".ARM.exidx"); 12940 12941 if (exidx_section != NULL) 12942 { 12943 // Create __exidx_start and __exidx_end symbols. 12944 symtab->define_in_output_data("__exidx_start", 12945 NULL, // version 12946 Symbol_table::PREDEFINED, 12947 exidx_section, 12948 0, // value 12949 0, // symsize 12950 elfcpp::STT_NOTYPE, 12951 elfcpp::STB_GLOBAL, 12952 elfcpp::STV_HIDDEN, 12953 0, // nonvis 12954 false, // offset_is_from_end 12955 true); // only_if_ref 12956 12957 symtab->define_in_output_data("__exidx_end", 12958 NULL, // version 12959 Symbol_table::PREDEFINED, 12960 exidx_section, 12961 0, // value 12962 0, // symsize 12963 elfcpp::STT_NOTYPE, 12964 elfcpp::STB_GLOBAL, 12965 elfcpp::STV_HIDDEN, 12966 0, // nonvis 12967 true, // offset_is_from_end 12968 true); // only_if_ref 12969 } 12970 else 12971 { 12972 // Define __exidx_start and __exidx_end even when .ARM.exidx 12973 // section is missing to match ld's behaviour. 12974 symtab->define_as_constant("__exidx_start", NULL, 12975 Symbol_table::PREDEFINED, 12976 0, 0, elfcpp::STT_OBJECT, 12977 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0, 12978 true, false); 12979 symtab->define_as_constant("__exidx_end", NULL, 12980 Symbol_table::PREDEFINED, 12981 0, 0, elfcpp::STT_OBJECT, 12982 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0, 12983 true, false); 12984 } 12985} 12986 12987// NaCl variant. It uses different PLT contents. 12988 12989template<bool big_endian> 12990class Output_data_plt_arm_nacl; 12991 12992template<bool big_endian> 12993class Target_arm_nacl : public Target_arm<big_endian> 12994{ 12995 public: 12996 Target_arm_nacl() 12997 : Target_arm<big_endian>(&arm_nacl_info) 12998 { } 12999 13000 protected: 13001 virtual Output_data_plt_arm<big_endian>* 13002 do_make_data_plt( 13003 Layout* layout, 13004 Arm_output_data_got<big_endian>* got, 13005 Output_data_space* got_plt, 13006 Output_data_space* got_irelative) 13007 { return new Output_data_plt_arm_nacl<big_endian>( 13008 layout, got, got_plt, got_irelative); } 13009 13010 private: 13011 static const Target::Target_info arm_nacl_info; 13012}; 13013 13014template<bool big_endian> 13015const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info = 13016{ 13017 32, // size 13018 big_endian, // is_big_endian 13019 elfcpp::EM_ARM, // machine_code 13020 false, // has_make_symbol 13021 false, // has_resolve 13022 false, // has_code_fill 13023 true, // is_default_stack_executable 13024 false, // can_icf_inline_merge_sections 13025 '\0', // wrap_char 13026 "/lib/ld-nacl-arm.so.1", // dynamic_linker 13027 0x20000, // default_text_segment_address 13028 0x10000, // abi_pagesize (overridable by -z max-page-size) 13029 0x10000, // common_pagesize (overridable by -z common-page-size) 13030 true, // isolate_execinstr 13031 0x10000000, // rosegment_gap 13032 elfcpp::SHN_UNDEF, // small_common_shndx 13033 elfcpp::SHN_UNDEF, // large_common_shndx 13034 0, // small_common_section_flags 13035 0, // large_common_section_flags 13036 ".ARM.attributes", // attributes_section 13037 "aeabi", // attributes_vendor 13038 "_start", // entry_symbol_name 13039 32, // hash_entry_size 13040}; 13041 13042template<bool big_endian> 13043class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian> 13044{ 13045 public: 13046 Output_data_plt_arm_nacl( 13047 Layout* layout, 13048 Arm_output_data_got<big_endian>* got, 13049 Output_data_space* got_plt, 13050 Output_data_space* got_irelative) 13051 : Output_data_plt_arm<big_endian>(layout, 16, got, got_plt, got_irelative) 13052 { } 13053 13054 protected: 13055 // Return the offset of the first non-reserved PLT entry. 13056 virtual unsigned int 13057 do_first_plt_entry_offset() const 13058 { return sizeof(first_plt_entry); } 13059 13060 // Return the size of a PLT entry. 13061 virtual unsigned int 13062 do_get_plt_entry_size() const 13063 { return sizeof(plt_entry); } 13064 13065 virtual void 13066 do_fill_first_plt_entry(unsigned char* pov, 13067 Arm_address got_address, 13068 Arm_address plt_address); 13069 13070 virtual void 13071 do_fill_plt_entry(unsigned char* pov, 13072 Arm_address got_address, 13073 Arm_address plt_address, 13074 unsigned int got_offset, 13075 unsigned int plt_offset); 13076 13077 private: 13078 inline uint32_t arm_movw_immediate(uint32_t value) 13079 { 13080 return (value & 0x00000fff) | ((value & 0x0000f000) << 4); 13081 } 13082 13083 inline uint32_t arm_movt_immediate(uint32_t value) 13084 { 13085 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12); 13086 } 13087 13088 // Template for the first PLT entry. 13089 static const uint32_t first_plt_entry[16]; 13090 13091 // Template for subsequent PLT entries. 13092 static const uint32_t plt_entry[4]; 13093}; 13094 13095// The first entry in the PLT. 13096template<bool big_endian> 13097const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] = 13098{ 13099 // First bundle: 13100 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8 13101 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8 13102 0xe08cc00f, // add ip, ip, pc 13103 0xe52dc008, // str ip, [sp, #-8]! 13104 // Second bundle: 13105 0xe3ccc103, // bic ip, ip, #0xc0000000 13106 0xe59cc000, // ldr ip, [ip] 13107 0xe3ccc13f, // bic ip, ip, #0xc000000f 13108 0xe12fff1c, // bx ip 13109 // Third bundle: 13110 0xe320f000, // nop 13111 0xe320f000, // nop 13112 0xe320f000, // nop 13113 // .Lplt_tail: 13114 0xe50dc004, // str ip, [sp, #-4] 13115 // Fourth bundle: 13116 0xe3ccc103, // bic ip, ip, #0xc0000000 13117 0xe59cc000, // ldr ip, [ip] 13118 0xe3ccc13f, // bic ip, ip, #0xc000000f 13119 0xe12fff1c, // bx ip 13120}; 13121 13122template<bool big_endian> 13123void 13124Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry( 13125 unsigned char* pov, 13126 Arm_address got_address, 13127 Arm_address plt_address) 13128{ 13129 // Write first PLT entry. All but first two words are constants. 13130 const size_t num_first_plt_words = (sizeof(first_plt_entry) 13131 / sizeof(first_plt_entry[0])); 13132 13133 int32_t got_displacement = got_address + 8 - (plt_address + 16); 13134 13135 elfcpp::Swap<32, big_endian>::writeval 13136 (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement)); 13137 elfcpp::Swap<32, big_endian>::writeval 13138 (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement)); 13139 13140 for (size_t i = 2; i < num_first_plt_words; ++i) 13141 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]); 13142} 13143 13144// Subsequent entries in the PLT. 13145 13146template<bool big_endian> 13147const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] = 13148{ 13149 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8 13150 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8 13151 0xe08cc00f, // add ip, ip, pc 13152 0xea000000, // b .Lplt_tail 13153}; 13154 13155template<bool big_endian> 13156void 13157Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry( 13158 unsigned char* pov, 13159 Arm_address got_address, 13160 Arm_address plt_address, 13161 unsigned int got_offset, 13162 unsigned int plt_offset) 13163{ 13164 // Calculate the displacement between the PLT slot and the 13165 // common tail that's part of the special initial PLT slot. 13166 int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t)) 13167 - (plt_address + plt_offset 13168 + sizeof(plt_entry) + sizeof(uint32_t))); 13169 gold_assert((tail_displacement & 3) == 0); 13170 tail_displacement >>= 2; 13171 13172 gold_assert ((tail_displacement & 0xff000000) == 0 13173 || (-tail_displacement & 0xff000000) == 0); 13174 13175 // Calculate the displacement between the PLT slot and the entry 13176 // in the GOT. The offset accounts for the value produced by 13177 // adding to pc in the penultimate instruction of the PLT stub. 13178 const int32_t got_displacement = (got_address + got_offset 13179 - (plt_address + sizeof(plt_entry))); 13180 13181 elfcpp::Swap<32, big_endian>::writeval 13182 (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement)); 13183 elfcpp::Swap<32, big_endian>::writeval 13184 (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement)); 13185 elfcpp::Swap<32, big_endian>::writeval 13186 (pov + 8, plt_entry[2]); 13187 elfcpp::Swap<32, big_endian>::writeval 13188 (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff)); 13189} 13190 13191// Target selectors. 13192 13193template<bool big_endian> 13194class Target_selector_arm_nacl 13195 : public Target_selector_nacl<Target_selector_arm<big_endian>, 13196 Target_arm_nacl<big_endian> > 13197{ 13198 public: 13199 Target_selector_arm_nacl() 13200 : Target_selector_nacl<Target_selector_arm<big_endian>, 13201 Target_arm_nacl<big_endian> >( 13202 "arm", 13203 big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl", 13204 big_endian ? "armelfb_nacl" : "armelf_nacl") 13205 { } 13206}; 13207 13208Target_selector_arm_nacl<false> target_selector_arm; 13209Target_selector_arm_nacl<true> target_selector_armbe; 13210 13211} // End anonymous namespace. 13212