1/* Altera Nios II assembler. 2 Copyright (C) 2012-2017 Free Software Foundation, Inc. 3 Contributed by Nigel Gray (ngray@altera.com). 4 Contributed by Mentor Graphics, Inc. 5 6 This file is part of GAS, the GNU Assembler. 7 8 GAS is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 GAS is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GAS; see the file COPYING. If not, write to the Free 20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 21 02110-1301, USA. */ 22 23#include "as.h" 24#include "opcode/nios2.h" 25#include "elf/nios2.h" 26#include "tc-nios2.h" 27#include "bfd.h" 28#include "dwarf2dbg.h" 29#include "subsegs.h" 30#include "safe-ctype.h" 31#include "dw2gencfi.h" 32 33#ifndef OBJ_ELF 34/* We are not supporting any other target so we throw a compile time error. */ 35OBJ_ELF not defined 36#endif 37 38/* We can choose our endianness at run-time, regardless of configuration. */ 39extern int target_big_endian; 40 41/* This array holds the chars that always start a comment. If the 42 pre-processor is disabled, these aren't very useful. */ 43const char comment_chars[] = "#"; 44 45/* This array holds the chars that only start a comment at the beginning of 46 a line. If the line seems to have the form '# 123 filename' 47 .line and .file directives will appear in the pre-processed output. */ 48/* Note that input_file.c hand checks for '#' at the beginning of the 49 first line of the input file. This is because the compiler outputs 50 #NO_APP at the beginning of its output. */ 51/* Also note that C style comments are always supported. */ 52const char line_comment_chars[] = "#"; 53 54/* This array holds machine specific line separator characters. */ 55const char line_separator_chars[] = ";"; 56 57/* Chars that can be used to separate mant from exp in floating point nums. */ 58const char EXP_CHARS[] = "eE"; 59 60/* Chars that mean this number is a floating point constant. */ 61/* As in 0f12.456 */ 62/* or 0d1.2345e12 */ 63const char FLT_CHARS[] = "rRsSfFdDxXpP"; 64 65/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be 66 changed in read.c. Ideally it shouldn't have to know about it at all, 67 but nothing is ideal around here. */ 68 69/* Machine-dependent command-line options. */ 70 71const char *md_shortopts = "r"; 72 73struct option md_longopts[] = { 74#define OPTION_RELAX_ALL (OPTION_MD_BASE + 0) 75 {"relax-all", no_argument, NULL, OPTION_RELAX_ALL}, 76#define OPTION_NORELAX (OPTION_MD_BASE + 1) 77 {"no-relax", no_argument, NULL, OPTION_NORELAX}, 78#define OPTION_RELAX_SECTION (OPTION_MD_BASE + 2) 79 {"relax-section", no_argument, NULL, OPTION_RELAX_SECTION}, 80#define OPTION_EB (OPTION_MD_BASE + 3) 81 {"EB", no_argument, NULL, OPTION_EB}, 82#define OPTION_EL (OPTION_MD_BASE + 4) 83 {"EL", no_argument, NULL, OPTION_EL}, 84#define OPTION_MARCH (OPTION_MD_BASE + 5) 85 {"march", required_argument, NULL, OPTION_MARCH} 86}; 87 88size_t md_longopts_size = sizeof (md_longopts); 89 90/* The assembler supports three different relaxation modes, controlled by 91 command-line options. */ 92typedef enum 93{ 94 relax_section = 0, 95 relax_none, 96 relax_all 97} relax_optionT; 98 99/* Struct contains all assembler options set with .set. */ 100static struct 101{ 102 /* .set noat -> noat = 1 allows assembly code to use at without warning 103 and macro expansions generate a warning. 104 .set at -> noat = 0, assembly code using at warn but macro expansions 105 do not generate warnings. */ 106 bfd_boolean noat; 107 108 /* .set nobreak -> nobreak = 1 allows assembly code to use ba,bt without 109 warning. 110 .set break -> nobreak = 0, assembly code using ba,bt warns. */ 111 bfd_boolean nobreak; 112 113 /* .cmd line option -relax-all allows all branches and calls to be replaced 114 with longer versions. 115 -no-relax inhibits branch/call conversion. 116 The default value is relax_section, which relaxes branches within 117 a section. */ 118 relax_optionT relax; 119 120} nios2_as_options = {FALSE, FALSE, relax_section}; 121 122 123typedef struct nios2_insn_reloc 124{ 125 /* Any expression in the instruction is parsed into this field, 126 which is passed to fix_new_exp() to generate a fixup. */ 127 expressionS reloc_expression; 128 129 /* The type of the relocation to be applied. */ 130 bfd_reloc_code_real_type reloc_type; 131 132 /* PC-relative. */ 133 unsigned int reloc_pcrel; 134 135 /* The next relocation to be applied to the instruction. */ 136 struct nios2_insn_reloc *reloc_next; 137} nios2_insn_relocS; 138 139/* This struct is used to hold state when assembling instructions. */ 140typedef struct nios2_insn_info 141{ 142 /* Assembled instruction. */ 143 unsigned long insn_code; 144 145 /* Constant bits masked into insn_code for self-check mode. */ 146 unsigned long constant_bits; 147 148 /* Pointer to the relevant bit of the opcode table. */ 149 const struct nios2_opcode *insn_nios2_opcode; 150 /* After parsing ptrs to the tokens in the instruction fill this array 151 it is terminated with a null pointer (hence the first +1). 152 The second +1 is because in some parts of the code the opcode 153 is not counted as a token, but still placed in this array. */ 154 const char *insn_tokens[NIOS2_MAX_INSN_TOKENS + 1 + 1]; 155 156 /* This holds information used to generate fixups 157 and eventually relocations if it is not null. */ 158 nios2_insn_relocS *insn_reloc; 159} nios2_insn_infoS; 160 161 162/* This struct is used to convert Nios II pseudo-ops into the 163 corresponding real op. */ 164typedef struct nios2_ps_insn_info 165{ 166 /* Map this pseudo_op... */ 167 const char *pseudo_insn; 168 169 /* ...to this real instruction. */ 170 const char *insn; 171 172 /* Call this function to modify the operands.... */ 173 void (*arg_modifer_func) (char ** parsed_args, const char *arg, int num, 174 int start); 175 176 /* ...with these arguments. */ 177 const char *arg_modifier; 178 int num; 179 int index; 180 181 /* If arg_modifier_func allocates new memory, provide this function 182 to free it afterwards. */ 183 void (*arg_cleanup_func) (char **parsed_args, int num, int start); 184} nios2_ps_insn_infoS; 185 186/* Opcode hash table. */ 187static struct hash_control *nios2_opcode_hash = NULL; 188#define nios2_opcode_lookup(NAME) \ 189 ((struct nios2_opcode *) hash_find (nios2_opcode_hash, (NAME))) 190 191/* Register hash table. */ 192static struct hash_control *nios2_reg_hash = NULL; 193#define nios2_reg_lookup(NAME) \ 194 ((struct nios2_reg *) hash_find (nios2_reg_hash, (NAME))) 195 196 197/* Pseudo-op hash table. */ 198static struct hash_control *nios2_ps_hash = NULL; 199#define nios2_ps_lookup(NAME) \ 200 ((nios2_ps_insn_infoS *) hash_find (nios2_ps_hash, (NAME))) 201 202/* The known current alignment of the current section. */ 203static int nios2_current_align; 204static segT nios2_current_align_seg; 205 206static int nios2_auto_align_on = 1; 207 208/* The last seen label in the current section. This is used to auto-align 209 labels preceding instructions. */ 210static symbolS *nios2_last_label; 211 212/* If we saw a 16-bit CDX instruction, we can align on 2-byte boundaries 213 instead of 4-bytes. Use this to keep track of the minimum power-of-2 214 alignment. */ 215static int nios2_min_align = 2; 216 217#ifdef OBJ_ELF 218/* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 219symbolS *GOT_symbol; 220#endif 221 222/* The processor architecture value, EF_NIOS2_ARCH_R1 by default. */ 223static int nios2_architecture = EF_NIOS2_ARCH_R1; 224 225 226/** Utility routines. */ 227/* Function md_chars_to_number takes the sequence of 228 bytes in buf and returns the corresponding value 229 in an int. n must be 1, 2 or 4. */ 230static valueT 231md_chars_to_number (char *buf, int n) 232{ 233 int i; 234 valueT val; 235 236 gas_assert (n == 1 || n == 2 || n == 4); 237 238 val = 0; 239 if (target_big_endian) 240 for (i = 0; i < n; ++i) 241 val = val | ((buf[i] & 0xff) << 8 * (n - (i + 1))); 242 else 243 for (i = 0; i < n; ++i) 244 val = val | ((buf[i] & 0xff) << 8 * i); 245 return val; 246} 247 248 249/* This function turns a C long int, short int or char 250 into the series of bytes that represent the number 251 on the target machine. */ 252void 253md_number_to_chars (char *buf, valueT val, int n) 254{ 255 gas_assert (n == 1 || n == 2 || n == 4 || n == 8); 256 if (target_big_endian) 257 number_to_chars_bigendian (buf, val, n); 258 else 259 number_to_chars_littleendian (buf, val, n); 260} 261 262/* Turn a string in input_line_pointer into a floating point constant 263 of type TYPE, and store the appropriate bytes in *LITP. The number 264 of LITTLENUMS emitted is stored in *SIZEP. An error message is 265 returned, or NULL on OK. */ 266const char * 267md_atof (int type, char *litP, int *sizeP) 268{ 269 int prec; 270 LITTLENUM_TYPE words[4]; 271 char *t; 272 int i; 273 274 switch (type) 275 { 276 case 'f': 277 prec = 2; 278 break; 279 case 'd': 280 prec = 4; 281 break; 282 default: 283 *sizeP = 0; 284 return _("bad call to md_atof"); 285 } 286 287 t = atof_ieee (input_line_pointer, type, words); 288 if (t) 289 input_line_pointer = t; 290 291 *sizeP = prec * 2; 292 293 if (! target_big_endian) 294 for (i = prec - 1; i >= 0; i--, litP += 2) 295 md_number_to_chars (litP, (valueT) words[i], 2); 296 else 297 for (i = 0; i < prec; i++, litP += 2) 298 md_number_to_chars (litP, (valueT) words[i], 2); 299 300 return NULL; 301} 302 303/* Return true if STR starts with PREFIX, which should be a string literal. */ 304#define strprefix(STR, PREFIX) \ 305 (strncmp ((STR), PREFIX, strlen (PREFIX)) == 0) 306 307 308/* Return true if STR is prefixed with a special relocation operator. */ 309static int 310nios2_special_relocation_p (const char *str) 311{ 312 return (strprefix (str, "%lo") 313 || strprefix (str, "%hi") 314 || strprefix (str, "%hiadj") 315 || strprefix (str, "%gprel") 316 || strprefix (str, "%got") 317 || strprefix (str, "%call") 318 || strprefix (str, "%gotoff_lo") 319 || strprefix (str, "%gotoff_hiadj") 320 || strprefix (str, "%tls_gd") 321 || strprefix (str, "%tls_ldm") 322 || strprefix (str, "%tls_ldo") 323 || strprefix (str, "%tls_ie") 324 || strprefix (str, "%tls_le") 325 || strprefix (str, "%gotoff")); 326} 327 328 329/* nop fill patterns for text section. */ 330static char const nop_r1[4] = { 0x3a, 0x88, 0x01, 0x00 }; 331static char const nop_r2[4] = { 0x20, 0x00, 0x00, 0xc4 }; 332static char const nop_r2_cdx[2] = { 0x3b, 0x00 }; 333static char const *nop32 = nop_r1; 334static char const *nop16 = NULL; 335 336/* Handles all machine-dependent alignment needs. */ 337static void 338nios2_align (int log_size, const char *pfill, symbolS *label) 339{ 340 int align; 341 long max_alignment = 15; 342 343 /* The front end is prone to changing segments out from under us 344 temporarily when -g is in effect. */ 345 int switched_seg_p = (nios2_current_align_seg != now_seg); 346 347 align = log_size; 348 if (align > max_alignment) 349 { 350 align = max_alignment; 351 as_bad (_("Alignment too large: %d. assumed"), align); 352 } 353 else if (align < 0) 354 { 355 as_warn (_("Alignment negative: 0 assumed")); 356 align = 0; 357 } 358 359 if (align != 0) 360 { 361 if (subseg_text_p (now_seg) && align >= nios2_min_align) 362 { 363 /* First, make sure we're on the minimum boundary, in case 364 someone has been putting .byte values the text section. */ 365 if (nios2_current_align < nios2_min_align || switched_seg_p) 366 frag_align (nios2_min_align, 0, 0); 367 368 /* If we might be on a 2-byte boundary, first align to a 369 4-byte boundary using the 2-byte nop as fill. */ 370 if (nios2_min_align == 1 371 && align > nios2_min_align 372 && pfill == nop32 ) 373 { 374 gas_assert (nop16); 375 frag_align_pattern (2, nop16, 2, 0); 376 } 377 378 /* Now fill in the alignment pattern. */ 379 if (pfill != NULL) 380 frag_align_pattern (align, pfill, 4, 0); 381 else 382 frag_align (align, 0, 0); 383 } 384 else 385 frag_align (align, 0, 0); 386 387 if (!switched_seg_p) 388 nios2_current_align = align; 389 390 /* If the last label was in a different section we can't align it. */ 391 if (label != NULL && !switched_seg_p) 392 { 393 symbolS *sym; 394 int label_seen = FALSE; 395 struct frag *old_frag; 396 valueT old_value; 397 valueT new_value; 398 399 gas_assert (S_GET_SEGMENT (label) == now_seg); 400 401 old_frag = symbol_get_frag (label); 402 old_value = S_GET_VALUE (label); 403 new_value = (valueT) frag_now_fix (); 404 405 /* It is possible to have more than one label at a particular 406 address, especially if debugging is enabled, so we must 407 take care to adjust all the labels at this address in this 408 fragment. To save time we search from the end of the symbol 409 list, backwards, since the symbols we are interested in are 410 almost certainly the ones that were most recently added. 411 Also to save time we stop searching once we have seen at least 412 one matching label, and we encounter a label that is no longer 413 in the target fragment. Note, this search is guaranteed to 414 find at least one match when sym == label, so no special case 415 code is necessary. */ 416 for (sym = symbol_lastP; sym != NULL; sym = symbol_previous (sym)) 417 if (symbol_get_frag (sym) == old_frag 418 && S_GET_VALUE (sym) == old_value) 419 { 420 label_seen = TRUE; 421 symbol_set_frag (sym, frag_now); 422 S_SET_VALUE (sym, new_value); 423 } 424 else if (label_seen && symbol_get_frag (sym) != old_frag) 425 break; 426 } 427 record_alignment (now_seg, align); 428 } 429} 430 431 432/** Support for self-check mode. */ 433 434/* Mode of the assembler. */ 435typedef enum 436{ 437 NIOS2_MODE_ASSEMBLE, /* Ordinary operation. */ 438 NIOS2_MODE_TEST /* Hidden mode used for self testing. */ 439} NIOS2_MODE; 440 441static NIOS2_MODE nios2_mode = NIOS2_MODE_ASSEMBLE; 442 443/* This function is used to in self-checking mode 444 to check the assembled instruction 445 opcode should be the assembled opcode, and exp_opcode 446 the parsed string representing the expected opcode. */ 447static void 448nios2_check_assembly (unsigned int opcode, const char *exp_opcode) 449{ 450 if (nios2_mode == NIOS2_MODE_TEST) 451 { 452 if (exp_opcode == NULL) 453 as_bad (_("expecting opcode string in self test mode")); 454 else if (opcode != strtoul (exp_opcode, NULL, 16)) 455 as_bad (_("assembly 0x%08x, expected %s"), opcode, exp_opcode); 456 } 457} 458 459 460/** Support for machine-dependent assembler directives. */ 461/* Handle the .align pseudo-op. This aligns to a power of two. It 462 also adjusts any current instruction label. We treat this the same 463 way the MIPS port does: .align 0 turns off auto alignment. */ 464static void 465s_nios2_align (int ignore ATTRIBUTE_UNUSED) 466{ 467 int align; 468 char fill; 469 const char *pfill = NULL; 470 long max_alignment = 15; 471 472 align = get_absolute_expression (); 473 if (align > max_alignment) 474 { 475 align = max_alignment; 476 as_bad (_("Alignment too large: %d. assumed"), align); 477 } 478 else if (align < 0) 479 { 480 as_warn (_("Alignment negative: 0 assumed")); 481 align = 0; 482 } 483 484 if (*input_line_pointer == ',') 485 { 486 input_line_pointer++; 487 fill = get_absolute_expression (); 488 pfill = (const char *) &fill; 489 } 490 else if (subseg_text_p (now_seg)) 491 pfill = (const char *) nop32; 492 else 493 { 494 pfill = NULL; 495 nios2_last_label = NULL; 496 } 497 498 if (align != 0) 499 { 500 nios2_auto_align_on = 1; 501 nios2_align (align, pfill, nios2_last_label); 502 nios2_last_label = NULL; 503 } 504 else 505 nios2_auto_align_on = 0; 506 507 demand_empty_rest_of_line (); 508} 509 510/* Handle the .text pseudo-op. This is like the usual one, but it 511 clears the saved last label and resets known alignment. */ 512static void 513s_nios2_text (int i) 514{ 515 s_text (i); 516 nios2_last_label = NULL; 517 nios2_current_align = 0; 518 nios2_current_align_seg = now_seg; 519} 520 521/* Handle the .data pseudo-op. This is like the usual one, but it 522 clears the saved last label and resets known alignment. */ 523static void 524s_nios2_data (int i) 525{ 526 s_data (i); 527 nios2_last_label = NULL; 528 nios2_current_align = 0; 529 nios2_current_align_seg = now_seg; 530} 531 532/* Handle the .section pseudo-op. This is like the usual one, but it 533 clears the saved last label and resets known alignment. */ 534static void 535s_nios2_section (int ignore) 536{ 537 obj_elf_section (ignore); 538 nios2_last_label = NULL; 539 nios2_current_align = 0; 540 nios2_current_align_seg = now_seg; 541} 542 543/* Explicitly unaligned cons. */ 544static void 545s_nios2_ucons (int nbytes) 546{ 547 int hold; 548 hold = nios2_auto_align_on; 549 nios2_auto_align_on = 0; 550 cons (nbytes); 551 nios2_auto_align_on = hold; 552} 553 554/* Handle the .sdata directive. */ 555static void 556s_nios2_sdata (int ignore ATTRIBUTE_UNUSED) 557{ 558 get_absolute_expression (); /* Ignored. */ 559 subseg_new (".sdata", 0); 560 demand_empty_rest_of_line (); 561} 562 563/* .set sets assembler options eg noat/at and is also used 564 to set symbol values (.equ, .equiv ). */ 565static void 566s_nios2_set (int equiv) 567{ 568 char *save = input_line_pointer; 569 char *directive; 570 char delim = get_symbol_name (&directive); 571 char *endline = input_line_pointer; 572 573 (void) restore_line_pointer (delim); 574 575 /* We only want to handle ".set XXX" if the 576 user has tried ".set XXX, YYY" they are not 577 trying a directive. This prevents 578 us from polluting the name space. */ 579 SKIP_WHITESPACE (); 580 if (is_end_of_line[(unsigned char) *input_line_pointer]) 581 { 582 bfd_boolean done = TRUE; 583 *endline = 0; 584 585 if (!strcmp (directive, "noat")) 586 nios2_as_options.noat = TRUE; 587 else if (!strcmp (directive, "at")) 588 nios2_as_options.noat = FALSE; 589 else if (!strcmp (directive, "nobreak")) 590 nios2_as_options.nobreak = TRUE; 591 else if (!strcmp (directive, "break")) 592 nios2_as_options.nobreak = FALSE; 593 else if (!strcmp (directive, "norelax")) 594 nios2_as_options.relax = relax_none; 595 else if (!strcmp (directive, "relaxsection")) 596 nios2_as_options.relax = relax_section; 597 else if (!strcmp (directive, "relaxall")) 598 nios2_as_options.relax = relax_all; 599 else 600 done = FALSE; 601 602 if (done) 603 { 604 *endline = delim; 605 demand_empty_rest_of_line (); 606 return; 607 } 608 } 609 610 /* If we fall through to here, either we have ".set XXX, YYY" 611 or we have ".set XXX" where XXX is unknown or we have 612 a syntax error. */ 613 input_line_pointer = save; 614 s_set (equiv); 615} 616 617/* Machine-dependent assembler directives. 618 Format of each entry is: 619 { "directive", handler_func, param } */ 620const pseudo_typeS md_pseudo_table[] = { 621 {"align", s_nios2_align, 0}, 622 {"text", s_nios2_text, 0}, 623 {"data", s_nios2_data, 0}, 624 {"section", s_nios2_section, 0}, 625 {"section.s", s_nios2_section, 0}, 626 {"sect", s_nios2_section, 0}, 627 {"sect.s", s_nios2_section, 0}, 628 /* .dword and .half are included for compatibility with MIPS. */ 629 {"dword", cons, 8}, 630 {"half", cons, 2}, 631 /* NIOS2 native word size is 4 bytes, so we override 632 the GAS default of 2. */ 633 {"word", cons, 4}, 634 /* Explicitly unaligned directives. */ 635 {"2byte", s_nios2_ucons, 2}, 636 {"4byte", s_nios2_ucons, 4}, 637 {"8byte", s_nios2_ucons, 8}, 638 {"16byte", s_nios2_ucons, 16}, 639#ifdef OBJ_ELF 640 {"sdata", s_nios2_sdata, 0}, 641#endif 642 {"set", s_nios2_set, 0}, 643 {NULL, NULL, 0} 644}; 645 646 647/** Relaxation support. */ 648 649/* We support two relaxation modes: a limited PC-relative mode with 650 -relax-section (the default), and an absolute jump mode with -relax-all. 651 652 Nios II PC-relative branch instructions only support 16-bit offsets. 653 And, there's no good way to add a 32-bit constant to the PC without 654 using two registers. 655 656 To deal with this, for the pc-relative relaxation mode we convert 657 br label 658 into a series of 16-bit adds, like: 659 nextpc at 660 addi at, at, 32767 661 ... 662 addi at, at, remainder 663 jmp at 664 665 Similarly, conditional branches are converted from 666 b(condition) r, s, label 667 into a series like: 668 b(opposite condition) r, s, skip 669 nextpc at 670 addi at, at, 32767 671 ... 672 addi at, at, remainder 673 jmp at 674 skip: 675 676 The compiler can do a better job, either by converting the branch 677 directly into a JMP (going through the GOT for PIC) or by allocating 678 a second register for the 32-bit displacement. 679 680 For the -relax-all relaxation mode, the conversions are 681 movhi at, %hi(symbol+offset) 682 ori at, %lo(symbol+offset) 683 jmp at 684 and 685 b(opposite condition), r, s, skip 686 movhi at, %hi(symbol+offset) 687 ori at, %lo(symbol+offset) 688 jmp at 689 skip: 690 respectively. 691 692 16-bit CDX branch instructions are relaxed first into equivalent 693 32-bit branches and then the above transformations are applied 694 if necessary. 695 696*/ 697 698/* Arbitrarily limit the number of addis we can insert; we need to be able 699 to specify the maximum growth size for each frag that contains a 700 relaxable branch. There's no point in specifying a huge number here 701 since that means the assembler needs to allocate that much extra 702 memory for every branch, and almost no real code will ever need it. 703 Plus, as already noted a better solution is to just use a jmp, or 704 allocate a second register to hold a 32-bit displacement. 705 FIXME: Rather than making this a constant, it could be controlled by 706 a command-line argument. */ 707#define RELAX_MAX_ADDI 32 708 709/* The fr_subtype field represents the target-specific relocation state. 710 It has type relax_substateT (unsigned int). We use it to track the 711 number of addis necessary, plus a bit to track whether this is a 712 conditional branch and a bit for 16-bit CDX instructions. 713 Regardless of the smaller RELAX_MAX_ADDI limit, we reserve 16 bits 714 in the fr_subtype to encode the number of addis so that the whole 715 theoretically-valid range is representable. 716 For the -relax-all mode, N = 0 represents an in-range branch and N = 1 717 represents a branch that needs to be relaxed. */ 718#define UBRANCH (0 << 16) 719#define CBRANCH (1 << 16) 720#define CDXBRANCH (1 << 17) 721#define IS_CBRANCH(SUBTYPE) ((SUBTYPE) & CBRANCH) 722#define IS_UBRANCH(SUBTYPE) (!IS_CBRANCH (SUBTYPE)) 723#define IS_CDXBRANCH(SUBTYPE) ((SUBTYPE) & CDXBRANCH) 724#define UBRANCH_SUBTYPE(N) (UBRANCH | (N)) 725#define CBRANCH_SUBTYPE(N) (CBRANCH | (N)) 726#define CDX_UBRANCH_SUBTYPE(N) (CDXBRANCH | UBRANCH | (N)) 727#define CDX_CBRANCH_SUBTYPE(N) (CDXBRANCH | CBRANCH | (N)) 728#define SUBTYPE_ADDIS(SUBTYPE) ((SUBTYPE) & 0xffff) 729 730/* For the -relax-section mode, unconditional branches require 2 extra i 731 nstructions besides the addis, conditional branches require 3. */ 732#define UBRANCH_ADDIS_TO_SIZE(N) (((N) + 2) * 4) 733#define CBRANCH_ADDIS_TO_SIZE(N) (((N) + 3) * 4) 734 735/* For the -relax-all mode, unconditional branches require 3 instructions 736 and conditional branches require 4. */ 737#define UBRANCH_JUMP_SIZE 12 738#define CBRANCH_JUMP_SIZE 16 739 740/* Maximum sizes of relaxation sequences. */ 741#define UBRANCH_MAX_SIZE \ 742 (nios2_as_options.relax == relax_all \ 743 ? UBRANCH_JUMP_SIZE \ 744 : UBRANCH_ADDIS_TO_SIZE (RELAX_MAX_ADDI)) 745#define CBRANCH_MAX_SIZE \ 746 (nios2_as_options.relax == relax_all \ 747 ? CBRANCH_JUMP_SIZE \ 748 : CBRANCH_ADDIS_TO_SIZE (RELAX_MAX_ADDI)) 749 750/* Register number of AT, the assembler temporary. */ 751#define AT_REGNUM 1 752 753/* Determine how many bytes are required to represent the sequence 754 indicated by SUBTYPE. */ 755static int 756nios2_relax_subtype_size (relax_substateT subtype) 757{ 758 int n = SUBTYPE_ADDIS (subtype); 759 if (n == 0) 760 /* Regular conditional/unconditional branch instruction. */ 761 return (IS_CDXBRANCH (subtype) ? 2 : 4); 762 else if (nios2_as_options.relax == relax_all) 763 return (IS_CBRANCH (subtype) ? CBRANCH_JUMP_SIZE : UBRANCH_JUMP_SIZE); 764 else if (IS_CBRANCH (subtype)) 765 return CBRANCH_ADDIS_TO_SIZE (n); 766 else 767 return UBRANCH_ADDIS_TO_SIZE (n); 768} 769 770/* Estimate size of fragp before relaxation. 771 This could also examine the offset in fragp and adjust 772 fragp->fr_subtype, but we will do that in nios2_relax_frag anyway. */ 773int 774md_estimate_size_before_relax (fragS *fragp, segT segment ATTRIBUTE_UNUSED) 775{ 776 return nios2_relax_subtype_size (fragp->fr_subtype); 777} 778 779/* Implement md_relax_frag, returning the change in size of the frag. */ 780long 781nios2_relax_frag (segT segment, fragS *fragp, long stretch) 782{ 783 addressT target = fragp->fr_offset; 784 relax_substateT subtype = fragp->fr_subtype; 785 symbolS *symbolp = fragp->fr_symbol; 786 787 if (symbolp) 788 { 789 fragS *sym_frag = symbol_get_frag (symbolp); 790 offsetT offset; 791 int n; 792 bfd_boolean is_cdx = FALSE; 793 794 target += S_GET_VALUE (symbolp); 795 796 /* See comments in write.c:relax_frag about handling of stretch. */ 797 if (stretch != 0 798 && sym_frag->relax_marker != fragp->relax_marker) 799 { 800 if (stretch < 0 || sym_frag->region == fragp->region) 801 target += stretch; 802 else if (target < fragp->fr_address) 803 target = fragp->fr_next->fr_address + stretch; 804 } 805 806 /* We subtract fr_var (4 for 32-bit insns) because all pc relative 807 branches are from the next instruction. */ 808 offset = target - fragp->fr_address - fragp->fr_fix - fragp->fr_var; 809 if (IS_CDXBRANCH (subtype) && IS_UBRANCH (subtype) 810 && offset >= -1024 && offset < 1024) 811 /* PC-relative CDX branch with 11-bit offset. */ 812 is_cdx = TRUE; 813 else if (IS_CDXBRANCH (subtype) && IS_CBRANCH (subtype) 814 && offset >= -128 && offset < 128) 815 /* PC-relative CDX branch with 8-bit offset. */ 816 is_cdx = TRUE; 817 else if (offset >= -32768 && offset < 32768) 818 /* Fits in PC-relative branch. */ 819 n = 0; 820 else if (nios2_as_options.relax == relax_all) 821 /* Convert to jump. */ 822 n = 1; 823 else if (nios2_as_options.relax == relax_section 824 && S_GET_SEGMENT (symbolp) == segment 825 && S_IS_DEFINED (symbolp)) 826 /* Attempt a PC-relative relaxation on a branch to a defined 827 symbol in the same segment. */ 828 { 829 /* The relaxation for conditional branches is offset by 4 830 bytes because we insert the inverted branch around the 831 sequence. */ 832 if (IS_CBRANCH (subtype)) 833 offset = offset - 4; 834 if (offset > 0) 835 n = offset / 32767 + 1; 836 else 837 n = offset / -32768 + 1; 838 839 /* Bail out immediately if relaxation has failed. If we try to 840 defer the diagnostic to md_convert_frag, some pathological test 841 cases (e.g. gcc/testsuite/gcc.c-torture/compile/20001226-1.c) 842 apparently never converge. By returning 0 here we could pretend 843 to the caller that nothing has changed, but that leaves things 844 in an inconsistent state when we get to md_convert_frag. */ 845 if (n > RELAX_MAX_ADDI) 846 { 847 as_bad_where (fragp->fr_file, fragp->fr_line, 848 _("branch offset out of range\n")); 849 as_fatal (_("branch relaxation failed\n")); 850 } 851 } 852 else 853 /* We cannot handle this case, diagnose overflow later. */ 854 return 0; 855 856 if (is_cdx) 857 fragp->fr_subtype = subtype; 858 else if (IS_CBRANCH (subtype)) 859 fragp->fr_subtype = CBRANCH_SUBTYPE (n); 860 else 861 fragp->fr_subtype = UBRANCH_SUBTYPE (n); 862 863 return (nios2_relax_subtype_size (fragp->fr_subtype) 864 - nios2_relax_subtype_size (subtype)); 865 } 866 867 /* If we got here, it's probably an error. */ 868 return 0; 869} 870 871 872/* Complete fragp using the data from the relaxation pass. */ 873void 874md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT segment ATTRIBUTE_UNUSED, 875 fragS *fragp) 876{ 877 char *buffer = fragp->fr_literal + fragp->fr_fix; 878 relax_substateT subtype = fragp->fr_subtype; 879 int n = SUBTYPE_ADDIS (subtype); 880 addressT target = fragp->fr_offset; 881 symbolS *symbolp = fragp->fr_symbol; 882 offsetT offset; 883 unsigned int addend_mask, addi_mask, op; 884 offsetT addend, remainder; 885 int i; 886 bfd_boolean is_r2 = (bfd_get_mach (stdoutput) == bfd_mach_nios2r2); 887 888 /* If this is a CDX branch we're not relaxing, just generate the fixup. */ 889 if (IS_CDXBRANCH (subtype)) 890 { 891 gas_assert (is_r2); 892 fix_new (fragp, fragp->fr_fix, 2, fragp->fr_symbol, 893 fragp->fr_offset, 1, 894 (IS_UBRANCH (subtype) 895 ? BFD_RELOC_NIOS2_R2_I10_1_PCREL 896 : BFD_RELOC_NIOS2_R2_T1I7_1_PCREL)); 897 fragp->fr_fix += 2; 898 return; 899 } 900 901 /* If this is a CDX branch we are relaxing, turn it into an equivalent 902 32-bit branch and then fall through to the normal non-CDX cases. */ 903 if (fragp->fr_var == 2) 904 { 905 unsigned int opcode = md_chars_to_number (buffer, 2); 906 gas_assert (is_r2); 907 if (IS_CBRANCH (subtype)) 908 { 909 unsigned int reg = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (opcode)]; 910 if (GET_IW_R2_OP (opcode) == R2_OP_BNEZ_N) 911 opcode = MATCH_R2_BNE | SET_IW_F2I16_A (reg); 912 else 913 opcode = MATCH_R2_BEQ | SET_IW_F2I16_A (reg); 914 } 915 else 916 opcode = MATCH_R2_BR; 917 md_number_to_chars (buffer, opcode, 4); 918 fragp->fr_var = 4; 919 } 920 921 /* If we didn't or can't relax, this is a regular branch instruction. 922 We just need to generate the fixup for the symbol and offset. */ 923 if (n == 0) 924 { 925 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, 926 fragp->fr_offset, 1, BFD_RELOC_16_PCREL); 927 fragp->fr_fix += 4; 928 return; 929 } 930 931 /* Replace the cbranch at fr_fix with one that has the opposite condition 932 in order to jump around the block of instructions we'll be adding. */ 933 if (IS_CBRANCH (subtype)) 934 { 935 unsigned int br_opcode; 936 unsigned int old_op, new_op; 937 int nbytes; 938 939 /* Account for the nextpc and jmp in the pc-relative case, or the two 940 load instructions and jump in the absolute case. */ 941 if (nios2_as_options.relax == relax_section) 942 nbytes = (n + 2) * 4; 943 else 944 nbytes = 12; 945 946 br_opcode = md_chars_to_number (buffer, 4); 947 if (is_r2) 948 { 949 old_op = GET_IW_R2_OP (br_opcode); 950 switch (old_op) 951 { 952 case R2_OP_BEQ: 953 new_op = R2_OP_BNE; 954 break; 955 case R2_OP_BNE: 956 new_op = R2_OP_BEQ; 957 break; 958 case R2_OP_BGE: 959 new_op = R2_OP_BLT; 960 break; 961 case R2_OP_BGEU: 962 new_op = R2_OP_BLTU; 963 break; 964 case R2_OP_BLT: 965 new_op = R2_OP_BGE; 966 break; 967 case R2_OP_BLTU: 968 new_op = R2_OP_BGEU; 969 break; 970 default: 971 abort (); 972 } 973 br_opcode = ((br_opcode & ~IW_R2_OP_SHIFTED_MASK) 974 | SET_IW_R2_OP (new_op)); 975 br_opcode = br_opcode | SET_IW_F2I16_IMM16 (nbytes); 976 } 977 else 978 { 979 old_op = GET_IW_R1_OP (br_opcode); 980 switch (old_op) 981 { 982 case R1_OP_BEQ: 983 new_op = R1_OP_BNE; 984 break; 985 case R1_OP_BNE: 986 new_op = R1_OP_BEQ; 987 break; 988 case R1_OP_BGE: 989 new_op = R1_OP_BLT; 990 break; 991 case R1_OP_BGEU: 992 new_op = R1_OP_BLTU; 993 break; 994 case R1_OP_BLT: 995 new_op = R1_OP_BGE; 996 break; 997 case R1_OP_BLTU: 998 new_op = R1_OP_BGEU; 999 break; 1000 default: 1001 abort (); 1002 } 1003 br_opcode = ((br_opcode & ~IW_R1_OP_SHIFTED_MASK) 1004 | SET_IW_R1_OP (new_op)); 1005 br_opcode = br_opcode | SET_IW_I_IMM16 (nbytes); 1006 } 1007 md_number_to_chars (buffer, br_opcode, 4); 1008 fragp->fr_fix += 4; 1009 buffer += 4; 1010 } 1011 1012 /* Load at for the PC-relative case. */ 1013 if (nios2_as_options.relax == relax_section) 1014 { 1015 /* Insert the nextpc instruction. */ 1016 if (is_r2) 1017 op = MATCH_R2_NEXTPC | SET_IW_F3X6L5_C (AT_REGNUM); 1018 else 1019 op = MATCH_R1_NEXTPC | SET_IW_R_C (AT_REGNUM); 1020 md_number_to_chars (buffer, op, 4); 1021 fragp->fr_fix += 4; 1022 buffer += 4; 1023 1024 /* We need to know whether the offset is positive or negative. */ 1025 target += S_GET_VALUE (symbolp); 1026 offset = target - fragp->fr_address - fragp->fr_fix; 1027 if (offset > 0) 1028 addend = 32767; 1029 else 1030 addend = -32768; 1031 if (is_r2) 1032 addend_mask = SET_IW_F2I16_IMM16 ((unsigned int)addend); 1033 else 1034 addend_mask = SET_IW_I_IMM16 ((unsigned int)addend); 1035 1036 /* Insert n-1 addi instructions. */ 1037 if (is_r2) 1038 addi_mask = (MATCH_R2_ADDI 1039 | SET_IW_F2I16_B (AT_REGNUM) 1040 | SET_IW_F2I16_A (AT_REGNUM)); 1041 else 1042 addi_mask = (MATCH_R1_ADDI 1043 | SET_IW_I_B (AT_REGNUM) 1044 | SET_IW_I_A (AT_REGNUM)); 1045 for (i = 0; i < n - 1; i ++) 1046 { 1047 md_number_to_chars (buffer, addi_mask | addend_mask, 4); 1048 fragp->fr_fix += 4; 1049 buffer += 4; 1050 } 1051 1052 /* Insert the last addi instruction to hold the remainder. */ 1053 remainder = offset - addend * (n - 1); 1054 gas_assert (remainder >= -32768 && remainder <= 32767); 1055 if (is_r2) 1056 addend_mask = SET_IW_F2I16_IMM16 ((unsigned int)remainder); 1057 else 1058 addend_mask = SET_IW_I_IMM16 ((unsigned int)remainder); 1059 md_number_to_chars (buffer, addi_mask | addend_mask, 4); 1060 fragp->fr_fix += 4; 1061 buffer += 4; 1062 } 1063 1064 /* Load at for the absolute case. */ 1065 else 1066 { 1067 if (is_r2) 1068 op = MATCH_R2_ORHI | SET_IW_F2I16_B (AT_REGNUM) | SET_IW_F2I16_A (0); 1069 else 1070 op = MATCH_R1_ORHI | SET_IW_I_B (AT_REGNUM) | SET_IW_I_A (0); 1071 md_number_to_chars (buffer, op, 4); 1072 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset, 1073 0, BFD_RELOC_NIOS2_HI16); 1074 fragp->fr_fix += 4; 1075 buffer += 4; 1076 if (is_r2) 1077 op = (MATCH_R2_ORI | SET_IW_F2I16_B (AT_REGNUM) 1078 | SET_IW_F2I16_A (AT_REGNUM)); 1079 else 1080 op = (MATCH_R1_ORI | SET_IW_I_B (AT_REGNUM) 1081 | SET_IW_I_A (AT_REGNUM)); 1082 md_number_to_chars (buffer, op, 4); 1083 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset, 1084 0, BFD_RELOC_NIOS2_LO16); 1085 fragp->fr_fix += 4; 1086 buffer += 4; 1087 } 1088 1089 /* Insert the jmp instruction. */ 1090 if (is_r2) 1091 op = MATCH_R2_JMP | SET_IW_F3X6L5_A (AT_REGNUM); 1092 else 1093 op = MATCH_R1_JMP | SET_IW_R_A (AT_REGNUM); 1094 md_number_to_chars (buffer, op, 4); 1095 fragp->fr_fix += 4; 1096 buffer += 4; 1097} 1098 1099 1100/** Fixups and overflow checking. */ 1101 1102/* Check a fixup for overflow. */ 1103static bfd_boolean 1104nios2_check_overflow (valueT fixup, reloc_howto_type *howto) 1105{ 1106 /* If there is a rightshift, check that the low-order bits are 1107 zero before applying it. */ 1108 if (howto->rightshift) 1109 { 1110 if ((~(~((valueT) 0) << howto->rightshift) & fixup) 1111 && howto->complain_on_overflow != complain_overflow_dont) 1112 return TRUE; 1113 fixup = ((signed)fixup) >> howto->rightshift; 1114 } 1115 1116 /* Check for overflow - return TRUE if overflow, FALSE if not. */ 1117 switch (howto->complain_on_overflow) 1118 { 1119 case complain_overflow_dont: 1120 break; 1121 case complain_overflow_bitfield: 1122 if ((fixup >> howto->bitsize) != 0 1123 && ((signed) fixup >> howto->bitsize) != -1) 1124 return TRUE; 1125 break; 1126 case complain_overflow_signed: 1127 if ((fixup & 0x80000000) > 0) 1128 { 1129 /* Check for negative overflow. */ 1130 if ((signed) fixup < (signed) (~0U << (howto->bitsize - 1))) 1131 return TRUE; 1132 } 1133 else 1134 { 1135 /* Check for positive overflow. */ 1136 if (fixup >= ((unsigned) 1 << (howto->bitsize - 1))) 1137 return TRUE; 1138 } 1139 break; 1140 case complain_overflow_unsigned: 1141 if ((fixup >> howto->bitsize) != 0) 1142 return TRUE; 1143 break; 1144 default: 1145 as_bad (_("error checking for overflow - broken assembler")); 1146 break; 1147 } 1148 return FALSE; 1149} 1150 1151/* Emit diagnostic for fixup overflow. */ 1152static void 1153nios2_diagnose_overflow (valueT fixup, reloc_howto_type *howto, 1154 fixS *fixP, valueT value) 1155{ 1156 if (fixP->fx_r_type == BFD_RELOC_8 1157 || fixP->fx_r_type == BFD_RELOC_16 1158 || fixP->fx_r_type == BFD_RELOC_32) 1159 /* These relocs are against data, not instructions. */ 1160 as_bad_where (fixP->fx_file, fixP->fx_line, 1161 _("immediate value 0x%x truncated to 0x%x"), 1162 (unsigned int) fixup, 1163 (unsigned int) (~(~(valueT) 0 << howto->bitsize) & fixup)); 1164 else 1165 { 1166 /* What opcode is the instruction? This will determine 1167 whether we check for overflow in immediate values 1168 and what error message we get. */ 1169 const struct nios2_opcode *opcode; 1170 enum overflow_type overflow_msg_type; 1171 unsigned int range_min; 1172 unsigned int range_max; 1173 unsigned int address; 1174 1175 opcode = nios2_find_opcode_hash (value, bfd_get_mach (stdoutput)); 1176 gas_assert (opcode); 1177 gas_assert (fixP->fx_size == opcode->size); 1178 overflow_msg_type = opcode->overflow_msg; 1179 switch (overflow_msg_type) 1180 { 1181 case call_target_overflow: 1182 range_min 1183 = ((fixP->fx_frag->fr_address + fixP->fx_where) & 0xf0000000); 1184 range_max = range_min + 0x0fffffff; 1185 address = fixup | range_min; 1186 1187 as_bad_where (fixP->fx_file, fixP->fx_line, 1188 _("call target address 0x%08x out of range 0x%08x to 0x%08x"), 1189 address, range_min, range_max); 1190 break; 1191 case branch_target_overflow: 1192 if (opcode->format == iw_i_type || opcode->format == iw_F2I16_type) 1193 as_bad_where (fixP->fx_file, fixP->fx_line, 1194 _("branch offset %d out of range %d to %d"), 1195 (int)fixup, -32768, 32767); 1196 else 1197 as_bad_where (fixP->fx_file, fixP->fx_line, 1198 _("branch offset %d out of range"), 1199 (int)fixup); 1200 break; 1201 case address_offset_overflow: 1202 if (opcode->format == iw_i_type || opcode->format == iw_F2I16_type) 1203 as_bad_where (fixP->fx_file, fixP->fx_line, 1204 _("%s offset %d out of range %d to %d"), 1205 opcode->name, (int)fixup, -32768, 32767); 1206 else 1207 as_bad_where (fixP->fx_file, fixP->fx_line, 1208 _("%s offset %d out of range"), 1209 opcode->name, (int)fixup); 1210 break; 1211 case signed_immed16_overflow: 1212 as_bad_where (fixP->fx_file, fixP->fx_line, 1213 _("immediate value %d out of range %d to %d"), 1214 (int)fixup, -32768, 32767); 1215 break; 1216 case unsigned_immed16_overflow: 1217 as_bad_where (fixP->fx_file, fixP->fx_line, 1218 _("immediate value %u out of range %u to %u"), 1219 (unsigned int)fixup, 0, 65535); 1220 break; 1221 case unsigned_immed5_overflow: 1222 as_bad_where (fixP->fx_file, fixP->fx_line, 1223 _("immediate value %u out of range %u to %u"), 1224 (unsigned int)fixup, 0, 31); 1225 break; 1226 case signed_immed12_overflow: 1227 as_bad_where (fixP->fx_file, fixP->fx_line, 1228 _("immediate value %d out of range %d to %d"), 1229 (int)fixup, -2048, 2047); 1230 break; 1231 case custom_opcode_overflow: 1232 as_bad_where (fixP->fx_file, fixP->fx_line, 1233 _("custom instruction opcode %u out of range %u to %u"), 1234 (unsigned int)fixup, 0, 255); 1235 break; 1236 default: 1237 as_bad_where (fixP->fx_file, fixP->fx_line, 1238 _("overflow in immediate argument")); 1239 break; 1240 } 1241 } 1242} 1243 1244/* Apply a fixup to the object file. */ 1245void 1246md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 1247{ 1248 /* Assert that the fixup is one we can handle. */ 1249 gas_assert (fixP != NULL && valP != NULL 1250 && (fixP->fx_r_type == BFD_RELOC_8 1251 || fixP->fx_r_type == BFD_RELOC_16 1252 || fixP->fx_r_type == BFD_RELOC_32 1253 || fixP->fx_r_type == BFD_RELOC_64 1254 || fixP->fx_r_type == BFD_RELOC_NIOS2_S16 1255 || fixP->fx_r_type == BFD_RELOC_NIOS2_U16 1256 || fixP->fx_r_type == BFD_RELOC_16_PCREL 1257 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26 1258 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM5 1259 || fixP->fx_r_type == BFD_RELOC_NIOS2_CACHE_OPX 1260 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM6 1261 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM8 1262 || fixP->fx_r_type == BFD_RELOC_NIOS2_HI16 1263 || fixP->fx_r_type == BFD_RELOC_NIOS2_LO16 1264 || fixP->fx_r_type == BFD_RELOC_NIOS2_HIADJ16 1265 || fixP->fx_r_type == BFD_RELOC_NIOS2_GPREL 1266 || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 1267 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY 1268 || fixP->fx_r_type == BFD_RELOC_NIOS2_UJMP 1269 || fixP->fx_r_type == BFD_RELOC_NIOS2_CJMP 1270 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALLR 1271 || fixP->fx_r_type == BFD_RELOC_NIOS2_ALIGN 1272 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT16 1273 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL16 1274 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_LO 1275 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_HA 1276 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_GD16 1277 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LDM16 1278 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LDO16 1279 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_IE16 1280 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LE16 1281 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF 1282 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPREL 1283 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26_NOAT 1284 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT_LO 1285 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT_HA 1286 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL_LO 1287 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL_HA 1288 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_S12 1289 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_I10_1_PCREL 1290 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1I7_1_PCREL 1291 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1I7_2 1292 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4 1293 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4_1 1294 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4_2 1295 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_X1I7_2 1296 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_X2L5 1297 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_F1I5_2 1298 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_L5I4X1 1299 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1X1I6 1300 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1X1I6_2 1301 /* Add other relocs here as we generate them. */ 1302 )); 1303 1304 if (fixP->fx_r_type == BFD_RELOC_64) 1305 { 1306 /* We may reach here due to .8byte directives, but we never output 1307 BFD_RELOC_64; it must be resolved. */ 1308 if (fixP->fx_addsy != NULL) 1309 as_bad_where (fixP->fx_file, fixP->fx_line, 1310 _("cannot create 64-bit relocation")); 1311 else 1312 { 1313 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 1314 *valP, 8); 1315 fixP->fx_done = 1; 1316 } 1317 return; 1318 } 1319 1320 /* The value passed in valP can be the value of a fully 1321 resolved expression, or it can be the value of a partially 1322 resolved expression. In the former case, both fixP->fx_addsy 1323 and fixP->fx_subsy are NULL, and fixP->fx_offset == *valP, and 1324 we can fix up the instruction that fixP relates to. 1325 In the latter case, one or both of fixP->fx_addsy and 1326 fixP->fx_subsy are not NULL, and fixP->fx_offset may or may not 1327 equal *valP. We don't need to check for fixP->fx_subsy being null 1328 because the generic part of the assembler generates an error if 1329 it is not an absolute symbol. */ 1330 if (fixP->fx_addsy != NULL) 1331 /* Partially resolved expression. */ 1332 { 1333 fixP->fx_addnumber = fixP->fx_offset; 1334 fixP->fx_done = 0; 1335 1336 switch (fixP->fx_r_type) 1337 { 1338 case BFD_RELOC_NIOS2_TLS_GD16: 1339 case BFD_RELOC_NIOS2_TLS_LDM16: 1340 case BFD_RELOC_NIOS2_TLS_LDO16: 1341 case BFD_RELOC_NIOS2_TLS_IE16: 1342 case BFD_RELOC_NIOS2_TLS_LE16: 1343 case BFD_RELOC_NIOS2_TLS_DTPMOD: 1344 case BFD_RELOC_NIOS2_TLS_DTPREL: 1345 case BFD_RELOC_NIOS2_TLS_TPREL: 1346 S_SET_THREAD_LOCAL (fixP->fx_addsy); 1347 break; 1348 default: 1349 break; 1350 } 1351 } 1352 else 1353 /* Fully resolved fixup. */ 1354 { 1355 reloc_howto_type *howto 1356 = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 1357 1358 if (howto == NULL) 1359 as_bad_where (fixP->fx_file, fixP->fx_line, 1360 _("relocation is not supported")); 1361 else 1362 { 1363 valueT fixup = *valP; 1364 valueT value; 1365 char *buf; 1366 1367 /* If this is a pc-relative relocation, we need to 1368 subtract the current offset within the object file 1369 FIXME : for some reason fixP->fx_pcrel isn't 1 when it should be 1370 so I'm using the howto structure instead to determine this. */ 1371 if (howto->pc_relative == 1) 1372 { 1373 fixup = (fixup - (fixP->fx_frag->fr_address + fixP->fx_where 1374 + fixP->fx_size)); 1375 *valP = fixup; 1376 } 1377 1378 /* Get the instruction or data to be fixed up. */ 1379 buf = fixP->fx_frag->fr_literal + fixP->fx_where; 1380 value = md_chars_to_number (buf, fixP->fx_size); 1381 1382 /* Check for overflow, emitting a diagnostic if necessary. */ 1383 if (nios2_check_overflow (fixup, howto)) 1384 nios2_diagnose_overflow (fixup, howto, fixP, value); 1385 1386 /* Apply the right shift. */ 1387 fixup = ((signed)fixup) >> howto->rightshift; 1388 1389 /* Truncate the fixup to right size. */ 1390 switch (fixP->fx_r_type) 1391 { 1392 case BFD_RELOC_NIOS2_HI16: 1393 fixup = (fixup >> 16) & 0xFFFF; 1394 break; 1395 case BFD_RELOC_NIOS2_LO16: 1396 fixup = fixup & 0xFFFF; 1397 break; 1398 case BFD_RELOC_NIOS2_HIADJ16: 1399 fixup = ((((fixup >> 16) & 0xFFFF) + ((fixup >> 15) & 0x01)) 1400 & 0xFFFF); 1401 break; 1402 default: 1403 { 1404 int n = sizeof (fixup) * 8 - howto->bitsize; 1405 fixup = (fixup << n) >> n; 1406 break; 1407 } 1408 } 1409 1410 /* Fix up the instruction. */ 1411 value = (value & ~howto->dst_mask) | (fixup << howto->bitpos); 1412 md_number_to_chars (buf, value, fixP->fx_size); 1413 } 1414 1415 fixP->fx_done = 1; 1416 } 1417 1418 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT) 1419 { 1420 fixP->fx_done = 0; 1421 if (fixP->fx_addsy 1422 && !S_IS_DEFINED (fixP->fx_addsy) && !S_IS_WEAK (fixP->fx_addsy)) 1423 S_SET_WEAK (fixP->fx_addsy); 1424 } 1425 else if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 1426 fixP->fx_done = 0; 1427} 1428 1429 1430 1431/** Instruction parsing support. */ 1432 1433/* General internal error routine. */ 1434 1435static void 1436bad_opcode (const struct nios2_opcode *op) 1437{ 1438 fprintf (stderr, _("internal error: broken opcode descriptor for `%s %s'\n"), 1439 op->name, op->args); 1440 as_fatal (_("Broken assembler. No assembly attempted.")); 1441} 1442 1443/* Special relocation directive strings. */ 1444 1445struct nios2_special_relocS 1446{ 1447 const char *string; 1448 bfd_reloc_code_real_type reloc_type; 1449}; 1450 1451/* This table is sorted so that prefix strings are listed after the longer 1452 strings that include them -- e.g., %got after %got_hiadj, etc. */ 1453 1454struct nios2_special_relocS nios2_special_reloc[] = { 1455 {"%hiadj", BFD_RELOC_NIOS2_HIADJ16}, 1456 {"%hi", BFD_RELOC_NIOS2_HI16}, 1457 {"%lo", BFD_RELOC_NIOS2_LO16}, 1458 {"%gprel", BFD_RELOC_NIOS2_GPREL}, 1459 {"%call_lo", BFD_RELOC_NIOS2_CALL_LO}, 1460 {"%call_hiadj", BFD_RELOC_NIOS2_CALL_HA}, 1461 {"%call", BFD_RELOC_NIOS2_CALL16}, 1462 {"%gotoff_lo", BFD_RELOC_NIOS2_GOTOFF_LO}, 1463 {"%gotoff_hiadj", BFD_RELOC_NIOS2_GOTOFF_HA}, 1464 {"%gotoff", BFD_RELOC_NIOS2_GOTOFF}, 1465 {"%got_hiadj", BFD_RELOC_NIOS2_GOT_HA}, 1466 {"%got_lo", BFD_RELOC_NIOS2_GOT_LO}, 1467 {"%got", BFD_RELOC_NIOS2_GOT16}, 1468 {"%tls_gd", BFD_RELOC_NIOS2_TLS_GD16}, 1469 {"%tls_ldm", BFD_RELOC_NIOS2_TLS_LDM16}, 1470 {"%tls_ldo", BFD_RELOC_NIOS2_TLS_LDO16}, 1471 {"%tls_ie", BFD_RELOC_NIOS2_TLS_IE16}, 1472 {"%tls_le", BFD_RELOC_NIOS2_TLS_LE16}, 1473}; 1474 1475#define NIOS2_NUM_SPECIAL_RELOCS \ 1476 (sizeof(nios2_special_reloc)/sizeof(nios2_special_reloc[0])) 1477const int nios2_num_special_relocs = NIOS2_NUM_SPECIAL_RELOCS; 1478 1479/* Creates a new nios2_insn_relocS and returns a pointer to it. */ 1480static nios2_insn_relocS * 1481nios2_insn_reloc_new (bfd_reloc_code_real_type reloc_type, unsigned int pcrel) 1482{ 1483 nios2_insn_relocS *retval; 1484 retval = XNEW (nios2_insn_relocS); 1485 if (retval == NULL) 1486 { 1487 as_bad (_("can't create relocation")); 1488 abort (); 1489 } 1490 1491 /* Fill out the fields with default values. */ 1492 retval->reloc_next = NULL; 1493 retval->reloc_type = reloc_type; 1494 retval->reloc_pcrel = pcrel; 1495 return retval; 1496} 1497 1498/* Frees up memory previously allocated by nios2_insn_reloc_new(). */ 1499/* FIXME: this is never called; memory leak? */ 1500#if 0 1501static void 1502nios2_insn_reloc_destroy (nios2_insn_relocS *reloc) 1503{ 1504 gas_assert (reloc != NULL); 1505 free (reloc); 1506} 1507#endif 1508 1509/* Look up a register name and validate it for the given regtype. 1510 Return the register mapping or NULL on failure. */ 1511static struct nios2_reg * 1512nios2_parse_reg (const char *token, unsigned long regtype) 1513{ 1514 struct nios2_reg *reg = nios2_reg_lookup (token); 1515 1516 if (reg == NULL) 1517 { 1518 as_bad (_("unknown register %s"), token); 1519 return NULL; 1520 } 1521 1522 /* Matched a register, but is it the wrong type? */ 1523 if (!(regtype & reg->regtype)) 1524 { 1525 if (regtype & REG_CONTROL) 1526 as_bad (_("expecting control register")); 1527 else if (reg->regtype & REG_CONTROL) 1528 as_bad (_("illegal use of control register")); 1529 else if (reg->regtype & REG_COPROCESSOR) 1530 as_bad (_("illegal use of coprocessor register")); 1531 else 1532 as_bad (_("invalid register %s"), token); 1533 return NULL; 1534 } 1535 1536 /* Warn for explicit use of special registers. */ 1537 if (reg->regtype & REG_NORMAL) 1538 { 1539 if (!nios2_as_options.noat && reg->index == 1) 1540 as_warn (_("Register at (r1) can sometimes be corrupted by " 1541 "assembler optimizations.\n" 1542 "Use .set noat to turn off those optimizations " 1543 "(and this warning).")); 1544 if (!nios2_as_options.nobreak && reg->index == 25) 1545 as_warn (_("The debugger will corrupt bt (r25).\n" 1546 "If you don't need to debug this " 1547 "code use .set nobreak to turn off this warning.")); 1548 if (!nios2_as_options.nobreak && reg->index == 30) 1549 as_warn (_("The debugger will corrupt sstatus/ba (r30).\n" 1550 "If you don't need to debug this " 1551 "code use .set nobreak to turn off this warning.")); 1552 } 1553 1554 return reg; 1555} 1556 1557/* This function parses a reglist for ldwm/stwm and push.n/pop.n 1558 instructions, given as a brace-enclosed register list. The tokenizer 1559 has replaced commas in the token with spaces. 1560 The return value is a bitmask of registers in the set. It also 1561 sets nios2_reglist_mask and nios2_reglist_dir to allow error checking 1562 when parsing the base register. */ 1563 1564static unsigned long nios2_reglist_mask; 1565static int nios2_reglist_dir; 1566 1567static unsigned long 1568nios2_parse_reglist (char *token, const struct nios2_opcode *op) 1569{ 1570 unsigned long mask = 0; 1571 int dir = 0; 1572 unsigned long regtype = 0; 1573 int last = -1; 1574 const char *regname; 1575 1576 nios2_reglist_mask = 0; 1577 nios2_reglist_dir = 0; 1578 1579 if (op->match == MATCH_R2_LDWM || op->match == MATCH_R2_STWM) 1580 { 1581 regtype = REG_LDWM; 1582 dir = 0; 1583 } 1584 else if (op->match == MATCH_R2_PUSH_N) 1585 { 1586 regtype = REG_POP; 1587 dir = -1; 1588 } 1589 else if (op->match == MATCH_R2_POP_N) 1590 { 1591 regtype = REG_POP; 1592 dir = 1; 1593 } 1594 else 1595 bad_opcode (op); 1596 1597 for (regname = strtok (token, "{ }"); 1598 regname; 1599 regname = strtok (NULL, "{ }")) 1600 { 1601 int regno; 1602 struct nios2_reg *reg = nios2_parse_reg (regname, regtype); 1603 1604 if (!reg) 1605 break; 1606 regno = reg->index; 1607 1608 /* Make sure registers are listed in proper sequence. */ 1609 if (last >= 0) 1610 { 1611 if (regno == last) 1612 { 1613 as_bad ("duplicate register %s\n", reg->name); 1614 return 0; 1615 } 1616 else if (dir == 0) 1617 dir = (regno < last ? -1 : 1); 1618 else if ((dir > 0 && regno < last) 1619 || (dir < 0 && regno > last) 1620 || (op->match == MATCH_R2_PUSH_N 1621 && ! ((last == 31 && regno == 28) 1622 || (last == 31 && regno <= 23) 1623 || (last == 28 && regno <= 23) 1624 || (regno < 23 && regno == last - 1))) 1625 || (op->match == MATCH_R2_POP_N 1626 && ! ((regno == 31 && last == 28) 1627 || (regno == 31 && last <= 23) 1628 || (regno == 28 && last <= 23) 1629 || (last < 23 && last == regno - 1)))) 1630 { 1631 as_bad ("invalid register order"); 1632 return 0; 1633 } 1634 } 1635 1636 mask |= 1 << regno; 1637 last = regno; 1638 } 1639 1640 /* Check that all ldwm/stwm regs belong to the same set. */ 1641 if ((op->match == MATCH_R2_LDWM || op->match == MATCH_R2_STWM) 1642 && (mask & 0x00003ffc) && (mask & 0x90ffc000)) 1643 { 1644 as_bad ("invalid register set in reglist"); 1645 return 0; 1646 } 1647 1648 /* Check that push.n/pop.n regs include RA. */ 1649 if ((op->match == MATCH_R2_PUSH_N || op->match == MATCH_R2_POP_N) 1650 && ((mask & 0x80000000) == 0)) 1651 { 1652 as_bad ("reglist must include ra (r31)"); 1653 return 0; 1654 } 1655 1656 /* Check that there is at least one register in the set. */ 1657 if (!mask) 1658 { 1659 as_bad ("reglist must include at least one register"); 1660 return 0; 1661 } 1662 1663 /* OK, reglist passed validation. */ 1664 nios2_reglist_mask = mask; 1665 nios2_reglist_dir = dir; 1666 return mask; 1667} 1668 1669/* This function parses the base register and options used by the ldwm/stwm 1670 instructions. Returns the base register and sets the option arguments 1671 accordingly. On failure, returns NULL. */ 1672static struct nios2_reg * 1673nios2_parse_base_register (char *str, int *direction, int *writeback, int *ret) 1674{ 1675 char *regname; 1676 struct nios2_reg *reg; 1677 1678 *direction = 0; 1679 *writeback = 0; 1680 *ret = 0; 1681 1682 /* Check for --. */ 1683 if (strncmp (str, "--", 2) == 0) 1684 { 1685 str += 2; 1686 *direction -= 1; 1687 } 1688 1689 /* Extract the base register. */ 1690 if (*str != '(') 1691 { 1692 as_bad ("expected '(' before base register"); 1693 return NULL; 1694 } 1695 str++; 1696 regname = str; 1697 str = strchr (str, ')'); 1698 if (!str) 1699 { 1700 as_bad ("expected ')' after base register"); 1701 return NULL; 1702 } 1703 *str = '\0'; 1704 str++; 1705 reg = nios2_parse_reg (regname, REG_NORMAL); 1706 if (reg == NULL) 1707 return NULL; 1708 1709 /* Check for ++. */ 1710 if (strncmp (str, "++", 2) == 0) 1711 { 1712 str += 2; 1713 *direction += 1; 1714 } 1715 1716 /* Ensure that either -- or ++ is specified, but not both. */ 1717 if (*direction == 0) 1718 { 1719 as_bad ("invalid base register syntax"); 1720 return NULL;; 1721 } 1722 1723 /* Check for options. The tokenizer has replaced commas with spaces. */ 1724 while (*str) 1725 { 1726 while (*str == ' ') 1727 str++; 1728 if (strncmp (str, "writeback", 9) == 0) 1729 { 1730 *writeback = 1; 1731 str += 9; 1732 } 1733 else if (strncmp (str, "ret", 3) == 0) 1734 { 1735 *ret = 1; 1736 str += 3; 1737 } 1738 else if (*str) 1739 { 1740 as_bad ("invalid option syntax"); 1741 return NULL; 1742 } 1743 } 1744 1745 return reg; 1746} 1747 1748 1749/* The various nios2_assemble_* functions call this 1750 function to generate an expression from a string representing an expression. 1751 It then tries to evaluate the expression, and if it can, returns its value. 1752 If not, it creates a new nios2_insn_relocS and stores the expression and 1753 reloc_type for future use. */ 1754static unsigned long 1755nios2_assemble_expression (const char *exprstr, 1756 nios2_insn_infoS *insn, 1757 bfd_reloc_code_real_type orig_reloc_type, 1758 unsigned int pcrel) 1759{ 1760 nios2_insn_relocS *reloc; 1761 char *saved_line_ptr; 1762 unsigned long value = 0; 1763 int i; 1764 bfd_reloc_code_real_type reloc_type = orig_reloc_type; 1765 1766 gas_assert (exprstr != NULL); 1767 gas_assert (insn != NULL); 1768 1769 /* Check for relocation operators. 1770 Change the relocation type and advance the ptr to the start of 1771 the expression proper. */ 1772 for (i = 0; i < nios2_num_special_relocs; i++) 1773 if (strstr (exprstr, nios2_special_reloc[i].string) != NULL) 1774 { 1775 reloc_type = nios2_special_reloc[i].reloc_type; 1776 exprstr += strlen (nios2_special_reloc[i].string) + 1; 1777 1778 /* %lo and %hiadj have different meanings for PC-relative 1779 expressions. */ 1780 if (pcrel) 1781 { 1782 if (reloc_type == BFD_RELOC_NIOS2_LO16) 1783 reloc_type = BFD_RELOC_NIOS2_PCREL_LO; 1784 if (reloc_type == BFD_RELOC_NIOS2_HIADJ16) 1785 reloc_type = BFD_RELOC_NIOS2_PCREL_HA; 1786 } 1787 1788 break; 1789 } 1790 1791 /* No relocation allowed; we must have a constant expression. */ 1792 if (orig_reloc_type == BFD_RELOC_NONE) 1793 { 1794 expressionS exp; 1795 1796 /* Parse the expression string. */ 1797 saved_line_ptr = input_line_pointer; 1798 input_line_pointer = (char *) exprstr; 1799 expression (&exp); 1800 input_line_pointer = saved_line_ptr; 1801 1802 /* If we don't have a constant, give an error. */ 1803 if (reloc_type != orig_reloc_type || exp.X_op != O_constant) 1804 as_bad (_("expression must be constant")); 1805 else 1806 value = exp.X_add_number; 1807 return (unsigned long) value; 1808 } 1809 1810 /* We potentially have a relocation. */ 1811 reloc = nios2_insn_reloc_new (reloc_type, pcrel); 1812 reloc->reloc_next = insn->insn_reloc; 1813 insn->insn_reloc = reloc; 1814 1815 /* Parse the expression string. */ 1816 saved_line_ptr = input_line_pointer; 1817 input_line_pointer = (char *) exprstr; 1818 expression (&reloc->reloc_expression); 1819 input_line_pointer = saved_line_ptr; 1820 1821 /* This is redundant as the fixup will put this into 1822 the instruction, but it is included here so that 1823 self-test mode (-r) works. */ 1824 if (nios2_mode == NIOS2_MODE_TEST 1825 && reloc->reloc_expression.X_op == O_constant) 1826 value = reloc->reloc_expression.X_add_number; 1827 1828 return (unsigned long) value; 1829} 1830 1831/* Encode a 3-bit register number, giving an error if this is not possible. */ 1832static unsigned int 1833nios2_assemble_reg3 (const char *token) 1834{ 1835 struct nios2_reg *reg = nios2_parse_reg (token, REG_3BIT); 1836 int j; 1837 1838 if (reg == NULL) 1839 return 0; 1840 1841 for (j = 0; j < nios2_num_r2_reg3_mappings; j++) 1842 if (nios2_r2_reg3_mappings[j] == reg->index) 1843 return j; 1844 1845 /* Should never get here if we passed validation. */ 1846 as_bad (_("invalid register %s"), token); 1847 return 0; 1848} 1849 1850/* Argument assemble functions. */ 1851 1852 1853/* Control register index. */ 1854static void 1855nios2_assemble_arg_c (const char *token, nios2_insn_infoS *insn) 1856{ 1857 struct nios2_reg *reg = nios2_parse_reg (token, REG_CONTROL); 1858 const struct nios2_opcode *op = insn->insn_nios2_opcode; 1859 1860 if (reg == NULL) 1861 return; 1862 1863 switch (op->format) 1864 { 1865 case iw_r_type: 1866 insn->insn_code |= SET_IW_R_IMM5 (reg->index); 1867 break; 1868 case iw_F3X6L5_type: 1869 insn->insn_code |= SET_IW_F3X6L5_IMM5 (reg->index); 1870 break; 1871 default: 1872 bad_opcode (op); 1873 } 1874} 1875 1876/* Destination register. */ 1877static void 1878nios2_assemble_arg_d (const char *token, nios2_insn_infoS *insn) 1879{ 1880 const struct nios2_opcode *op = insn->insn_nios2_opcode; 1881 unsigned long regtype = REG_NORMAL; 1882 struct nios2_reg *reg; 1883 1884 if (op->format == iw_custom_type || op->format == iw_F3X8_type) 1885 regtype |= REG_COPROCESSOR; 1886 reg = nios2_parse_reg (token, regtype); 1887 if (reg == NULL) 1888 return; 1889 1890 switch (op->format) 1891 { 1892 case iw_r_type: 1893 insn->insn_code |= SET_IW_R_C (reg->index); 1894 break; 1895 case iw_custom_type: 1896 insn->insn_code |= SET_IW_CUSTOM_C (reg->index); 1897 if (reg->regtype & REG_COPROCESSOR) 1898 insn->insn_code |= SET_IW_CUSTOM_READC (0); 1899 else 1900 insn->insn_code |= SET_IW_CUSTOM_READC (1); 1901 break; 1902 case iw_F3X6L5_type: 1903 case iw_F3X6_type: 1904 insn->insn_code |= SET_IW_F3X6L5_C (reg->index); 1905 break; 1906 case iw_F3X8_type: 1907 insn->insn_code |= SET_IW_F3X8_C (reg->index); 1908 if (reg->regtype & REG_COPROCESSOR) 1909 insn->insn_code |= SET_IW_F3X8_READC (0); 1910 else 1911 insn->insn_code |= SET_IW_F3X8_READC (1); 1912 break; 1913 case iw_F2_type: 1914 insn->insn_code |= SET_IW_F2_B (reg->index); 1915 break; 1916 default: 1917 bad_opcode (op); 1918 } 1919} 1920 1921/* Source register 1. */ 1922static void 1923nios2_assemble_arg_s (const char *token, nios2_insn_infoS *insn) 1924{ 1925 const struct nios2_opcode *op = insn->insn_nios2_opcode; 1926 unsigned long regtype = REG_NORMAL; 1927 struct nios2_reg *reg; 1928 1929 if (op->format == iw_custom_type || op->format == iw_F3X8_type) 1930 regtype |= REG_COPROCESSOR; 1931 reg = nios2_parse_reg (token, regtype); 1932 if (reg == NULL) 1933 return; 1934 1935 switch (op->format) 1936 { 1937 case iw_r_type: 1938 if (op->match == MATCH_R1_JMP && reg->index == 31) 1939 as_bad (_("r31 cannot be used with jmp; use ret instead")); 1940 insn->insn_code |= SET_IW_R_A (reg->index); 1941 break; 1942 case iw_i_type: 1943 insn->insn_code |= SET_IW_I_A (reg->index); 1944 break; 1945 case iw_custom_type: 1946 insn->insn_code |= SET_IW_CUSTOM_A (reg->index); 1947 if (reg->regtype & REG_COPROCESSOR) 1948 insn->insn_code |= SET_IW_CUSTOM_READA (0); 1949 else 1950 insn->insn_code |= SET_IW_CUSTOM_READA (1); 1951 break; 1952 case iw_F2I16_type: 1953 insn->insn_code |= SET_IW_F2I16_A (reg->index); 1954 break; 1955 case iw_F2X4I12_type: 1956 insn->insn_code |= SET_IW_F2X4I12_A (reg->index); 1957 break; 1958 case iw_F1X4I12_type: 1959 insn->insn_code |= SET_IW_F1X4I12_A (reg->index); 1960 break; 1961 case iw_F1X4L17_type: 1962 insn->insn_code |= SET_IW_F1X4L17_A (reg->index); 1963 break; 1964 case iw_F3X6L5_type: 1965 case iw_F3X6_type: 1966 if (op->match == MATCH_R2_JMP && reg->index == 31) 1967 as_bad (_("r31 cannot be used with jmp; use ret instead")); 1968 insn->insn_code |= SET_IW_F3X6L5_A (reg->index); 1969 break; 1970 case iw_F2X6L10_type: 1971 insn->insn_code |= SET_IW_F2X6L10_A (reg->index); 1972 break; 1973 case iw_F3X8_type: 1974 insn->insn_code |= SET_IW_F3X8_A (reg->index); 1975 if (reg->regtype & REG_COPROCESSOR) 1976 insn->insn_code |= SET_IW_F3X8_READA (0); 1977 else 1978 insn->insn_code |= SET_IW_F3X8_READA (1); 1979 break; 1980 case iw_F1X1_type: 1981 if (op->match == MATCH_R2_JMPR_N && reg->index == 31) 1982 as_bad (_("r31 cannot be used with jmpr.n; use ret.n instead")); 1983 insn->insn_code |= SET_IW_F1X1_A (reg->index); 1984 break; 1985 case iw_F1I5_type: 1986 /* Implicit stack pointer reference. */ 1987 if (reg->index != 27) 1988 as_bad (_("invalid register %s"), token); 1989 break; 1990 case iw_F2_type: 1991 insn->insn_code |= SET_IW_F2_A (reg->index); 1992 break; 1993 default: 1994 bad_opcode (op); 1995 } 1996} 1997 1998/* Source register 2. */ 1999static void 2000nios2_assemble_arg_t (const char *token, nios2_insn_infoS *insn) 2001{ 2002 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2003 unsigned long regtype = REG_NORMAL; 2004 struct nios2_reg *reg; 2005 2006 if (op->format == iw_custom_type || op->format == iw_F3X8_type) 2007 regtype |= REG_COPROCESSOR; 2008 reg = nios2_parse_reg (token, regtype); 2009 if (reg == NULL) 2010 return; 2011 2012 switch (op->format) 2013 { 2014 case iw_r_type: 2015 insn->insn_code |= SET_IW_R_B (reg->index); 2016 break; 2017 case iw_i_type: 2018 insn->insn_code |= SET_IW_I_B (reg->index); 2019 break; 2020 case iw_custom_type: 2021 insn->insn_code |= SET_IW_CUSTOM_B (reg->index); 2022 if (reg->regtype & REG_COPROCESSOR) 2023 insn->insn_code |= SET_IW_CUSTOM_READB (0); 2024 else 2025 insn->insn_code |= SET_IW_CUSTOM_READB (1); 2026 break; 2027 case iw_F2I16_type: 2028 insn->insn_code |= SET_IW_F2I16_B (reg->index); 2029 break; 2030 case iw_F2X4I12_type: 2031 insn->insn_code |= SET_IW_F2X4I12_B (reg->index); 2032 break; 2033 case iw_F3X6L5_type: 2034 case iw_F3X6_type: 2035 insn->insn_code |= SET_IW_F3X6L5_B (reg->index); 2036 break; 2037 case iw_F2X6L10_type: 2038 insn->insn_code |= SET_IW_F2X6L10_B (reg->index); 2039 break; 2040 case iw_F3X8_type: 2041 insn->insn_code |= SET_IW_F3X8_B (reg->index); 2042 if (reg->regtype & REG_COPROCESSOR) 2043 insn->insn_code |= SET_IW_F3X8_READB (0); 2044 else 2045 insn->insn_code |= SET_IW_F3X8_READB (1); 2046 break; 2047 case iw_F1I5_type: 2048 insn->insn_code |= SET_IW_F1I5_B (reg->index); 2049 break; 2050 case iw_F2_type: 2051 insn->insn_code |= SET_IW_F2_B (reg->index); 2052 break; 2053 case iw_T1X1I6_type: 2054 /* Implicit zero register reference. */ 2055 if (reg->index != 0) 2056 as_bad (_("invalid register %s"), token); 2057 break; 2058 2059 default: 2060 bad_opcode (op); 2061 } 2062} 2063 2064/* Destination register w/3-bit encoding. */ 2065static void 2066nios2_assemble_arg_D (const char *token, nios2_insn_infoS *insn) 2067{ 2068 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2069 int reg = nios2_assemble_reg3 (token); 2070 2071 switch (op->format) 2072 { 2073 case iw_T1I7_type: 2074 insn->insn_code |= SET_IW_T1I7_A3 (reg); 2075 break; 2076 case iw_T2X1L3_type: 2077 insn->insn_code |= SET_IW_T2X1L3_B3 (reg); 2078 break; 2079 case iw_T2X1I3_type: 2080 insn->insn_code |= SET_IW_T2X1I3_B3 (reg); 2081 break; 2082 case iw_T3X1_type: 2083 insn->insn_code |= SET_IW_T3X1_C3 (reg); 2084 break; 2085 case iw_T2X3_type: 2086 /* Some instructions using this encoding take 3 register arguments, 2087 requiring the destination register to be the same as the first 2088 source register. */ 2089 if (op->num_args == 3) 2090 insn->insn_code |= SET_IW_T2X3_A3 (reg); 2091 else 2092 insn->insn_code |= SET_IW_T2X3_B3 (reg); 2093 break; 2094 default: 2095 bad_opcode (op); 2096 } 2097} 2098 2099/* Source register w/3-bit encoding. */ 2100static void 2101nios2_assemble_arg_S (const char *token, nios2_insn_infoS *insn) 2102{ 2103 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2104 int reg = nios2_assemble_reg3 (token); 2105 2106 switch (op->format) 2107 { 2108 case iw_T1I7_type: 2109 insn->insn_code |= SET_IW_T1I7_A3 (reg); 2110 break; 2111 case iw_T2I4_type: 2112 insn->insn_code |= SET_IW_T2I4_A3 (reg); 2113 break; 2114 case iw_T2X1L3_type: 2115 insn->insn_code |= SET_IW_T2X1L3_A3 (reg); 2116 break; 2117 case iw_T2X1I3_type: 2118 insn->insn_code |= SET_IW_T2X1I3_A3 (reg); 2119 break; 2120 case iw_T3X1_type: 2121 insn->insn_code |= SET_IW_T3X1_A3 (reg); 2122 break; 2123 case iw_T2X3_type: 2124 /* Some instructions using this encoding take 3 register arguments, 2125 requiring the destination register to be the same as the first 2126 source register. */ 2127 if (op->num_args == 3) 2128 { 2129 int dreg = GET_IW_T2X3_A3 (insn->insn_code); 2130 if (dreg != reg) 2131 as_bad ("source and destination registers must be the same"); 2132 } 2133 else 2134 insn->insn_code |= SET_IW_T2X3_A3 (reg); 2135 break; 2136 case iw_T1X1I6_type: 2137 insn->insn_code |= SET_IW_T1X1I6_A3 (reg); 2138 break; 2139 default: 2140 bad_opcode (op); 2141 } 2142} 2143 2144/* Source register 2 w/3-bit encoding. */ 2145static void 2146nios2_assemble_arg_T (const char *token, nios2_insn_infoS *insn) 2147{ 2148 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2149 int reg = nios2_assemble_reg3 (token); 2150 2151 switch (op->format) 2152 { 2153 case iw_T2I4_type: 2154 insn->insn_code |= SET_IW_T2I4_B3 (reg); 2155 break; 2156 case iw_T3X1_type: 2157 insn->insn_code |= SET_IW_T3X1_B3 (reg); 2158 break; 2159 case iw_T2X3_type: 2160 insn->insn_code |= SET_IW_T2X3_B3 (reg); 2161 break; 2162 default: 2163 bad_opcode (op); 2164 } 2165} 2166 2167/* 16-bit signed immediate. */ 2168static void 2169nios2_assemble_arg_i (const char *token, nios2_insn_infoS *insn) 2170{ 2171 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2172 unsigned int val; 2173 2174 switch (op->format) 2175 { 2176 case iw_i_type: 2177 val = nios2_assemble_expression (token, insn, 2178 BFD_RELOC_NIOS2_S16, 0); 2179 insn->constant_bits |= SET_IW_I_IMM16 (val); 2180 break; 2181 case iw_F2I16_type: 2182 val = nios2_assemble_expression (token, insn, 2183 BFD_RELOC_NIOS2_S16, 0); 2184 insn->constant_bits |= SET_IW_F2I16_IMM16 (val); 2185 break; 2186 default: 2187 bad_opcode (op); 2188 } 2189} 2190 2191/* 12-bit signed immediate. */ 2192static void 2193nios2_assemble_arg_I (const char *token, nios2_insn_infoS *insn) 2194{ 2195 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2196 unsigned int val; 2197 2198 switch (op->format) 2199 { 2200 case iw_F2X4I12_type: 2201 val = nios2_assemble_expression (token, insn, 2202 BFD_RELOC_NIOS2_R2_S12, 0); 2203 insn->constant_bits |= SET_IW_F2X4I12_IMM12 (val); 2204 break; 2205 case iw_F1X4I12_type: 2206 val = nios2_assemble_expression (token, insn, 2207 BFD_RELOC_NIOS2_R2_S12, 0); 2208 insn->constant_bits |= SET_IW_F2X4I12_IMM12 (val); 2209 break; 2210 default: 2211 bad_opcode (op); 2212 } 2213} 2214 2215/* 16-bit unsigned immediate. */ 2216static void 2217nios2_assemble_arg_u (const char *token, nios2_insn_infoS *insn) 2218{ 2219 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2220 unsigned int val; 2221 2222 switch (op->format) 2223 { 2224 case iw_i_type: 2225 val = nios2_assemble_expression (token, insn, 2226 BFD_RELOC_NIOS2_U16, 0); 2227 insn->constant_bits |= SET_IW_I_IMM16 (val); 2228 break; 2229 case iw_F2I16_type: 2230 val = nios2_assemble_expression (token, insn, 2231 BFD_RELOC_NIOS2_U16, 0); 2232 insn->constant_bits |= SET_IW_F2I16_IMM16 (val); 2233 break; 2234 default: 2235 bad_opcode (op); 2236 } 2237} 2238 2239/* 7-bit unsigned immediate with 2-bit shift. */ 2240static void 2241nios2_assemble_arg_U (const char *token, nios2_insn_infoS *insn) 2242{ 2243 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2244 unsigned int val; 2245 2246 switch (op->format) 2247 { 2248 case iw_T1I7_type: 2249 val = nios2_assemble_expression (token, insn, 2250 BFD_RELOC_NIOS2_R2_T1I7_2, 0); 2251 insn->constant_bits |= SET_IW_T1I7_IMM7 (val >> 2); 2252 break; 2253 case iw_X1I7_type: 2254 val = nios2_assemble_expression (token, insn, 2255 BFD_RELOC_NIOS2_R2_X1I7_2, 0); 2256 insn->constant_bits |= SET_IW_X1I7_IMM7 (val >> 2); 2257 break; 2258 default: 2259 bad_opcode (op); 2260 } 2261} 2262 2263/* 5-bit unsigned immediate with 2-bit shift. */ 2264static void 2265nios2_assemble_arg_V (const char *token, nios2_insn_infoS *insn) 2266{ 2267 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2268 unsigned int val; 2269 2270 switch (op->format) 2271 { 2272 case iw_F1I5_type: 2273 val = nios2_assemble_expression (token, insn, 2274 BFD_RELOC_NIOS2_R2_F1I5_2, 0); 2275 insn->constant_bits |= SET_IW_F1I5_IMM5 (val >> 2); 2276 break; 2277 default: 2278 bad_opcode (op); 2279 } 2280} 2281 2282/* 4-bit unsigned immediate with 2-bit shift. */ 2283static void 2284nios2_assemble_arg_W (const char *token, nios2_insn_infoS *insn) 2285{ 2286 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2287 unsigned int val; 2288 2289 switch (op->format) 2290 { 2291 case iw_T2I4_type: 2292 val = nios2_assemble_expression (token, insn, 2293 BFD_RELOC_NIOS2_R2_T2I4_2, 0); 2294 insn->constant_bits |= SET_IW_T2I4_IMM4 (val >> 2); 2295 break; 2296 case iw_L5I4X1_type: 2297 /* This argument is optional for push.n/pop.n, and defaults to 2298 zero if unspecified. */ 2299 if (token == NULL) 2300 return; 2301 2302 val = nios2_assemble_expression (token, insn, 2303 BFD_RELOC_NIOS2_R2_L5I4X1, 0); 2304 insn->constant_bits |= SET_IW_L5I4X1_IMM4 (val >> 2); 2305 break; 2306 default: 2307 bad_opcode (op); 2308 } 2309} 2310 2311/* 4-bit unsigned immediate with 1-bit shift. */ 2312static void 2313nios2_assemble_arg_X (const char *token, nios2_insn_infoS *insn) 2314{ 2315 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2316 unsigned int val; 2317 2318 switch (op->format) 2319 { 2320 case iw_T2I4_type: 2321 val = nios2_assemble_expression (token, insn, 2322 BFD_RELOC_NIOS2_R2_T2I4_1, 0); 2323 insn->constant_bits |= SET_IW_T2I4_IMM4 (val >> 1); 2324 break; 2325 default: 2326 bad_opcode (op); 2327 } 2328} 2329 2330/* 4-bit unsigned immediate without shift. */ 2331static void 2332nios2_assemble_arg_Y (const char *token, nios2_insn_infoS *insn) 2333{ 2334 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2335 unsigned int val; 2336 2337 switch (op->format) 2338 { 2339 case iw_T2I4_type: 2340 val = nios2_assemble_expression (token, insn, 2341 BFD_RELOC_NIOS2_R2_T2I4, 0); 2342 insn->constant_bits |= SET_IW_T2I4_IMM4 (val); 2343 break; 2344 default: 2345 bad_opcode (op); 2346 } 2347} 2348 2349 2350/* 16-bit signed immediate address offset. */ 2351static void 2352nios2_assemble_arg_o (const char *token, nios2_insn_infoS *insn) 2353{ 2354 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2355 unsigned int val; 2356 2357 switch (op->format) 2358 { 2359 case iw_i_type: 2360 val = nios2_assemble_expression (token, insn, 2361 BFD_RELOC_16_PCREL, 1); 2362 insn->constant_bits |= SET_IW_I_IMM16 (val); 2363 break; 2364 case iw_F2I16_type: 2365 val = nios2_assemble_expression (token, insn, 2366 BFD_RELOC_16_PCREL, 1); 2367 insn->constant_bits |= SET_IW_F2I16_IMM16 (val); 2368 break; 2369 default: 2370 bad_opcode (op); 2371 } 2372} 2373 2374/* 10-bit signed address offset with 1-bit shift. */ 2375static void 2376nios2_assemble_arg_O (const char *token, nios2_insn_infoS *insn) 2377{ 2378 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2379 unsigned int val; 2380 2381 switch (op->format) 2382 { 2383 case iw_I10_type: 2384 val = nios2_assemble_expression (token, insn, 2385 BFD_RELOC_NIOS2_R2_I10_1_PCREL, 1); 2386 insn->constant_bits |= SET_IW_I10_IMM10 (val >> 1); 2387 break; 2388 default: 2389 bad_opcode (op); 2390 } 2391} 2392 2393/* 7-bit signed address offset with 1-bit shift. */ 2394static void 2395nios2_assemble_arg_P (const char *token, nios2_insn_infoS *insn) 2396{ 2397 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2398 unsigned int val; 2399 2400 switch (op->format) 2401 { 2402 case iw_T1I7_type: 2403 val = nios2_assemble_expression (token, insn, 2404 BFD_RELOC_NIOS2_R2_T1I7_1_PCREL, 1); 2405 insn->constant_bits |= SET_IW_T1I7_IMM7 (val >> 1); 2406 break; 2407 default: 2408 bad_opcode (op); 2409 } 2410} 2411 2412/* 5-bit unsigned immediate. */ 2413static void 2414nios2_assemble_arg_j (const char *token, nios2_insn_infoS *insn) 2415{ 2416 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2417 unsigned int val; 2418 2419 switch (op->format) 2420 { 2421 case iw_r_type: 2422 val = nios2_assemble_expression (token, insn, 2423 BFD_RELOC_NIOS2_IMM5, 0); 2424 insn->constant_bits |= SET_IW_R_IMM5 (val); 2425 break; 2426 case iw_F3X6L5_type: 2427 if (op->match == MATCH_R2_ENI) 2428 /* Value must be constant 0 or 1. */ 2429 { 2430 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2431 if (val != 0 && val != 1) 2432 as_bad ("invalid eni argument %u", val); 2433 insn->insn_code |= SET_IW_F3X6L5_IMM5 (val); 2434 } 2435 else 2436 { 2437 val = nios2_assemble_expression (token, insn, 2438 BFD_RELOC_NIOS2_IMM5, 0); 2439 insn->constant_bits |= SET_IW_F3X6L5_IMM5 (val); 2440 } 2441 break; 2442 case iw_F2X6L10_type: 2443 /* Only constant expression without relocation permitted for 2444 bit position. */ 2445 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2446 if (val > 31) 2447 as_bad ("invalid bit position %u", val); 2448 insn->insn_code |= SET_IW_F2X6L10_MSB (val); 2449 break; 2450 case iw_X2L5_type: 2451 val = nios2_assemble_expression (token, insn, 2452 BFD_RELOC_NIOS2_R2_X2L5, 0); 2453 insn->constant_bits |= SET_IW_X2L5_IMM5 (val); 2454 break; 2455 default: 2456 bad_opcode (op); 2457 } 2458} 2459 2460/* Second 5-bit unsigned immediate field. */ 2461static void 2462nios2_assemble_arg_k (const char *token, nios2_insn_infoS *insn) 2463{ 2464 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2465 unsigned int val; 2466 2467 switch (op->format) 2468 { 2469 case iw_F2X6L10_type: 2470 /* Only constant expression without relocation permitted for 2471 bit position. */ 2472 val = nios2_assemble_expression (token, insn, 2473 BFD_RELOC_NONE, 0); 2474 if (val > 31) 2475 as_bad ("invalid bit position %u", val); 2476 else if (GET_IW_F2X6L10_MSB (insn->insn_code) < val) 2477 as_bad ("MSB must be greater than or equal to LSB"); 2478 insn->insn_code |= SET_IW_F2X6L10_LSB (val); 2479 break; 2480 default: 2481 bad_opcode (op); 2482 } 2483} 2484 2485/* 8-bit unsigned immediate. */ 2486static void 2487nios2_assemble_arg_l (const char *token, nios2_insn_infoS *insn) 2488{ 2489 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2490 unsigned int val; 2491 2492 switch (op->format) 2493 { 2494 case iw_custom_type: 2495 val = nios2_assemble_expression (token, insn, 2496 BFD_RELOC_NIOS2_IMM8, 0); 2497 insn->constant_bits |= SET_IW_CUSTOM_N (val); 2498 break; 2499 case iw_F3X8_type: 2500 val = nios2_assemble_expression (token, insn, 2501 BFD_RELOC_NIOS2_IMM8, 0); 2502 insn->constant_bits |= SET_IW_F3X8_N (val); 2503 break; 2504 default: 2505 bad_opcode (op); 2506 } 2507} 2508 2509/* 26-bit unsigned immediate. */ 2510static void 2511nios2_assemble_arg_m (const char *token, nios2_insn_infoS *insn) 2512{ 2513 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2514 unsigned int val; 2515 2516 switch (op->format) 2517 { 2518 case iw_j_type: 2519 val = nios2_assemble_expression (token, insn, 2520 (nios2_as_options.noat 2521 ? BFD_RELOC_NIOS2_CALL26_NOAT 2522 : BFD_RELOC_NIOS2_CALL26), 2523 0); 2524 insn->constant_bits |= SET_IW_J_IMM26 (val); 2525 break; 2526 case iw_L26_type: 2527 val = nios2_assemble_expression (token, insn, 2528 (nios2_as_options.noat 2529 ? BFD_RELOC_NIOS2_CALL26_NOAT 2530 : BFD_RELOC_NIOS2_CALL26), 2531 0); 2532 insn->constant_bits |= SET_IW_L26_IMM26 (val); 2533 break; 2534 default: 2535 bad_opcode (op); 2536 } 2537} 2538 2539/* 6-bit unsigned immediate with no shifting. */ 2540static void 2541nios2_assemble_arg_M (const char *token, nios2_insn_infoS *insn) 2542{ 2543 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2544 unsigned int val; 2545 2546 switch (op->format) 2547 { 2548 case iw_T1X1I6_type: 2549 val = nios2_assemble_expression (token, insn, 2550 BFD_RELOC_NIOS2_R2_T1X1I6, 0); 2551 insn->constant_bits |= SET_IW_T1X1I6_IMM6 (val); 2552 break; 2553 default: 2554 bad_opcode (op); 2555 } 2556} 2557 2558/* 6-bit unsigned immediate with 2-bit shift. */ 2559static void 2560nios2_assemble_arg_N (const char *token, nios2_insn_infoS *insn) 2561{ 2562 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2563 unsigned int val; 2564 2565 switch (op->format) 2566 { 2567 case iw_T1X1I6_type: 2568 val = nios2_assemble_expression (token, insn, 2569 BFD_RELOC_NIOS2_R2_T1X1I6_2, 0); 2570 insn->constant_bits |= SET_IW_T1X1I6_IMM6 (val >> 2); 2571 break; 2572 default: 2573 bad_opcode (op); 2574 } 2575} 2576 2577 2578/* Encoded enumeration for addi.n/subi.n. */ 2579static void 2580nios2_assemble_arg_e (const char *token, nios2_insn_infoS *insn) 2581{ 2582 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2583 unsigned int val; 2584 int i; 2585 2586 switch (op->format) 2587 { 2588 case iw_T2X1I3_type: 2589 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2590 for (i = 0; i < nios2_num_r2_asi_n_mappings; i++) 2591 if (val == nios2_r2_asi_n_mappings[i]) 2592 break; 2593 if (i == nios2_num_r2_asi_n_mappings) 2594 { 2595 as_bad (_("Invalid constant operand %s"), token); 2596 return; 2597 } 2598 insn->insn_code |= SET_IW_T2X1I3_IMM3 ((unsigned)i); 2599 break; 2600 default: 2601 bad_opcode (op); 2602 } 2603} 2604 2605/* Encoded enumeration for slli.n/srli.n. */ 2606static void 2607nios2_assemble_arg_f (const char *token, nios2_insn_infoS *insn) 2608{ 2609 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2610 unsigned int val; 2611 int i; 2612 2613 switch (op->format) 2614 { 2615 case iw_T2X1L3_type: 2616 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2617 for (i = 0; i < nios2_num_r2_shi_n_mappings; i++) 2618 if (val == nios2_r2_shi_n_mappings[i]) 2619 break; 2620 if (i == nios2_num_r2_shi_n_mappings) 2621 { 2622 as_bad (_("Invalid constant operand %s"), token); 2623 return; 2624 } 2625 insn->insn_code |= SET_IW_T2X1L3_SHAMT ((unsigned)i); 2626 break; 2627 default: 2628 bad_opcode (op); 2629 } 2630} 2631 2632/* Encoded enumeration for andi.n. */ 2633static void 2634nios2_assemble_arg_g (const char *token, nios2_insn_infoS *insn) 2635{ 2636 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2637 unsigned int val; 2638 int i; 2639 2640 switch (op->format) 2641 { 2642 case iw_T2I4_type: 2643 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2644 for (i = 0; i < nios2_num_r2_andi_n_mappings; i++) 2645 if (val == nios2_r2_andi_n_mappings[i]) 2646 break; 2647 if (i == nios2_num_r2_andi_n_mappings) 2648 { 2649 as_bad (_("Invalid constant operand %s"), token); 2650 return; 2651 } 2652 insn->insn_code |= SET_IW_T2I4_IMM4 ((unsigned)i); 2653 break; 2654 default: 2655 bad_opcode (op); 2656 } 2657} 2658 2659/* Encoded enumeration for movi.n. */ 2660static void 2661nios2_assemble_arg_h (const char *token, nios2_insn_infoS *insn) 2662{ 2663 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2664 unsigned int val; 2665 int i; 2666 2667 switch (op->format) 2668 { 2669 case iw_T1I7_type: 2670 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0); 2671 i = (signed) val; 2672 if ((signed) i == -1) 2673 val = 127; 2674 else if (i == -2) 2675 val = 126; 2676 else if (i == 0xff) 2677 val = 125; 2678 else if (i < 0 || i > 125) 2679 { 2680 as_bad (_("Invalid constant operand %s"), token); 2681 return; 2682 } 2683 insn->insn_code |= SET_IW_T1I7_IMM7 (val); 2684 break; 2685 default: 2686 bad_opcode (op); 2687 } 2688} 2689 2690/* Encoded REGMASK for ldwm/stwm or push.n/pop.n. */ 2691static void 2692nios2_assemble_arg_R (const char *token, nios2_insn_infoS *insn) 2693{ 2694 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2695 unsigned long mask; 2696 char *buf = strdup (token); 2697 unsigned long reglist = nios2_parse_reglist (buf, op); 2698 free (buf); 2699 2700 if (reglist == 0) 2701 return; 2702 2703 switch (op->format) 2704 { 2705 case iw_F1X4L17_type: 2706 /* Encoding for ldwm/stwm. */ 2707 if (reglist & 0x00003ffc) 2708 mask = reglist >> 2; 2709 else 2710 { 2711 insn->insn_code |= SET_IW_F1X4L17_RS (1); 2712 mask = (reglist & 0x00ffc000) >> 14; 2713 if (reglist & (1 << 28)) 2714 mask |= 1 << 10; 2715 if (reglist & (1 << 31)) 2716 mask |= 1 << 11; 2717 } 2718 insn->insn_code |= SET_IW_F1X4L17_REGMASK (mask); 2719 break; 2720 2721 case iw_L5I4X1_type: 2722 /* Encoding for push.n/pop.n. */ 2723 if (reglist & (1 << 28)) 2724 insn->insn_code |= SET_IW_L5I4X1_FP (1); 2725 mask = reglist & 0x00ff0000; 2726 if (mask) 2727 { 2728 int i; 2729 2730 for (i = 0; i < nios2_num_r2_reg_range_mappings; i++) 2731 if (nios2_r2_reg_range_mappings[i] == mask) 2732 break; 2733 if (i == nios2_num_r2_reg_range_mappings) 2734 { 2735 as_bad ("invalid reglist"); 2736 return; 2737 } 2738 insn->insn_code |= SET_IW_L5I4X1_REGRANGE (i); 2739 insn->insn_code |= SET_IW_L5I4X1_CS (1); 2740 } 2741 break; 2742 2743 default: 2744 bad_opcode (op); 2745 } 2746} 2747 2748/* Base register for ldwm/stwm. */ 2749static void 2750nios2_assemble_arg_B (const char *token, nios2_insn_infoS *insn) 2751{ 2752 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2753 int direction, writeback, ret; 2754 char *str = strdup (token); 2755 struct nios2_reg *reg 2756 = nios2_parse_base_register (str, &direction, &writeback, &ret); 2757 2758 free (str); 2759 if (!reg) 2760 return; 2761 2762 switch (op->format) 2763 { 2764 case iw_F1X4L17_type: 2765 /* For ldwm, check to see if the base register is already inside the 2766 register list. */ 2767 if (op->match == MATCH_R2_LDWM 2768 && (nios2_reglist_mask & (1 << reg->index))) 2769 { 2770 as_bad ("invalid base register; %s is inside the reglist", reg->name); 2771 return; 2772 } 2773 2774 /* For stwm, ret option is not allowed. */ 2775 if (op->match == MATCH_R2_STWM && ret) 2776 { 2777 as_bad ("invalid option syntax"); 2778 return; 2779 } 2780 2781 /* Check that the direction matches the ordering of the reglist. */ 2782 if (nios2_reglist_dir && direction != nios2_reglist_dir) 2783 { 2784 as_bad ("reglist order does not match increment/decrement mode"); 2785 return; 2786 } 2787 2788 insn->insn_code |= SET_IW_F1X4L17_A (reg->index); 2789 if (direction > 0) 2790 insn->insn_code |= SET_IW_F1X4L17_ID (1); 2791 if (writeback) 2792 insn->insn_code |= SET_IW_F1X4L17_WB (1); 2793 if (ret) 2794 insn->insn_code |= SET_IW_F1X4L17_PC (1); 2795 break; 2796 2797 default: 2798 bad_opcode (op); 2799 } 2800} 2801 2802static void 2803nios2_assemble_args (nios2_insn_infoS *insn) 2804{ 2805 const struct nios2_opcode *op = insn->insn_nios2_opcode; 2806 const char *argptr; 2807 unsigned int tokidx, ntok; 2808 2809 /* Make sure there are enough arguments. */ 2810 ntok = (op->pinfo & NIOS2_INSN_OPTARG) ? op->num_args - 1 : op->num_args; 2811 for (tokidx = 1; tokidx <= ntok; tokidx++) 2812 if (insn->insn_tokens[tokidx] == NULL) 2813 { 2814 as_bad ("missing argument"); 2815 return; 2816 } 2817 2818 for (argptr = op->args, tokidx = 1; 2819 *argptr && insn->insn_tokens[tokidx]; 2820 argptr++) 2821 switch (*argptr) 2822 { 2823 case ',': 2824 case '(': 2825 case ')': 2826 break; 2827 2828 case 'c': 2829 nios2_assemble_arg_c (insn->insn_tokens[tokidx++], insn); 2830 break; 2831 2832 case 'd': 2833 nios2_assemble_arg_d (insn->insn_tokens[tokidx++], insn); 2834 break; 2835 2836 case 's': 2837 nios2_assemble_arg_s (insn->insn_tokens[tokidx++], insn); 2838 break; 2839 2840 case 't': 2841 nios2_assemble_arg_t (insn->insn_tokens[tokidx++], insn); 2842 break; 2843 2844 case 'D': 2845 nios2_assemble_arg_D (insn->insn_tokens[tokidx++], insn); 2846 break; 2847 2848 case 'S': 2849 nios2_assemble_arg_S (insn->insn_tokens[tokidx++], insn); 2850 break; 2851 2852 case 'T': 2853 nios2_assemble_arg_T (insn->insn_tokens[tokidx++], insn); 2854 break; 2855 2856 case 'i': 2857 nios2_assemble_arg_i (insn->insn_tokens[tokidx++], insn); 2858 break; 2859 2860 case 'I': 2861 nios2_assemble_arg_I (insn->insn_tokens[tokidx++], insn); 2862 break; 2863 2864 case 'u': 2865 nios2_assemble_arg_u (insn->insn_tokens[tokidx++], insn); 2866 break; 2867 2868 case 'U': 2869 nios2_assemble_arg_U (insn->insn_tokens[tokidx++], insn); 2870 break; 2871 2872 case 'V': 2873 nios2_assemble_arg_V (insn->insn_tokens[tokidx++], insn); 2874 break; 2875 2876 case 'W': 2877 nios2_assemble_arg_W (insn->insn_tokens[tokidx++], insn); 2878 break; 2879 2880 case 'X': 2881 nios2_assemble_arg_X (insn->insn_tokens[tokidx++], insn); 2882 break; 2883 2884 case 'Y': 2885 nios2_assemble_arg_Y (insn->insn_tokens[tokidx++], insn); 2886 break; 2887 2888 case 'o': 2889 nios2_assemble_arg_o (insn->insn_tokens[tokidx++], insn); 2890 break; 2891 2892 case 'O': 2893 nios2_assemble_arg_O (insn->insn_tokens[tokidx++], insn); 2894 break; 2895 2896 case 'P': 2897 nios2_assemble_arg_P (insn->insn_tokens[tokidx++], insn); 2898 break; 2899 2900 case 'j': 2901 nios2_assemble_arg_j (insn->insn_tokens[tokidx++], insn); 2902 break; 2903 2904 case 'k': 2905 nios2_assemble_arg_k (insn->insn_tokens[tokidx++], insn); 2906 break; 2907 2908 case 'l': 2909 nios2_assemble_arg_l (insn->insn_tokens[tokidx++], insn); 2910 break; 2911 2912 case 'm': 2913 nios2_assemble_arg_m (insn->insn_tokens[tokidx++], insn); 2914 break; 2915 2916 case 'M': 2917 nios2_assemble_arg_M (insn->insn_tokens[tokidx++], insn); 2918 break; 2919 2920 case 'N': 2921 nios2_assemble_arg_N (insn->insn_tokens[tokidx++], insn); 2922 break; 2923 2924 case 'e': 2925 nios2_assemble_arg_e (insn->insn_tokens[tokidx++], insn); 2926 break; 2927 2928 case 'f': 2929 nios2_assemble_arg_f (insn->insn_tokens[tokidx++], insn); 2930 break; 2931 2932 case 'g': 2933 nios2_assemble_arg_g (insn->insn_tokens[tokidx++], insn); 2934 break; 2935 2936 case 'h': 2937 nios2_assemble_arg_h (insn->insn_tokens[tokidx++], insn); 2938 break; 2939 2940 case 'R': 2941 nios2_assemble_arg_R (insn->insn_tokens[tokidx++], insn); 2942 break; 2943 2944 case 'B': 2945 nios2_assemble_arg_B (insn->insn_tokens[tokidx++], insn); 2946 break; 2947 2948 default: 2949 bad_opcode (op); 2950 break; 2951 } 2952 2953 /* Perform argument checking. */ 2954 nios2_check_assembly (insn->insn_code | insn->constant_bits, 2955 insn->insn_tokens[tokidx]); 2956} 2957 2958 2959/* The function consume_arg takes a pointer into a string 2960 of instruction tokens (args) and a pointer into a string 2961 representing the expected sequence of tokens and separators. 2962 It checks whether the first argument in argstr is of the 2963 expected type, throwing an error if it is not, and returns 2964 the pointer argstr. */ 2965static char * 2966nios2_consume_arg (char *argstr, const char *parsestr) 2967{ 2968 char *temp; 2969 2970 switch (*parsestr) 2971 { 2972 case 'c': 2973 case 'd': 2974 case 's': 2975 case 't': 2976 case 'D': 2977 case 'S': 2978 case 'T': 2979 break; 2980 2981 case 'i': 2982 case 'u': 2983 if (*argstr == '%') 2984 { 2985 if (nios2_special_relocation_p (argstr)) 2986 { 2987 /* We zap the parentheses because we don't want them confused 2988 with separators. */ 2989 temp = strchr (argstr, '('); 2990 if (temp != NULL) 2991 *temp = ' '; 2992 temp = strchr (argstr, ')'); 2993 if (temp != NULL) 2994 *temp = ' '; 2995 } 2996 else 2997 as_bad (_("badly formed expression near %s"), argstr); 2998 } 2999 break; 3000 case 'm': 3001 case 'j': 3002 case 'k': 3003 case 'l': 3004 case 'I': 3005 case 'U': 3006 case 'V': 3007 case 'W': 3008 case 'X': 3009 case 'Y': 3010 case 'O': 3011 case 'P': 3012 case 'e': 3013 case 'f': 3014 case 'g': 3015 case 'h': 3016 case 'M': 3017 case 'N': 3018 3019 /* We can't have %hi, %lo or %hiadj here. */ 3020 if (*argstr == '%') 3021 as_bad (_("badly formed expression near %s"), argstr); 3022 break; 3023 3024 case 'R': 3025 /* Register list for ldwm/stwm or push.n/pop.n. Replace the commas 3026 in the list with spaces so we don't confuse them with separators. */ 3027 if (*argstr != '{') 3028 { 3029 as_bad ("missing '{' in register list"); 3030 break; 3031 } 3032 for (temp = argstr + 1; *temp; temp++) 3033 { 3034 if (*temp == '}') 3035 break; 3036 else if (*temp == ',') 3037 *temp = ' '; 3038 } 3039 if (!*temp) 3040 { 3041 as_bad ("missing '}' in register list"); 3042 break; 3043 } 3044 break; 3045 3046 case 'B': 3047 /* Base register and options for ldwm/stwm. This is the final argument 3048 and consumes the rest of the argument string; replace commas 3049 with spaces so that the token splitter doesn't think they are 3050 separate arguments. */ 3051 for (temp = argstr; *temp; temp++) 3052 if (*temp == ',') 3053 *temp = ' '; 3054 break; 3055 3056 case 'o': 3057 case 'E': 3058 break; 3059 default: 3060 BAD_CASE (*parsestr); 3061 break; 3062 } 3063 3064 return argstr; 3065} 3066 3067/* The function consume_separator takes a pointer into a string 3068 of instruction tokens (args) and a pointer into a string representing 3069 the expected sequence of tokens and separators. It finds the first 3070 instance of the character pointed to by separator in argstr, and 3071 returns a pointer to the next element of argstr, which is the 3072 following token in the sequence. */ 3073static char * 3074nios2_consume_separator (char *argstr, const char *separator) 3075{ 3076 char *p; 3077 3078 /* If we have a opcode reg, expr(reg) type instruction, and 3079 * we are separating the expr from the (reg), we find the last 3080 * (, just in case the expression has parentheses. */ 3081 3082 if (*separator == '(') 3083 p = strrchr (argstr, *separator); 3084 else 3085 p = strchr (argstr, *separator); 3086 3087 if (p != NULL) 3088 *p++ = 0; 3089 return p; 3090} 3091 3092/* The principal argument parsing function which takes a string argstr 3093 representing the instruction arguments for insn, and extracts the argument 3094 tokens matching parsestr into parsed_args. */ 3095static void 3096nios2_parse_args (nios2_insn_infoS *insn, char *argstr, 3097 const char *parsestr, char **parsed_args) 3098{ 3099 char *p; 3100 char *end = NULL; 3101 int i; 3102 p = argstr; 3103 i = 0; 3104 bfd_boolean terminate = FALSE; 3105 3106 /* This rest of this function is it too fragile and it mostly works, 3107 therefore special case this one. */ 3108 if (*parsestr == 0 && argstr != 0) 3109 { 3110 as_bad (_("too many arguments")); 3111 parsed_args[0] = NULL; 3112 return; 3113 } 3114 3115 while (p != NULL && !terminate && i < NIOS2_MAX_INSN_TOKENS) 3116 { 3117 parsed_args[i] = nios2_consume_arg (p, parsestr); 3118 ++parsestr; 3119 while (*parsestr == '(' || *parsestr == ')' || *parsestr == ',') 3120 { 3121 char *context = p; 3122 p = nios2_consume_separator (p, parsestr); 3123 /* Check for missing separators. */ 3124 if (!p && !(insn->insn_nios2_opcode->pinfo & NIOS2_INSN_OPTARG)) 3125 { 3126 as_bad (_("expecting %c near %s"), *parsestr, context); 3127 break; 3128 } 3129 ++parsestr; 3130 } 3131 3132 if (*parsestr == '\0') 3133 { 3134 /* Check that the argument string has no trailing arguments. */ 3135 end = strpbrk (p, ","); 3136 if (end != NULL) 3137 as_bad (_("too many arguments")); 3138 } 3139 3140 if (*parsestr == '\0' || (p != NULL && *p == '\0')) 3141 terminate = TRUE; 3142 ++i; 3143 } 3144 3145 parsed_args[i] = NULL; 3146} 3147 3148 3149 3150/** Support for pseudo-op parsing. These are macro-like opcodes that 3151 expand into real insns by suitable fiddling with the operands. */ 3152 3153/* Append the string modifier to the string contained in the argument at 3154 parsed_args[ndx]. */ 3155static void 3156nios2_modify_arg (char **parsed_args, const char *modifier, 3157 int unused ATTRIBUTE_UNUSED, int ndx) 3158{ 3159 char *tmp = parsed_args[ndx]; 3160 3161 parsed_args[ndx] = concat (tmp, modifier, (char *) NULL); 3162} 3163 3164/* Modify parsed_args[ndx] by negating that argument. */ 3165static void 3166nios2_negate_arg (char **parsed_args, const char *modifier ATTRIBUTE_UNUSED, 3167 int unused ATTRIBUTE_UNUSED, int ndx) 3168{ 3169 char *tmp = parsed_args[ndx]; 3170 3171 parsed_args[ndx] = concat ("~(", tmp, ")+1", (char *) NULL); 3172} 3173 3174/* The function nios2_swap_args swaps the pointers at indices index_1 and 3175 index_2 in the array parsed_args[] - this is used for operand swapping 3176 for comparison operations. */ 3177static void 3178nios2_swap_args (char **parsed_args, const char *unused ATTRIBUTE_UNUSED, 3179 int index_1, int index_2) 3180{ 3181 char *tmp; 3182 gas_assert (index_1 < NIOS2_MAX_INSN_TOKENS 3183 && index_2 < NIOS2_MAX_INSN_TOKENS); 3184 tmp = parsed_args[index_1]; 3185 parsed_args[index_1] = parsed_args[index_2]; 3186 parsed_args[index_2] = tmp; 3187} 3188 3189/* This function appends the string appnd to the array of strings in 3190 parsed_args num times starting at index start in the array. */ 3191static void 3192nios2_append_arg (char **parsed_args, const char *appnd, int num, 3193 int start) 3194{ 3195 int i, count; 3196 char *tmp; 3197 3198 gas_assert ((start + num) < NIOS2_MAX_INSN_TOKENS); 3199 3200 if (nios2_mode == NIOS2_MODE_TEST) 3201 tmp = parsed_args[start]; 3202 else 3203 tmp = NULL; 3204 3205 for (i = start, count = num; count > 0; ++i, --count) 3206 parsed_args[i] = (char *) appnd; 3207 3208 gas_assert (i == (start + num)); 3209 parsed_args[i] = tmp; 3210 parsed_args[i + 1] = NULL; 3211} 3212 3213/* This function inserts the string insert num times in the array 3214 parsed_args, starting at the index start. */ 3215static void 3216nios2_insert_arg (char **parsed_args, const char *insert, int num, 3217 int start) 3218{ 3219 int i, count; 3220 3221 gas_assert ((start + num) < NIOS2_MAX_INSN_TOKENS); 3222 3223 /* Move the existing arguments up to create space. */ 3224 for (i = NIOS2_MAX_INSN_TOKENS; i - num >= start; --i) 3225 parsed_args[i] = parsed_args[i - num]; 3226 3227 for (i = start, count = num; count > 0; ++i, --count) 3228 parsed_args[i] = (char *) insert; 3229} 3230 3231/* Cleanup function to free malloc'ed arg strings. */ 3232static void 3233nios2_free_arg (char **parsed_args, int num ATTRIBUTE_UNUSED, int start) 3234{ 3235 if (parsed_args[start]) 3236 { 3237 free (parsed_args[start]); 3238 parsed_args[start] = NULL; 3239 } 3240} 3241 3242/* This function swaps the pseudo-op for a real op. */ 3243static nios2_ps_insn_infoS* 3244nios2_translate_pseudo_insn (nios2_insn_infoS *insn) 3245{ 3246 3247 nios2_ps_insn_infoS *ps_insn; 3248 3249 /* Find which real insn the pseudo-op transates to and 3250 switch the insn_info ptr to point to it. */ 3251 ps_insn = nios2_ps_lookup (insn->insn_nios2_opcode->name); 3252 3253 if (ps_insn != NULL) 3254 { 3255 insn->insn_nios2_opcode = nios2_opcode_lookup (ps_insn->insn); 3256 insn->insn_tokens[0] = insn->insn_nios2_opcode->name; 3257 /* Modify the args so they work with the real insn. */ 3258 ps_insn->arg_modifer_func ((char **) insn->insn_tokens, 3259 ps_insn->arg_modifier, ps_insn->num, 3260 ps_insn->index); 3261 } 3262 else 3263 /* we cannot recover from this. */ 3264 as_fatal (_("unrecognized pseudo-instruction %s"), 3265 insn->insn_nios2_opcode->name); 3266 return ps_insn; 3267} 3268 3269/* Invoke the cleanup handler for pseudo-insn ps_insn on insn. */ 3270static void 3271nios2_cleanup_pseudo_insn (nios2_insn_infoS *insn, 3272 nios2_ps_insn_infoS *ps_insn) 3273{ 3274 if (ps_insn->arg_cleanup_func) 3275 (ps_insn->arg_cleanup_func) ((char **) insn->insn_tokens, 3276 ps_insn->num, ps_insn->index); 3277} 3278 3279const nios2_ps_insn_infoS nios2_ps_insn_info_structs[] = { 3280 /* pseudo-op, real-op, arg, arg_modifier_func, num, index, arg_cleanup_func */ 3281 {"mov", "add", nios2_append_arg, "zero", 1, 3, NULL}, 3282 {"movi", "addi", nios2_insert_arg, "zero", 1, 2, NULL}, 3283 {"movhi", "orhi", nios2_insert_arg, "zero", 1, 2, NULL}, 3284 {"movui", "ori", nios2_insert_arg, "zero", 1, 2, NULL}, 3285 {"movia", "orhi", nios2_insert_arg, "zero", 1, 2, NULL}, 3286 {"nop", "add", nios2_append_arg, "zero", 3, 1, NULL}, 3287 {"bgt", "blt", nios2_swap_args, "", 1, 2, NULL}, 3288 {"bgtu", "bltu", nios2_swap_args, "", 1, 2, NULL}, 3289 {"ble", "bge", nios2_swap_args, "", 1, 2, NULL}, 3290 {"bleu", "bgeu", nios2_swap_args, "", 1, 2, NULL}, 3291 {"cmpgt", "cmplt", nios2_swap_args, "", 2, 3, NULL}, 3292 {"cmpgtu", "cmpltu", nios2_swap_args, "", 2, 3, NULL}, 3293 {"cmple", "cmpge", nios2_swap_args, "", 2, 3, NULL}, 3294 {"cmpleu", "cmpgeu", nios2_swap_args, "", 2, 3, NULL}, 3295 {"cmpgti", "cmpgei", nios2_modify_arg, "+1", 0, 3, nios2_free_arg}, 3296 {"cmpgtui", "cmpgeui", nios2_modify_arg, "+1", 0, 3, nios2_free_arg}, 3297 {"cmplei", "cmplti", nios2_modify_arg, "+1", 0, 3, nios2_free_arg}, 3298 {"cmpleui", "cmpltui", nios2_modify_arg, "+1", 0, 3, nios2_free_arg}, 3299 {"subi", "addi", nios2_negate_arg, "", 0, 3, nios2_free_arg}, 3300 {"nop.n", "mov.n", nios2_append_arg, "zero", 2, 1, NULL} 3301 /* Add further pseudo-ops here. */ 3302}; 3303 3304#define NIOS2_NUM_PSEUDO_INSNS \ 3305 ((sizeof(nios2_ps_insn_info_structs)/ \ 3306 sizeof(nios2_ps_insn_info_structs[0]))) 3307const int nios2_num_ps_insn_info_structs = NIOS2_NUM_PSEUDO_INSNS; 3308 3309 3310/** Assembler output support. */ 3311 3312/* Output a normal instruction. */ 3313static void 3314output_insn (nios2_insn_infoS *insn) 3315{ 3316 char *f; 3317 nios2_insn_relocS *reloc; 3318 f = frag_more (insn->insn_nios2_opcode->size); 3319 /* This allocates enough space for the instruction 3320 and puts it in the current frag. */ 3321 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size); 3322 /* Emit debug info. */ 3323 dwarf2_emit_insn (insn->insn_nios2_opcode->size); 3324 /* Create any fixups to be acted on later. */ 3325 3326 for (reloc = insn->insn_reloc; reloc != NULL; reloc = reloc->reloc_next) 3327 fix_new_exp (frag_now, f - frag_now->fr_literal, 3328 insn->insn_nios2_opcode->size, 3329 &reloc->reloc_expression, reloc->reloc_pcrel, 3330 reloc->reloc_type); 3331} 3332 3333/* Output an unconditional branch. */ 3334static void 3335output_ubranch (nios2_insn_infoS *insn) 3336{ 3337 nios2_insn_relocS *reloc = insn->insn_reloc; 3338 3339 /* If the reloc is NULL, there was an error assembling the branch. */ 3340 if (reloc != NULL) 3341 { 3342 symbolS *symp = reloc->reloc_expression.X_add_symbol; 3343 offsetT offset = reloc->reloc_expression.X_add_number; 3344 char *f; 3345 bfd_boolean is_cdx = (insn->insn_nios2_opcode->size == 2); 3346 3347 /* Tag dwarf2 debug info to the address at the start of the insn. 3348 We must do it before frag_var() below closes off the frag. */ 3349 dwarf2_emit_insn (0); 3350 3351 /* We create a machine dependent frag which can grow 3352 to accommodate the largest possible instruction sequence 3353 this may generate. */ 3354 f = frag_var (rs_machine_dependent, 3355 UBRANCH_MAX_SIZE, insn->insn_nios2_opcode->size, 3356 (is_cdx ? CDX_UBRANCH_SUBTYPE (0) : UBRANCH_SUBTYPE (0)), 3357 symp, offset, NULL); 3358 3359 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size); 3360 3361 /* We leave fixup generation to md_convert_frag. */ 3362 } 3363} 3364 3365/* Output a conditional branch. */ 3366static void 3367output_cbranch (nios2_insn_infoS *insn) 3368{ 3369 nios2_insn_relocS *reloc = insn->insn_reloc; 3370 3371 /* If the reloc is NULL, there was an error assembling the branch. */ 3372 if (reloc != NULL) 3373 { 3374 symbolS *symp = reloc->reloc_expression.X_add_symbol; 3375 offsetT offset = reloc->reloc_expression.X_add_number; 3376 char *f; 3377 bfd_boolean is_cdx = (insn->insn_nios2_opcode->size == 2); 3378 3379 /* Tag dwarf2 debug info to the address at the start of the insn. 3380 We must do it before frag_var() below closes off the frag. */ 3381 dwarf2_emit_insn (0); 3382 3383 /* We create a machine dependent frag which can grow 3384 to accommodate the largest possible instruction sequence 3385 this may generate. */ 3386 f = frag_var (rs_machine_dependent, 3387 CBRANCH_MAX_SIZE, insn->insn_nios2_opcode->size, 3388 (is_cdx ? CDX_CBRANCH_SUBTYPE (0) : CBRANCH_SUBTYPE (0)), 3389 symp, offset, NULL); 3390 3391 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size); 3392 3393 /* We leave fixup generation to md_convert_frag. */ 3394 } 3395} 3396 3397/* Output a call sequence. Since calls are not pc-relative for NIOS2, 3398 but are page-relative, we cannot tell at any stage in assembly 3399 whether a call will be out of range since a section may be linked 3400 at any address. So if we are relaxing, we convert all call instructions 3401 to long call sequences, and rely on the linker to relax them back to 3402 short calls. */ 3403static void 3404output_call (nios2_insn_infoS *insn) 3405{ 3406 /* This allocates enough space for the instruction 3407 and puts it in the current frag. */ 3408 char *f = frag_more (12); 3409 nios2_insn_relocS *reloc = insn->insn_reloc; 3410 const struct nios2_opcode *op = insn->insn_nios2_opcode; 3411 3412 switch (op->format) 3413 { 3414 case iw_j_type: 3415 md_number_to_chars (f, 3416 (MATCH_R1_ORHI | SET_IW_I_B (AT_REGNUM) 3417 | SET_IW_I_A (0)), 3418 4); 3419 dwarf2_emit_insn (4); 3420 fix_new_exp (frag_now, f - frag_now->fr_literal, 4, 3421 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_HI16); 3422 md_number_to_chars (f + 4, 3423 (MATCH_R1_ORI | SET_IW_I_B (AT_REGNUM) 3424 | SET_IW_I_A (AT_REGNUM)), 3425 4); 3426 dwarf2_emit_insn (4); 3427 fix_new_exp (frag_now, f - frag_now->fr_literal + 4, 4, 3428 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_LO16); 3429 md_number_to_chars (f + 8, MATCH_R1_CALLR | SET_IW_R_A (AT_REGNUM), 4); 3430 dwarf2_emit_insn (4); 3431 break; 3432 case iw_L26_type: 3433 md_number_to_chars (f, 3434 (MATCH_R2_ORHI | SET_IW_F2I16_B (AT_REGNUM) 3435 | SET_IW_F2I16_A (0)), 3436 4); 3437 dwarf2_emit_insn (4); 3438 fix_new_exp (frag_now, f - frag_now->fr_literal, 4, 3439 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_HI16); 3440 md_number_to_chars (f + 4, 3441 (MATCH_R2_ORI | SET_IW_F2I16_B (AT_REGNUM) 3442 | SET_IW_F2I16_A (AT_REGNUM)), 3443 4); 3444 dwarf2_emit_insn (4); 3445 fix_new_exp (frag_now, f - frag_now->fr_literal + 4, 4, 3446 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_LO16); 3447 md_number_to_chars (f + 8, MATCH_R2_CALLR | SET_IW_F3X6L5_A (AT_REGNUM), 3448 4); 3449 dwarf2_emit_insn (4); 3450 break; 3451 default: 3452 bad_opcode (op); 3453 } 3454} 3455 3456/* Output a movhi/addi pair for the movia pseudo-op. */ 3457static void 3458output_movia (nios2_insn_infoS *insn) 3459{ 3460 /* This allocates enough space for the instruction 3461 and puts it in the current frag. */ 3462 char *f = frag_more (8); 3463 nios2_insn_relocS *reloc = insn->insn_reloc; 3464 unsigned long reg, code = 0; 3465 const struct nios2_opcode *op = insn->insn_nios2_opcode; 3466 3467 /* If the reloc is NULL, there was an error assembling the movia. */ 3468 if (reloc != NULL) 3469 { 3470 switch (op->format) 3471 { 3472 case iw_i_type: 3473 reg = GET_IW_I_B (insn->insn_code); 3474 code = MATCH_R1_ADDI | SET_IW_I_A (reg) | SET_IW_I_B (reg); 3475 break; 3476 case iw_F2I16_type: 3477 reg = GET_IW_F2I16_B (insn->insn_code); 3478 code = MATCH_R2_ADDI | SET_IW_F2I16_A (reg) | SET_IW_F2I16_B (reg); 3479 break; 3480 default: 3481 bad_opcode (op); 3482 } 3483 3484 md_number_to_chars (f, insn->insn_code, 4); 3485 dwarf2_emit_insn (4); 3486 fix_new (frag_now, f - frag_now->fr_literal, 4, 3487 reloc->reloc_expression.X_add_symbol, 3488 reloc->reloc_expression.X_add_number, 0, 3489 BFD_RELOC_NIOS2_HIADJ16); 3490 md_number_to_chars (f + 4, code, 4); 3491 dwarf2_emit_insn (4); 3492 fix_new (frag_now, f + 4 - frag_now->fr_literal, 4, 3493 reloc->reloc_expression.X_add_symbol, 3494 reloc->reloc_expression.X_add_number, 0, BFD_RELOC_NIOS2_LO16); 3495 } 3496} 3497 3498 3499 3500/** External interfaces. */ 3501 3502/* Update the selected architecture based on ARCH, giving an error if 3503 ARCH is an invalid value. */ 3504 3505static void 3506nios2_use_arch (const char *arch) 3507{ 3508 if (strcmp (arch, "nios2") == 0 || strcmp (arch, "r1") == 0) 3509 { 3510 nios2_architecture |= EF_NIOS2_ARCH_R1; 3511 nios2_opcodes = (struct nios2_opcode *) nios2_r1_opcodes; 3512 nios2_num_opcodes = nios2_num_r1_opcodes; 3513 nop32 = nop_r1; 3514 nop16 = NULL; 3515 return; 3516 } 3517 else if (strcmp (arch, "r2") == 0) 3518 { 3519 nios2_architecture |= EF_NIOS2_ARCH_R2; 3520 nios2_opcodes = (struct nios2_opcode *) nios2_r2_opcodes; 3521 nios2_num_opcodes = nios2_num_r2_opcodes; 3522 nop32 = nop_r2; 3523 nop16 = nop_r2_cdx; 3524 return; 3525 } 3526 3527 as_bad (_("unknown architecture '%s'"), arch); 3528} 3529 3530/* The following functions are called by machine-independent parts of 3531 the assembler. */ 3532int 3533md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED) 3534{ 3535 switch (c) 3536 { 3537 case 'r': 3538 /* Hidden option for self-test mode. */ 3539 nios2_mode = NIOS2_MODE_TEST; 3540 break; 3541 case OPTION_RELAX_ALL: 3542 nios2_as_options.relax = relax_all; 3543 break; 3544 case OPTION_NORELAX: 3545 nios2_as_options.relax = relax_none; 3546 break; 3547 case OPTION_RELAX_SECTION: 3548 nios2_as_options.relax = relax_section; 3549 break; 3550 case OPTION_EB: 3551 target_big_endian = 1; 3552 break; 3553 case OPTION_EL: 3554 target_big_endian = 0; 3555 break; 3556 case OPTION_MARCH: 3557 nios2_use_arch (arg); 3558 break; 3559 default: 3560 return 0; 3561 break; 3562 } 3563 3564 return 1; 3565} 3566 3567/* Implement TARGET_FORMAT. We can choose to be big-endian or 3568 little-endian at runtime based on a switch. */ 3569const char * 3570nios2_target_format (void) 3571{ 3572 return target_big_endian ? "elf32-bignios2" : "elf32-littlenios2"; 3573} 3574 3575/* Machine-dependent usage message. */ 3576void 3577md_show_usage (FILE *stream) 3578{ 3579 fprintf (stream, " NIOS2 options:\n" 3580 " -relax-all replace all branch and call " 3581 "instructions with jmp and callr sequences\n" 3582 " -relax-section replace identified out of range " 3583 "branches with jmp sequences (default)\n" 3584 " -no-relax do not replace any branches or calls\n" 3585 " -EB force big-endian byte ordering\n" 3586 " -EL force little-endian byte ordering\n" 3587 " -march=ARCH enable instructions from architecture ARCH\n"); 3588} 3589 3590 3591/* This function is called once, at assembler startup time. 3592 It should set up all the tables, etc. that the MD part of the 3593 assembler will need. */ 3594void 3595md_begin (void) 3596{ 3597 int i; 3598 const char *inserted; 3599 3600 switch (nios2_architecture) 3601 { 3602 default: 3603 case EF_NIOS2_ARCH_R1: 3604 bfd_default_set_arch_mach (stdoutput, bfd_arch_nios2, bfd_mach_nios2r1); 3605 break; 3606 case EF_NIOS2_ARCH_R2: 3607 if (target_big_endian) 3608 as_fatal (_("Big-endian R2 is not supported.")); 3609 bfd_default_set_arch_mach (stdoutput, bfd_arch_nios2, bfd_mach_nios2r2); 3610 break; 3611 } 3612 3613 /* Create and fill a hashtable for the Nios II opcodes, registers and 3614 arguments. */ 3615 nios2_opcode_hash = hash_new (); 3616 nios2_reg_hash = hash_new (); 3617 nios2_ps_hash = hash_new (); 3618 3619 for (i = 0; i < nios2_num_opcodes; ++i) 3620 { 3621 inserted 3622 = hash_insert (nios2_opcode_hash, nios2_opcodes[i].name, 3623 (PTR) & nios2_opcodes[i]); 3624 if (inserted != NULL) 3625 { 3626 fprintf (stderr, _("internal error: can't hash `%s': %s\n"), 3627 nios2_opcodes[i].name, inserted); 3628 /* Probably a memory allocation problem? Give up now. */ 3629 as_fatal (_("Broken assembler. No assembly attempted.")); 3630 } 3631 } 3632 3633 for (i = 0; i < nios2_num_regs; ++i) 3634 { 3635 inserted 3636 = hash_insert (nios2_reg_hash, nios2_regs[i].name, 3637 (PTR) & nios2_regs[i]); 3638 if (inserted != NULL) 3639 { 3640 fprintf (stderr, _("internal error: can't hash `%s': %s\n"), 3641 nios2_regs[i].name, inserted); 3642 /* Probably a memory allocation problem? Give up now. */ 3643 as_fatal (_("Broken assembler. No assembly attempted.")); 3644 } 3645 3646 } 3647 3648 for (i = 0; i < nios2_num_ps_insn_info_structs; ++i) 3649 { 3650 inserted 3651 = hash_insert (nios2_ps_hash, nios2_ps_insn_info_structs[i].pseudo_insn, 3652 (PTR) & nios2_ps_insn_info_structs[i]); 3653 if (inserted != NULL) 3654 { 3655 fprintf (stderr, _("internal error: can't hash `%s': %s\n"), 3656 nios2_ps_insn_info_structs[i].pseudo_insn, inserted); 3657 /* Probably a memory allocation problem? Give up now. */ 3658 as_fatal (_("Broken assembler. No assembly attempted.")); 3659 } 3660 } 3661 3662 /* Assembler option defaults. */ 3663 nios2_as_options.noat = FALSE; 3664 nios2_as_options.nobreak = FALSE; 3665 3666 /* Debug information is incompatible with relaxation. */ 3667 if (debug_type != DEBUG_UNSPECIFIED) 3668 nios2_as_options.relax = relax_none; 3669 3670 /* Initialize the alignment data. */ 3671 nios2_current_align_seg = now_seg; 3672 nios2_last_label = NULL; 3673 nios2_current_align = 0; 3674 nios2_min_align = 2; 3675} 3676 3677 3678/* Assembles a single line of Nios II assembly language. */ 3679void 3680md_assemble (char *op_str) 3681{ 3682 char *argstr; 3683 char *op_strdup = NULL; 3684 unsigned long saved_pinfo = 0; 3685 nios2_insn_infoS thisinsn; 3686 nios2_insn_infoS *insn = &thisinsn; 3687 3688 /* Make sure we are aligned on an appropriate boundary. */ 3689 if (nios2_current_align < nios2_min_align) 3690 nios2_align (nios2_min_align, NULL, nios2_last_label); 3691 else if (nios2_current_align > nios2_min_align) 3692 nios2_current_align = nios2_min_align; 3693 nios2_last_label = NULL; 3694 3695 /* We don't want to clobber to op_str 3696 because we want to be able to use it in messages. */ 3697 op_strdup = strdup (op_str); 3698 insn->insn_tokens[0] = strtok (op_strdup, " "); 3699 argstr = strtok (NULL, ""); 3700 3701 /* Assemble the opcode. */ 3702 insn->insn_nios2_opcode = nios2_opcode_lookup (insn->insn_tokens[0]); 3703 insn->insn_reloc = NULL; 3704 3705 if (insn->insn_nios2_opcode != NULL) 3706 { 3707 nios2_ps_insn_infoS *ps_insn = NULL; 3708 3709 /* Note if we've seen a 16-bit instruction. */ 3710 if (insn->insn_nios2_opcode->size == 2) 3711 nios2_min_align = 1; 3712 3713 /* Set the opcode for the instruction. */ 3714 insn->insn_code = insn->insn_nios2_opcode->match; 3715 insn->constant_bits = 0; 3716 3717 /* Parse the arguments pointed to by argstr. */ 3718 if (nios2_mode == NIOS2_MODE_ASSEMBLE) 3719 nios2_parse_args (insn, argstr, insn->insn_nios2_opcode->args, 3720 (char **) &insn->insn_tokens[1]); 3721 else 3722 nios2_parse_args (insn, argstr, insn->insn_nios2_opcode->args_test, 3723 (char **) &insn->insn_tokens[1]); 3724 3725 /* We need to preserve the MOVIA macro as this is clobbered by 3726 translate_pseudo_insn. */ 3727 if (insn->insn_nios2_opcode->pinfo == NIOS2_INSN_MACRO_MOVIA) 3728 saved_pinfo = NIOS2_INSN_MACRO_MOVIA; 3729 /* If the instruction is an pseudo-instruction, we want to replace it 3730 with its real equivalent, and then continue. */ 3731 if ((insn->insn_nios2_opcode->pinfo & NIOS2_INSN_MACRO) 3732 == NIOS2_INSN_MACRO) 3733 ps_insn = nios2_translate_pseudo_insn (insn); 3734 3735 /* Assemble the parsed arguments into the instruction word. */ 3736 nios2_assemble_args (insn); 3737 3738 /* Handle relaxation and other transformations. */ 3739 if (nios2_as_options.relax != relax_none 3740 && !nios2_as_options.noat 3741 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_UBRANCH) 3742 output_ubranch (insn); 3743 else if (nios2_as_options.relax != relax_none 3744 && !nios2_as_options.noat 3745 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_CBRANCH) 3746 output_cbranch (insn); 3747 else if (nios2_as_options.relax == relax_all 3748 && !nios2_as_options.noat 3749 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_CALL 3750 && insn->insn_reloc 3751 && ((insn->insn_reloc->reloc_type 3752 == BFD_RELOC_NIOS2_CALL26) 3753 || (insn->insn_reloc->reloc_type 3754 == BFD_RELOC_NIOS2_CALL26_NOAT))) 3755 output_call (insn); 3756 else if (saved_pinfo == NIOS2_INSN_MACRO_MOVIA) 3757 output_movia (insn); 3758 else 3759 output_insn (insn); 3760 if (ps_insn) 3761 nios2_cleanup_pseudo_insn (insn, ps_insn); 3762 } 3763 else 3764 /* Unrecognised instruction - error. */ 3765 as_bad (_("unrecognised instruction %s"), insn->insn_tokens[0]); 3766 3767 /* Don't leak memory. */ 3768 free (op_strdup); 3769} 3770 3771/* Round up section size. */ 3772valueT 3773md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT size) 3774{ 3775 /* I think byte alignment is fine here. */ 3776 return size; 3777} 3778 3779/* Implement TC_FORCE_RELOCATION. */ 3780int 3781nios2_force_relocation (fixS *fixp) 3782{ 3783 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3784 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY 3785 || fixp->fx_r_type == BFD_RELOC_NIOS2_ALIGN) 3786 return 1; 3787 3788 return generic_force_reloc (fixp); 3789} 3790 3791/* Implement tc_fix_adjustable. */ 3792int 3793nios2_fix_adjustable (fixS *fixp) 3794{ 3795 if (fixp->fx_addsy == NULL) 3796 return 1; 3797 3798#ifdef OBJ_ELF 3799 /* Prevent all adjustments to global symbols. */ 3800 if (OUTPUT_FLAVOR == bfd_target_elf_flavour 3801 && (S_IS_EXTERNAL (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy))) 3802 return 0; 3803#endif 3804 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3805 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3806 return 0; 3807 3808 /* Preserve relocations against symbols with function type. */ 3809 if (symbol_get_bfdsym (fixp->fx_addsy)->flags & BSF_FUNCTION) 3810 return 0; 3811 3812 /* Don't allow symbols to be discarded on GOT related relocs. */ 3813 if (fixp->fx_r_type == BFD_RELOC_NIOS2_GOT16 3814 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL16 3815 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_LO 3816 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_HA 3817 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_GD16 3818 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LDM16 3819 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LDO16 3820 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_IE16 3821 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LE16 3822 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPMOD 3823 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPREL 3824 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_TPREL 3825 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF 3826 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOT_LO 3827 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOT_HA 3828 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL_LO 3829 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL_HA 3830 ) 3831 return 0; 3832 3833 return 1; 3834} 3835 3836/* Implement tc_frob_symbol. This is called in adjust_reloc_syms; 3837 it is used to remove *ABS* references from the symbol table. */ 3838int 3839nios2_frob_symbol (symbolS *symp) 3840{ 3841 if ((OUTPUT_FLAVOR == bfd_target_elf_flavour 3842 && symp == section_symbol (absolute_section)) 3843 || !S_IS_DEFINED (symp)) 3844 return 1; 3845 else 3846 return 0; 3847} 3848 3849/* The function tc_gen_reloc creates a relocation structure for the 3850 fixup fixp, and returns a pointer to it. This structure is passed 3851 to bfd_install_relocation so that it can be written to the object 3852 file for linking. */ 3853arelent * 3854tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 3855{ 3856 arelent *reloc = XNEW (arelent); 3857 reloc->sym_ptr_ptr = XNEW (asymbol *); 3858 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 3859 3860 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 3861 reloc->addend = fixp->fx_offset; /* fixp->fx_addnumber; */ 3862 3863 if (fixp->fx_pcrel) 3864 { 3865 switch (fixp->fx_r_type) 3866 { 3867 case BFD_RELOC_16: 3868 fixp->fx_r_type = BFD_RELOC_16_PCREL; 3869 break; 3870 case BFD_RELOC_NIOS2_LO16: 3871 fixp->fx_r_type = BFD_RELOC_NIOS2_PCREL_LO; 3872 break; 3873 case BFD_RELOC_NIOS2_HIADJ16: 3874 fixp->fx_r_type = BFD_RELOC_NIOS2_PCREL_HA; 3875 break; 3876 default: 3877 break; 3878 } 3879 } 3880 3881 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 3882 if (reloc->howto == NULL) 3883 { 3884 as_bad_where (fixp->fx_file, fixp->fx_line, 3885 _("can't represent relocation type %s"), 3886 bfd_get_reloc_code_name (fixp->fx_r_type)); 3887 3888 /* Set howto to a garbage value so that we can keep going. */ 3889 reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 3890 gas_assert (reloc->howto != NULL); 3891 } 3892 return reloc; 3893} 3894 3895long 3896md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED) 3897{ 3898 return 0; 3899} 3900 3901/* Called just before the assembler exits. */ 3902void 3903md_end (void) 3904{ 3905 /* FIXME - not yet implemented */ 3906} 3907 3908/* Under ELF we need to default _GLOBAL_OFFSET_TABLE. 3909 Otherwise we have no need to default values of symbols. */ 3910symbolS * 3911md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 3912{ 3913#ifdef OBJ_ELF 3914 if (name[0] == '_' && name[1] == 'G' 3915 && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 3916 { 3917 if (!GOT_symbol) 3918 { 3919 if (symbol_find (name)) 3920 as_bad ("GOT already in the symbol table"); 3921 3922 GOT_symbol = symbol_new (name, undefined_section, 3923 (valueT) 0, &zero_address_frag); 3924 } 3925 3926 return GOT_symbol; 3927 } 3928#endif 3929 3930 return 0; 3931} 3932 3933/* Implement tc_frob_label. */ 3934void 3935nios2_frob_label (symbolS *lab) 3936{ 3937 /* Emit dwarf information. */ 3938 dwarf2_emit_label (lab); 3939 3940 /* Update the label's address with the current output pointer. */ 3941 symbol_set_frag (lab, frag_now); 3942 S_SET_VALUE (lab, (valueT) frag_now_fix ()); 3943 3944 /* Record this label for future adjustment after we find out what 3945 kind of data it references, and the required alignment therewith. */ 3946 nios2_last_label = lab; 3947} 3948 3949/* Implement md_cons_align. */ 3950void 3951nios2_cons_align (int size) 3952{ 3953 int log_size = 0; 3954 const char *pfill = NULL; 3955 3956 while ((size >>= 1) != 0) 3957 ++log_size; 3958 3959 if (subseg_text_p (now_seg)) 3960 pfill = (const char *) nop32; 3961 else 3962 pfill = NULL; 3963 3964 if (nios2_auto_align_on) 3965 nios2_align (log_size, pfill, NULL); 3966 3967 nios2_last_label = NULL; 3968} 3969 3970/* Map 's' to SHF_NIOS2_GPREL. */ 3971/* This is from the Alpha code tc-alpha.c. */ 3972int 3973nios2_elf_section_letter (int letter, const char **ptr_msg) 3974{ 3975 if (letter == 's') 3976 return SHF_NIOS2_GPREL; 3977 3978 *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string"); 3979 return -1; 3980} 3981 3982/* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */ 3983/* This is from the Alpha code tc-alpha.c. */ 3984flagword 3985nios2_elf_section_flags (flagword flags, int attr, int type ATTRIBUTE_UNUSED) 3986{ 3987 if (attr & SHF_NIOS2_GPREL) 3988 flags |= SEC_SMALL_DATA; 3989 return flags; 3990} 3991 3992/* Implement TC_PARSE_CONS_EXPRESSION to handle %tls_ldo(...) */ 3993bfd_reloc_code_real_type 3994nios2_cons (expressionS *exp, int size) 3995{ 3996 bfd_reloc_code_real_type nios2_tls_ldo_reloc = BFD_RELOC_NONE; 3997 3998 SKIP_WHITESPACE (); 3999 if (input_line_pointer[0] == '%') 4000 { 4001 if (strprefix (input_line_pointer + 1, "tls_ldo")) 4002 { 4003 if (size != 4) 4004 as_bad (_("Illegal operands: %%tls_ldo in %d-byte data field"), 4005 size); 4006 else 4007 { 4008 input_line_pointer += 8; 4009 nios2_tls_ldo_reloc = BFD_RELOC_NIOS2_TLS_DTPREL; 4010 } 4011 } 4012 if (nios2_tls_ldo_reloc != BFD_RELOC_NONE) 4013 { 4014 SKIP_WHITESPACE (); 4015 if (input_line_pointer[0] != '(') 4016 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()")); 4017 else 4018 { 4019 int c; 4020 char *end = ++input_line_pointer; 4021 int npar = 0; 4022 4023 for (c = *end; !is_end_of_line[c]; end++, c = *end) 4024 if (c == '(') 4025 npar++; 4026 else if (c == ')') 4027 { 4028 if (!npar) 4029 break; 4030 npar--; 4031 } 4032 4033 if (c != ')') 4034 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()")); 4035 else 4036 { 4037 *end = '\0'; 4038 expression (exp); 4039 *end = c; 4040 if (input_line_pointer != end) 4041 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()")); 4042 else 4043 { 4044 input_line_pointer++; 4045 SKIP_WHITESPACE (); 4046 c = *input_line_pointer; 4047 if (! is_end_of_line[c] && c != ',') 4048 as_bad (_("Illegal operands: garbage after %%tls_ldo()")); 4049 } 4050 } 4051 } 4052 } 4053 } 4054 if (nios2_tls_ldo_reloc == BFD_RELOC_NONE) 4055 expression (exp); 4056 return nios2_tls_ldo_reloc; 4057} 4058 4059/* Implement HANDLE_ALIGN. */ 4060void 4061nios2_handle_align (fragS *fragp) 4062{ 4063 /* If we are expecting to relax in the linker, then we must output a 4064 relocation to tell the linker we are aligning code. */ 4065 if (nios2_as_options.relax == relax_all 4066 && (fragp->fr_type == rs_align || fragp->fr_type == rs_align_code) 4067 && fragp->fr_address + fragp->fr_fix > 0 4068 && fragp->fr_offset > 1 4069 && now_seg != bss_section) 4070 fix_new (fragp, fragp->fr_fix, 0, &abs_symbol, fragp->fr_offset, 0, 4071 BFD_RELOC_NIOS2_ALIGN); 4072} 4073 4074/* Implement tc_regname_to_dw2regnum, to convert REGNAME to a DWARF-2 4075 register number. */ 4076int 4077nios2_regname_to_dw2regnum (char *regname) 4078{ 4079 struct nios2_reg *r = nios2_reg_lookup (regname); 4080 if (r == NULL) 4081 return -1; 4082 return r->index; 4083} 4084 4085/* Implement tc_cfi_frame_initial_instructions, to initialize the DWARF-2 4086 unwind information for this procedure. */ 4087void 4088nios2_frame_initial_instructions (void) 4089{ 4090 cfi_add_CFA_def_cfa (27, 0); 4091} 4092 4093#ifdef OBJ_ELF 4094/* Some special processing for a Nios II ELF file. */ 4095 4096void 4097nios2_elf_final_processing (void) 4098{ 4099 elf_elfheader (stdoutput)->e_flags = nios2_architecture; 4100} 4101#endif 4102