12016-10-06 Alan Modra <amodra@gmail.com> 2 3 * mep.opc (expand_string): Add fall through comment. 4 52016-03-03 Alan Modra <amodra@gmail.com> 6 7 * fr30.cpu (f-m4): Replace bogus comment with a better guess 8 at what is really going on. 9 102016-03-02 Alan Modra <amodra@gmail.com> 11 12 * fr30.cpu (f-m4): Replace -1 << 4 with -16. 13 142016-02-02 Andrew Burgess <andrew.burgess@embecosm.com> 15 16 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to 17 a constant to better align disassembler output. 18 192014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 20 21 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions. 22 232014-06-12 Alan Modra <amodra@gmail.com> 24 25 * or1k.opc: Whitespace fixes. 26 272014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 28 29 * or1korbis.cpu (h-atomic-reserve): New hardware. 30 (h-atomic-address): Likewise. 31 (insn-opcode): Add opcodes for LWA and SWA. 32 (atomic-reserve): New operand. 33 (atomic-address): Likewise. 34 (l-lwa, l-swa): New instructions. 35 (l-lbs): Fix typo in comment. 36 (store-insn): Clear atomic reserve on store to atomic-address. 37 Fix register names in fmt field. 38 392014-04-22 Christian Svensson <blue@cmd.nu> 40 41 * openrisc.cpu: Delete. 42 * openrisc.opc: Delete. 43 * or1k.cpu: New file. 44 * or1k.opc: New file. 45 * or1kcommon.cpu: New file. 46 * or1korbis.cpu: New file. 47 * or1korfpx.cpu: New file. 48 492013-12-07 Mike Frysinger <vapier@gentoo.org> 50 51 * epiphany.opc: Remove +x file mode. 52 532013-03-08 Yann Sionneau <yann.sionneau@gmail.com> 54 55 PR binutils/15241 56 * lm32.cpu (Control and status registers): Add CFG2, PSW, 57 TLBVADDR, TLBPADDR and TLBBADVADDR. 58 592012-11-30 Oleg Raikhman <oleg@adapteva.com> 60 Joern Rennecke <joern.rennecke@embecosm.com> 61 62 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. 63 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. 64 (testset-insn): Add NO_DIS attribute to t.l. 65 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. 66 (move-insns): Add NO-DIS attribute to cmov.l. 67 (op-mmr-movts): Add NO-DIS attribute to movts.l. 68 (op-mmr-movfs): Add NO-DIS attribute to movfs.l. 69 (op-rrr): Add NO-DIS attribute to .l. 70 (shift-rrr): Add NO-DIS attribute to .l. 71 (op-shift-rri): Add NO-DIS attribute to i32.l. 72 (bitrl, movtl): Add NO-DIS attribute. 73 (op-iextrrr): Add NO-DIS attribute to .l 74 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. 75 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. 76 772012-02-27 Alan Modra <amodra@gmail.com> 78 79 * mt.opc (print_dollarhex): Trim values to 32 bits. 80 812011-12-15 Nick Clifton <nickc@redhat.com> 82 83 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit 84 hosts. 85 862011-10-26 Joern Rennecke <joern.rennecke@embecosm.com> 87 88 * epiphany.opc (parse_branch_addr): Fix type of valuep. 89 Cast value before printing it as a long. 90 (parse_postindex): Fix type of valuep. 91 922011-10-25 Joern Rennecke <joern.rennecke@embecosm.com> 93 94 * cpu/epiphany.cpu: New file. 95 * cpu/epiphany.opc: New file. 96 972011-08-22 Nick Clifton <nickc@redhat.com> 98 99 * fr30.cpu: Newly contributed file. 100 * fr30.opc: Likewise. 101 * ip2k.cpu: Likewise. 102 * ip2k.opc: Likewise. 103 * mep-avc.cpu: Likewise. 104 * mep-avc2.cpu: Likewise. 105 * mep-c5.cpu: Likewise. 106 * mep-core.cpu: Likewise. 107 * mep-default.cpu: Likewise. 108 * mep-ext-cop.cpu: Likewise. 109 * mep-fmax.cpu: Likewise. 110 * mep-h1.cpu: Likewise. 111 * mep-ivc2.cpu: Likewise. 112 * mep-rhcop.cpu: Likewise. 113 * mep-sample-ucidsp.cpu: Likewise. 114 * mep.cpu: Likewise. 115 * mep.opc: Likewise. 116 * openrisc.cpu: Likewise. 117 * openrisc.opc: Likewise. 118 * xstormy16.cpu: Likewise. 119 * xstormy16.opc: Likewise. 120 1212010-10-08 Pierre Muller <muller@ics.u-strasbg.fr> 122 123 * frv.opc: #undef DEBUG. 124 1252010-07-03 DJ Delorie <dj@delorie.com> 126 127 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it. 128 1292010-02-11 Doug Evans <dje@sebabeach.org> 130 131 * m32r.cpu (HASH-PREFIX): Delete. 132 (duhpo, dshpo): New pmacros. 133 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. 134 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX 135 attribute, define with dshpo. 136 (uimm24): Delete HASH-PREFIX attribute. 137 * m32r.opc (CGEN_PRINT_NORMAL): Delete. 138 (print_signed_with_hash_prefix): New function. 139 (print_unsigned_with_hash_prefix): New function. 140 * xc16x.cpu (dowh): New pmacro. 141 (upof16): Define with dowh, specify print handler. 142 (qbit, qlobit, qhibit): Ditto. 143 (upag16): Ditto. 144 * xc16x.opc (CGEN_PRINT_NORMAL): Delete. 145 (print_with_dot_prefix): New functions. 146 (print_with_pof_prefix, print_with_pag_prefix): New functions. 147 1482010-01-24 Doug Evans <dje@sebabeach.org> 149 150 * frv.cpu (floating-point-conversion): Update call to fp conv op. 151 (floating-point-dual-conversion, ne-floating-point-dual-conversion, 152 conditional-floating-point-conversion, ne-floating-point-conversion, 153 float-parallel-mul-add-double-semantics): Ditto. 154 1552010-01-05 Doug Evans <dje@sebabeach.org> 156 157 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. 158 (f-dsp-40-u20, f-dsp-40-u24): Ditto. 159 1602010-01-02 Doug Evans <dje@sebabeach.org> 161 162 * m32c.opc (parse_signed16): Fix typo. 163 1642009-12-11 Nick Clifton <nickc@redhat.com> 165 166 * frv.opc: Fix shadowed variable warnings. 167 * m32c.opc: Fix shadowed variable warnings. 168 1692009-11-14 Doug Evans <dje@sebabeach.org> 170 171 Must use VOID expression in VOID context. 172 * xc16x.cpu (mov4): Fix mode of `sequence'. 173 (mov9, mov10): Ditto. 174 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'. 175 (callr, callseg, calls, trap, rets, reti): Ditto. 176 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'. 177 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'. 178 (exts, exts1, extsr, extsr1, prior): Ditto. 179 1802009-10-23 Doug Evans <dje@sebabeach.org> 181 182 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. 183 cgen-ops.h -> cgen/basic-ops.h. 184 1852009-09-25 Alan Modra <amodra@bigpond.net.au> 186 187 * m32r.cpu (stb-plus): Typo fix. 188 1892009-09-23 Doug Evans <dje@sebabeach.org> 190 191 * m32r.cpu (sth-plus): Fix address mode and calculation. 192 (stb-plus): Ditto. 193 (clrpsw): Fix mask calculation. 194 (bset, bclr, btst): Make mode in bit calculation match expression. 195 196 * xc16x.cpu (rtl-version): Set to 0.8. 197 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix, 198 make uppercase. Remove unnecessary name-prefix spec. 199 (grb-names, conditioncode-names, extconditioncode-names): Ditto. 200 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto. 201 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto. 202 (h-cr): New hardware. 203 (muls): Comment out parts that won't compile, add fixme. 204 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto. 205 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto. 206 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto. 207 2082009-07-16 Doug Evans <dje@sebabeach.org> 209 210 * cpu/simplify.inc (*): One line doc strings don't need \n. 211 (df): Invoke define-full-ifield instead of claiming it's an alias. 212 (dno): Define. 213 (dnop): Mark as deprecated. 214 2152009-06-22 Alan Modra <amodra@bigpond.net.au> 216 217 * m32c.opc (parse_lab_5_3): Use correct enum. 218 2192009-01-07 Hans-Peter Nilsson <hp@axis.com> 220 221 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI. 222 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros. 223 (media-arith-sat-semantics): Explicitly sign- or zero-extend 224 arguments of "operation" to DI using "mode" and the new pmacros. 225 2262009-01-03 Hans-Peter Nilsson <hp@axis.com> 227 228 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size 229 of number 2, PID. 230 2312008-12-23 Jon Beniston <jon@beniston.com> 232 233 * lm32.cpu: New file. 234 * lm32.opc: New file. 235 2362008-01-29 Alan Modra <amodra@bigpond.net.au> 237 238 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change 239 to source. 240 2412007-10-22 Hans-Peter Nilsson <hp@axis.com> 242 243 * cris.cpu (movs, movu): Use result of extension operation when 244 updating flags. 245 2462007-07-04 Nick Clifton <nickc@redhat.com> 247 248 * cris.cpu: Update copyright notice to refer to GPLv3. 249 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu, 250 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu, 251 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu, 252 xc16x.opc: Likewise. 253 * iq2000.cpu: Fix copyright notice to refer to FSF. 254 2552007-04-30 Mark Salter <msalter@sadr.localdomain> 256 257 * frv.cpu (spr-names): Support new coprocessor SPR registers. 258 2592007-04-20 Nick Clifton <nickc@redhat.com> 260 261 * xc16x.cpu: Restore after accidentally overwriting this file with 262 xc16x.opc. 263 2642007-03-29 DJ Delorie <dj@redhat.com> 265 266 * m32c.cpu (Imm-8-s4n): Fix print hook. 267 (Lab-24-8, Lab-32-8, Lab-40-8): Fix. 268 (arith-jnz-imm4-dst-defn): Make relaxable. 269 (arith-jnz16-imm4-dst-defn): Fix encodings. 270 2712007-03-20 DJ Delorie <dj@redhat.com> 272 273 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, 274 mem20): New. 275 (src16-16-20-An-relative-*): New. 276 (dst16-*-20-An-relative-*): New. 277 (dst16-16-16sa-*): New 278 (dst16-16-16ar-*): New 279 (dst32-16-16sa-Unprefixed-*): New 280 (jsri): Fix operands. 281 (setzx): Fix encoding. 282 2832007-03-08 Alan Modra <amodra@bigpond.net.au> 284 285 * m32r.opc: Formatting. 286 2872006-05-22 Nick Clifton <nickc@redhat.com> 288 289 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu. 290 2912006-04-10 DJ Delorie <dj@redhat.com> 292 293 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 294 decides if this function accepts symbolic constants or not. 295 (parse_signed_bitbase): Likewise. 296 (parse_unsigned_bitbase8): Pass the new parameter. 297 (parse_unsigned_bitbase11): Likewise. 298 (parse_unsigned_bitbase16): Likewise. 299 (parse_unsigned_bitbase19): Likewise. 300 (parse_unsigned_bitbase27): Likewise. 301 (parse_signed_bitbase8): Likewise. 302 (parse_signed_bitbase11): Likewise. 303 (parse_signed_bitbase19): Likewise. 304 3052006-03-13 DJ Delorie <dj@redhat.com> 306 307 * m32c.cpu (Bit3-S): New. 308 (btst:s): New. 309 * m32c.opc (parse_bit3_S): New. 310 311 * m32c.cpu (decimal-subtraction16-insn): Add second operand. 312 (btst): Add optional :G suffix for MACH32. 313 (or.b:S): New. 314 (pop.w:G): Add optional :G suffix for MACH16. 315 (push.b.imm): Fix syntax. 316 3172006-03-10 DJ Delorie <dj@redhat.com> 318 319 * m32c.cpu (mul.l): New. 320 (mulu.l): New. 321 3222006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) 323 324 * xc16x.opc (parse_hash): Return NULL if the input was parsed or 325 an error message otherwise. 326 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. 327 Fix up comments to correctly describe the functions. 328 3292006-02-24 DJ Delorie <dj@redhat.com> 330 331 * m32c.cpu (RL_TYPE): New attribute, with macros. 332 (Lab-8-24): Add RELAX. 333 (unary-insn-defn-g, binary-arith-imm-dst-defn, 334 binary-arith-imm4-dst-defn): Add 1ADDR attribute. 335 (binary-arith-src-dst-defn): Add 2ADDR attribute. 336 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, 337 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP 338 attribute. 339 (jsri16, jsri32): Add 1ADDR attribute. 340 (jsr32.w, jsr32.a): Add JUMP attribute. 341 3422006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 343 Anil Paranjape <anilp1@kpitcummins.com> 344 Shilin Shakti <shilins@kpitcummins.com> 345 346 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU 347 description. 348 * xc16x.opc: New file containing supporting XC16C routines. 349 3502006-02-10 Nick Clifton <nickc@redhat.com> 351 352 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits. 353 3542006-01-06 DJ Delorie <dj@redhat.com> 355 356 * m32c.cpu (mov.w:q): Fix mode. 357 (push32.b.imm): Likewise, for the comment. 358 3592005-12-16 Nathan Sidwell <nathan@codesourcery.com> 360 361 Second part of ms1 to mt renaming. 362 * mt.cpu (define-arch, define-isa): Set name to mt. 363 (define-mach): Adjust. 364 * mt.opc (CGEN_ASM_HASH): Update. 365 (mt_asm_hash, mt_cgen_insn_supported): Renamed. 366 (parse_loopsize, parse_imm16): Adjust. 367 3682005-12-13 DJ Delorie <dj@redhat.com> 369 370 * m32c.cpu (jsri): Fix order so register names aren't treated as 371 symbols. 372 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw, 373 indexwd, indexws): Fix encodings. 374 3752005-12-12 Nathan Sidwell <nathan@codesourcery.com> 376 377 * mt.cpu: Rename from ms1.cpu. 378 * mt.opc: Rename from ms1.opc. 379 3802005-12-06 Hans-Peter Nilsson <hp@axis.com> 381 382 * cris.cpu (simplecris-common-writable-specregs) 383 (simplecris-common-readable-specregs): Split from 384 simplecris-common-specregs. All users changed. 385 (cris-implemented-writable-specregs-v0) 386 (cris-implemented-readable-specregs-v0): Similar from 387 cris-implemented-specregs-v0. 388 (cris-implemented-writable-specregs-v3) 389 (cris-implemented-readable-specregs-v3) 390 (cris-implemented-writable-specregs-v8) 391 (cris-implemented-readable-specregs-v8) 392 (cris-implemented-writable-specregs-v10) 393 (cris-implemented-readable-specregs-v10) 394 (cris-implemented-writable-specregs-v32) 395 (cris-implemented-readable-specregs-v32): Similar. 396 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New 397 insns and specializations. 398 3992005-11-08 Nathan Sidwell <nathan@codesourcery.com> 400 401 Add ms2 402 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and 403 model. 404 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, 405 f-cb2incr, f-rc3): New fields. 406 (LOOP): New instruction. 407 (JAL-HAZARD): New hazard. 408 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): 409 New operands. 410 (mul, muli, dbnz, iflush): Enable for ms2 411 (jal, reti): Has JAL-HAZARD. 412 (ldctxt, ldfb, stfb): Only ms1. 413 (fbcb): Only ms1,ms1-003. 414 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, 415 fbcbincrs, mfbcbincrs): Enable for ms2. 416 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. 417 * ms1.opc (parse_loopsize): New. 418 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. 419 (print_pcrel): New. 420 4212005-10-28 Dave Brolley <brolley@redhat.com> 422 423 Contribute the following change: 424 2003-09-24 Dave Brolley <brolley@redhat.com> 425 426 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of 427 CGEN_ATTR_VALUE_TYPE. 428 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. 429 Use cgen_bitset_intersect_p. 430 4312005-10-27 DJ Delorie <dj@redhat.com> 432 433 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 434 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, 435 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which 436 imm operand is needed. 437 (adjnz, sbjnz): Pass the right operands. 438 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, 439 unary-insn): Add -g variants for opcodes that need to support :G. 440 (not.BW:G, push.BW:G): Call it. 441 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, 442 stzx16-imm8-imm8-abs16): Fix operand typos. 443 * m32c.opc (m32c_asm_hash): Support bnCND. 444 (parse_signed4n, print_signed4n): New. 445 4462005-10-26 DJ Delorie <dj@redhat.com> 447 448 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 449 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, 450 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): 451 dsp8[sp] is signed. 452 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). 453 (mov.BW:S r0,r1): Fix typo r1l->r1. 454 (tst): Allow :G suffix. 455 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. 456 4572005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 458 459 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 460 4612005-10-25 DJ Delorie <dj@redhat.com> 462 463 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 464 making one a macro of the other. 465 4662005-10-21 DJ Delorie <dj@redhat.com> 467 468 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. 469 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, 470 indexld, indexls): .w variants have `1' bit. 471 (rot32.b): QI, not SI. 472 (rot32.w): HI, not SI. 473 (xchg16): HI for .w variant. 474 4752005-10-19 Nick Clifton <nickc@redhat.com> 476 477 * m32r.opc (parse_slo16): Fix bad application of previous patch. 478 4792005-10-18 Andreas Schwab <schwab@suse.de> 480 481 * m32r.opc (parse_slo16): Better version of previous patch. 482 4832005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 484 485 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word 486 size. 487 4882005-07-25 DJ Delorie <dj@redhat.com> 489 490 * m32c.opc (parse_unsigned8): Add %dsp8(). 491 (parse_signed8): Add %hi8(). 492 (parse_unsigned16): Add %dsp16(). 493 (parse_signed16): Add %lo16() and %hi16(). 494 (parse_lab_5_3): Make valuep a bfd_vma *. 495 4962005-07-18 Nick Clifton <nickc@redhat.com> 497 498 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode 499 components. 500 (f-lab32-jmp-s): Fix insertion sequence. 501 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. 502 (Dsp-40-s8): Make parameter be signed. 503 (Dsp-40-s16): Likewise. 504 (Dsp-48-s8): Likewise. 505 (Dsp-48-s16): Likewise. 506 (Imm-13-u3): Likewise. (Despite its name!) 507 (BitBase16-16-s8): Make the parameter be unsigned. 508 (BitBase16-8-u11-S): Likewise. 509 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, 510 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow 511 relaxation. 512 513 * m32c.opc: Fix formatting. 514 Use safe-ctype.h instead of ctype.h 515 Move duplicated code sequences into a macro. 516 Fix compile time warnings about signedness mismatches. 517 Remove dead code. 518 (parse_lab_5_3): New parser function. 519 5202005-07-16 Jim Blandy <jimb@redhat.com> 521 522 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, 523 to represent isa sets. 524 5252005-07-15 Jim Blandy <jimb@redhat.com> 526 527 * m32c.cpu, m32c.opc: Fix copyright. 528 5292005-07-14 Jim Blandy <jimb@redhat.com> 530 531 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. 532 5332005-07-14 Alan Modra <amodra@bigpond.net.au> 534 535 * ms1.opc (print_dollarhex): Correct format string. 536 5372005-07-06 Alan Modra <amodra@bigpond.net.au> 538 539 * iq2000.cpu: Include from binutils cpu dir. 540 5412005-07-05 Nick Clifton <nickc@redhat.com> 542 543 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter 544 unsigned in order to avoid compile time warnings about sign 545 conflicts. 546 547 * ms1.opc (parse_*): Likewise. 548 (parse_imm16): Use a "void *" as it is passed both signed and 549 unsigned arguments. 550 5512005-07-01 Nick Clifton <nickc@redhat.com> 552 553 * frv.opc: Update to ISO C90 function declaration style. 554 * iq2000.opc: Likewise. 555 * m32r.opc: Likewise. 556 * sh.opc: Likewise. 557 5582005-06-15 Dave Brolley <brolley@redhat.com> 559 560 Contributed by Red Hat. 561 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. 562 * ms1.opc: New file. Written by Stan Cox. 563 5642005-05-10 Nick Clifton <nickc@redhat.com> 565 566 * Update the address and phone number of the FSF organization in 567 the GPL notices in the following files: 568 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, 569 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, 570 sh64-media.cpu, simplify.inc 571 5722005-02-24 Alan Modra <amodra@bigpond.net.au> 573 574 * frv.opc (parse_A): Warning fix. 575 5762005-02-23 Nick Clifton <nickc@redhat.com> 577 578 * frv.opc: Fixed compile time warnings about differing signed'ness 579 of pointers passed to functions. 580 * m32r.opc: Likewise. 581 5822005-02-11 Nick Clifton <nickc@redhat.com> 583 584 * iq2000.opc (parse_jtargq10): Change type of valuep argument to 585 'bfd_vma *' in order avoid compile time warning message. 586 5872005-01-28 Hans-Peter Nilsson <hp@axis.com> 588 589 * cris.cpu (mstep): Add missing insn. 590 5912005-01-25 Alexandre Oliva <aoliva@redhat.com> 592 593 2004-11-10 Alexandre Oliva <aoliva@redhat.com> 594 * frv.cpu: Add support for TLS annotations in loads and calll. 595 * frv.opc (parse_symbolic_address): New. 596 (parse_ldd_annotation): New. 597 (parse_call_annotation): New. 598 (parse_ld_annotation): New. 599 (parse_ulo16, parse_uslo16): Use parse_symbolic_address. 600 Introduce TLS relocations. 601 (parse_d12, parse_s12, parse_u12): Likewise. 602 (parse_uhi16): Likewise. Fix constant checking on 64-bit host. 603 (parse_call_label, print_at): New. 604 6052004-12-21 Mikael Starvik <starvik@axis.com> 606 607 * cris.cpu (cris-set-mem): Correct integral write semantics. 608 6092004-11-29 Hans-Peter Nilsson <hp@axis.com> 610 611 * cris.cpu: New file. 612 6132004-11-15 Michael K. Lechner <mike.lechner@gmail.com> 614 615 * iq2000.cpu: Added quotes around macro arguments so that they 616 will work with newer versions of guile. 617 6182004-10-27 Nick Clifton <nickc@redhat.com> 619 620 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, 621 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index 622 operand. 623 * iq2000.cpu (dnop index): Rename to _index to avoid complications 624 with guile. 625 6262004-08-27 Richard Sandiford <rsandifo@redhat.com> 627 628 * frv.cpu (cfmovs): Change UNIT attribute to FMALL. 629 6302004-05-15 Nick Clifton <nickc@redhat.com> 631 632 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. 633 6342004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 635 636 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. 637 6382004-03-01 Richard Sandiford <rsandifo@redhat.com> 639 640 * frv.cpu (define-arch frv): Add fr450 mach. 641 (define-mach fr450): New. 642 (define-model fr450): New. Add profile units to every fr450 insn. 643 (define-attr UNIT): Add MDCUTSSI. 644 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. 645 (define-attr AUDIO): New boolean. 646 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) 647 (f-LRA-null, f-TLBPR-null): New fields. 648 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) 649 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. 650 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. 651 (LRA-null, TLBPR-null): New macros. 652 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. 653 (load-real-address): New macro. 654 (lrai, lrad, tlbpr): New instructions. 655 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. 656 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. 657 (mdcutssi): Change UNIT attribute to MDCUTSSI. 658 (media-low-clear-semantics, media-scope-limit-semantics) 659 (media-quad-limit, media-quad-shift): New macros. 660 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. 661 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) 662 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) 663 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. 664 (fr450_unit_mapping): New array. 665 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry 666 for new MDCUTSSI unit. 667 (fr450_check_insn_major_constraints): New function. 668 (check_insn_major_constraints): Use it. 669 6702004-03-01 Richard Sandiford <rsandifo@redhat.com> 671 672 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. 673 (scutss): Change unit to I0. 674 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. 675 (mqsaths): Fix FR400-MAJOR categorization. 676 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) 677 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. 678 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) 679 combinations. 680 6812004-03-01 Richard Sandiford <rsandifo@redhat.com> 682 683 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. 684 (rstb, rsth, rst, rstd, rstq): Delete. 685 (rstbf, rsthf, rstf, rstdf, rstqf): Delete. 686 6872004-02-23 Nick Clifton <nickc@redhat.com> 688 689 * Apply these patches from Renesas: 690 691 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 692 693 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when 694 disassembling codes for 0x*2 addresses. 695 696 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 697 698 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. 699 700 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 701 702 * cpu/m32r.cpu : Add new model m32r2. 703 Add new instructions. 704 Replace occurrances of 'Mitsubishi' with 'Renesas'. 705 Changed PIPE attr of push from O to OS. 706 Care for Little-endian of M32R. 707 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): 708 Care for Little-endian of M32R. 709 (parse_slo16): signed extension for value. 710 7112004-02-20 Andrew Cagney <cagney@redhat.com> 712 713 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick 714 Clifton, Ben Elliston, Matthew Green, and Andrew Haley. 715 716 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all 717 written by Ben Elliston. 718 7192004-01-14 Richard Sandiford <rsandifo@redhat.com> 720 721 * frv.cpu (UNIT): Add IACC. 722 (iacc-multiply-r-r): Use it. 723 * frv.opc (fr400_unit_mapping): Add entry for IACC. 724 (fr500_unit_mapping, fr550_unit_mapping): Likewise. 725 7262004-01-06 Alexandre Oliva <aoliva@redhat.com> 727 728 2003-12-19 Alexandre Oliva <aoliva@redhat.com> 729 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some 730 cut&paste errors in shifting/truncating numerical operands. 731 2003-08-08 Alexandre Oliva <aoliva@redhat.com> 732 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. 733 (parse_uslo16): Likewise. 734 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. 735 (parse_d12): Parse gotoff12 and gotofffuncdesc12. 736 (parse_s12): Likewise. 737 2003-08-04 Alexandre Oliva <aoliva@redhat.com> 738 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. 739 (parse_uslo16): Likewise. 740 (parse_uhi16): Parse gothi and gotfuncdeschi. 741 (parse_d12): Parse got12 and gotfuncdesc12. 742 (parse_s12): Likewise. 743 7442003-10-10 Dave Brolley <brolley@redhat.com> 745 746 * frv.cpu (dnpmop): New p-macro. 747 (GRdoublek): Use dnpmop. 748 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. 749 (store-double-r-r): Use (.sym regtype doublek). 750 (r-store-double): Ditto. 751 (store-double-r-r-u): Ditto. 752 (conditional-store-double): Ditto. 753 (conditional-store-double-u): Ditto. 754 (store-double-r-simm): Ditto. 755 (fmovs): Assign to UNIT FMALL. 756 7572003-10-06 Dave Brolley <brolley@redhat.com> 758 759 * frv.cpu, frv.opc: Add support for fr550. 760 7612003-09-24 Dave Brolley <brolley@redhat.com> 762 763 * frv.cpu (u-commit): New modelling unit for fr500. 764 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. 765 (commit-r): Use u-commit model for fr500. 766 (commit): Ditto. 767 (conditional-float-binary-op): Take profiling data as an argument. 768 Update callers. 769 (ne-float-binary-op): Ditto. 770 7712003-09-19 Michael Snyder <msnyder@redhat.com> 772 773 * frv.cpu (nldqi): Delete unimplemented instruction. 774 7752003-09-12 Dave Brolley <brolley@redhat.com> 776 777 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. 778 (clear-ne-flag-r): Pass insn profiling in as an argument. Call 779 frv_ref_SI to get input register referenced for profiling. 780 (clear-ne-flag-all): Pass insn profiling in as an argument. 781 (clrgr,clrfr,clrga,clrfa): Add profiling information. 782 7832003-09-11 Michael Snyder <msnyder@redhat.com> 784 785 * frv.cpu: Typographical corrections. 786 7872003-09-09 Dave Brolley <brolley@redhat.com> 788 789 * frv.cpu (media-dual-complex): Change UNIT to FMALL. 790 (conditional-media-dual-complex, media-quad-complex): Likewise. 791 7922003-09-04 Dave Brolley <brolley@redhat.com> 793 794 * frv.cpu (register-transfer): Pass in all attributes in on argument. 795 Update all callers. 796 (conditional-register-transfer): Ditto. 797 (cache-preload): Ditto. 798 (floating-point-conversion): Ditto. 799 (floating-point-neg): Ditto. 800 (float-abs): Ditto. 801 (float-binary-op-s): Ditto. 802 (conditional-float-binary-op): Ditto. 803 (ne-float-binary-op): Ditto. 804 (float-dual-arith): Ditto. 805 (ne-float-dual-arith): Ditto. 806 8072003-09-03 Dave Brolley <brolley@redhat.com> 808 809 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. 810 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, 811 MCLRACC-1. 812 (A): Removed operand. 813 (A0,A1): New operands replace operand A. 814 (mnop): Now a real insn 815 (mclracc): Removed insn. 816 (mclracc-0, mclracc-1): New insns replace mclracc. 817 (all insns): Use new UNIT attributes. 818 8192003-08-21 Nick Clifton <nickc@redhat.com> 820 821 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand 822 and u-media-dual-btoh with output parameter. 823 (cmbtoh): Add profiling hack. 824 8252003-08-19 Michael Snyder <msnyder@redhat.com> 826 827 * frv.cpu: Fix typo, Frintkeven -> FRintkeven 828 8292003-06-10 Doug Evans <dje@sebabeach.org> 830 831 * frv.cpu: Add IDOC attribute. 832 8332003-06-06 Andrew Cagney <cagney@redhat.com> 834 835 Contributed by Red Hat. 836 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, 837 Stan Cox, and Frank Ch. Eigler. 838 * iq2000.opc: New file. Written by Ben Elliston, Frank 839 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. 840 * iq2000m.cpu: New file. Written by Jeff Johnston. 841 * iq10.cpu: New file. Written by Jeff Johnston. 842 8432003-06-05 Nick Clifton <nickc@redhat.com> 844 845 * frv.cpu (FRintieven): New operand. An even-numbered only 846 version of the FRinti operand. 847 (FRintjeven): Likewise for FRintj. 848 (FRintkeven): Likewise for FRintk. 849 (mdcutssi, media-dual-word-rotate-r-r, mqsaths, 850 media-quad-arith-sat-semantics, media-quad-arith-sat, 851 conditional-media-quad-arith-sat, mdunpackh, 852 media-quad-multiply-semantics, media-quad-multiply, 853 conditional-media-quad-multiply, media-quad-complex-i, 854 media-quad-multiply-acc-semantics, media-quad-multiply-acc, 855 conditional-media-quad-multiply-acc, munpackh, 856 media-quad-multiply-cross-acc-semantics, mdpackh, 857 media-quad-multiply-cross-acc, mbtoh-semantics, 858 media-quad-cross-multiply-cross-acc-semantics, 859 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, 860 media-quad-cross-multiply-acc-semantics, cmbtoh, 861 media-quad-cross-multiply-acc, media-quad-complex, mhtob, 862 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, 863 cmhtob): Use new operands. 864 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. 865 (parse_even_register): New function. 866 8672003-06-03 Nick Clifton <nickc@redhat.com> 868 869 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit 870 immediate value not unsigned. 871 8722003-06-03 Andrew Cagney <cagney@redhat.com> 873 874 Contributed by Red Hat. 875 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, 876 and Eric Christopher. 877 * frv.opc: New file. Written by Catherine Moore, and Dave 878 Brolley. 879 * simplify.inc: New file. Written by Doug Evans. 880 8812003-05-02 Andrew Cagney <cagney@redhat.com> 882 883 * New file. 884 885 886Copyright (C) 2003-2012 Free Software Foundation, Inc. 887 888Copying and distribution of this file, with or without modification, 889are permitted in any medium without royalty provided the copyright 890notice and this notice are preserved. 891 892Local Variables: 893mode: change-log 894left-margin: 8 895fill-column: 74 896version-control: never 897End: 898