1/*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 1997, Stefan Esser <se@FreeBSD.ORG> 5 * Copyright (c) 1997, 1998, 1999, Kenneth D. Merry <ken@FreeBSD.ORG> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice unmodified, this list of conditions, and the following 13 * disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 */ 30 31#ifndef _SYS_PCIIO_H_ 32#define _SYS_PCIIO_H_ 33 34#include <sys/ioccom.h> 35 36#define PCI_MAXNAMELEN 16 37 38typedef enum { 39 PCI_GETCONF_LAST_DEVICE, 40 PCI_GETCONF_LIST_CHANGED, 41 PCI_GETCONF_MORE_DEVS, 42 PCI_GETCONF_ERROR 43} pci_getconf_status; 44 45typedef enum { 46 PCI_GETCONF_NO_MATCH = 0x0000, 47 PCI_GETCONF_MATCH_DOMAIN = 0x0001, 48 PCI_GETCONF_MATCH_BUS = 0x0002, 49 PCI_GETCONF_MATCH_DEV = 0x0004, 50 PCI_GETCONF_MATCH_FUNC = 0x0008, 51 PCI_GETCONF_MATCH_NAME = 0x0010, 52 PCI_GETCONF_MATCH_UNIT = 0x0020, 53 PCI_GETCONF_MATCH_VENDOR = 0x0040, 54 PCI_GETCONF_MATCH_DEVICE = 0x0080, 55 PCI_GETCONF_MATCH_CLASS = 0x0100 56} pci_getconf_flags; 57 58struct pcisel { 59 u_int32_t pc_domain; /* domain number */ 60 u_int8_t pc_bus; /* bus number */ 61 u_int8_t pc_dev; /* device on this bus */ 62 u_int8_t pc_func; /* function on this device */ 63}; 64 65struct pci_conf { 66 struct pcisel pc_sel; /* domain+bus+slot+function */ 67 u_int8_t pc_hdr; /* PCI header type */ 68 u_int16_t pc_subvendor; /* card vendor ID */ 69 u_int16_t pc_subdevice; /* card device ID, assigned by 70 card vendor */ 71 u_int16_t pc_vendor; /* chip vendor ID */ 72 u_int16_t pc_device; /* chip device ID, assigned by 73 chip vendor */ 74 u_int8_t pc_class; /* chip PCI class */ 75 u_int8_t pc_subclass; /* chip PCI subclass */ 76 u_int8_t pc_progif; /* chip PCI programming interface */ 77 u_int8_t pc_revid; /* chip revision ID */ 78 char pd_name[PCI_MAXNAMELEN + 1]; /* device name */ 79 u_long pd_unit; /* device unit number */ 80}; 81 82struct pci_match_conf { 83 struct pcisel pc_sel; /* domain+bus+slot+function */ 84 char pd_name[PCI_MAXNAMELEN + 1]; /* device name */ 85 u_long pd_unit; /* Unit number */ 86 u_int16_t pc_vendor; /* PCI Vendor ID */ 87 u_int16_t pc_device; /* PCI Device ID */ 88 u_int8_t pc_class; /* PCI class */ 89 pci_getconf_flags flags; /* Matching expression */ 90}; 91 92struct pci_conf_io { 93 u_int32_t pat_buf_len; /* pattern buffer length */ 94 u_int32_t num_patterns; /* number of patterns */ 95 struct pci_match_conf *patterns; /* pattern buffer */ 96 u_int32_t match_buf_len; /* match buffer length */ 97 u_int32_t num_matches; /* number of matches returned */ 98 struct pci_conf *matches; /* match buffer */ 99 u_int32_t offset; /* offset into device list */ 100 u_int32_t generation; /* device list generation */ 101 pci_getconf_status status; /* request status */ 102}; 103 104struct pci_io { 105 struct pcisel pi_sel; /* device to operate on */ 106 int pi_reg; /* configuration register to examine */ 107 int pi_width; /* width (in bytes) of read or write */ 108 u_int32_t pi_data; /* data to write or result of read */ 109}; 110 111struct pci_bar_io { 112 struct pcisel pbi_sel; /* device to operate on */ 113 int pbi_reg; /* starting address of BAR */ 114 int pbi_enabled; /* decoding enabled */ 115 uint64_t pbi_base; /* current value of BAR */ 116 uint64_t pbi_length; /* length of BAR */ 117}; 118 119struct pci_vpd_element { 120 char pve_keyword[2]; 121 uint8_t pve_flags; 122 uint8_t pve_datalen; 123 uint8_t pve_data[0]; 124}; 125 126#define PVE_FLAG_IDENT 0x01 /* Element is the string identifier */ 127#define PVE_FLAG_RW 0x02 /* Element is read/write */ 128 129#define PVE_NEXT(pve) \ 130 ((struct pci_vpd_element *)((char *)(pve) + \ 131 sizeof(struct pci_vpd_element) + (pve)->pve_datalen)) 132 133struct pci_list_vpd_io { 134 struct pcisel plvi_sel; /* device to operate on */ 135 size_t plvi_len; /* size of the data area */ 136 struct pci_vpd_element *plvi_data; 137}; 138 139struct pci_bar_mmap { 140 void *pbm_map_base; /* (sometimes IN)/OUT mmaped base */ 141 size_t pbm_map_length; /* mapped length of the BAR, multiple 142 of pages */ 143 uint64_t pbm_bar_length; /* actual length of the BAR */ 144 int pbm_bar_off; /* offset from the mapped base to the 145 start of BAR */ 146 struct pcisel pbm_sel; /* device to operate on */ 147 int pbm_reg; /* starting address of BAR */ 148 int pbm_flags; 149 int pbm_memattr; 150}; 151 152struct pci_bar_ioreq { 153 struct pcisel pbi_sel; /* device to operate on */ 154#define PCIBARIO_READ 0x1 155#define PCIBARIO_WRITE 0x2 156 int pbi_op; 157 uint32_t pbi_bar; 158 uint32_t pbi_offset; 159 uint32_t pbi_width; 160 uint32_t pbi_value; 161}; 162 163#define PCIIO_BAR_MMAP_FIXED 0x01 164#define PCIIO_BAR_MMAP_EXCL 0x02 165#define PCIIO_BAR_MMAP_RW 0x04 166#define PCIIO_BAR_MMAP_ACTIVATE 0x08 167 168#define PCIOCGETCONF _IOWR('p', 5, struct pci_conf_io) 169#define PCIOCREAD _IOWR('p', 2, struct pci_io) 170#define PCIOCWRITE _IOWR('p', 3, struct pci_io) 171#define PCIOCATTACHED _IOWR('p', 4, struct pci_io) 172#define PCIOCGETBAR _IOWR('p', 6, struct pci_bar_io) 173#define PCIOCLISTVPD _IOWR('p', 7, struct pci_list_vpd_io) 174#define PCIOCBARMMAP _IOWR('p', 8, struct pci_bar_mmap) 175#define PCIOCBARIO _IOWR('p', 9, struct pci_bar_ioreq) 176 177#endif /* !_SYS_PCIIO_H_ */ 178