1/* SPDX-License-Identifier: BSD-3-Clause */ 2/* Copyright(c) 2007-2022 Intel Corporation */ 3/** 4 ***************************************************************************** 5 * @file icp_qat_fw_comp.h 6 * @defgroup icp_qat_fw_comp ICP QAT FW Compression Service 7 * Interface Definitions 8 * @ingroup icp_qat_fw 9 * @description 10 * This file documents structs used to provide the interface to the 11 * Compression QAT FW service 12 * 13 *****************************************************************************/ 14 15#ifndef _ICP_QAT_FW_COMP_H_ 16#define _ICP_QAT_FW_COMP_H_ 17 18/* 19****************************************************************************** 20* Include local header files 21****************************************************************************** 22*/ 23#include "icp_qat_fw.h" 24 25/** 26 ***************************************************************************** 27 * @ingroup icp_qat_fw_comp 28 * Definition of the Compression command types 29 * @description 30 * Enumeration which is used to indicate the ids of functions 31 * that are exposed by the Compression QAT FW service 32 * 33 *****************************************************************************/ 34 35typedef enum { 36 ICP_QAT_FW_COMP_CMD_STATIC = 0, 37 /*!< Static Compress Request */ 38 39 ICP_QAT_FW_COMP_CMD_DYNAMIC = 1, 40 /*!< Dynamic Compress Request */ 41 42 ICP_QAT_FW_COMP_CMD_DECOMPRESS = 2, 43 /*!< Decompress Request */ 44 45 ICP_QAT_FW_COMP_CMD_DELIMITER 46 /**< Delimiter type */ 47 48} icp_qat_fw_comp_cmd_id_t; 49 50 51/* 52 * REQUEST FLAGS IN COMMON COMPRESSION 53 * In common message it is named as SERVICE SPECIFIC FLAGS. 54 * 55 * + ===== + ------ + ------ + --- + ----- + ----- + ----- + -- + ---- + --- + 56 * | Bit | 15 - 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 57 * + ===== + ------ + ----- + --- + ----- + ----- + ----- + -- + ---- + --- + 58 * | Flags | Rsvd | Dis. |Resvd| Dis. | Enh. |Auto |Sess| Rsvd | Rsvd| 59 * | | Bits | secure | =0 | Type0 | ASB |Select |Type| = 0 | = 0 | 60 * | | = 0 |RAM use | | Header | |Best | | | | 61 * | | |as intmd| | | | | | | | 62 * | | | buf | | | | | | | | 63 * + ===== + ------ + ----- + --- + ------ + ----- + ----- + -- + ---- + --- + 64 * Note: For QAT 2.0 Disable Secure Ram, DisType0 Header and Enhanced ASB bits 65 * are don't care. i.e., these features are removed from QAT 2.0. 66 */ 67 68 69/**< Flag usage */ 70 71#define ICP_QAT_FW_COMP_STATELESS_SESSION 0 72/**< @ingroup icp_qat_fw_comp 73 * Flag representing that session is stateless */ 74 75#define ICP_QAT_FW_COMP_STATEFUL_SESSION 1 76/**< @ingroup icp_qat_fw_comp 77 * Flag representing that session is stateful */ 78 79#define ICP_QAT_FW_COMP_NOT_AUTO_SELECT_BEST 0 80/**< @ingroup icp_qat_fw_comp 81 * Flag representing that autoselectbest is NOT used */ 82 83#define ICP_QAT_FW_COMP_AUTO_SELECT_BEST 1 84/**< @ingroup icp_qat_fw_comp 85 * Flag representing that autoselectbest is used */ 86 87#define ICP_QAT_FW_COMP_NOT_ENH_AUTO_SELECT_BEST 0 88/**< @ingroup icp_qat_fw_comp 89 * Flag representing that enhanced autoselectbest is NOT used */ 90 91#define ICP_QAT_FW_COMP_ENH_AUTO_SELECT_BEST 1 92/**< @ingroup icp_qat_fw_comp 93 * Flag representing that enhanced autoselectbest is used */ 94 95#define ICP_QAT_FW_COMP_NOT_DISABLE_TYPE0_ENH_AUTO_SELECT_BEST 0 96/**< @ingroup icp_qat_fw_comp 97 * Flag representing that enhanced autoselectbest is NOT used */ 98 99#define ICP_QAT_FW_COMP_DISABLE_TYPE0_ENH_AUTO_SELECT_BEST 1 100/**< @ingroup icp_qat_fw_comp 101 * Flag representing that enhanced autoselectbest is used */ 102 103#define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_USED_AS_INTMD_BUF 1 104/**< @ingroup icp_qat_fw_comp 105 * Flag representing secure RAM from being used as 106 * an intermediate buffer is DISABLED. */ 107 108#define ICP_QAT_FW_COMP_ENABLE_SECURE_RAM_USED_AS_INTMD_BUF 0 109/**< @ingroup icp_qat_fw_comp 110 * Flag representing secure RAM from being used as 111 * an intermediate buffer is ENABLED. */ 112 113/**< Flag mask & bit position */ 114 115#define ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS 2 116/**< @ingroup icp_qat_fw_comp 117 * Starting bit position for the session type */ 118 119#define ICP_QAT_FW_COMP_SESSION_TYPE_MASK 0x1 120/**< @ingroup icp_qat_fw_comp 121 * One bit mask used to determine the session type */ 122 123#define ICP_QAT_FW_COMP_AUTO_SELECT_BEST_BITPOS 3 124/**< @ingroup icp_qat_fw_comp 125 * Starting bit position for auto select best */ 126 127#define ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MASK 0x1 128/**< @ingroup icp_qat_fw_comp 129 * One bit mask for auto select best */ 130 131#define ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_BITPOS 4 132/**< @ingroup icp_qat_fw_comp 133 * Starting bit position for enhanced auto select best */ 134 135#define ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_MASK 0x1 136/**< @ingroup icp_qat_fw_comp 137 * One bit mask for enhanced auto select best */ 138 139#define ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_BITPOS 5 140/**< @ingroup icp_qat_fw_comp 141 * Starting bit position for disabling type zero header write back 142 when Enhanced autoselect best is enabled. If set firmware does 143 not return type0 store block header, only copies src to dest. 144 (if best output is Type0) */ 145 146#define ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_MASK 0x1 147/**< @ingroup icp_qat_fw_comp 148 * One bit mask for auto select best */ 149 150#define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS 7 151/**< @ingroup icp_qat_fw_comp 152 * Starting bit position for flag used to disable secure ram from 153 being used as an intermediate buffer. */ 154 155#define ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK 0x1 156/**< @ingroup icp_qat_fw_comp 157 * One bit mask for disable secure ram for use as an intermediate 158 buffer. */ 159 160/** 161 ****************************************************************************** 162 * @ingroup icp_qat_fw_comp 163 * 164 * @description 165 * Macro used for the generation of the command flags for Compression Request. 166 * This should always be used for the generation of the flags. No direct sets or 167 * masks should be performed on the flags data 168 * 169 * @param sesstype Session Type 170 * @param autoselect AutoSelectBest 171 * @enhanced_asb Enhanced AutoSelectBest 172 * @ret_uncomp RetUnCompressed 173 * @secure_ram Secure Ram usage 174 * 175 ******************************************************************************/ 176#define ICP_QAT_FW_COMP_FLAGS_BUILD( \ 177 sesstype, autoselect, enhanced_asb, ret_uncomp, secure_ram) \ 178 (((sesstype & ICP_QAT_FW_COMP_SESSION_TYPE_MASK) \ 179 << ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS) | \ 180 ((autoselect & ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MASK) \ 181 << ICP_QAT_FW_COMP_AUTO_SELECT_BEST_BITPOS) | \ 182 ((enhanced_asb & ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_MASK) \ 183 << ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_BITPOS) | \ 184 ((ret_uncomp & ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_MASK) \ 185 << ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_BITPOS) | \ 186 ((secure_ram & ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK) \ 187 << ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS)) 188 189/** 190****************************************************************************** 191* @ingroup icp_qat_fw_comp 192* 193* @description 194* Macro used for the generation of the command flags for Compression Request. 195* This should always be used for the generation of the flags. No direct sets or 196* masks should be performed on the flags data 197* 198* @param sesstype Session Type 199* @param autoselect AutoSelectBest 200* Selects between compressed and uncompressed output. 201* No distinction made between static and dynamic 202* compressed data. 203* 204*********************************************************************************/ 205#define ICP_QAT_FW_COMP_20_FLAGS_BUILD(sesstype, autoselect) \ 206 (((sesstype & ICP_QAT_FW_COMP_SESSION_TYPE_MASK) \ 207 << ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS) | \ 208 ((autoselect & ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MASK) \ 209 << ICP_QAT_FW_COMP_AUTO_SELECT_BEST_BITPOS)) 210 211/** 212 ****************************************************************************** 213 * @ingroup icp_qat_fw_comp 214 * 215 * @description 216 * Macro for extraction of the session type bit 217 * 218 * @param flags Flags to extract the session type bit from 219 * 220 *****************************************************************************/ 221#define ICP_QAT_FW_COMP_SESSION_TYPE_GET(flags) \ 222 QAT_FIELD_GET(flags, \ 223 ICP_QAT_FW_COMP_SESSION_TYPE_BITPOS, \ 224 ICP_QAT_FW_COMP_SESSION_TYPE_MASK) 225 226/** 227 ****************************************************************************** 228 * @ingroup icp_qat_fw_comp 229 * 230 * @description 231 * Macro for extraction of the autoSelectBest bit 232 * 233 * @param flags Flags to extract the autoSelectBest bit from 234 * 235 *****************************************************************************/ 236#define ICP_QAT_FW_COMP_AUTO_SELECT_BEST_GET(flags) \ 237 QAT_FIELD_GET(flags, \ 238 ICP_QAT_FW_COMP_AUTO_SELECT_BEST_BITPOS, \ 239 ICP_QAT_FW_COMP_AUTO_SELECT_BEST_MASK) 240 241/** 242 ****************************************************************************** 243 * @ingroup icp_qat_fw_comp 244 * 245 * @description 246 * Macro for extraction of the enhanced asb bit 247 * 248 * @param flags Flags to extract the enhanced asb bit from 249 * 250 *****************************************************************************/ 251#define ICP_QAT_FW_COMP_EN_ASB_GET(flags) \ 252 QAT_FIELD_GET(flags, \ 253 ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_BITPOS, \ 254 ICP_QAT_FW_COMP_ENHANCED_AUTO_SELECT_BEST_MASK) 255 256/** 257 ****************************************************************************** 258 * @ingroup icp_qat_fw_comp 259 * 260 * @description 261 * Macro for extraction of the RetUncomp bit 262 * 263 * @param flags Flags to extract the Ret Uncomp bit from 264 * 265 *****************************************************************************/ 266#define ICP_QAT_FW_COMP_RET_UNCOMP_GET(flags) \ 267 QAT_FIELD_GET(flags, \ 268 ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_BITPOS, \ 269 ICP_QAT_FW_COMP_RET_DISABLE_TYPE0_HEADER_DATA_MASK) 270 271/** 272 ****************************************************************************** 273 * @ingroup icp_qat_fw_comp 274 * 275 * @description 276 * Macro for extraction of the Secure Ram usage bit 277 * 278 * @param flags Flags to extract the Secure Ram usage from 279 * 280 *****************************************************************************/ 281#define ICP_QAT_FW_COMP_SECURE_RAM_USE_GET(flags) \ 282 QAT_FIELD_GET(flags, \ 283 ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_BITPOS, \ 284 ICP_QAT_FW_COMP_DISABLE_SECURE_RAM_AS_INTMD_BUF_MASK) 285 286/** 287 ***************************************************************************** 288 * @ingroup icp_qat_fw_comp 289 * Definition of the compression header cd pars block 290 * @description 291 * Definition of the compression processing cd pars block. 292 * The structure is a service-specific implementation of the common 293 * structure. 294 *****************************************************************************/ 295typedef union icp_qat_fw_comp_req_hdr_cd_pars_s { 296 /**< LWs 2-5 */ 297 struct { 298 uint64_t content_desc_addr; 299 /**< Address of the content descriptor */ 300 301 uint16_t content_desc_resrvd1; 302 /**< Content descriptor reserved field */ 303 304 uint8_t content_desc_params_sz; 305 /**< Size of the content descriptor parameters in quad words. 306 * These parameters describe the session setup configuration 307 * info for the slices that this request relies upon i.e. the 308 * configuration word and cipher key needed by the cipher slice 309 * if there is a request for cipher processing. */ 310 311 uint8_t content_desc_hdr_resrvd2; 312 /**< Content descriptor reserved field */ 313 314 uint32_t content_desc_resrvd3; 315 /**< Content descriptor reserved field */ 316 } s; 317 318 struct { 319 uint32_t comp_slice_cfg_word[ICP_QAT_FW_NUM_LONGWORDS_2]; 320 /* Compression Slice Config Word */ 321 322 uint32_t content_desc_resrvd4; 323 /**< Content descriptor reserved field */ 324 325 } sl; 326 327} icp_qat_fw_comp_req_hdr_cd_pars_t; 328 329/** 330 ***************************************************************************** 331 * @ingroup icp_qat_fw_comp 332 * Definition of the compression request parameters block 333 * @description 334 * Definition of the compression processing request parameters block. 335 * The structure below forms part of the Compression + Translation 336 * Parameters block spanning LWs 14-23, thus differing from the common 337 * base Parameters block structure. Unused fields must be set to 0. 338 * 339 *****************************************************************************/ 340typedef struct icp_qat_fw_comp_req_params_s { 341 /**< LW 14 */ 342 uint32_t comp_len; 343 /**< Size of input to process in bytes Note: Only EOP requests can be 344 * odd for decompression. IA must set LSB to zero for odd sized 345 * intermediate inputs */ 346 347 /**< LW 15 */ 348 uint32_t out_buffer_sz; 349 /**< Size of output buffer in bytes */ 350 351 /**< LW 16 */ 352 union { 353 struct { 354 /** LW 16 */ 355 uint32_t initial_crc32; 356 /**< CRC for processed bytes (input byte count) */ 357 358 /** LW 17 */ 359 uint32_t initial_adler; 360 /**< Adler for processed bytes (input byte count) */ 361 } legacy; 362 363 /** LW 16-17 */ 364 uint64_t crc_data_addr; 365 /**< CRC data structure pointer */ 366 } crc; 367 368 /**< LW 18 */ 369 uint32_t req_par_flags; 370 371 /**< LW 19 */ 372 uint32_t rsrvd; 373 374} icp_qat_fw_comp_req_params_t; 375 376/** 377 ****************************************************************************** 378 * @ingroup icp_qat_fw_comp 379 * 380 * @description 381 * Macro used for the generation of the request parameter flags. 382 * This should always be used for the generation of the flags. No direct sets or 383 * masks should be performed on the flags data 384 * 385 * @param sop SOP Flag, 0 restore, 1 don't restore 386 * @param eop EOP Flag, 0 restore, 1 don't restore 387 * @param bfinal Set bfinal in this block or not 388 * @param cnv Whether internal CNV check is to be performed 389 * * ICP_QAT_FW_COMP_NO_CNV 390 * * ICP_QAT_FW_COMP_CNV 391 * @param cnvnr Whether internal CNV recovery is to be performed 392 * * ICP_QAT_FW_COMP_NO_CNV_RECOVERY 393 * * ICP_QAT_FW_COMP_CNV_RECOVERY 394 * @param cnvdfx Whether CNV error injection is to be performed 395 * * ICP_QAT_FW_COMP_NO_CNV_DFX 396 * * ICP_QAT_FW_COMP_CNV_DFX 397 * @param crc CRC Mode Flag - 0 legacy, 1 crc data struct 398 *****************************************************************************/ 399#define ICP_QAT_FW_COMP_REQ_PARAM_FLAGS_BUILD( \ 400 sop, eop, bfinal, cnv, cnvnr, cnvdfx, crc) \ 401 (((sop & ICP_QAT_FW_COMP_SOP_MASK) << ICP_QAT_FW_COMP_SOP_BITPOS) | \ 402 ((eop & ICP_QAT_FW_COMP_EOP_MASK) << ICP_QAT_FW_COMP_EOP_BITPOS) | \ 403 ((bfinal & ICP_QAT_FW_COMP_BFINAL_MASK) \ 404 << ICP_QAT_FW_COMP_BFINAL_BITPOS) | \ 405 ((cnv & ICP_QAT_FW_COMP_CNV_MASK) << ICP_QAT_FW_COMP_CNV_BITPOS) | \ 406 ((cnvnr & ICP_QAT_FW_COMP_CNVNR_MASK) \ 407 << ICP_QAT_FW_COMP_CNVNR_BITPOS) | \ 408 ((cnvdfx & ICP_QAT_FW_COMP_CNV_DFX_MASK) \ 409 << ICP_QAT_FW_COMP_CNV_DFX_BITPOS) | \ 410 ((crc & ICP_QAT_FW_COMP_CRC_MODE_MASK) \ 411 << ICP_QAT_FW_COMP_CRC_MODE_BITPOS)) 412 413 414/* 415 * REQUEST FLAGS IN REQUEST PARAMETERS COMPRESSION 416 * 417 * +=====+-----+----- + --- + --- +-----+ --- + ----- + --- + ---- + -- + -- + 418 * | Bit |31-24| 20 | 19 | 18 | 17 | 16 | 15-7 | 6 | 5-2 | 1 | 0 | 419 * +=====+-----+----- + --- + ----+-----+ --- + ----- + --- + ---- + -- + -- + 420 * |Flags|Resvd|xxHash| CRC | CNV |CNVNR| CNV | Resvd |BFin | Resvd|EOP |SOP | 421 * | |=0 |acc | MODE| DFX | | | =0 | | =0 | | | 422 * | | | | | | | | | | | | | 423 * +=====+-----+----- + --- + ----+-----+ --- + ----- + --- + ---- + -- + -- + 424 */ 425 426 427/** 428***************************************************************************** 429* @ingroup icp_qat_fw_comp 430* Definition of the additional QAT2.0 Compression command types 431* @description 432* Enumeration which is used to indicate the ids of functions 433* that are exposed by the Compression QAT FW service 434* 435*****************************************************************************/ 436typedef enum { 437 ICP_QAT_FW_COMP_20_CMD_LZ4_COMPRESS = 3, 438 /*!< LZ4 Compress Request */ 439 440 ICP_QAT_FW_COMP_20_CMD_LZ4_DECOMPRESS = 4, 441 /*!< LZ4 Decompress Request */ 442 443 ICP_QAT_FW_COMP_20_CMD_LZ4S_COMPRESS = 5, 444 /*!< LZ4S Compress Request */ 445 446 ICP_QAT_FW_COMP_20_CMD_LZ4S_DECOMPRESS = 6, 447 /*!< LZ4S Decompress Request */ 448 449 ICP_QAT_FW_COMP_20_CMD_XP10_COMPRESS = 7, 450 /*!< XP10 Compress Request -- Placeholder */ 451 452 ICP_QAT_FW_COMP_20_CMD_XP10_DECOMPRESS = 8, 453 /*!< XP10 Decompress Request -- Placeholder */ 454 455 ICP_QAT_FW_COMP_20_CMD_DELIMITER 456 /**< Delimiter type */ 457 458} icp_qat_fw_comp_20_cmd_id_t; 459 460 461/* 462 * REQUEST FLAGS IN REQUEST PARAMETERS COMPRESSION 463 * 464 * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- + ---- + --- + --- + 465 * | Bit | 31-20 | 19 | 18 | 17 | 16 | 15 - 7 | 6 | 5-2 | 1 | 0 | 466 * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- | ---- + --- + --- + 467 * | Flags | Resvd | CRC | CNV | CNVNR | CNV |Resvd Bits|BFin |Resvd | EOP | SOP | 468 * | | =0 | Mode| DFX | | | =0 | | =0 | | | 469 * | | | | | | | | | | | | 470 * + ===== + ----- + --- +-----+-------+ --- + ---------+ --- | ---- + --- + --- + 471 */ 472 473#define ICP_QAT_FW_COMP_NOT_SOP 0 474/**< @ingroup icp_qat_fw_comp 475 * Flag representing that a request is NOT Start of Packet */ 476 477#define ICP_QAT_FW_COMP_SOP 1 478/**< @ingroup icp_qat_fw_comp 479 * * Flag representing that a request IS Start of Packet */ 480 481#define ICP_QAT_FW_COMP_NOT_EOP 0 482/**< @ingroup icp_qat_fw_comp 483 * Flag representing that a request is NOT Start of Packet */ 484 485#define ICP_QAT_FW_COMP_EOP 1 486/**< @ingroup icp_qat_fw_comp 487 * Flag representing that a request IS End of Packet */ 488 489#define ICP_QAT_FW_COMP_NOT_BFINAL 0 490/**< @ingroup icp_qat_fw_comp 491 * Flag representing to indicate firmware this is not the last block */ 492 493#define ICP_QAT_FW_COMP_BFINAL 1 494/**< @ingroup icp_qat_fw_comp 495 * Flag representing to indicate firmware this is the last block */ 496 497#define ICP_QAT_FW_COMP_NO_CNV 0 498/**< @ingroup icp_qat_fw_comp 499 * Flag indicating that NO cnv check is to be performed on the request */ 500 501#define ICP_QAT_FW_COMP_CNV 1 502/**< @ingroup icp_qat_fw_comp 503 * Flag indicating that a cnv check IS to be performed on the request */ 504 505#define ICP_QAT_FW_COMP_NO_CNV_RECOVERY 0 506/**< @ingroup icp_qat_fw_comp 507 * Flag indicating that NO cnv recovery is to be performed on the request */ 508 509#define ICP_QAT_FW_COMP_CNV_RECOVERY 1 510/**< @ingroup icp_qat_fw_comp 511 * Flag indicating that a cnv recovery is to be performed on the request */ 512 513#define ICP_QAT_FW_COMP_NO_CNV_DFX 0 514/**< @ingroup icp_qat_fw_comp 515 * Flag indicating that NO CNV inject error is to be performed on the request */ 516 517#define ICP_QAT_FW_COMP_CNV_DFX 1 518/**< @ingroup icp_qat_fw_comp 519 * Flag indicating that CNV inject error is to be performed on the request */ 520 521#define ICP_QAT_FW_COMP_CRC_MODE_LEGACY 0 522/**< @ingroup icp_qat_fw_comp 523 * Flag representing to use the legacy CRC mode */ 524 525#define ICP_QAT_FW_COMP_CRC_MODE_E2E 1 526/**< @ingroup icp_qat_fw_comp 527 * Flag representing to use the external CRC data struct */ 528 529#define ICP_QAT_FW_COMP_NO_XXHASH_ACC 0 530/**< @ingroup icp_qat_fw_comp 531 * * Flag indicating that xxHash will NOT be accumulated across requests */ 532 533#define ICP_QAT_FW_COMP_XXHASH_ACC 1 534/**< @ingroup icp_qat_fw_comp 535 * * Flag indicating that xxHash WILL be accumulated across requests */ 536 537#define ICP_QAT_FW_COMP_PART_DECOMP 1 538/**< @ingroup icp_qat_fw_comp 539 * * Flag indicating to perform partial de-compressing */ 540 541#define ICP_QAT_FW_COMP_NO_PART_DECOMP 1 542/**< @ingroup icp_qat_fw_comp 543 * * Flag indicating to not perform partial de-compressing */ 544 545#define ICP_QAT_FW_COMP_ZEROPAD 1 546/**< @ingroup icp_qat_fw_comp 547 * * Flag indicating to perform zero-padding in compression request */ 548 549#define ICP_QAT_FW_COMP_NO_ZEROPAD 0 550/**< @ingroup icp_qat_fw_comp 551 * * Flag indicating to not perform zero-padding in compression request */ 552 553#define ICP_QAT_FW_COMP_SOP_BITPOS 0 554/**< @ingroup icp_qat_fw_comp 555 * Starting bit position for SOP */ 556 557#define ICP_QAT_FW_COMP_SOP_MASK 0x1 558/**< @ingroup icp_qat_fw_comp 559 * One bit mask used to determine SOP */ 560 561#define ICP_QAT_FW_COMP_EOP_BITPOS 1 562/**< @ingroup icp_qat_fw_comp 563 * Starting bit position for EOP */ 564 565#define ICP_QAT_FW_COMP_EOP_MASK 0x1 566/**< @ingroup icp_qat_fw_comp 567 * One bit mask used to determine EOP */ 568 569#define ICP_QAT_FW_COMP_BFINAL_MASK 0x1 570/**< @ingroup icp_qat_fw_comp 571 * One bit mask for the bfinal bit */ 572 573#define ICP_QAT_FW_COMP_BFINAL_BITPOS 6 574/**< @ingroup icp_qat_fw_comp 575 * Starting bit position for the bfinal bit */ 576 577#define ICP_QAT_FW_COMP_CNV_MASK 0x1 578/**< @ingroup icp_qat_fw_comp 579 * One bit mask for the CNV bit */ 580 581#define ICP_QAT_FW_COMP_CNV_BITPOS 16 582/**< @ingroup icp_qat_fw_comp 583 * Starting bit position for the CNV bit */ 584 585#define ICP_QAT_FW_COMP_CNVNR_MASK 0x1 586/**< @ingroup icp_qat_fw_comp 587 * One bit mask for the CNV Recovery bit */ 588 589#define ICP_QAT_FW_COMP_CNVNR_BITPOS 17 590/**< @ingroup icp_qat_fw_comp 591 * Starting bit position for the CNV Recovery bit */ 592 593#define ICP_QAT_FW_COMP_CNV_DFX_BITPOS 18 594/**< @ingroup icp_qat_fw_comp 595 * Starting bit position for the CNV DFX bit */ 596 597#define ICP_QAT_FW_COMP_CNV_DFX_MASK 0x1 598/**< @ingroup icp_qat_fw_comp 599 * One bit mask for the CNV DFX bit */ 600 601#define ICP_QAT_FW_COMP_CRC_MODE_BITPOS 19 602/**< @ingroup icp_qat_fw_comp 603 * Starting bit position for CRC mode */ 604 605#define ICP_QAT_FW_COMP_CRC_MODE_MASK 0x1 606/**< @ingroup icp_qat_fw_comp 607 * One bit mask used to determine CRC mode */ 608 609#define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_BITPOS 20 610/**< @ingroup icp_qat_fw_comp 611 * Starting bit position for xxHash accumulate mode */ 612 613#define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_MASK 0x1 614/**< @ingroup icp_qat_fw_comp 615 * One bit mask used to determine xxHash accumulate mode */ 616 617#define ICP_QAT_FW_COMP_PART_DECOMP_BITPOS 27 618/**< @ingroup icp_qat_fw_comp 619 * Starting bit position for the partial de-compress bit */ 620 621#define ICP_QAT_FW_COMP_PART_DECOMP_MASK 0x1 622/**< @ingroup icp_qat_fw_comp 623 * Starting bit position for the partial de-compress mask */ 624 625#define ICP_QAT_FW_COMP_ZEROPAD_BITPOS 26 626/**< @ingroup icp_qat_fw_comp 627 * Starting bit position for the partial zero-pad bit */ 628 629#define ICP_QAT_FW_COMP_ZEROPAD_MASK 0x1 630/**< @ingroup icp_qat_fw_comp 631 * Starting bit position for the partial zero-pad mask */ 632 633/** 634 ****************************************************************************** 635 * @ingroup icp_qat_fw_comp 636 * 637 * @description 638 * Macro for extraction of the SOP bit 639 * 640 * @param flags Flags to extract the SOP bit from 641 * 642 *****************************************************************************/ 643#define ICP_QAT_FW_COMP_SOP_GET(flags) \ 644 QAT_FIELD_GET(flags, \ 645 ICP_QAT_FW_COMP_SOP_BITPOS, \ 646 ICP_QAT_FW_COMP_SOP_MASK) 647 648/** 649****************************************************************************** 650* @ingroup icp_qat_fw_comp 651* 652* @description 653* Macro for extraction of the EOP bit 654* 655* @param flags Flags to extract the EOP bit from 656* 657*****************************************************************************/ 658#define ICP_QAT_FW_COMP_EOP_GET(flags) \ 659 QAT_FIELD_GET(flags, \ 660 ICP_QAT_FW_COMP_EOP_BITPOS, \ 661 ICP_QAT_FW_COMP_EOP_MASK) 662/** 663 664 665 ****************************************************************************** 666 * @ingroup icp_qat_fw_comp 667 * 668 * @description 669 * Macro for extraction of the bfinal bit 670 * 671 * @param flags Flags to extract the bfinal bit from 672 * 673 *****************************************************************************/ 674#define ICP_QAT_FW_COMP_BFINAL_GET(flags) \ 675 QAT_FIELD_GET(flags, \ 676 ICP_QAT_FW_COMP_BFINAL_BITPOS, \ 677 ICP_QAT_FW_COMP_BFINAL_MASK) 678 679/** 680 ****************************************************************************** 681 * @ingroup icp_qat_fw_comp 682 * 683 * @description 684 * Macro for extraction of the CNV bit 685 * 686 * @param flags Flag set containing the CNV flag 687 * 688 *****************************************************************************/ 689#define ICP_QAT_FW_COMP_CNV_GET(flags) \ 690 QAT_FIELD_GET(flags, \ 691 ICP_QAT_FW_COMP_CNV_BITPOS, \ 692 ICP_QAT_FW_COMP_CNV_MASK) 693 694/** 695 ****************************************************************************** 696 * @ingroup icp_qat_fw_comp 697 * 698 * @description 699 * Macro for extraction of the crc mode bit 700 * 701 * @param flags Flags to extract the crc mode bit from 702 * 703 ******************************************************************************/ 704#define ICP_QAT_FW_COMP_CRC_MODE_GET(flags) \ 705 QAT_FIELD_GET(flags, \ 706 ICP_QAT_FW_COMP_CRC_MODE_BITPOS, \ 707 ICP_QAT_FW_COMP_CRC_MODE_MASK) 708 709/** 710 ****************************************************************************** 711 * @ingroup icp_qat_fw_comp 712 * 713 * @description 714 * Macro for extraction of the xxHash accumulate mode bit 715 * 716 * @param flags Flags to extract the xxHash accumulate mode bit from 717 * 718 *****************************************************************************/ 719#define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_GET(flags) \ 720 QAT_FIELD_GET(flags, \ 721 ICP_QAT_FW_COMP_XXHASH_ACC_MODE_BITPOS, \ 722 ICP_QAT_FW_COMP_XXHASH_ACC_MODE_MASK) 723 724/** 725 ****************************************************************************** 726 * @ingroup icp_qat_fw_comp 727 * 728 * @description 729 * Macro for setting of the xxHash accumulate mode bit 730 * 731 * @param flags Flags to set the xxHash accumulate mode bit to 732 * @param val xxHash accumulate mode to set 733 * 734 *****************************************************************************/ 735#define ICP_QAT_FW_COMP_XXHASH_ACC_MODE_SET(flags, val) \ 736 QAT_FIELD_SET(flags, \ 737 val, \ 738 ICP_QAT_FW_COMP_XXHASH_ACC_MODE_BITPOS, \ 739 ICP_QAT_FW_COMP_XXHASH_ACC_MODE_MASK) 740 741/** 742 ****************************************************************************** 743 * @ingroup icp_qat_fw_comp 744 * 745 * @description 746 * Macro for extraction of the partial de-compress on/off bit 747 * 748 * @param flags Flags to extract the partial de-compress on/off bit from 749 * 750 ******************************************************************************/ 751#define ICP_QAT_FW_COMP_PART_DECOMP_GET(flags) \ 752 QAT_FIELD_GET(flags, \ 753 ICP_QAT_FW_COMP_PART_DECOMP_BITPOS, \ 754 ICP_QAT_FW_COMP_PART_DECOMP_MASK) 755 756/** 757 ****************************************************************************** 758 * @ingroup icp_qat_fw_comp 759 * 760 * @description 761 * Macro for setting of the partial de-compress on/off bit 762 * 763 * @param flags Flags to set the partial de-compress on/off bit to 764 * @param val partial de-compress on/off bit 765 * 766 *****************************************************************************/ 767#define ICP_QAT_FW_COMP_PART_DECOMP_SET(flags, val) \ 768 QAT_FIELD_SET(flags, \ 769 val, \ 770 ICP_QAT_FW_COMP_PART_DECOMP_BITPOS, \ 771 ICP_QAT_FW_COMP_PART_DECOMP_MASK) 772 773/** 774 ****************************************************************************** 775 * @ingroup icp_qat_fw_comp 776 * 777 * @description 778 * Macro for extraction of the zero padding on/off bit 779 * 780 * @param flags Flags to extract the zero padding on/off bit from 781 * 782 ******************************************************************************/ 783#define ICP_QAT_FW_COMP_ZEROPAD_GET(flags) \ 784 QAT_FIELD_GET(flags, \ 785 ICP_QAT_FW_COMP_ZEROPAD_BITPOS, \ 786 ICP_QAT_FW_COMP_ZEROPAD_MASK) 787 788/** 789 ****************************************************************************** 790 * @ingroup icp_qat_fw_comp 791 * 792 * @description 793 * Macro for setting of the zero-padding on/off bit 794 * 795 * @param flags Flags to set the zero-padding on/off bit to 796 * @param val zero-padding on/off bit 797 * 798 *****************************************************************************/ 799#define ICP_QAT_FW_COMP_ZEROPAD_SET(flags, val) \ 800 QAT_FIELD_SET(flags, \ 801 val, \ 802 ICP_QAT_FW_COMP_ZEROPAD_BITPOS, \ 803 ICP_QAT_FW_COMP_ZEROPAD_MASK) 804 805/** 806 ****************************************************************************** 807 * @ingroup icp_qat_fw_comp 808 * Definition of the translator request parameters block 809 * @description 810 * Definition of the translator processing request parameters block 811 * The structure below forms part of the Compression + Translation 812 * Parameters block spanning LWs 14-23, thus differing from the common 813 * base Parameters block structure. Unused fields must be set to 0. 814 * 815 *****************************************************************************/ 816typedef struct icp_qat_fw_xlt_req_params_s { 817 /**< LWs 20-21 */ 818 uint64_t inter_buff_ptr; 819 /**< This field specifies the physical address of an intermediate 820 * buffer SGL array. The array contains a pair of 64-bit 821 * intermediate buffer pointers to SGL buffer descriptors, one pair 822 * per CPM. Please refer to the CPM1.6 Firmware Interface HLD 823 * specification for more details. */ 824 825} icp_qat_fw_xlt_req_params_t; 826 827/** 828 ***************************************************************************** 829 * @ingroup icp_qat_fw_comp 830 * Compression header of the content descriptor block 831 * @description 832 * Definition of the service-specific compression control block header 833 * structure. The compression parameters are defined per algorithm 834 * and are located in the icp_qat_hw.h file. This compression 835 * cd block spans LWs 24-29, forming part of the compression + translation 836 * cd block, thus differing from the common base content descriptor 837 * structure. 838 * 839 *****************************************************************************/ 840typedef struct icp_qat_fw_comp_cd_hdr_s { 841 /**< LW 24 */ 842 uint16_t ram_bank_flags; 843 /**< Flags to show which ram banks to access */ 844 845 uint8_t comp_cfg_offset; 846 /**< Quad word offset from the content descriptor parameters address to 847 * the parameters for the compression processing */ 848 849 uint8_t next_curr_id; 850 /**< This field combines the next and current id (each four bits) - 851 * the next id is the most significant nibble. 852 * Next Id: Set to the next slice to pass the compressed data through. 853 * Set to ICP_QAT_FW_SLICE_DRAM_WR if the data is not to go through 854 * anymore slices after compression 855 * Current Id: Initialised with the compression slice type */ 856 857 /**< LW 25 */ 858 uint32_t resrvd; 859 860 /**< LWs 26-27 */ 861 uint64_t comp_state_addr; 862 /**< Pointer to compression state */ 863 864 /**< LWs 28-29 */ 865 uint64_t ram_banks_addr; 866 /**< Pointer to banks */ 867 868} icp_qat_fw_comp_cd_hdr_t; 869 870#define COMP_CPR_INITIAL_CRC 0 871#define COMP_CPR_INITIAL_ADLER 1 872 873/** 874 ***************************************************************************** 875 * @ingroup icp_qat_fw_comp 876 * Translator content descriptor header block 877 * @description 878 * Definition of the structure used to describe the translation processing 879 * to perform on data. The translator parameters are defined per algorithm 880 * and are located in the icp_qat_hw.h file. This translation cd block 881 * spans LWs 30-31, forming part of the compression + translation cd block, 882 * thus differing from the common base content descriptor structure. 883 * 884 *****************************************************************************/ 885typedef struct icp_qat_fw_xlt_cd_hdr_s { 886 /**< LW 30 */ 887 uint16_t resrvd1; 888 /**< Reserved field and assumed set to 0 */ 889 890 uint8_t resrvd2; 891 /**< Reserved field and assumed set to 0 */ 892 893 uint8_t next_curr_id; 894 /**< This field combines the next and current id (each four bits) - 895 * the next id is the most significant nibble. 896 * Next Id: Set to the next slice to pass the translated data through. 897 * Set to ICP_QAT_FW_SLICE_DRAM_WR if the data is not to go through 898 * any more slices after compression 899 * Current Id: Initialised with the translation slice type */ 900 901 /**< LW 31 */ 902 uint32_t resrvd3; 903 /**< Reserved and should be set to zero, needed for quadword alignment 904 */ 905 906} icp_qat_fw_xlt_cd_hdr_t; 907 908/** 909 ***************************************************************************** 910 * @ingroup icp_qat_fw_comp 911 * Definition of the common Compression QAT FW request 912 * @description 913 * This is a definition of the full request structure for 914 * compression and translation. 915 * 916 *****************************************************************************/ 917typedef struct icp_qat_fw_comp_req_s { 918 /**< LWs 0-1 */ 919 icp_qat_fw_comn_req_hdr_t comn_hdr; 920 /**< Common request header - for Service Command Id, 921 * use service-specific Compression Command Id. 922 * Service Specific Flags - use Compression Command Flags */ 923 924 /**< LWs 2-5 */ 925 icp_qat_fw_comp_req_hdr_cd_pars_t cd_pars; 926 /**< Compression service-specific content descriptor field which points 927 * either to a content descriptor parameter block or contains the 928 * compression slice config word. */ 929 930 /**< LWs 6-13 */ 931 icp_qat_fw_comn_req_mid_t comn_mid; 932 /**< Common request middle section */ 933 934 /**< LWs 14-19 */ 935 icp_qat_fw_comp_req_params_t comp_pars; 936 /**< Compression request Parameters block */ 937 938 /**< LWs 20-21 */ 939 union { 940 icp_qat_fw_xlt_req_params_t xlt_pars; 941 /**< Translation request Parameters block */ 942 943 uint32_t resrvd1[ICP_QAT_FW_NUM_LONGWORDS_2]; 944 /**< Reserved if not used for translation */ 945 946 struct { 947 uint32_t partial_decompress_length; 948 /**< LW 20 \n Length of the decompressed data to return 949 */ 950 951 uint32_t partial_decompress_offset; 952 /**< LW 21 \n Offset of the decompressed data at which 953 * to return */ 954 955 } partial_decompress; 956 957 } u1; 958 959 /**< LWs 22-23 */ 960 union { 961 uint32_t resrvd2[ICP_QAT_FW_NUM_LONGWORDS_2]; 962 /**< Reserved - not used if Batch and Pack is disabled.*/ 963 964 uint64_t resrvd3; 965 /**< Reserved - not used if Batch and Pack is disabled.*/ 966 } u3; 967 968 /**< LWs 24-29 */ 969 icp_qat_fw_comp_cd_hdr_t comp_cd_ctrl; 970 /**< Compression request content descriptor control 971 * block header */ 972 973 /**< LWs 30-31 */ 974 union { 975 icp_qat_fw_xlt_cd_hdr_t xlt_cd_ctrl; 976 /**< Translation request content descriptor 977 * control block header */ 978 979 uint32_t resrvd3[ICP_QAT_FW_NUM_LONGWORDS_2]; 980 /**< Reserved if not used for translation */ 981 982 } u2; 983 984} icp_qat_fw_comp_req_t; 985 986/** 987 ***************************************************************************** 988 * @ingroup icp_qat_fw_comp 989 * Definition of the compression QAT FW response descriptor parameters 990 * @description 991 * This part of the response is specific to the compression response. 992 * 993 *****************************************************************************/ 994typedef struct icp_qat_fw_resp_comp_pars_s { 995 /**< LW 4 */ 996 uint32_t input_byte_counter; 997 /**< Input byte counter */ 998 999 /**< LW 5 */ 1000 uint32_t output_byte_counter; 1001 /**< Output byte counter */ 1002 1003 /** LW 6-7 */ 1004 union { 1005 struct { 1006 /** LW 6 */ 1007 uint32_t curr_crc32; 1008 /**< Current CRC32 */ 1009 1010 /** LW 7 */ 1011 uint32_t curr_adler_32; 1012 /**< Current Adler32 */ 1013 } legacy; 1014 1015 uint32_t resrvd[ICP_QAT_FW_NUM_LONGWORDS_2]; 1016 /**< Reserved if not in legacy mode */ 1017 } crc; 1018 1019} icp_qat_fw_resp_comp_pars_t; 1020 1021/** 1022 ***************************************************************************** 1023 * @ingroup icp_qat_fw_comp 1024 * Definition of the Compression Eagle Tail Response 1025 * @description 1026 * This is the response delivered to the ET rings by the Compression 1027 * QAT FW service for all commands 1028 * 1029 *****************************************************************************/ 1030typedef struct icp_qat_fw_comp_resp_s { 1031 /**< LWs 0-1 */ 1032 icp_qat_fw_comn_resp_hdr_t comn_resp; 1033 /**< Common interface response format see icp_qat_fw.h */ 1034 1035 /**< LWs 2-3 */ 1036 uint64_t opaque_data; 1037 /**< Opaque data passed from the request to the response message */ 1038 1039 /**< LWs 4-7 */ 1040 icp_qat_fw_resp_comp_pars_t comp_resp_pars; 1041 /**< Common response params (checksums and byte counts) */ 1042 1043} icp_qat_fw_comp_resp_t; 1044 1045/* RAM Bank defines */ 1046#define QAT_FW_COMP_BANK_FLAG_MASK 0x1 1047 1048#define QAT_FW_COMP_BANK_I_BITPOS 8 1049#define QAT_FW_COMP_BANK_H_BITPOS 7 1050#define QAT_FW_COMP_BANK_G_BITPOS 6 1051#define QAT_FW_COMP_BANK_F_BITPOS 5 1052#define QAT_FW_COMP_BANK_E_BITPOS 4 1053#define QAT_FW_COMP_BANK_D_BITPOS 3 1054#define QAT_FW_COMP_BANK_C_BITPOS 2 1055#define QAT_FW_COMP_BANK_B_BITPOS 1 1056#define QAT_FW_COMP_BANK_A_BITPOS 0 1057 1058/** 1059 ***************************************************************************** 1060 * @ingroup icp_qat_fw_comp 1061 * Definition of the ram bank enabled values 1062 * @description 1063 * Enumeration used to define whether a ram bank is enabled or not 1064 * 1065 *****************************************************************************/ 1066typedef enum { 1067 ICP_QAT_FW_COMP_BANK_DISABLED = 0, /*!< BANK DISABLED */ 1068 ICP_QAT_FW_COMP_BANK_ENABLED = 1, /*!< BANK ENABLED */ 1069 ICP_QAT_FW_COMP_BANK_DELIMITER = 2 /**< Delimiter type */ 1070 1071} icp_qat_fw_comp_bank_enabled_t; 1072 1073/** 1074 ****************************************************************************** 1075 * @ingroup icp_qat_fw_comp 1076 * 1077 * @description 1078 * Build the ram bank flags in the compression content descriptor 1079 * which specify which banks are used to save history 1080 * 1081 * @param bank_i_enable 1082 * @param bank_h_enable 1083 * @param bank_g_enable 1084 * @param bank_f_enable 1085 * @param bank_e_enable 1086 * @param bank_d_enable 1087 * @param bank_c_enable 1088 * @param bank_b_enable 1089 * @param bank_a_enable 1090 *****************************************************************************/ 1091#define ICP_QAT_FW_COMP_RAM_FLAGS_BUILD(bank_i_enable, \ 1092 bank_h_enable, \ 1093 bank_g_enable, \ 1094 bank_f_enable, \ 1095 bank_e_enable, \ 1096 bank_d_enable, \ 1097 bank_c_enable, \ 1098 bank_b_enable, \ 1099 bank_a_enable) \ 1100 ((((bank_i_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1101 << QAT_FW_COMP_BANK_I_BITPOS) | \ 1102 (((bank_h_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1103 << QAT_FW_COMP_BANK_H_BITPOS) | \ 1104 (((bank_g_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1105 << QAT_FW_COMP_BANK_G_BITPOS) | \ 1106 (((bank_f_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1107 << QAT_FW_COMP_BANK_F_BITPOS) | \ 1108 (((bank_e_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1109 << QAT_FW_COMP_BANK_E_BITPOS) | \ 1110 (((bank_d_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1111 << QAT_FW_COMP_BANK_D_BITPOS) | \ 1112 (((bank_c_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1113 << QAT_FW_COMP_BANK_C_BITPOS) | \ 1114 (((bank_b_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1115 << QAT_FW_COMP_BANK_B_BITPOS) | \ 1116 (((bank_a_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \ 1117 << QAT_FW_COMP_BANK_A_BITPOS)) 1118 1119/** 1120 ***************************************************************************** 1121 * @ingroup icp_qat_fw_comp 1122 * Definition of the xxhash32 acc state buffer 1123 * @description 1124 * This is data structure used in stateful lite for xxhash32 1125 * 1126 *****************************************************************************/ 1127typedef struct xxhash_acc_state_buff_s { 1128 /**< LW 0 */ 1129 uint32_t in_counter; 1130 /**< Accumulated (total) consumed bytes. As oppose to the per request 1131 * IBC in the response.*/ 1132 1133 /**< LW 1 */ 1134 uint32_t out_counter; 1135 /**< OBC as in the response.*/ 1136 1137 /**< LW 2-5 */ 1138 uint32_t xxhash_state[4]; 1139 /**< Initial value is set by IA to the values stated in HAS.*/ 1140 1141 /**< LW 6-9 */ 1142 uint32_t clear_txt[4]; 1143 /**< Set to 0 for the first request.*/ 1144} xxhash_acc_state_buff_t; 1145 1146#endif /* _ICP_QAT_FW_COMP_H_ */ 1147