1/******************************************************************************
2
3  Copyright (c) 2013-2018, Intel Corporation
4  All rights reserved.
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10      this list of conditions and the following disclaimer.
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32******************************************************************************/
33
34#ifndef _I40E_HMC_H_
35#define _I40E_HMC_H_
36
37#define I40E_HMC_MAX_BP_COUNT 512
38
39/* forward-declare the HW struct for the compiler */
40struct i40e_hw;
41
42#define I40E_HMC_INFO_SIGNATURE		0x484D5347 /* HMSG */
43#define I40E_HMC_PD_CNT_IN_SD		512
44#define I40E_HMC_DIRECT_BP_SIZE		0x200000 /* 2M */
45#define I40E_HMC_PAGED_BP_SIZE		4096
46#define I40E_HMC_PD_BP_BUF_ALIGNMENT	4096
47#define I40E_FIRST_VF_FPM_ID		16
48
49struct i40e_hmc_obj_info {
50	u64 base;	/* base addr in FPM */
51	u32 max_cnt;	/* max count available for this hmc func */
52	u32 cnt;	/* count of objects driver actually wants to create */
53	u64 size;	/* size in bytes of one object */
54};
55
56enum i40e_sd_entry_type {
57	I40E_SD_TYPE_INVALID = 0,
58	I40E_SD_TYPE_PAGED   = 1,
59	I40E_SD_TYPE_DIRECT  = 2
60};
61
62struct i40e_hmc_bp {
63	enum i40e_sd_entry_type entry_type;
64	struct i40e_dma_mem addr; /* populate to be used by hw */
65	u32 sd_pd_index;
66	u32 ref_cnt;
67};
68
69struct i40e_hmc_pd_entry {
70	struct i40e_hmc_bp bp;
71	u32 sd_index;
72	bool rsrc_pg;
73	bool valid;
74};
75
76struct i40e_hmc_pd_table {
77	struct i40e_dma_mem pd_page_addr; /* populate to be used by hw */
78	struct i40e_hmc_pd_entry  *pd_entry; /* [512] for sw book keeping */
79	struct i40e_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */
80
81	u32 ref_cnt;
82	u32 sd_index;
83};
84
85struct i40e_hmc_sd_entry {
86	enum i40e_sd_entry_type entry_type;
87	bool valid;
88
89	union {
90		struct i40e_hmc_pd_table pd_table;
91		struct i40e_hmc_bp bp;
92	} u;
93};
94
95struct i40e_hmc_sd_table {
96	struct i40e_virt_mem addr; /* used to track sd_entry allocations */
97	u32 sd_cnt;
98	u32 ref_cnt;
99	struct i40e_hmc_sd_entry *sd_entry; /* (sd_cnt*512) entries max */
100};
101
102struct i40e_hmc_info {
103	u32 signature;
104	/* equals to pci func num for PF and dynamically allocated for VFs */
105	u8 hmc_fn_id;
106	u16 first_sd_index; /* index of the first available SD */
107
108	/* hmc objects */
109	struct i40e_hmc_obj_info *hmc_obj;
110	struct i40e_virt_mem hmc_obj_virt_mem;
111	struct i40e_hmc_sd_table sd_table;
112};
113
114#define I40E_INC_SD_REFCNT(sd_table)	((sd_table)->ref_cnt++)
115#define I40E_INC_PD_REFCNT(pd_table)	((pd_table)->ref_cnt++)
116#define I40E_INC_BP_REFCNT(bp)		((bp)->ref_cnt++)
117
118#define I40E_DEC_SD_REFCNT(sd_table)	((sd_table)->ref_cnt--)
119#define I40E_DEC_PD_REFCNT(pd_table)	((pd_table)->ref_cnt--)
120#define I40E_DEC_BP_REFCNT(bp)		((bp)->ref_cnt--)
121
122/**
123 * I40E_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware
124 * @hw: pointer to our hw struct
125 * @pa: pointer to physical address
126 * @sd_index: segment descriptor index
127 * @type: if sd entry is direct or paged
128 **/
129#define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type)			\
130{									\
131	u32 val1, val2, val3;						\
132	val1 = (u32)(I40E_HI_DWORD(pa));				\
133	val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT <<			\
134		 I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |		\
135		((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) <<		\
136		I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) |			\
137		BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT);		\
138	val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT);	\
139	wr32((hw), I40E_PFHMC_SDDATAHIGH, val1);			\
140	wr32((hw), I40E_PFHMC_SDDATALOW, val2);				\
141	wr32((hw), I40E_PFHMC_SDCMD, val3);				\
142}
143
144/**
145 * I40E_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware
146 * @hw: pointer to our hw struct
147 * @sd_index: segment descriptor index
148 * @type: if sd entry is direct or paged
149 **/
150#define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type)			\
151{									\
152	u32 val2, val3;							\
153	val2 = (I40E_HMC_MAX_BP_COUNT <<				\
154		I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |		\
155		((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) <<		\
156		I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT);			\
157	val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT);	\
158	wr32((hw), I40E_PFHMC_SDDATAHIGH, 0);				\
159	wr32((hw), I40E_PFHMC_SDDATALOW, val2);				\
160	wr32((hw), I40E_PFHMC_SDCMD, val3);				\
161}
162
163/**
164 * I40E_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware
165 * @hw: pointer to our hw struct
166 * @sd_idx: segment descriptor index
167 * @pd_idx: page descriptor index
168 **/
169#define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx)			\
170	wr32((hw), I40E_PFHMC_PDINV,					\
171	    (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) |		\
172	     ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
173
174/**
175 * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit
176 * @hmc_info: pointer to the HMC configuration information structure
177 * @type: type of HMC resources we're searching
178 * @index: starting index for the object
179 * @cnt: number of objects we're trying to create
180 * @sd_idx: pointer to return index of the segment descriptor in question
181 * @sd_limit: pointer to return the maximum number of segment descriptors
182 *
183 * This function calculates the segment descriptor index and index limit
184 * for the resource defined by i40e_hmc_rsrc_type.
185 **/
186#define I40E_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\
187{									\
188	u64 fpm_addr, fpm_limit;					\
189	fpm_addr = (hmc_info)->hmc_obj[(type)].base +			\
190		   (hmc_info)->hmc_obj[(type)].size * (index);		\
191	fpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\
192	*(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE);		\
193	*(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE);	\
194	/* add one more to the limit to correct our range */		\
195	*(sd_limit) += 1;						\
196}
197
198/**
199 * I40E_FIND_PD_INDEX_LIMIT - finds page descriptor index limit
200 * @hmc_info: pointer to the HMC configuration information struct
201 * @type: HMC resource type we're examining
202 * @idx: starting index for the object
203 * @cnt: number of objects we're trying to create
204 * @pd_index: pointer to return page descriptor index
205 * @pd_limit: pointer to return page descriptor index limit
206 *
207 * Calculates the page descriptor index and index limit for the resource
208 * defined by i40e_hmc_rsrc_type.
209 **/
210#define I40E_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\
211{									\
212	u64 fpm_adr, fpm_limit;						\
213	fpm_adr = (hmc_info)->hmc_obj[(type)].base +			\
214		  (hmc_info)->hmc_obj[(type)].size * (idx);		\
215	fpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt);	\
216	*(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE);		\
217	*(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE);	\
218	/* add one more to the limit to correct our range */		\
219	*(pd_limit) += 1;						\
220}
221enum i40e_status_code i40e_add_sd_table_entry(struct i40e_hw *hw,
222					      struct i40e_hmc_info *hmc_info,
223					      u32 sd_index,
224					      enum i40e_sd_entry_type type,
225					      u64 direct_mode_sz);
226
227enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw,
228					      struct i40e_hmc_info *hmc_info,
229					      u32 pd_index,
230					      struct i40e_dma_mem *rsrc_pg);
231enum i40e_status_code i40e_remove_pd_bp(struct i40e_hw *hw,
232					struct i40e_hmc_info *hmc_info,
233					u32 idx);
234enum i40e_status_code i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info,
235					     u32 idx);
236enum i40e_status_code i40e_remove_sd_bp_new(struct i40e_hw *hw,
237					    struct i40e_hmc_info *hmc_info,
238					    u32 idx, bool is_pf);
239enum i40e_status_code i40e_prep_remove_pd_page(struct i40e_hmc_info *hmc_info,
240					       u32 idx);
241enum i40e_status_code i40e_remove_pd_page_new(struct i40e_hw *hw,
242					      struct i40e_hmc_info *hmc_info,
243					      u32 idx, bool is_pf);
244
245#endif /* _I40E_HMC_H_ */
246