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3  Copyright (c) 2013-2018, Intel Corporation
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32******************************************************************************/
33
34#ifndef _I40E_DCB_H_
35#define _I40E_DCB_H_
36
37#include "i40e_type.h"
38
39#define I40E_DCBX_OFFLOAD_DISABLED	0
40#define I40E_DCBX_OFFLOAD_ENABLED	1
41
42#define I40E_DCBX_STATUS_NOT_STARTED	0
43#define I40E_DCBX_STATUS_IN_PROGRESS	1
44#define I40E_DCBX_STATUS_DONE		2
45#define I40E_DCBX_STATUS_MULTIPLE_PEERS	3
46#define I40E_DCBX_STATUS_DISABLED	7
47
48#define I40E_TLV_TYPE_END		0
49#define I40E_TLV_TYPE_ORG		127
50
51#define I40E_IEEE_8021QAZ_OUI		0x0080C2
52#define I40E_IEEE_SUBTYPE_ETS_CFG	9
53#define I40E_IEEE_SUBTYPE_ETS_REC	10
54#define I40E_IEEE_SUBTYPE_PFC_CFG	11
55#define I40E_IEEE_SUBTYPE_APP_PRI	12
56
57#define I40E_CEE_DCBX_OUI		0x001b21
58#define I40E_CEE_DCBX_TYPE		2
59
60#define I40E_CEE_SUBTYPE_CTRL		1
61#define I40E_CEE_SUBTYPE_PG_CFG		2
62#define I40E_CEE_SUBTYPE_PFC_CFG	3
63#define I40E_CEE_SUBTYPE_APP_PRI	4
64
65#define I40E_CEE_MAX_FEAT_TYPE		3
66#define I40E_LLDP_ADMINSTATUS_DISABLED		0
67#define I40E_LLDP_ADMINSTATUS_ENABLED_RX	1
68#define I40E_LLDP_ADMINSTATUS_ENABLED_TX	2
69#define I40E_LLDP_ADMINSTATUS_ENABLED_RXTX	3
70
71#define I40E_LLDP_CURRENT_STATUS_XL710_OFFSET	0x2B
72#define I40E_LLDP_CURRENT_STATUS_X722_OFFSET	0x31
73#define I40E_LLDP_CURRENT_STATUS_OFFSET		1
74#define I40E_LLDP_CURRENT_STATUS_SIZE		1
75
76/* Defines for LLDP TLV header */
77#define I40E_LLDP_MIB_HLEN		14
78#define I40E_LLDP_TLV_LEN_SHIFT		0
79#define I40E_LLDP_TLV_LEN_MASK		(0x01FF << I40E_LLDP_TLV_LEN_SHIFT)
80#define I40E_LLDP_TLV_TYPE_SHIFT	9
81#define I40E_LLDP_TLV_TYPE_MASK		(0x7F << I40E_LLDP_TLV_TYPE_SHIFT)
82#define I40E_LLDP_TLV_SUBTYPE_SHIFT	0
83#define I40E_LLDP_TLV_SUBTYPE_MASK	(0xFF << I40E_LLDP_TLV_SUBTYPE_SHIFT)
84#define I40E_LLDP_TLV_OUI_SHIFT		8
85#define I40E_LLDP_TLV_OUI_MASK		(0xFFFFFF << I40E_LLDP_TLV_OUI_SHIFT)
86
87/* Defines for IEEE ETS TLV */
88#define I40E_IEEE_ETS_MAXTC_SHIFT	0
89#define I40E_IEEE_ETS_MAXTC_MASK	(0x7 << I40E_IEEE_ETS_MAXTC_SHIFT)
90#define I40E_IEEE_ETS_CBS_SHIFT		6
91#define I40E_IEEE_ETS_CBS_MASK		BIT(I40E_IEEE_ETS_CBS_SHIFT)
92#define I40E_IEEE_ETS_WILLING_SHIFT	7
93#define I40E_IEEE_ETS_WILLING_MASK	BIT(I40E_IEEE_ETS_WILLING_SHIFT)
94#define I40E_IEEE_ETS_PRIO_0_SHIFT	0
95#define I40E_IEEE_ETS_PRIO_0_MASK	(0x7 << I40E_IEEE_ETS_PRIO_0_SHIFT)
96#define I40E_IEEE_ETS_PRIO_1_SHIFT	4
97#define I40E_IEEE_ETS_PRIO_1_MASK	(0x7 << I40E_IEEE_ETS_PRIO_1_SHIFT)
98#define I40E_CEE_PGID_PRIO_0_SHIFT	0
99#define I40E_CEE_PGID_PRIO_0_MASK	(0xF << I40E_CEE_PGID_PRIO_0_SHIFT)
100#define I40E_CEE_PGID_PRIO_1_SHIFT	4
101#define I40E_CEE_PGID_PRIO_1_MASK	(0xF << I40E_CEE_PGID_PRIO_1_SHIFT)
102#define I40E_CEE_PGID_STRICT		15
103
104/* Defines for IEEE TSA types */
105#define I40E_IEEE_TSA_STRICT		0
106#define I40E_IEEE_TSA_CBS		1
107#define I40E_IEEE_TSA_ETS		2
108#define I40E_IEEE_TSA_VENDOR		255
109
110/* Defines for IEEE PFC TLV */
111#define I40E_IEEE_PFC_CAP_SHIFT		0
112#define I40E_IEEE_PFC_CAP_MASK		(0xF << I40E_IEEE_PFC_CAP_SHIFT)
113#define I40E_IEEE_PFC_MBC_SHIFT		6
114#define I40E_IEEE_PFC_MBC_MASK		BIT(I40E_IEEE_PFC_MBC_SHIFT)
115#define I40E_IEEE_PFC_WILLING_SHIFT	7
116#define I40E_IEEE_PFC_WILLING_MASK	BIT(I40E_IEEE_PFC_WILLING_SHIFT)
117
118/* Defines for IEEE APP TLV */
119#define I40E_IEEE_APP_SEL_SHIFT		0
120#define I40E_IEEE_APP_SEL_MASK		(0x7 << I40E_IEEE_APP_SEL_SHIFT)
121#define I40E_IEEE_APP_PRIO_SHIFT	5
122#define I40E_IEEE_APP_PRIO_MASK		(0x7 << I40E_IEEE_APP_PRIO_SHIFT)
123
124/* TLV definitions for preparing MIB */
125#define I40E_TLV_ID_CHASSIS_ID		0
126#define I40E_TLV_ID_PORT_ID		1
127#define I40E_TLV_ID_TIME_TO_LIVE	2
128#define I40E_IEEE_TLV_ID_ETS_CFG	3
129#define I40E_IEEE_TLV_ID_ETS_REC	4
130#define I40E_IEEE_TLV_ID_PFC_CFG	5
131#define I40E_IEEE_TLV_ID_APP_PRI	6
132#define I40E_TLV_ID_END_OF_LLDPPDU	7
133#define I40E_TLV_ID_START		I40E_IEEE_TLV_ID_ETS_CFG
134
135#define I40E_IEEE_ETS_TLV_LENGTH	25
136#define I40E_IEEE_PFC_TLV_LENGTH	6
137#define I40E_IEEE_APP_TLV_LENGTH	11
138
139#pragma pack(1)
140
141/* IEEE 802.1AB LLDP TLV structure */
142struct i40e_lldp_generic_tlv {
143	__be16 typelength;
144	u8 tlvinfo[1];
145};
146
147/* IEEE 802.1AB LLDP Organization specific TLV */
148struct i40e_lldp_org_tlv {
149	__be16 typelength;
150	__be32 ouisubtype;
151	u8 tlvinfo[1];
152};
153
154struct i40e_cee_tlv_hdr {
155	__be16 typelen;
156	u8 operver;
157	u8 maxver;
158};
159
160struct i40e_cee_ctrl_tlv {
161	struct i40e_cee_tlv_hdr hdr;
162	__be32 seqno;
163	__be32 ackno;
164};
165
166struct i40e_cee_feat_tlv {
167	struct i40e_cee_tlv_hdr hdr;
168	u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
169#define I40E_CEE_FEAT_TLV_ENABLE_MASK	0x80
170#define I40E_CEE_FEAT_TLV_WILLING_MASK	0x40
171#define I40E_CEE_FEAT_TLV_ERR_MASK	0x20
172	u8 subtype;
173	u8 tlvinfo[1];
174};
175
176struct i40e_cee_app_prio {
177	__be16 protocol;
178	u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
179#define I40E_CEE_APP_SELECTOR_MASK	0x03
180	__be16 lower_oui;
181	u8 prio_map;
182};
183#pragma pack()
184
185/*
186 * TODO: The below structures related LLDP/DCBX variables
187 * and statistics are defined but need to find how to get
188 * the required information from the Firmware to use them
189 */
190
191/* IEEE 802.1AB LLDP Agent Statistics */
192struct i40e_lldp_stats {
193	u64 remtablelastchangetime;
194	u64 remtableinserts;
195	u64 remtabledeletes;
196	u64 remtabledrops;
197	u64 remtableageouts;
198	u64 txframestotal;
199	u64 rxframesdiscarded;
200	u64 rxportframeerrors;
201	u64 rxportframestotal;
202	u64 rxporttlvsdiscardedtotal;
203	u64 rxporttlvsunrecognizedtotal;
204	u64 remtoomanyneighbors;
205};
206
207/* IEEE 802.1Qaz DCBX variables */
208struct i40e_dcbx_variables {
209	u32 defmaxtrafficclasses;
210	u32 defprioritytcmapping;
211	u32 deftcbandwidth;
212	u32 deftsaassignment;
213};
214
215
216enum i40e_get_fw_lldp_status_resp {
217	I40E_GET_FW_LLDP_STATUS_DISABLED = 0,
218	I40E_GET_FW_LLDP_STATUS_ENABLED = 1
219};
220
221enum i40e_status_code i40e_get_dcbx_status(struct i40e_hw *hw,
222					   u16 *status);
223enum i40e_status_code i40e_lldp_to_dcb_config(u8 *lldpmib,
224					      struct i40e_dcbx_config *dcbcfg);
225enum i40e_status_code i40e_aq_get_dcb_config(struct i40e_hw *hw, u8 mib_type,
226					     u8 bridgetype,
227					     struct i40e_dcbx_config *dcbcfg);
228enum i40e_status_code i40e_get_dcb_config(struct i40e_hw *hw);
229enum i40e_status_code i40e_init_dcb(struct i40e_hw *hw,
230				    bool enable_mib_change);
231enum i40e_status_code
232i40e_get_fw_lldp_status(struct i40e_hw *hw,
233			enum i40e_get_fw_lldp_status_resp *lldp_status);
234enum i40e_status_code i40e_set_dcb_config(struct i40e_hw *hw);
235enum i40e_status_code i40e_dcb_config_to_lldp(u8 *lldpmib, u16 *miblen,
236					      struct i40e_dcbx_config *dcbcfg);
237#endif /* _I40E_DCB_H_ */
238