1210284Sjmallett/***********************license start***************
2215990Sjmallett * Copyright (c) 2003-2010  Cavium Networks (support@cavium.com). All rights
3215990Sjmallett * reserved.
4210284Sjmallett *
5210284Sjmallett *
6215990Sjmallett * Redistribution and use in source and binary forms, with or without
7215990Sjmallett * modification, are permitted provided that the following conditions are
8215990Sjmallett * met:
9210284Sjmallett *
10215990Sjmallett *   * Redistributions of source code must retain the above copyright
11215990Sjmallett *     notice, this list of conditions and the following disclaimer.
12210284Sjmallett *
13215990Sjmallett *   * Redistributions in binary form must reproduce the above
14215990Sjmallett *     copyright notice, this list of conditions and the following
15215990Sjmallett *     disclaimer in the documentation and/or other materials provided
16215990Sjmallett *     with the distribution.
17215990Sjmallett
18215990Sjmallett *   * Neither the name of Cavium Networks nor the names of
19215990Sjmallett *     its contributors may be used to endorse or promote products
20215990Sjmallett *     derived from this software without specific prior written
21215990Sjmallett *     permission.
22215990Sjmallett
23215990Sjmallett * This Software, including technical data, may be subject to U.S. export  control
24215990Sjmallett * laws, including the U.S. Export Administration Act and its  associated
25215990Sjmallett * regulations, and may be subject to export or import  regulations in other
26215990Sjmallett * countries.
27215990Sjmallett
28215990Sjmallett * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
29215990Sjmallett * AND WITH ALL FAULTS AND CAVIUM  NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
30215990Sjmallett * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
31215990Sjmallett * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
32215990Sjmallett * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
33215990Sjmallett * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
34215990Sjmallett * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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37215990Sjmallett * PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
38210284Sjmallett ***********************license end**************************************/
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45215990Sjmallett
46210284Sjmallett/**
47210284Sjmallett * @file
48210284Sjmallett *
49210284Sjmallett * Module to support operations on bitmap of cores. Coremask can be used to
50210284Sjmallett * select a specific core, a group of cores, or all available cores, for
51210284Sjmallett * initialization and differentiation of roles within a single shared binary
52210284Sjmallett * executable image.
53210284Sjmallett *
54215990Sjmallett * <hr>$Revision: 49448 $<hr>
55210284Sjmallett *
56210284Sjmallett */
57210284Sjmallett
58210284Sjmallett#include "cvmx-config.h"
59210284Sjmallett#include "cvmx.h"
60210284Sjmallett#include "cvmx-spinlock.h"
61210284Sjmallett#include "cvmx-coremask.h"
62210284Sjmallett
63210284Sjmallett
64210284Sjmallett#define  CVMX_COREMASK_MAX_SYNCS  20  /* maximum number of coremasks for barrier sync */
65210284Sjmallett
66210284Sjmallett/**
67210284Sjmallett * This structure defines the private state maintained by coremask module.
68210284Sjmallett *
69210284Sjmallett */
70210284SjmallettCVMX_SHARED static struct {
71210284Sjmallett
72210284Sjmallett    cvmx_spinlock_t            lock;       /**< mutex spinlock */
73210284Sjmallett
74210284Sjmallett    struct {
75210284Sjmallett
76210284Sjmallett        unsigned int           coremask;   /**< coremask specified for barrier */
77210284Sjmallett        unsigned int           checkin;    /**< bitmask of cores checking in */
78210284Sjmallett        volatile unsigned int  exit;       /**< variable to poll for exit condition */
79210284Sjmallett
80210284Sjmallett    } s[CVMX_COREMASK_MAX_SYNCS];
81210284Sjmallett
82210284Sjmallett} state = {
83210284Sjmallett
84210284Sjmallett    { CVMX_SPINLOCK_UNLOCKED_VAL },
85210284Sjmallett
86210284Sjmallett    { { 0, 0, 0 } },
87210284Sjmallett};
88210284Sjmallett
89210284Sjmallett
90210284Sjmallett/**
91210284Sjmallett * Wait (stall) until all cores in the given coremask has reached this point
92210284Sjmallett * in the program execution before proceeding.
93210284Sjmallett *
94210284Sjmallett * @param  coremask  the group of cores performing the barrier sync
95210284Sjmallett *
96210284Sjmallett */
97210284Sjmallettvoid cvmx_coremask_barrier_sync(unsigned int coremask)
98210284Sjmallett{
99210284Sjmallett    int i;
100210284Sjmallett    unsigned int target;
101210284Sjmallett
102210284Sjmallett    assert(coremask != 0);
103210284Sjmallett
104210284Sjmallett    cvmx_spinlock_lock(&state.lock);
105210284Sjmallett
106210284Sjmallett    for (i = 0; i < CVMX_COREMASK_MAX_SYNCS; i++) {
107210284Sjmallett
108210284Sjmallett        if (state.s[i].coremask == 0) {
109210284Sjmallett            /* end of existing coremask list, create new entry, fall-thru */
110210284Sjmallett            state.s[i].coremask = coremask;
111210284Sjmallett        }
112210284Sjmallett
113210284Sjmallett        if (state.s[i].coremask == coremask) {
114210284Sjmallett
115210284Sjmallett            target = state.s[i].exit + 1;  /* wrap-around at 32b */
116210284Sjmallett
117210284Sjmallett            state.s[i].checkin |= cvmx_coremask_core(cvmx_get_core_num());
118210284Sjmallett            if (state.s[i].checkin == coremask) {
119210284Sjmallett                state.s[i].checkin = 0;
120210284Sjmallett                state.s[i].exit = target;  /* signal exit condition */
121210284Sjmallett            }
122210284Sjmallett            cvmx_spinlock_unlock(&state.lock);
123210284Sjmallett
124210284Sjmallett            while (state.s[i].exit != target)
125210284Sjmallett                ;
126210284Sjmallett
127210284Sjmallett            return;
128210284Sjmallett        }
129210284Sjmallett    }
130210284Sjmallett
131210284Sjmallett    /* error condition - coremask array overflowed */
132210284Sjmallett    cvmx_spinlock_unlock(&state.lock);
133210284Sjmallett    assert(0);
134210284Sjmallett}
135