1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD$"); 30 31#include <sys/param.h> 32#include <sys/ioctl.h> 33#include <sys/mman.h> 34#include <sys/socket.h> 35#include <sys/stat.h> 36 37#include <arpa/inet.h> 38#include <net/ethernet.h> 39#include <net/sff8472.h> 40#include <netinet/in.h> 41 42#include <ctype.h> 43#include <err.h> 44#include <errno.h> 45#include <fcntl.h> 46#include <limits.h> 47#include <stdint.h> 48#include <stdio.h> 49#include <stdlib.h> 50#include <string.h> 51#include <unistd.h> 52#include <pcap.h> 53 54#include "t4_ioctl.h" 55#include "tcb_common.h" 56 57#define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo)) 58#define max(x, y) ((x) > (y) ? (x) : (y)) 59 60static const char *progname, *nexus; 61static int chip_id; /* 4 for T4, 5 for T5 */ 62 63struct reg_info { 64 const char *name; 65 uint32_t addr; 66 uint32_t len; 67}; 68 69struct mod_regs { 70 const char *name; 71 const struct reg_info *ri; 72}; 73 74struct field_desc { 75 const char *name; /* Field name */ 76 unsigned short start; /* Start bit position */ 77 unsigned short end; /* End bit position */ 78 unsigned char shift; /* # of low order bits omitted and implicitly 0 */ 79 unsigned char hex; /* Print field in hex instead of decimal */ 80 unsigned char islog2; /* Field contains the base-2 log of the value */ 81}; 82 83#include "reg_defs_t4.c" 84#include "reg_defs_t5.c" 85#include "reg_defs_t6.c" 86#include "reg_defs_t4vf.c" 87 88static void 89usage(FILE *fp) 90{ 91 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname); 92 fprintf(fp, 93 "\tclearstats <port> clear port statistics\n" 94 "\tcontext <type> <id> show an SGE context\n" 95 "\tdumpstate <dump.bin> dump chip state\n" 96 "\tfilter <idx> [<param> <val>] ... set a filter\n" 97 "\tfilter <idx> delete|clear [prio 1] delete a filter\n" 98 "\tfilter list list all filters\n" 99 "\tfilter mode [<match>] ... get/set global filter mode\n" 100 "\thashfilter [<param> <val>] ... set a hashfilter\n" 101 "\thashfilter <idx> delete|clear delete a hashfilter\n" 102 "\thashfilter list list all hashfilters\n" 103 "\thashfilter mode [<match>] ... get/set global hashfilter mode\n" 104 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n" 105 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n" 106 "\tloadboot clear [pf|offset <val>] remove boot image\n" 107 "\tloadboot-cfg <bc.bin> install boot config\n" 108 "\tloadboot-cfg clear remove boot config\n" 109 "\tloadcfg <fw-config.txt> install configuration file\n" 110 "\tloadcfg clear remove configuration file\n" 111 "\tloadfw <fw-image.bin> install firmware\n" 112 "\tmemdump <addr> <len> dump a memory range\n" 113 "\tmodinfo <port> [raw] optics/cable information\n" 114 "\tpolicy <policy.txt> install offload policy\n" 115 "\tpolicy clear remove offload policy\n" 116 "\treg <address>[=<val>] read/write register\n" 117 "\treg64 <address>[=<val>] read/write 64 bit register\n" 118 "\tregdump [<module>] ... dump registers\n" 119 "\tsched-class params <param> <val> .. configure TX scheduler class\n" 120 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n" 121 "\tstdio interactive mode\n" 122 "\ttcb <tid> read TCB\n" 123 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n" 124 "\ttracer <idx> disable|enable disable or enable a tracer\n" 125 "\ttracer list list all tracers\n" 126 ); 127} 128 129static inline unsigned int 130get_card_vers(unsigned int version) 131{ 132 return (version & 0x3ff); 133} 134 135static int 136real_doit(unsigned long cmd, void *data, const char *cmdstr) 137{ 138 static int fd = -1; 139 int rc = 0; 140 141 if (fd == -1) { 142 char buf[64]; 143 144 snprintf(buf, sizeof(buf), "/dev/%s", nexus); 145 if ((fd = open(buf, O_RDWR)) < 0) { 146 warn("open(%s)", nexus); 147 rc = errno; 148 return (rc); 149 } 150 } 151 152 rc = ioctl(fd, cmd, data); 153 if (rc < 0) { 154 warn("%s", cmdstr); 155 rc = errno; 156 } 157 158 return (rc); 159} 160#define doit(x, y) real_doit(x, y, #x) 161 162static char * 163str_to_number(const char *s, long *val, long long *vall) 164{ 165 char *p; 166 167 if (vall) 168 *vall = strtoll(s, &p, 0); 169 else if (val) 170 *val = strtol(s, &p, 0); 171 else 172 p = NULL; 173 174 return (p); 175} 176 177static int 178read_reg(long addr, int size, long long *val) 179{ 180 struct t4_reg reg; 181 int rc; 182 183 reg.addr = (uint32_t) addr; 184 reg.size = (uint32_t) size; 185 reg.val = 0; 186 187 rc = doit(CHELSIO_T4_GETREG, ®); 188 189 *val = reg.val; 190 191 return (rc); 192} 193 194static int 195write_reg(long addr, int size, long long val) 196{ 197 struct t4_reg reg; 198 199 reg.addr = (uint32_t) addr; 200 reg.size = (uint32_t) size; 201 reg.val = (uint64_t) val; 202 203 return doit(CHELSIO_T4_SETREG, ®); 204} 205 206static int 207register_io(int argc, const char *argv[], int size) 208{ 209 char *p, *v; 210 long addr; 211 long long val; 212 int w = 0, rc; 213 214 if (argc == 1) { 215 /* <reg> OR <reg>=<value> */ 216 217 p = str_to_number(argv[0], &addr, NULL); 218 if (*p) { 219 if (*p != '=') { 220 warnx("invalid register \"%s\"", argv[0]); 221 return (EINVAL); 222 } 223 224 w = 1; 225 v = p + 1; 226 p = str_to_number(v, NULL, &val); 227 228 if (*p) { 229 warnx("invalid value \"%s\"", v); 230 return (EINVAL); 231 } 232 } 233 234 } else if (argc == 2) { 235 /* <reg> <value> */ 236 237 w = 1; 238 239 p = str_to_number(argv[0], &addr, NULL); 240 if (*p) { 241 warnx("invalid register \"%s\"", argv[0]); 242 return (EINVAL); 243 } 244 245 p = str_to_number(argv[1], NULL, &val); 246 if (*p) { 247 warnx("invalid value \"%s\"", argv[1]); 248 return (EINVAL); 249 } 250 } else { 251 warnx("reg: invalid number of arguments (%d)", argc); 252 return (EINVAL); 253 } 254 255 if (w) 256 rc = write_reg(addr, size, val); 257 else { 258 rc = read_reg(addr, size, &val); 259 if (rc == 0) 260 printf("0x%llx [%llu]\n", val, val); 261 } 262 263 return (rc); 264} 265 266static inline uint32_t 267xtract(uint32_t val, int shift, int len) 268{ 269 return (val >> shift) & ((1 << len) - 1); 270} 271 272static int 273dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) 274{ 275 uint32_t reg_val = 0; 276 277 for ( ; reg_array->name; ++reg_array) 278 if (!reg_array->len) { 279 reg_val = regs[reg_array->addr / 4]; 280 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, 281 reg_array->name, reg_val, reg_val); 282 } else { 283 uint32_t v = xtract(reg_val, reg_array->addr, 284 reg_array->len); 285 286 printf(" %*u:%u %-47s %#-10x %u\n", 287 reg_array->addr < 10 ? 3 : 2, 288 reg_array->addr + reg_array->len - 1, 289 reg_array->addr, reg_array->name, v, v); 290 } 291 292 return (1); 293} 294 295static int 296dump_regs_table(int argc, const char *argv[], const uint32_t *regs, 297 const struct mod_regs *modtab, int nmodules) 298{ 299 int i, j, match; 300 301 for (i = 0; i < argc; i++) { 302 for (j = 0; j < nmodules; j++) { 303 if (!strcmp(argv[i], modtab[j].name)) 304 break; 305 } 306 307 if (j == nmodules) { 308 warnx("invalid register block \"%s\"", argv[i]); 309 fprintf(stderr, "\nAvailable blocks:"); 310 for ( ; nmodules; nmodules--, modtab++) 311 fprintf(stderr, " %s", modtab->name); 312 fprintf(stderr, "\n"); 313 return (EINVAL); 314 } 315 } 316 317 for ( ; nmodules; nmodules--, modtab++) { 318 319 match = argc == 0 ? 1 : 0; 320 for (i = 0; !match && i < argc; i++) { 321 if (!strcmp(argv[i], modtab->name)) 322 match = 1; 323 } 324 325 if (match) 326 dump_block_regs(modtab->ri, regs); 327 } 328 329 return (0); 330} 331 332#define T4_MODREGS(name) { #name, t4_##name##_regs } 333static int 334dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) 335{ 336 static struct mod_regs t4_mod[] = { 337 T4_MODREGS(sge), 338 { "pci", t4_pcie_regs }, 339 T4_MODREGS(dbg), 340 T4_MODREGS(mc), 341 T4_MODREGS(ma), 342 { "edc0", t4_edc_0_regs }, 343 { "edc1", t4_edc_1_regs }, 344 T4_MODREGS(cim), 345 T4_MODREGS(tp), 346 T4_MODREGS(ulp_rx), 347 T4_MODREGS(ulp_tx), 348 { "pmrx", t4_pm_rx_regs }, 349 { "pmtx", t4_pm_tx_regs }, 350 T4_MODREGS(mps), 351 { "cplsw", t4_cpl_switch_regs }, 352 T4_MODREGS(smb), 353 { "i2c", t4_i2cm_regs }, 354 T4_MODREGS(mi), 355 T4_MODREGS(uart), 356 T4_MODREGS(pmu), 357 T4_MODREGS(sf), 358 T4_MODREGS(pl), 359 T4_MODREGS(le), 360 T4_MODREGS(ncsi), 361 T4_MODREGS(xgmac) 362 }; 363 364 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod)); 365} 366#undef T4_MODREGS 367 368#define T5_MODREGS(name) { #name, t5_##name##_regs } 369static int 370dump_regs_t5(int argc, const char *argv[], const uint32_t *regs) 371{ 372 static struct mod_regs t5_mod[] = { 373 T5_MODREGS(sge), 374 { "pci", t5_pcie_regs }, 375 T5_MODREGS(dbg), 376 { "mc0", t5_mc_0_regs }, 377 { "mc1", t5_mc_1_regs }, 378 T5_MODREGS(ma), 379 { "edc0", t5_edc_t50_regs }, 380 { "edc1", t5_edc_t51_regs }, 381 T5_MODREGS(cim), 382 T5_MODREGS(tp), 383 { "ulprx", t5_ulp_rx_regs }, 384 { "ulptx", t5_ulp_tx_regs }, 385 { "pmrx", t5_pm_rx_regs }, 386 { "pmtx", t5_pm_tx_regs }, 387 T5_MODREGS(mps), 388 { "cplsw", t5_cpl_switch_regs }, 389 T5_MODREGS(smb), 390 { "i2c", t5_i2cm_regs }, 391 T5_MODREGS(mi), 392 T5_MODREGS(uart), 393 T5_MODREGS(pmu), 394 T5_MODREGS(sf), 395 T5_MODREGS(pl), 396 T5_MODREGS(le), 397 T5_MODREGS(ncsi), 398 T5_MODREGS(mac), 399 { "hma", t5_hma_t5_regs } 400 }; 401 402 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod)); 403} 404#undef T5_MODREGS 405 406#define T6_MODREGS(name) { #name, t6_##name##_regs } 407static int 408dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) 409{ 410 static struct mod_regs t6_mod[] = { 411 T6_MODREGS(sge), 412 { "pci", t6_pcie_regs }, 413 T6_MODREGS(dbg), 414 { "mc0", t6_mc_0_regs }, 415 T6_MODREGS(ma), 416 { "edc0", t6_edc_t60_regs }, 417 { "edc1", t6_edc_t61_regs }, 418 T6_MODREGS(cim), 419 T6_MODREGS(tp), 420 { "ulprx", t6_ulp_rx_regs }, 421 { "ulptx", t6_ulp_tx_regs }, 422 { "pmrx", t6_pm_rx_regs }, 423 { "pmtx", t6_pm_tx_regs }, 424 T6_MODREGS(mps), 425 { "cplsw", t6_cpl_switch_regs }, 426 T6_MODREGS(smb), 427 { "i2c", t6_i2cm_regs }, 428 T6_MODREGS(mi), 429 T6_MODREGS(uart), 430 T6_MODREGS(pmu), 431 T6_MODREGS(sf), 432 T6_MODREGS(pl), 433 T6_MODREGS(le), 434 T6_MODREGS(ncsi), 435 T6_MODREGS(mac), 436 { "hma", t6_hma_t6_regs } 437 }; 438 439 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod)); 440} 441#undef T6_MODREGS 442 443static int 444dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) 445{ 446 static struct mod_regs t4vf_mod[] = { 447 { "sge", t4vf_sge_regs }, 448 { "mps", t4vf_mps_regs }, 449 { "pl", t4vf_pl_regs }, 450 { "mbdata", t4vf_mbdata_regs }, 451 { "cim", t4vf_cim_regs }, 452 }; 453 454 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod)); 455} 456 457static int 458dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs) 459{ 460 static struct mod_regs t5vf_mod[] = { 461 { "sge", t5vf_sge_regs }, 462 { "mps", t4vf_mps_regs }, 463 { "pl", t5vf_pl_regs }, 464 { "mbdata", t4vf_mbdata_regs }, 465 { "cim", t4vf_cim_regs }, 466 }; 467 468 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod)); 469} 470 471static int 472dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) 473{ 474 static struct mod_regs t6vf_mod[] = { 475 { "sge", t5vf_sge_regs }, 476 { "mps", t4vf_mps_regs }, 477 { "pl", t6vf_pl_regs }, 478 { "mbdata", t4vf_mbdata_regs }, 479 { "cim", t4vf_cim_regs }, 480 }; 481 482 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod)); 483} 484 485static int 486dump_regs(int argc, const char *argv[]) 487{ 488 int vers, revision, rc; 489 struct t4_regdump regs; 490 uint32_t len; 491 492 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE); 493 regs.data = calloc(1, len); 494 if (regs.data == NULL) { 495 warnc(ENOMEM, "regdump"); 496 return (ENOMEM); 497 } 498 499 regs.len = len; 500 rc = doit(CHELSIO_T4_REGDUMP, ®s); 501 if (rc != 0) 502 return (rc); 503 504 vers = get_card_vers(regs.version); 505 revision = (regs.version >> 10) & 0x3f; 506 507 if (vers == 4) { 508 if (revision == 0x3f) 509 rc = dump_regs_t4vf(argc, argv, regs.data); 510 else 511 rc = dump_regs_t4(argc, argv, regs.data); 512 } else if (vers == 5) { 513 if (revision == 0x3f) 514 rc = dump_regs_t5vf(argc, argv, regs.data); 515 else 516 rc = dump_regs_t5(argc, argv, regs.data); 517 } else if (vers == 6) { 518 if (revision == 0x3f) 519 rc = dump_regs_t6vf(argc, argv, regs.data); 520 else 521 rc = dump_regs_t6(argc, argv, regs.data); 522 } else { 523 warnx("%s (type %d, rev %d) is not a known card.", 524 nexus, vers, revision); 525 return (ENOTSUP); 526 } 527 528 free(regs.data); 529 return (rc); 530} 531 532static void 533do_show_info_header(uint32_t mode) 534{ 535 uint32_t i; 536 537 printf("%4s %8s", "Idx", "Hits"); 538 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 539 switch (mode & i) { 540 case T4_FILTER_FCoE: 541 printf(" FCoE"); 542 break; 543 544 case T4_FILTER_PORT: 545 printf(" Port"); 546 break; 547 548 case T4_FILTER_VNIC: 549 if (mode & T4_FILTER_IC_VNIC) 550 printf(" VFvld:PF:VF"); 551 else 552 printf(" vld:oVLAN"); 553 break; 554 555 case T4_FILTER_VLAN: 556 printf(" vld:VLAN"); 557 break; 558 559 case T4_FILTER_IP_TOS: 560 printf(" TOS"); 561 break; 562 563 case T4_FILTER_IP_PROTO: 564 printf(" Prot"); 565 break; 566 567 case T4_FILTER_ETH_TYPE: 568 printf(" EthType"); 569 break; 570 571 case T4_FILTER_MAC_IDX: 572 printf(" MACIdx"); 573 break; 574 575 case T4_FILTER_MPS_HIT_TYPE: 576 printf(" MPS"); 577 break; 578 579 case T4_FILTER_IP_FRAGMENT: 580 printf(" Frag"); 581 break; 582 583 default: 584 /* compressed filter field not enabled */ 585 break; 586 } 587 } 588 printf(" %20s %20s %9s %9s %s\n", 589 "DIP", "SIP", "DPORT", "SPORT", "Action"); 590} 591 592/* 593 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } 594 * ordered tuple. If the parameter name in the argument sub-vector does not 595 * match the passed in parameter name, then a zero is returned for the 596 * function and no parsing is performed. If there is a match, then the value 597 * and optional mask are parsed and returned in the provided return value 598 * pointers. If no optional mask is specified, then a default mask of all 1s 599 * will be returned. 600 * 601 * An error in parsing the value[:mask] will result in an error message and 602 * program termination. 603 */ 604static int 605parse_val_mask(const char *param, const char *args[], uint32_t *val, 606 uint32_t *mask, int hashfilter) 607{ 608 long l; 609 char *p; 610 611 if (strcmp(param, args[0]) != 0) 612 return (EINVAL); 613 614 p = str_to_number(args[1], &l, NULL); 615 if (l >= 0 && l <= UINT32_MAX) { 616 *val = (uint32_t)l; 617 if (p > args[1]) { 618 if (p[0] == 0) { 619 *mask = ~0; 620 return (0); 621 } 622 623 if (p[0] == ':' && p[1] != 0) { 624 if (hashfilter) { 625 warnx("param %s: mask not allowed for " 626 "hashfilter or nat params", param); 627 return (EINVAL); 628 } 629 p = str_to_number(p + 1, &l, NULL); 630 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) { 631 *mask = (uint32_t)l; 632 return (0); 633 } 634 } 635 } 636 } 637 638 warnx("parameter \"%s\" has bad \"value[:mask]\" %s", 639 args[0], args[1]); 640 641 return (EINVAL); 642} 643 644/* 645 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } 646 * ordered tuple. If the parameter name in the argument sub-vector does not 647 * match the passed in parameter name, then a zero is returned for the 648 * function and no parsing is performed. If there is a match, then the value 649 * and optional mask are parsed and returned in the provided return value 650 * pointers. If no optional mask is specified, then a default mask of all 1s 651 * will be returned. 652 * 653 * The value return parameter "afp" is used to specify the expected address 654 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual 655 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 656 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and 657 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 658 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are 659 * returned in the first four bytes of the address and mask return values with 660 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, 661 * 1, 2, 3}, respectively. 662 * 663 * An error in parsing the value[:mask] will result in an error message and 664 * program termination. 665 */ 666static int 667parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], 668 uint8_t mask[], int maskless) 669{ 670 const char *colon, *afn; 671 char *slash; 672 uint8_t *m; 673 int af, ret; 674 unsigned int masksize; 675 676 /* 677 * Is this our parameter? 678 */ 679 if (strcmp(param, args[0]) != 0) 680 return (EINVAL); 681 682 /* 683 * Fundamental IPv4 versus IPv6 selection. 684 */ 685 colon = strchr(args[1], ':'); 686 if (!colon) { 687 afn = "IPv4"; 688 af = AF_INET; 689 masksize = 32; 690 } else { 691 afn = "IPv6"; 692 af = AF_INET6; 693 masksize = 128; 694 } 695 if (*afp == AF_UNSPEC) 696 *afp = af; 697 else if (*afp != af) { 698 warnx("address %s is not of expected family %s", 699 args[1], *afp == AF_INET ? "IP" : "IPv6"); 700 return (EINVAL); 701 } 702 703 /* 704 * Parse address (temporarily stripping off any "/mask" 705 * specification). 706 */ 707 slash = strchr(args[1], '/'); 708 if (slash) 709 *slash = 0; 710 ret = inet_pton(af, args[1], addr); 711 if (slash) 712 *slash = '/'; 713 if (ret <= 0) { 714 warnx("Cannot parse %s %s address %s", param, afn, args[1]); 715 return (EINVAL); 716 } 717 718 /* 719 * Parse optional mask specification. 720 */ 721 if (slash) { 722 char *p; 723 unsigned int prefix = strtoul(slash + 1, &p, 10); 724 725 if (maskless) { 726 warnx("mask cannot be provided for maskless specification"); 727 return (EINVAL); 728 } 729 730 if (p == slash + 1) { 731 warnx("missing address prefix for %s", param); 732 return (EINVAL); 733 } 734 if (*p) { 735 warnx("%s is not a valid address prefix", slash + 1); 736 return (EINVAL); 737 } 738 if (prefix > masksize) { 739 warnx("prefix %u is too long for an %s address", 740 prefix, afn); 741 return (EINVAL); 742 } 743 memset(mask, 0, masksize / 8); 744 masksize = prefix; 745 } 746 747 if (mask != NULL) { 748 /* 749 * Fill in mask. 750 */ 751 for (m = mask; masksize >= 8; m++, masksize -= 8) 752 *m = ~0; 753 if (masksize) 754 *m = ~0 << (8 - masksize); 755 } 756 757 return (0); 758} 759 760/* 761 * Parse an argument sub-vector as a { <parameter name> <value> } ordered 762 * tuple. If the parameter name in the argument sub-vector does not match the 763 * passed in parameter name, then a zero is returned for the function and no 764 * parsing is performed. If there is a match, then the value is parsed and 765 * returned in the provided return value pointer. 766 */ 767static int 768parse_val(const char *param, const char *args[], uint32_t *val) 769{ 770 char *p; 771 long l; 772 773 if (strcmp(param, args[0]) != 0) 774 return (EINVAL); 775 776 p = str_to_number(args[1], &l, NULL); 777 if (*p || l < 0 || l > UINT32_MAX) { 778 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); 779 return (EINVAL); 780 } 781 782 *val = (uint32_t)l; 783 return (0); 784} 785 786static void 787filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) 788{ 789 int noctets, octet; 790 791 printf(" "); 792 if (type == 0) { 793 noctets = 4; 794 printf("%3s", " "); 795 } else 796 noctets = 16; 797 798 for (octet = 0; octet < noctets; octet++) 799 printf("%02x", addr[octet]); 800 printf("/"); 801 for (octet = 0; octet < noctets; octet++) 802 printf("%02x", addrm[octet]); 803} 804 805static void 806do_show_one_filter_info(struct t4_filter *t, uint32_t mode) 807{ 808 uint32_t i; 809 810 printf("%4d", t->idx); 811 if (t->hits == UINT64_MAX) 812 printf(" %8s", "-"); 813 else 814 printf(" %8ju", t->hits); 815 816 /* 817 * Compressed header portion of filter. 818 */ 819 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 820 switch (mode & i) { 821 case T4_FILTER_FCoE: 822 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); 823 break; 824 825 case T4_FILTER_PORT: 826 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); 827 break; 828 829 case T4_FILTER_VNIC: 830 if (mode & T4_FILTER_IC_VNIC) { 831 printf(" %1d:%1x:%02x/%1d:%1x:%02x", 832 t->fs.val.pfvf_vld, 833 (t->fs.val.vnic >> 13) & 0x7, 834 t->fs.val.vnic & 0x1fff, 835 t->fs.mask.pfvf_vld, 836 (t->fs.mask.vnic >> 13) & 0x7, 837 t->fs.mask.vnic & 0x1fff); 838 } else { 839 printf(" %1d:%04x/%1d:%04x", 840 t->fs.val.ovlan_vld, t->fs.val.vnic, 841 t->fs.mask.ovlan_vld, t->fs.mask.vnic); 842 } 843 break; 844 845 case T4_FILTER_VLAN: 846 printf(" %1d:%04x/%1d:%04x", 847 t->fs.val.vlan_vld, t->fs.val.vlan, 848 t->fs.mask.vlan_vld, t->fs.mask.vlan); 849 break; 850 851 case T4_FILTER_IP_TOS: 852 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); 853 break; 854 855 case T4_FILTER_IP_PROTO: 856 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); 857 break; 858 859 case T4_FILTER_ETH_TYPE: 860 printf(" %04x/%04x", t->fs.val.ethtype, 861 t->fs.mask.ethtype); 862 break; 863 864 case T4_FILTER_MAC_IDX: 865 printf(" %03x/%03x", t->fs.val.macidx, 866 t->fs.mask.macidx); 867 break; 868 869 case T4_FILTER_MPS_HIT_TYPE: 870 printf(" %1x/%1x", t->fs.val.matchtype, 871 t->fs.mask.matchtype); 872 break; 873 874 case T4_FILTER_IP_FRAGMENT: 875 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); 876 break; 877 878 default: 879 /* compressed filter field not enabled */ 880 break; 881 } 882 } 883 884 /* 885 * Fixed portion of filter. 886 */ 887 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); 888 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); 889 printf(" %04x/%04x %04x/%04x", 890 t->fs.val.dport, t->fs.mask.dport, 891 t->fs.val.sport, t->fs.mask.sport); 892 893 /* 894 * Variable length filter action. 895 */ 896 if (t->fs.action == FILTER_DROP) 897 printf(" Drop"); 898 else if (t->fs.action == FILTER_SWITCH) { 899 printf(" Switch: port=%d", t->fs.eport); 900 if (t->fs.newdmac) 901 printf( 902 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " 903 ", l2tidx=%d", 904 t->fs.dmac[0], t->fs.dmac[1], 905 t->fs.dmac[2], t->fs.dmac[3], 906 t->fs.dmac[4], t->fs.dmac[5], 907 t->l2tidx); 908 if (t->fs.newsmac) 909 printf( 910 ", smac=%02x:%02x:%02x:%02x:%02x:%02x " 911 ", smtidx=%d", 912 t->fs.smac[0], t->fs.smac[1], 913 t->fs.smac[2], t->fs.smac[3], 914 t->fs.smac[4], t->fs.smac[5], 915 t->smtidx); 916 if (t->fs.newvlan == VLAN_REMOVE) 917 printf(", vlan=none"); 918 else if (t->fs.newvlan == VLAN_INSERT) 919 printf(", vlan=insert(%x)", t->fs.vlan); 920 else if (t->fs.newvlan == VLAN_REWRITE) 921 printf(", vlan=rewrite(%x)", t->fs.vlan); 922 } else { 923 printf(" Pass: Q="); 924 if (t->fs.dirsteer == 0) { 925 printf("RSS"); 926 if (t->fs.maskhash) 927 printf("(region %d)", t->fs.iq << 1); 928 } else { 929 printf("%d", t->fs.iq); 930 if (t->fs.dirsteerhash == 0) 931 printf("(QID)"); 932 else 933 printf("(hash)"); 934 } 935 } 936 if (chip_id <= 5 && t->fs.prio) 937 printf(" Prio"); 938 if (t->fs.rpttid) 939 printf(" RptTID"); 940 printf("\n"); 941} 942 943static int 944show_filters(int hash) 945{ 946 uint32_t mode = 0, header, hpfilter = 0; 947 struct t4_filter t; 948 int rc; 949 950 /* Get the global filter mode first */ 951 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 952 if (rc != 0) 953 return (rc); 954 955 if (!hash && chip_id >= 6) { 956 header = 0; 957 bzero(&t, sizeof (t)); 958 t.idx = 0; 959 t.fs.hash = 0; 960 t.fs.prio = 1; 961 for (t.idx = 0; ; t.idx++) { 962 rc = doit(CHELSIO_T4_GET_FILTER, &t); 963 if (rc != 0 || t.idx == 0xffffffff) 964 break; 965 966 if (!header) { 967 printf("High Priority TCAM Region:\n"); 968 do_show_info_header(mode); 969 header = 1; 970 hpfilter = 1; 971 } 972 do_show_one_filter_info(&t, mode); 973 } 974 } 975 976 header = 0; 977 bzero(&t, sizeof (t)); 978 t.idx = 0; 979 t.fs.hash = hash; 980 for (t.idx = 0; ; t.idx++) { 981 rc = doit(CHELSIO_T4_GET_FILTER, &t); 982 if (rc != 0 || t.idx == 0xffffffff) 983 break; 984 985 if (!header) { 986 if (hpfilter) 987 printf("\nNormal Priority TCAM Region:\n"); 988 do_show_info_header(mode); 989 header = 1; 990 } 991 do_show_one_filter_info(&t, mode); 992 } 993 994 return (rc); 995} 996 997static int 998get_filter_mode(int hashfilter) 999{ 1000 uint32_t mode = hashfilter; 1001 int rc; 1002 1003 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 1004 if (rc != 0) 1005 return (rc); 1006 1007 if (mode & T4_FILTER_IPv4) 1008 printf("ipv4 "); 1009 1010 if (mode & T4_FILTER_IPv6) 1011 printf("ipv6 "); 1012 1013 if (mode & T4_FILTER_IP_SADDR) 1014 printf("sip "); 1015 1016 if (mode & T4_FILTER_IP_DADDR) 1017 printf("dip "); 1018 1019 if (mode & T4_FILTER_IP_SPORT) 1020 printf("sport "); 1021 1022 if (mode & T4_FILTER_IP_DPORT) 1023 printf("dport "); 1024 1025 if (mode & T4_FILTER_IP_FRAGMENT) 1026 printf("frag "); 1027 1028 if (mode & T4_FILTER_MPS_HIT_TYPE) 1029 printf("matchtype "); 1030 1031 if (mode & T4_FILTER_MAC_IDX) 1032 printf("macidx "); 1033 1034 if (mode & T4_FILTER_ETH_TYPE) 1035 printf("ethtype "); 1036 1037 if (mode & T4_FILTER_IP_PROTO) 1038 printf("proto "); 1039 1040 if (mode & T4_FILTER_IP_TOS) 1041 printf("tos "); 1042 1043 if (mode & T4_FILTER_VLAN) 1044 printf("vlan "); 1045 1046 if (mode & T4_FILTER_VNIC) { 1047 if (mode & T4_FILTER_IC_VNIC) 1048 printf("vnic_id "); 1049 else if (mode & T4_FILTER_IC_ENCAP) 1050 printf("encap "); 1051 else 1052 printf("ovlan "); 1053 } 1054 1055 if (mode & T4_FILTER_PORT) 1056 printf("iport "); 1057 1058 if (mode & T4_FILTER_FCoE) 1059 printf("fcoe "); 1060 1061 printf("\n"); 1062 1063 return (0); 1064} 1065 1066static int 1067set_filter_mode(int argc, const char *argv[], int hashfilter) 1068{ 1069 uint32_t mode = 0; 1070 int vnic = 0, ovlan = 0, invalid = 0; 1071 1072 for (; argc; argc--, argv++) { 1073 if (!strcmp(argv[0], "ipv4") || !strcmp(argv[0], "ipv6") || 1074 !strcmp(argv[0], "sip") || !strcmp(argv[0], "dip") || 1075 !strcmp(argv[0], "sport") || !strcmp(argv[0], "dport")) { 1076 /* These are always available and enabled. */ 1077 continue; 1078 } else if (!strcmp(argv[0], "frag")) 1079 mode |= T4_FILTER_IP_FRAGMENT; 1080 else if (!strcmp(argv[0], "matchtype")) 1081 mode |= T4_FILTER_MPS_HIT_TYPE; 1082 else if (!strcmp(argv[0], "macidx")) 1083 mode |= T4_FILTER_MAC_IDX; 1084 else if (!strcmp(argv[0], "ethtype")) 1085 mode |= T4_FILTER_ETH_TYPE; 1086 else if (!strcmp(argv[0], "proto")) 1087 mode |= T4_FILTER_IP_PROTO; 1088 else if (!strcmp(argv[0], "tos")) 1089 mode |= T4_FILTER_IP_TOS; 1090 else if (!strcmp(argv[0], "vlan")) 1091 mode |= T4_FILTER_VLAN; 1092 else if (!strcmp(argv[0], "ovlan")) { 1093 mode |= T4_FILTER_VNIC; 1094 ovlan = 1; 1095 } else if (!strcmp(argv[0], "vnic_id")) { 1096 mode |= T4_FILTER_VNIC; 1097 mode |= T4_FILTER_IC_VNIC; 1098 vnic = 1; 1099 } 1100#ifdef notyet 1101 else if (!strcmp(argv[0], "encap")) { 1102 mode |= T4_FILTER_VNIC; 1103 mode |= T4_FILTER_IC_ENCAP; 1104 encap = 1; 1105 } 1106#endif 1107 else if (!strcmp(argv[0], "iport")) 1108 mode |= T4_FILTER_PORT; 1109 else if (!strcmp(argv[0], "fcoe")) 1110 mode |= T4_FILTER_FCoE; 1111 else { 1112 warnx("\"%s\" is not valid while setting filter mode.", 1113 argv[0]); 1114 invalid++; 1115 } 1116 } 1117 1118 if (vnic + ovlan > 1) { 1119 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive."); 1120 invalid++; 1121 } 1122 1123 if (invalid > 0) 1124 return (EINVAL); 1125 1126 if (hashfilter) 1127 return doit(CHELSIO_T4_SET_FILTER_MASK, &mode); 1128 else 1129 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); 1130} 1131 1132static int 1133del_filter(uint32_t idx, int prio, int hashfilter) 1134{ 1135 struct t4_filter t; 1136 1137 t.fs.prio = prio; 1138 t.fs.hash = hashfilter; 1139 t.idx = idx; 1140 1141 return doit(CHELSIO_T4_DEL_FILTER, &t); 1142} 1143 1144#define MAX_VLANID (4095) 1145 1146static int 1147set_filter(uint32_t idx, int argc, const char *argv[], int hash) 1148{ 1149 int rc, af = AF_UNSPEC, start_arg = 0; 1150 struct t4_filter t; 1151 1152 if (argc < 2) { 1153 warnc(EINVAL, "%s", __func__); 1154 return (EINVAL); 1155 }; 1156 bzero(&t, sizeof (t)); 1157 t.idx = idx; 1158 t.fs.hitcnts = 1; 1159 t.fs.hash = hash; 1160 1161 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { 1162 const char **args = &argv[start_arg]; 1163 uint32_t val, mask; 1164 1165 if (!strcmp(argv[start_arg], "type")) { 1166 int newaf; 1167 if (!strcasecmp(argv[start_arg + 1], "ipv4")) 1168 newaf = AF_INET; 1169 else if (!strcasecmp(argv[start_arg + 1], "ipv6")) 1170 newaf = AF_INET6; 1171 else { 1172 warnx("invalid type \"%s\"; " 1173 "must be one of \"ipv4\" or \"ipv6\"", 1174 argv[start_arg + 1]); 1175 return (EINVAL); 1176 } 1177 1178 if (af != AF_UNSPEC && af != newaf) { 1179 warnx("conflicting IPv4/IPv6 specifications."); 1180 return (EINVAL); 1181 } 1182 af = newaf; 1183 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) { 1184 t.fs.val.fcoe = val; 1185 t.fs.mask.fcoe = mask; 1186 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) { 1187 t.fs.val.iport = val; 1188 t.fs.mask.iport = mask; 1189 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) { 1190 t.fs.val.vnic = val; 1191 t.fs.mask.vnic = mask; 1192 t.fs.val.ovlan_vld = 1; 1193 t.fs.mask.ovlan_vld = 1; 1194 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) { 1195 t.fs.val.vlan = val; 1196 t.fs.mask.vlan = mask; 1197 t.fs.val.vlan_vld = 1; 1198 t.fs.mask.vlan_vld = 1; 1199 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) { 1200 t.fs.val.vnic &= 0x1fff; 1201 t.fs.val.vnic |= (val & 0x7) << 13; 1202 t.fs.mask.vnic &= 0x1fff; 1203 t.fs.mask.vnic |= (mask & 0x7) << 13; 1204 t.fs.val.pfvf_vld = 1; 1205 t.fs.mask.pfvf_vld = 1; 1206 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) { 1207 t.fs.val.vnic &= 0xe000; 1208 t.fs.val.vnic |= val & 0x1fff; 1209 t.fs.mask.vnic &= 0xe000; 1210 t.fs.mask.vnic |= mask & 0x1fff; 1211 t.fs.val.pfvf_vld = 1; 1212 t.fs.mask.pfvf_vld = 1; 1213 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) { 1214 t.fs.val.tos = val; 1215 t.fs.mask.tos = mask; 1216 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) { 1217 t.fs.val.proto = val; 1218 t.fs.mask.proto = mask; 1219 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) { 1220 t.fs.val.ethtype = val; 1221 t.fs.mask.ethtype = mask; 1222 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) { 1223 t.fs.val.macidx = val; 1224 t.fs.mask.macidx = mask; 1225 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) { 1226 t.fs.val.matchtype = val; 1227 t.fs.mask.matchtype = mask; 1228 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) { 1229 t.fs.val.frag = val; 1230 t.fs.mask.frag = mask; 1231 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) { 1232 t.fs.val.dport = val; 1233 t.fs.mask.dport = mask; 1234 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) { 1235 t.fs.val.sport = val; 1236 t.fs.mask.sport = mask; 1237 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, 1238 t.fs.mask.dip, hash)) { 1239 /* nada */; 1240 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, 1241 t.fs.mask.sip, hash)) { 1242 /* nada */; 1243 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) { 1244 /*nada*/; 1245 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) { 1246 /*nada*/ 1247 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) { 1248 t.fs.nat_dport = val; 1249 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) { 1250 t.fs.nat_sport = val; 1251 } else if (!strcmp(argv[start_arg], "action")) { 1252 if (!strcmp(argv[start_arg + 1], "pass")) 1253 t.fs.action = FILTER_PASS; 1254 else if (!strcmp(argv[start_arg + 1], "drop")) 1255 t.fs.action = FILTER_DROP; 1256 else if (!strcmp(argv[start_arg + 1], "switch")) 1257 t.fs.action = FILTER_SWITCH; 1258 else { 1259 warnx("invalid action \"%s\"; must be one of" 1260 " \"pass\", \"drop\" or \"switch\"", 1261 argv[start_arg + 1]); 1262 return (EINVAL); 1263 } 1264 } else if (!parse_val("hitcnts", args, &val)) { 1265 t.fs.hitcnts = val; 1266 } else if (!parse_val("prio", args, &val)) { 1267 if (hash) { 1268 warnx("Hashfilters doesn't support \"prio\"\n"); 1269 return (EINVAL); 1270 } 1271 if (val != 0 && val != 1) { 1272 warnx("invalid priority \"%s\"; must be" 1273 " \"0\" or \"1\"", argv[start_arg + 1]); 1274 return (EINVAL); 1275 } 1276 t.fs.prio = val; 1277 } else if (!parse_val("rpttid", args, &val)) { 1278 t.fs.rpttid = 1; 1279 } else if (!parse_val("queue", args, &val)) { 1280 t.fs.dirsteer = 1; /* direct steer */ 1281 t.fs.iq = val; /* to the iq with this cntxt_id */ 1282 } else if (!parse_val("tcbhash", args, &val)) { 1283 t.fs.dirsteerhash = 1; /* direct steer */ 1284 /* XXX: use (val << 1) as the rss_hash? */ 1285 t.fs.iq = val; 1286 } else if (!parse_val("tcbrss", args, &val)) { 1287 t.fs.maskhash = 1; /* steer to RSS region */ 1288 /* 1289 * val = start idx of the region but the internal TCB 1290 * field is 10b only and is left shifted by 1 before use. 1291 */ 1292 t.fs.iq = val >> 1; 1293 } else if (!parse_val("eport", args, &val)) { 1294 t.fs.eport = val; 1295 } else if (!parse_val("swapmac", args, &val)) { 1296 t.fs.swapmac = 1; 1297 } else if (!strcmp(argv[start_arg], "nat")) { 1298 if (!strcmp(argv[start_arg + 1], "dip")) 1299 t.fs.nat_mode = NAT_MODE_DIP; 1300 else if (!strcmp(argv[start_arg + 1], "dip-dp")) 1301 t.fs.nat_mode = NAT_MODE_DIP_DP; 1302 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip")) 1303 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP; 1304 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp")) 1305 t.fs.nat_mode = NAT_MODE_DIP_DP_SP; 1306 else if (!strcmp(argv[start_arg + 1], "sip-sp")) 1307 t.fs.nat_mode = NAT_MODE_SIP_SP; 1308 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp")) 1309 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP; 1310 else if (!strcmp(argv[start_arg + 1], "all")) 1311 t.fs.nat_mode = NAT_MODE_ALL; 1312 else { 1313 warnx("unknown nat type \"%s\"; known types are dip, " 1314 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, " 1315 "dip-sip-sp, and all", argv[start_arg + 1]); 1316 return (EINVAL); 1317 } 1318 } else if (!parse_val("natseq", args, &val)) { 1319 t.fs.nat_seq_chk = val; 1320 } else if (!parse_val("natflag", args, &val)) { 1321 t.fs.nat_flag_chk = 1; 1322 } else if (!strcmp(argv[start_arg], "dmac")) { 1323 struct ether_addr *daddr; 1324 1325 daddr = ether_aton(argv[start_arg + 1]); 1326 if (daddr == NULL) { 1327 warnx("invalid dmac address \"%s\"", 1328 argv[start_arg + 1]); 1329 return (EINVAL); 1330 } 1331 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); 1332 t.fs.newdmac = 1; 1333 } else if (!strcmp(argv[start_arg], "smac")) { 1334 struct ether_addr *saddr; 1335 1336 saddr = ether_aton(argv[start_arg + 1]); 1337 if (saddr == NULL) { 1338 warnx("invalid smac address \"%s\"", 1339 argv[start_arg + 1]); 1340 return (EINVAL); 1341 } 1342 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); 1343 t.fs.newsmac = 1; 1344 } else if (!strcmp(argv[start_arg], "vlan")) { 1345 char *p; 1346 if (!strcmp(argv[start_arg + 1], "none")) { 1347 t.fs.newvlan = VLAN_REMOVE; 1348 } else if (argv[start_arg + 1][0] == '=') { 1349 t.fs.newvlan = VLAN_REWRITE; 1350 } else if (argv[start_arg + 1][0] == '+') { 1351 t.fs.newvlan = VLAN_INSERT; 1352 } else { 1353 warnx("unknown vlan parameter \"%s\"; must" 1354 " be one of \"none\", \"=<vlan>\", " 1355 " \"+<vlan>\"", argv[start_arg + 1]); 1356 return (EINVAL); 1357 } 1358 if (t.fs.newvlan == VLAN_REWRITE || 1359 t.fs.newvlan == VLAN_INSERT) { 1360 t.fs.vlan = strtoul(argv[start_arg + 1] + 1, 1361 &p, 0); 1362 if (p == argv[start_arg + 1] + 1 || p[0] != 0 || 1363 t.fs.vlan > MAX_VLANID) { 1364 warnx("invalid vlan \"%s\"", 1365 argv[start_arg + 1]); 1366 return (EINVAL); 1367 } 1368 } 1369 } else { 1370 warnx("invalid parameter \"%s\"", argv[start_arg]); 1371 return (EINVAL); 1372 } 1373 } 1374 if (start_arg != argc) { 1375 warnx("no value for \"%s\"", argv[start_arg]); 1376 return (EINVAL); 1377 } 1378 1379 /* 1380 * Check basic sanity of option combinations. 1381 */ 1382 if (t.fs.action != FILTER_SWITCH && 1383 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan || 1384 t.fs.swapmac || t.fs.nat_mode)) { 1385 warnx("port, dmac, smac, vlan, and nat only make sense with" 1386 " \"action switch\""); 1387 return (EINVAL); 1388 } 1389 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk || 1390 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) { 1391 warnx("nat params only make sense with valid nat mode"); 1392 return (EINVAL); 1393 } 1394 if (t.fs.action != FILTER_PASS && 1395 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { 1396 warnx("rpttid, queue and tcbhash don't make sense with" 1397 " action \"drop\" or \"switch\""); 1398 return (EINVAL); 1399 } 1400 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) { 1401 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive"); 1402 return (EINVAL); 1403 } 1404 1405 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ 1406 rc = doit(CHELSIO_T4_SET_FILTER, &t); 1407 if (hash && rc == 0) 1408 printf("%d\n", t.idx); 1409 return (rc); 1410} 1411 1412static int 1413filter_cmd(int argc, const char *argv[], int hashfilter) 1414{ 1415 long long val; 1416 uint32_t idx; 1417 char *s; 1418 1419 if (argc == 0) { 1420 warnx("%sfilter: no arguments.", hashfilter ? "hash" : ""); 1421 return (EINVAL); 1422 }; 1423 1424 /* list */ 1425 if (strcmp(argv[0], "list") == 0) { 1426 if (argc != 1) 1427 warnx("trailing arguments after \"list\" ignored."); 1428 1429 return show_filters(hashfilter); 1430 } 1431 1432 /* mode */ 1433 if (argc == 1 && strcmp(argv[0], "mode") == 0) 1434 return get_filter_mode(hashfilter); 1435 1436 /* mode <mode> */ 1437 if (strcmp(argv[0], "mode") == 0) 1438 return set_filter_mode(argc - 1, argv + 1, hashfilter); 1439 1440 /* <idx> ... */ 1441 s = str_to_number(argv[0], NULL, &val); 1442 if (*s || val < 0 || val > 0xffffffffU) { 1443 if (hashfilter) { 1444 /* 1445 * No numeric index means this must be a request to 1446 * create a new hashfilter and we are already at the 1447 * paramter/value list. 1448 */ 1449 idx = (uint32_t) -1; 1450 goto setf; 1451 } 1452 warnx("\"%s\" is neither an index nor a filter subcommand.", 1453 argv[0]); 1454 return (EINVAL); 1455 } 1456 idx = (uint32_t) val; 1457 1458 /* <idx> delete|clear [prio 0|1] */ 1459 if ((argc == 2 || argc == 4) && 1460 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { 1461 int prio = 0; 1462 1463 if (argc == 4) { 1464 if (hashfilter) { 1465 warnx("stray arguments after \"%s\".", argv[1]); 1466 return (EINVAL); 1467 } 1468 1469 if (strcmp(argv[2], "prio") != 0) { 1470 warnx("\"prio\" is the only valid keyword " 1471 "after \"%s\", found \"%s\" instead.", 1472 argv[1], argv[2]); 1473 return (EINVAL); 1474 } 1475 1476 s = str_to_number(argv[3], NULL, &val); 1477 if (*s || val < 0 || val > 1) { 1478 warnx("%s \"%s\"; must be \"0\" or \"1\".", 1479 argv[2], argv[3]); 1480 return (EINVAL); 1481 } 1482 prio = (int)val; 1483 } 1484 return del_filter(idx, prio, hashfilter); 1485 } 1486 1487 /* skip <idx> */ 1488 argc--; 1489 argv++; 1490 1491setf: 1492 /* [<param> <val>] ... */ 1493 return set_filter(idx, argc, argv, hashfilter); 1494} 1495 1496/* 1497 * Shows the fields of a multi-word structure. The structure is considered to 1498 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) 1499 * whose fields are described by @fd. The 32-bit words are given in @words 1500 * starting with the least significant 32-bit word. 1501 */ 1502static void 1503show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) 1504{ 1505 unsigned int w = 0; 1506 const struct field_desc *p; 1507 1508 for (p = fd; p->name; p++) 1509 w = max(w, strlen(p->name)); 1510 1511 while (fd->name) { 1512 unsigned long long data; 1513 int first_word = fd->start / 32; 1514 int shift = fd->start % 32; 1515 int width = fd->end - fd->start + 1; 1516 unsigned long long mask = (1ULL << width) - 1; 1517 1518 data = (words[first_word] >> shift) | 1519 ((uint64_t)words[first_word + 1] << (32 - shift)); 1520 if (shift) 1521 data |= ((uint64_t)words[first_word + 2] << (64 - shift)); 1522 data &= mask; 1523 if (fd->islog2) 1524 data = 1 << data; 1525 printf("%-*s ", w, fd->name); 1526 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); 1527 fd++; 1528 } 1529} 1530 1531#define FIELD(name, start, end) { name, start, end, 0, 0, 0 } 1532#define FIELD1(name, start) FIELD(name, start, start) 1533 1534static void 1535show_t5t6_ctxt(const struct t4_sge_context *p, int vers) 1536{ 1537 static struct field_desc egress_t5[] = { 1538 FIELD("DCA_ST:", 181, 191), 1539 FIELD1("StatusPgNS:", 180), 1540 FIELD1("StatusPgRO:", 179), 1541 FIELD1("FetchNS:", 178), 1542 FIELD1("FetchRO:", 177), 1543 FIELD1("Valid:", 176), 1544 FIELD("PCIeDataChannel:", 174, 175), 1545 FIELD1("StatusPgTPHintEn:", 173), 1546 FIELD("StatusPgTPHint:", 171, 172), 1547 FIELD1("FetchTPHintEn:", 170), 1548 FIELD("FetchTPHint:", 168, 169), 1549 FIELD1("FCThreshOverride:", 167), 1550 { "WRLength:", 162, 166, 9, 0, 1 }, 1551 FIELD1("WRLengthKnown:", 161), 1552 FIELD1("ReschedulePending:", 160), 1553 FIELD1("OnChipQueue:", 159), 1554 FIELD1("FetchSizeMode:", 158), 1555 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1556 FIELD1("FLMPacking:", 155), 1557 FIELD("FetchBurstMax:", 153, 154), 1558 FIELD("uPToken:", 133, 152), 1559 FIELD1("uPTokenEn:", 132), 1560 FIELD1("UserModeIO:", 131), 1561 FIELD("uPFLCredits:", 123, 130), 1562 FIELD1("uPFLCreditEn:", 122), 1563 FIELD("FID:", 111, 121), 1564 FIELD("HostFCMode:", 109, 110), 1565 FIELD1("HostFCOwner:", 108), 1566 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1567 FIELD("CIDX:", 89, 104), 1568 FIELD("PIDX:", 73, 88), 1569 { "BaseAddress:", 18, 72, 9, 1 }, 1570 FIELD("QueueSize:", 2, 17), 1571 FIELD1("QueueType:", 1), 1572 FIELD1("CachePriority:", 0), 1573 { NULL } 1574 }; 1575 static struct field_desc egress_t6[] = { 1576 FIELD("DCA_ST:", 181, 191), 1577 FIELD1("StatusPgNS:", 180), 1578 FIELD1("StatusPgRO:", 179), 1579 FIELD1("FetchNS:", 178), 1580 FIELD1("FetchRO:", 177), 1581 FIELD1("Valid:", 176), 1582 FIELD1("ReschedulePending_1:", 175), 1583 FIELD1("PCIeDataChannel:", 174), 1584 FIELD1("StatusPgTPHintEn:", 173), 1585 FIELD("StatusPgTPHint:", 171, 172), 1586 FIELD1("FetchTPHintEn:", 170), 1587 FIELD("FetchTPHint:", 168, 169), 1588 FIELD1("FCThreshOverride:", 167), 1589 { "WRLength:", 162, 166, 9, 0, 1 }, 1590 FIELD1("WRLengthKnown:", 161), 1591 FIELD1("ReschedulePending:", 160), 1592 FIELD("TimerIx:", 157, 159), 1593 FIELD1("FetchBurstMin:", 156), 1594 FIELD1("FLMPacking:", 155), 1595 FIELD("FetchBurstMax:", 153, 154), 1596 FIELD("uPToken:", 133, 152), 1597 FIELD1("uPTokenEn:", 132), 1598 FIELD1("UserModeIO:", 131), 1599 FIELD("uPFLCredits:", 123, 130), 1600 FIELD1("uPFLCreditEn:", 122), 1601 FIELD("FID:", 111, 121), 1602 FIELD("HostFCMode:", 109, 110), 1603 FIELD1("HostFCOwner:", 108), 1604 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1605 FIELD("CIDX:", 89, 104), 1606 FIELD("PIDX:", 73, 88), 1607 { "BaseAddress:", 18, 72, 9, 1 }, 1608 FIELD("QueueSize:", 2, 17), 1609 FIELD1("QueueType:", 1), 1610 FIELD1("FetchSizeMode:", 0), 1611 { NULL } 1612 }; 1613 static struct field_desc fl_t5[] = { 1614 FIELD("DCA_ST:", 181, 191), 1615 FIELD1("StatusPgNS:", 180), 1616 FIELD1("StatusPgRO:", 179), 1617 FIELD1("FetchNS:", 178), 1618 FIELD1("FetchRO:", 177), 1619 FIELD1("Valid:", 176), 1620 FIELD("PCIeDataChannel:", 174, 175), 1621 FIELD1("StatusPgTPHintEn:", 173), 1622 FIELD("StatusPgTPHint:", 171, 172), 1623 FIELD1("FetchTPHintEn:", 170), 1624 FIELD("FetchTPHint:", 168, 169), 1625 FIELD1("FCThreshOverride:", 167), 1626 FIELD1("ReschedulePending:", 160), 1627 FIELD1("OnChipQueue:", 159), 1628 FIELD1("FetchSizeMode:", 158), 1629 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1630 FIELD1("FLMPacking:", 155), 1631 FIELD("FetchBurstMax:", 153, 154), 1632 FIELD1("FLMcongMode:", 152), 1633 FIELD("MaxuPFLCredits:", 144, 151), 1634 FIELD("FLMcontextID:", 133, 143), 1635 FIELD1("uPTokenEn:", 132), 1636 FIELD1("UserModeIO:", 131), 1637 FIELD("uPFLCredits:", 123, 130), 1638 FIELD1("uPFLCreditEn:", 122), 1639 FIELD("FID:", 111, 121), 1640 FIELD("HostFCMode:", 109, 110), 1641 FIELD1("HostFCOwner:", 108), 1642 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1643 FIELD("CIDX:", 89, 104), 1644 FIELD("PIDX:", 73, 88), 1645 { "BaseAddress:", 18, 72, 9, 1 }, 1646 FIELD("QueueSize:", 2, 17), 1647 FIELD1("QueueType:", 1), 1648 FIELD1("CachePriority:", 0), 1649 { NULL } 1650 }; 1651 static struct field_desc ingress_t5[] = { 1652 FIELD("DCA_ST:", 143, 153), 1653 FIELD1("ISCSICoalescing:", 142), 1654 FIELD1("Queue_Valid:", 141), 1655 FIELD1("TimerPending:", 140), 1656 FIELD1("DropRSS:", 139), 1657 FIELD("PCIeChannel:", 137, 138), 1658 FIELD1("SEInterruptArmed:", 136), 1659 FIELD1("CongestionMgtEnable:", 135), 1660 FIELD1("NoSnoop:", 134), 1661 FIELD1("RelaxedOrdering:", 133), 1662 FIELD1("GTSmode:", 132), 1663 FIELD1("TPHintEn:", 131), 1664 FIELD("TPHint:", 129, 130), 1665 FIELD1("UpdateScheduling:", 128), 1666 FIELD("UpdateDelivery:", 126, 127), 1667 FIELD1("InterruptSent:", 125), 1668 FIELD("InterruptIDX:", 114, 124), 1669 FIELD1("InterruptDestination:", 113), 1670 FIELD1("InterruptArmed:", 112), 1671 FIELD("RxIntCounter:", 106, 111), 1672 FIELD("RxIntCounterThreshold:", 104, 105), 1673 FIELD1("Generation:", 103), 1674 { "BaseAddress:", 48, 102, 9, 1 }, 1675 FIELD("PIDX:", 32, 47), 1676 FIELD("CIDX:", 16, 31), 1677 { "QueueSize:", 4, 15, 4, 0 }, 1678 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1679 FIELD1("QueueEntryOverride:", 1), 1680 FIELD1("CachePriority:", 0), 1681 { NULL } 1682 }; 1683 static struct field_desc ingress_t6[] = { 1684 FIELD1("SP_NS:", 158), 1685 FIELD1("SP_RO:", 157), 1686 FIELD1("SP_TPHintEn:", 156), 1687 FIELD("SP_TPHint:", 154, 155), 1688 FIELD("DCA_ST:", 143, 153), 1689 FIELD1("ISCSICoalescing:", 142), 1690 FIELD1("Queue_Valid:", 141), 1691 FIELD1("TimerPending:", 140), 1692 FIELD1("DropRSS:", 139), 1693 FIELD("PCIeChannel:", 137, 138), 1694 FIELD1("SEInterruptArmed:", 136), 1695 FIELD1("CongestionMgtEnable:", 135), 1696 FIELD1("NoSnoop:", 134), 1697 FIELD1("RelaxedOrdering:", 133), 1698 FIELD1("GTSmode:", 132), 1699 FIELD1("TPHintEn:", 131), 1700 FIELD("TPHint:", 129, 130), 1701 FIELD1("UpdateScheduling:", 128), 1702 FIELD("UpdateDelivery:", 126, 127), 1703 FIELD1("InterruptSent:", 125), 1704 FIELD("InterruptIDX:", 114, 124), 1705 FIELD1("InterruptDestination:", 113), 1706 FIELD1("InterruptArmed:", 112), 1707 FIELD("RxIntCounter:", 106, 111), 1708 FIELD("RxIntCounterThreshold:", 104, 105), 1709 FIELD1("Generation:", 103), 1710 { "BaseAddress:", 48, 102, 9, 1 }, 1711 FIELD("PIDX:", 32, 47), 1712 FIELD("CIDX:", 16, 31), 1713 { "QueueSize:", 4, 15, 4, 0 }, 1714 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1715 FIELD1("QueueEntryOverride:", 1), 1716 FIELD1("CachePriority:", 0), 1717 { NULL } 1718 }; 1719 static struct field_desc flm_t5[] = { 1720 FIELD1("Valid:", 89), 1721 FIELD("SplitLenMode:", 87, 88), 1722 FIELD1("TPHintEn:", 86), 1723 FIELD("TPHint:", 84, 85), 1724 FIELD1("NoSnoop:", 83), 1725 FIELD1("RelaxedOrdering:", 82), 1726 FIELD("DCA_ST:", 71, 81), 1727 FIELD("EQid:", 54, 70), 1728 FIELD("SplitEn:", 52, 53), 1729 FIELD1("PadEn:", 51), 1730 FIELD1("PackEn:", 50), 1731 FIELD1("Cache_Lock :", 49), 1732 FIELD1("CongDrop:", 48), 1733 FIELD("PackOffset:", 16, 47), 1734 FIELD("CIDX:", 8, 15), 1735 FIELD("PIDX:", 0, 7), 1736 { NULL } 1737 }; 1738 static struct field_desc flm_t6[] = { 1739 FIELD1("Valid:", 89), 1740 FIELD("SplitLenMode:", 87, 88), 1741 FIELD1("TPHintEn:", 86), 1742 FIELD("TPHint:", 84, 85), 1743 FIELD1("NoSnoop:", 83), 1744 FIELD1("RelaxedOrdering:", 82), 1745 FIELD("DCA_ST:", 71, 81), 1746 FIELD("EQid:", 54, 70), 1747 FIELD("SplitEn:", 52, 53), 1748 FIELD1("PadEn:", 51), 1749 FIELD1("PackEn:", 50), 1750 FIELD1("Cache_Lock :", 49), 1751 FIELD1("CongDrop:", 48), 1752 FIELD1("Inflight:", 47), 1753 FIELD1("CongEn:", 46), 1754 FIELD1("CongMode:", 45), 1755 FIELD("PackOffset:", 20, 39), 1756 FIELD("CIDX:", 8, 15), 1757 FIELD("PIDX:", 0, 7), 1758 { NULL } 1759 }; 1760 static struct field_desc conm_t5[] = { 1761 FIELD1("CngMPSEnable:", 21), 1762 FIELD("CngTPMode:", 19, 20), 1763 FIELD1("CngDBPHdr:", 18), 1764 FIELD1("CngDBPData:", 17), 1765 FIELD1("CngIMSG:", 16), 1766 { "CngChMap:", 0, 15, 0, 1, 0 }, 1767 { NULL } 1768 }; 1769 1770 if (p->mem_id == SGE_CONTEXT_EGRESS) { 1771 if (p->data[0] & 2) 1772 show_struct(p->data, 6, fl_t5); 1773 else if (vers == 5) 1774 show_struct(p->data, 6, egress_t5); 1775 else 1776 show_struct(p->data, 6, egress_t6); 1777 } else if (p->mem_id == SGE_CONTEXT_FLM) 1778 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6); 1779 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1780 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6); 1781 else if (p->mem_id == SGE_CONTEXT_CNM) 1782 show_struct(p->data, 1, conm_t5); 1783} 1784 1785static void 1786show_t4_ctxt(const struct t4_sge_context *p) 1787{ 1788 static struct field_desc egress_t4[] = { 1789 FIELD1("StatusPgNS:", 180), 1790 FIELD1("StatusPgRO:", 179), 1791 FIELD1("FetchNS:", 178), 1792 FIELD1("FetchRO:", 177), 1793 FIELD1("Valid:", 176), 1794 FIELD("PCIeDataChannel:", 174, 175), 1795 FIELD1("DCAEgrQEn:", 173), 1796 FIELD("DCACPUID:", 168, 172), 1797 FIELD1("FCThreshOverride:", 167), 1798 FIELD("WRLength:", 162, 166), 1799 FIELD1("WRLengthKnown:", 161), 1800 FIELD1("ReschedulePending:", 160), 1801 FIELD1("OnChipQueue:", 159), 1802 FIELD1("FetchSizeMode", 158), 1803 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1804 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1805 FIELD("uPToken:", 133, 152), 1806 FIELD1("uPTokenEn:", 132), 1807 FIELD1("UserModeIO:", 131), 1808 FIELD("uPFLCredits:", 123, 130), 1809 FIELD1("uPFLCreditEn:", 122), 1810 FIELD("FID:", 111, 121), 1811 FIELD("HostFCMode:", 109, 110), 1812 FIELD1("HostFCOwner:", 108), 1813 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1814 FIELD("CIDX:", 89, 104), 1815 FIELD("PIDX:", 73, 88), 1816 { "BaseAddress:", 18, 72, 9, 1 }, 1817 FIELD("QueueSize:", 2, 17), 1818 FIELD1("QueueType:", 1), 1819 FIELD1("CachePriority:", 0), 1820 { NULL } 1821 }; 1822 static struct field_desc fl_t4[] = { 1823 FIELD1("StatusPgNS:", 180), 1824 FIELD1("StatusPgRO:", 179), 1825 FIELD1("FetchNS:", 178), 1826 FIELD1("FetchRO:", 177), 1827 FIELD1("Valid:", 176), 1828 FIELD("PCIeDataChannel:", 174, 175), 1829 FIELD1("DCAEgrQEn:", 173), 1830 FIELD("DCACPUID:", 168, 172), 1831 FIELD1("FCThreshOverride:", 167), 1832 FIELD1("ReschedulePending:", 160), 1833 FIELD1("OnChipQueue:", 159), 1834 FIELD1("FetchSizeMode", 158), 1835 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1836 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1837 FIELD1("FLMcongMode:", 152), 1838 FIELD("MaxuPFLCredits:", 144, 151), 1839 FIELD("FLMcontextID:", 133, 143), 1840 FIELD1("uPTokenEn:", 132), 1841 FIELD1("UserModeIO:", 131), 1842 FIELD("uPFLCredits:", 123, 130), 1843 FIELD1("uPFLCreditEn:", 122), 1844 FIELD("FID:", 111, 121), 1845 FIELD("HostFCMode:", 109, 110), 1846 FIELD1("HostFCOwner:", 108), 1847 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1848 FIELD("CIDX:", 89, 104), 1849 FIELD("PIDX:", 73, 88), 1850 { "BaseAddress:", 18, 72, 9, 1 }, 1851 FIELD("QueueSize:", 2, 17), 1852 FIELD1("QueueType:", 1), 1853 FIELD1("CachePriority:", 0), 1854 { NULL } 1855 }; 1856 static struct field_desc ingress_t4[] = { 1857 FIELD1("NoSnoop:", 145), 1858 FIELD1("RelaxedOrdering:", 144), 1859 FIELD1("GTSmode:", 143), 1860 FIELD1("ISCSICoalescing:", 142), 1861 FIELD1("Valid:", 141), 1862 FIELD1("TimerPending:", 140), 1863 FIELD1("DropRSS:", 139), 1864 FIELD("PCIeChannel:", 137, 138), 1865 FIELD1("SEInterruptArmed:", 136), 1866 FIELD1("CongestionMgtEnable:", 135), 1867 FIELD1("DCAIngQEnable:", 134), 1868 FIELD("DCACPUID:", 129, 133), 1869 FIELD1("UpdateScheduling:", 128), 1870 FIELD("UpdateDelivery:", 126, 127), 1871 FIELD1("InterruptSent:", 125), 1872 FIELD("InterruptIDX:", 114, 124), 1873 FIELD1("InterruptDestination:", 113), 1874 FIELD1("InterruptArmed:", 112), 1875 FIELD("RxIntCounter:", 106, 111), 1876 FIELD("RxIntCounterThreshold:", 104, 105), 1877 FIELD1("Generation:", 103), 1878 { "BaseAddress:", 48, 102, 9, 1 }, 1879 FIELD("PIDX:", 32, 47), 1880 FIELD("CIDX:", 16, 31), 1881 { "QueueSize:", 4, 15, 4, 0 }, 1882 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1883 FIELD1("QueueEntryOverride:", 1), 1884 FIELD1("CachePriority:", 0), 1885 { NULL } 1886 }; 1887 static struct field_desc flm_t4[] = { 1888 FIELD1("NoSnoop:", 79), 1889 FIELD1("RelaxedOrdering:", 78), 1890 FIELD1("Valid:", 77), 1891 FIELD("DCACPUID:", 72, 76), 1892 FIELD1("DCAFLEn:", 71), 1893 FIELD("EQid:", 54, 70), 1894 FIELD("SplitEn:", 52, 53), 1895 FIELD1("PadEn:", 51), 1896 FIELD1("PackEn:", 50), 1897 FIELD1("DBpriority:", 48), 1898 FIELD("PackOffset:", 16, 47), 1899 FIELD("CIDX:", 8, 15), 1900 FIELD("PIDX:", 0, 7), 1901 { NULL } 1902 }; 1903 static struct field_desc conm_t4[] = { 1904 FIELD1("CngDBPHdr:", 6), 1905 FIELD1("CngDBPData:", 5), 1906 FIELD1("CngIMSG:", 4), 1907 { "CngChMap:", 0, 3, 0, 1, 0}, 1908 { NULL } 1909 }; 1910 1911 if (p->mem_id == SGE_CONTEXT_EGRESS) 1912 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4); 1913 else if (p->mem_id == SGE_CONTEXT_FLM) 1914 show_struct(p->data, 3, flm_t4); 1915 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1916 show_struct(p->data, 5, ingress_t4); 1917 else if (p->mem_id == SGE_CONTEXT_CNM) 1918 show_struct(p->data, 1, conm_t4); 1919} 1920 1921#undef FIELD 1922#undef FIELD1 1923 1924static int 1925get_sge_context(int argc, const char *argv[]) 1926{ 1927 int rc; 1928 char *p; 1929 long cid; 1930 struct t4_sge_context cntxt = {0}; 1931 1932 if (argc != 2) { 1933 warnx("sge_context: incorrect number of arguments."); 1934 return (EINVAL); 1935 } 1936 1937 if (!strcmp(argv[0], "egress")) 1938 cntxt.mem_id = SGE_CONTEXT_EGRESS; 1939 else if (!strcmp(argv[0], "ingress")) 1940 cntxt.mem_id = SGE_CONTEXT_INGRESS; 1941 else if (!strcmp(argv[0], "fl")) 1942 cntxt.mem_id = SGE_CONTEXT_FLM; 1943 else if (!strcmp(argv[0], "cong")) 1944 cntxt.mem_id = SGE_CONTEXT_CNM; 1945 else { 1946 warnx("unknown context type \"%s\"; known types are egress, " 1947 "ingress, fl, and cong.", argv[0]); 1948 return (EINVAL); 1949 } 1950 1951 p = str_to_number(argv[1], &cid, NULL); 1952 if (*p) { 1953 warnx("invalid context id \"%s\"", argv[1]); 1954 return (EINVAL); 1955 } 1956 cntxt.cid = cid; 1957 1958 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); 1959 if (rc != 0) 1960 return (rc); 1961 1962 if (chip_id == 4) 1963 show_t4_ctxt(&cntxt); 1964 else 1965 show_t5t6_ctxt(&cntxt, chip_id); 1966 1967 return (0); 1968} 1969 1970static int 1971loadfw(int argc, const char *argv[]) 1972{ 1973 int rc, fd; 1974 struct t4_data data = {0}; 1975 const char *fname = argv[0]; 1976 struct stat st = {0}; 1977 1978 if (argc != 1) { 1979 warnx("loadfw: incorrect number of arguments."); 1980 return (EINVAL); 1981 } 1982 1983 fd = open(fname, O_RDONLY); 1984 if (fd < 0) { 1985 warn("open(%s)", fname); 1986 return (errno); 1987 } 1988 1989 if (fstat(fd, &st) < 0) { 1990 warn("fstat"); 1991 close(fd); 1992 return (errno); 1993 } 1994 1995 data.len = st.st_size; 1996 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1997 if (data.data == MAP_FAILED) { 1998 warn("mmap"); 1999 close(fd); 2000 return (errno); 2001 } 2002 2003 rc = doit(CHELSIO_T4_LOAD_FW, &data); 2004 munmap(data.data, data.len); 2005 close(fd); 2006 return (rc); 2007} 2008 2009static int 2010loadcfg(int argc, const char *argv[]) 2011{ 2012 int rc, fd; 2013 struct t4_data data = {0}; 2014 const char *fname = argv[0]; 2015 struct stat st = {0}; 2016 2017 if (argc != 1) { 2018 warnx("loadcfg: incorrect number of arguments."); 2019 return (EINVAL); 2020 } 2021 2022 if (strcmp(fname, "clear") == 0) 2023 return (doit(CHELSIO_T4_LOAD_CFG, &data)); 2024 2025 fd = open(fname, O_RDONLY); 2026 if (fd < 0) { 2027 warn("open(%s)", fname); 2028 return (errno); 2029 } 2030 2031 if (fstat(fd, &st) < 0) { 2032 warn("fstat"); 2033 close(fd); 2034 return (errno); 2035 } 2036 2037 data.len = st.st_size; 2038 data.len &= ~3; /* Clip off to make it a multiple of 4 */ 2039 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 2040 if (data.data == MAP_FAILED) { 2041 warn("mmap"); 2042 close(fd); 2043 return (errno); 2044 } 2045 2046 rc = doit(CHELSIO_T4_LOAD_CFG, &data); 2047 munmap(data.data, data.len); 2048 close(fd); 2049 return (rc); 2050} 2051 2052static int 2053dumpstate(int argc, const char *argv[]) 2054{ 2055 int rc, fd; 2056 struct t4_cudbg_dump dump = {0}; 2057 const char *fname = argv[0]; 2058 2059 if (argc != 1) { 2060 warnx("dumpstate: incorrect number of arguments."); 2061 return (EINVAL); 2062 } 2063 2064 dump.wr_flash = 0; 2065 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap)); 2066 dump.len = 8 * 1024 * 1024; 2067 dump.data = malloc(dump.len); 2068 if (dump.data == NULL) { 2069 return (ENOMEM); 2070 } 2071 2072 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump); 2073 if (rc != 0) 2074 goto done; 2075 2076 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY, 2077 S_IRUSR | S_IRGRP | S_IROTH); 2078 if (fd < 0) { 2079 warn("open(%s)", fname); 2080 rc = errno; 2081 goto done; 2082 } 2083 write(fd, dump.data, dump.len); 2084 close(fd); 2085done: 2086 free(dump.data); 2087 return (rc); 2088} 2089 2090static int 2091read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t)) 2092{ 2093 int rc; 2094 struct t4_mem_range mr; 2095 2096 mr.addr = addr; 2097 mr.len = len; 2098 mr.data = malloc(mr.len); 2099 2100 if (mr.data == 0) { 2101 warn("read_mem: malloc"); 2102 return (errno); 2103 } 2104 2105 rc = doit(CHELSIO_T4_GET_MEM, &mr); 2106 if (rc != 0) 2107 goto done; 2108 2109 if (output) 2110 (*output)(mr.data, mr.len); 2111done: 2112 free(mr.data); 2113 return (rc); 2114} 2115 2116static int 2117loadboot(int argc, const char *argv[]) 2118{ 2119 int rc, fd; 2120 long l; 2121 char *p; 2122 struct t4_bootrom br = {0}; 2123 const char *fname = argv[0]; 2124 struct stat st = {0}; 2125 2126 if (argc == 1) { 2127 br.pf_offset = 0; 2128 br.pfidx_addr = 0; 2129 } else if (argc == 3) { 2130 if (!strcmp(argv[1], "pf")) 2131 br.pf_offset = 0; 2132 else if (!strcmp(argv[1], "offset")) 2133 br.pf_offset = 1; 2134 else 2135 return (EINVAL); 2136 2137 p = str_to_number(argv[2], &l, NULL); 2138 if (*p) 2139 return (EINVAL); 2140 br.pfidx_addr = l; 2141 } else { 2142 warnx("loadboot: incorrect number of arguments."); 2143 return (EINVAL); 2144 } 2145 2146 if (strcmp(fname, "clear") == 0) 2147 return (doit(CHELSIO_T4_LOAD_BOOT, &br)); 2148 2149 fd = open(fname, O_RDONLY); 2150 if (fd < 0) { 2151 warn("open(%s)", fname); 2152 return (errno); 2153 } 2154 2155 if (fstat(fd, &st) < 0) { 2156 warn("fstat"); 2157 close(fd); 2158 return (errno); 2159 } 2160 2161 br.len = st.st_size; 2162 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0); 2163 if (br.data == MAP_FAILED) { 2164 warn("mmap"); 2165 close(fd); 2166 return (errno); 2167 } 2168 2169 rc = doit(CHELSIO_T4_LOAD_BOOT, &br); 2170 munmap(br.data, br.len); 2171 close(fd); 2172 return (rc); 2173} 2174 2175static int 2176loadbootcfg(int argc, const char *argv[]) 2177{ 2178 int rc, fd; 2179 struct t4_data bc = {0}; 2180 const char *fname = argv[0]; 2181 struct stat st = {0}; 2182 2183 if (argc != 1) { 2184 warnx("loadbootcfg: incorrect number of arguments."); 2185 return (EINVAL); 2186 } 2187 2188 if (strcmp(fname, "clear") == 0) 2189 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc)); 2190 2191 fd = open(fname, O_RDONLY); 2192 if (fd < 0) { 2193 warn("open(%s)", fname); 2194 return (errno); 2195 } 2196 2197 if (fstat(fd, &st) < 0) { 2198 warn("fstat"); 2199 close(fd); 2200 return (errno); 2201 } 2202 2203 bc.len = st.st_size; 2204 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0); 2205 if (bc.data == MAP_FAILED) { 2206 warn("mmap"); 2207 close(fd); 2208 return (errno); 2209 } 2210 2211 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc); 2212 munmap(bc.data, bc.len); 2213 close(fd); 2214 return (rc); 2215} 2216 2217/* 2218 * Display memory as list of 'n' 4-byte values per line. 2219 */ 2220static void 2221show_mem(uint32_t *buf, uint32_t len) 2222{ 2223 const char *s; 2224 int i, n = 8; 2225 2226 while (len) { 2227 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2228 s = i ? " " : ""; 2229 printf("%s%08x", s, htonl(*buf)); 2230 } 2231 printf("\n"); 2232 } 2233} 2234 2235static int 2236memdump(int argc, const char *argv[]) 2237{ 2238 char *p; 2239 long l; 2240 uint32_t addr, len; 2241 2242 if (argc != 2) { 2243 warnx("incorrect number of arguments."); 2244 return (EINVAL); 2245 } 2246 2247 p = str_to_number(argv[0], &l, NULL); 2248 if (*p) { 2249 warnx("invalid address \"%s\"", argv[0]); 2250 return (EINVAL); 2251 } 2252 addr = l; 2253 2254 p = str_to_number(argv[1], &l, NULL); 2255 if (*p) { 2256 warnx("memdump: invalid length \"%s\"", argv[1]); 2257 return (EINVAL); 2258 } 2259 len = l; 2260 2261 return (read_mem(addr, len, show_mem)); 2262} 2263 2264/* 2265 * Display TCB as list of 'n' 4-byte values per line. 2266 */ 2267static void 2268show_tcb(uint32_t *buf, uint32_t len) 2269{ 2270 unsigned char *tcb = (unsigned char *)buf; 2271 const char *s; 2272 int i, n = 8; 2273 2274 while (len) { 2275 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2276 s = i ? " " : ""; 2277 printf("%s%08x", s, htonl(*buf)); 2278 } 2279 printf("\n"); 2280 } 2281 set_tcb_info(TIDTYPE_TCB, chip_id); 2282 set_print_style(PRNTSTYL_COMP); 2283 swizzle_tcb(tcb); 2284 parse_n_display_xcb(tcb); 2285} 2286 2287#define A_TP_CMM_TCB_BASE 0x7d10 2288#define TCB_SIZE 128 2289static int 2290read_tcb(int argc, const char *argv[]) 2291{ 2292 char *p; 2293 long l; 2294 long long val; 2295 unsigned int tid; 2296 uint32_t addr; 2297 int rc; 2298 2299 if (argc != 1) { 2300 warnx("incorrect number of arguments."); 2301 return (EINVAL); 2302 } 2303 2304 p = str_to_number(argv[0], &l, NULL); 2305 if (*p) { 2306 warnx("invalid tid \"%s\"", argv[0]); 2307 return (EINVAL); 2308 } 2309 tid = l; 2310 2311 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val); 2312 if (rc != 0) 2313 return (rc); 2314 2315 addr = val + tid * TCB_SIZE; 2316 2317 return (read_mem(addr, TCB_SIZE, show_tcb)); 2318} 2319 2320static int 2321read_i2c(int argc, const char *argv[]) 2322{ 2323 char *p; 2324 long l; 2325 struct t4_i2c_data i2cd; 2326 int rc, i; 2327 2328 if (argc < 3 || argc > 4) { 2329 warnx("incorrect number of arguments."); 2330 return (EINVAL); 2331 } 2332 2333 p = str_to_number(argv[0], &l, NULL); 2334 if (*p || l > UCHAR_MAX) { 2335 warnx("invalid port id \"%s\"", argv[0]); 2336 return (EINVAL); 2337 } 2338 i2cd.port_id = l; 2339 2340 p = str_to_number(argv[1], &l, NULL); 2341 if (*p || l > UCHAR_MAX) { 2342 warnx("invalid i2c device address \"%s\"", argv[1]); 2343 return (EINVAL); 2344 } 2345 i2cd.dev_addr = l; 2346 2347 p = str_to_number(argv[2], &l, NULL); 2348 if (*p || l > UCHAR_MAX) { 2349 warnx("invalid byte offset \"%s\"", argv[2]); 2350 return (EINVAL); 2351 } 2352 i2cd.offset = l; 2353 2354 if (argc == 4) { 2355 p = str_to_number(argv[3], &l, NULL); 2356 if (*p || l > sizeof(i2cd.data)) { 2357 warnx("invalid number of bytes \"%s\"", argv[3]); 2358 return (EINVAL); 2359 } 2360 i2cd.len = l; 2361 } else 2362 i2cd.len = 1; 2363 2364 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2365 if (rc != 0) 2366 return (rc); 2367 2368 for (i = 0; i < i2cd.len; i++) 2369 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]); 2370 2371 return (0); 2372} 2373 2374static int 2375clearstats(int argc, const char *argv[]) 2376{ 2377 char *p; 2378 long l; 2379 uint32_t port; 2380 2381 if (argc != 1) { 2382 warnx("incorrect number of arguments."); 2383 return (EINVAL); 2384 } 2385 2386 p = str_to_number(argv[0], &l, NULL); 2387 if (*p) { 2388 warnx("invalid port id \"%s\"", argv[0]); 2389 return (EINVAL); 2390 } 2391 port = l; 2392 2393 return doit(CHELSIO_T4_CLEAR_STATS, &port); 2394} 2395 2396static int 2397show_tracers(void) 2398{ 2399 struct t4_tracer t; 2400 char *s; 2401 int rc, port_idx, i; 2402 long long val; 2403 2404 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */ 2405 rc = read_reg(0x9800, 4, &val); 2406 if (rc != 0) 2407 return (rc); 2408 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED"); 2409 2410 t.idx = 0; 2411 for (t.idx = 0; ; t.idx++) { 2412 rc = doit(CHELSIO_T4_GET_TRACER, &t); 2413 if (rc != 0 || t.idx == 0xff) 2414 break; 2415 2416 if (t.tp.port < 4) { 2417 s = "Rx"; 2418 port_idx = t.tp.port; 2419 } else if (t.tp.port < 8) { 2420 s = "Tx"; 2421 port_idx = t.tp.port - 4; 2422 } else if (t.tp.port < 12) { 2423 s = "loopback"; 2424 port_idx = t.tp.port - 8; 2425 } else if (t.tp.port < 16) { 2426 s = "MPS Rx"; 2427 port_idx = t.tp.port - 12; 2428 } else if (t.tp.port < 20) { 2429 s = "MPS Tx"; 2430 port_idx = t.tp.port - 16; 2431 } else { 2432 s = "unknown"; 2433 port_idx = t.tp.port; 2434 } 2435 2436 printf("\ntracer %u (currently %s) captures ", t.idx, 2437 t.enabled ? "ENABLED" : "DISABLED"); 2438 if (t.tp.port < 8) 2439 printf("port %u %s, ", port_idx, s); 2440 else 2441 printf("%s %u, ", s, port_idx); 2442 printf("snap length: %u, min length: %u\n", t.tp.snap_len, 2443 t.tp.min_len); 2444 printf("packets captured %smatch filter\n", 2445 t.tp.invert ? "do not " : ""); 2446 if (t.tp.skip_ofst) { 2447 printf("filter pattern: "); 2448 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2449 printf("%08x%08x", t.tp.data[i], 2450 t.tp.data[i + 1]); 2451 printf("/"); 2452 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2453 printf("%08x%08x", t.tp.mask[i], 2454 t.tp.mask[i + 1]); 2455 printf("@0\n"); 2456 } 2457 printf("filter pattern: "); 2458 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2459 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]); 2460 printf("/"); 2461 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2462 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]); 2463 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8); 2464 } 2465 2466 return (rc); 2467} 2468 2469static int 2470tracer_onoff(uint8_t idx, int enabled) 2471{ 2472 struct t4_tracer t; 2473 2474 t.idx = idx; 2475 t.enabled = enabled; 2476 t.valid = 0; 2477 2478 return doit(CHELSIO_T4_SET_TRACER, &t); 2479} 2480 2481static void 2482create_tracing_ifnet() 2483{ 2484 char *cmd[] = { 2485 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL 2486 }; 2487 char *env[] = {NULL}; 2488 2489 if (vfork() == 0) { 2490 close(STDERR_FILENO); 2491 execve(cmd[0], cmd, env); 2492 _exit(0); 2493 } 2494} 2495 2496/* 2497 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted 2498 * matching). Right now this is a quick-n-dirty implementation that traces the 2499 * first 128B of all tx or rx on a port 2500 */ 2501static int 2502set_tracer(uint8_t idx, int argc, const char *argv[]) 2503{ 2504 struct t4_tracer t; 2505 int len, port; 2506 2507 bzero(&t, sizeof (t)); 2508 t.idx = idx; 2509 t.enabled = 1; 2510 t.valid = 1; 2511 2512 if (argc != 1) { 2513 warnx("must specify tx<n> or rx<n>."); 2514 return (EINVAL); 2515 } 2516 2517 len = strlen(argv[0]); 2518 if (len != 3) { 2519 warnx("argument must be 3 characters (tx<n> or rx<n>)"); 2520 return (EINVAL); 2521 } 2522 2523 if (strncmp(argv[0], "tx", 2) == 0) { 2524 port = argv[0][2] - '0'; 2525 if (port < 0 || port > 3) { 2526 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2527 return (EINVAL); 2528 } 2529 port += 4; 2530 } else if (strncmp(argv[0], "rx", 2) == 0) { 2531 port = argv[0][2] - '0'; 2532 if (port < 0 || port > 3) { 2533 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2534 return (EINVAL); 2535 } 2536 } else { 2537 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]); 2538 return (EINVAL); 2539 } 2540 2541 t.tp.snap_len = 128; 2542 t.tp.min_len = 0; 2543 t.tp.skip_ofst = 0; 2544 t.tp.skip_len = 0; 2545 t.tp.invert = 0; 2546 t.tp.port = port; 2547 2548 create_tracing_ifnet(); 2549 return doit(CHELSIO_T4_SET_TRACER, &t); 2550} 2551 2552static int 2553tracer_cmd(int argc, const char *argv[]) 2554{ 2555 long long val; 2556 uint8_t idx; 2557 char *s; 2558 2559 if (argc == 0) { 2560 warnx("tracer: no arguments."); 2561 return (EINVAL); 2562 }; 2563 2564 /* list */ 2565 if (strcmp(argv[0], "list") == 0) { 2566 if (argc != 1) 2567 warnx("trailing arguments after \"list\" ignored."); 2568 2569 return show_tracers(); 2570 } 2571 2572 /* <idx> ... */ 2573 s = str_to_number(argv[0], NULL, &val); 2574 if (*s || val > 0xff) { 2575 warnx("\"%s\" is neither an index nor a tracer subcommand.", 2576 argv[0]); 2577 return (EINVAL); 2578 } 2579 idx = (int8_t)val; 2580 2581 /* <idx> disable */ 2582 if (argc == 2 && strcmp(argv[1], "disable") == 0) 2583 return tracer_onoff(idx, 0); 2584 2585 /* <idx> enable */ 2586 if (argc == 2 && strcmp(argv[1], "enable") == 0) 2587 return tracer_onoff(idx, 1); 2588 2589 /* <idx> ... */ 2590 return set_tracer(idx, argc - 1, argv + 1); 2591} 2592 2593static int 2594modinfo_raw(int port_id) 2595{ 2596 uint8_t offset; 2597 struct t4_i2c_data i2cd; 2598 int rc; 2599 2600 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) { 2601 bzero(&i2cd, sizeof(i2cd)); 2602 i2cd.port_id = port_id; 2603 i2cd.dev_addr = 0xa0; 2604 i2cd.offset = offset; 2605 i2cd.len = sizeof(i2cd.data); 2606 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2607 if (rc != 0) 2608 return (rc); 2609 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", 2610 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2], 2611 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6], 2612 i2cd.data[7]); 2613 2614 printf(" %c%c%c%c %c%c%c%c\n", 2615 isprint(i2cd.data[0]) ? i2cd.data[0] : '.', 2616 isprint(i2cd.data[1]) ? i2cd.data[1] : '.', 2617 isprint(i2cd.data[2]) ? i2cd.data[2] : '.', 2618 isprint(i2cd.data[3]) ? i2cd.data[3] : '.', 2619 isprint(i2cd.data[4]) ? i2cd.data[4] : '.', 2620 isprint(i2cd.data[5]) ? i2cd.data[5] : '.', 2621 isprint(i2cd.data[6]) ? i2cd.data[6] : '.', 2622 isprint(i2cd.data[7]) ? i2cd.data[7] : '.'); 2623 } 2624 2625 return (0); 2626} 2627 2628static int 2629modinfo(int argc, const char *argv[]) 2630{ 2631 long port; 2632 char string[16], *p; 2633 struct t4_i2c_data i2cd; 2634 int rc, i; 2635 uint16_t temp, vcc, tx_bias, tx_power, rx_power; 2636 2637 if (argc < 1) { 2638 warnx("must supply a port"); 2639 return (EINVAL); 2640 } 2641 2642 if (argc > 2) { 2643 warnx("too many arguments"); 2644 return (EINVAL); 2645 } 2646 2647 p = str_to_number(argv[0], &port, NULL); 2648 if (*p || port > UCHAR_MAX) { 2649 warnx("invalid port id \"%s\"", argv[0]); 2650 return (EINVAL); 2651 } 2652 2653 if (argc == 2) { 2654 if (!strcmp(argv[1], "raw")) 2655 return (modinfo_raw(port)); 2656 else { 2657 warnx("second argument can only be \"raw\""); 2658 return (EINVAL); 2659 } 2660 } 2661 2662 bzero(&i2cd, sizeof(i2cd)); 2663 i2cd.len = 1; 2664 i2cd.port_id = port; 2665 i2cd.dev_addr = SFF_8472_BASE; 2666 2667 i2cd.offset = SFF_8472_ID; 2668 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2669 goto fail; 2670 2671 if (i2cd.data[0] > SFF_8472_ID_LAST) 2672 printf("Unknown ID\n"); 2673 else 2674 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]); 2675 2676 bzero(&string, sizeof(string)); 2677 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) { 2678 i2cd.offset = i; 2679 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2680 goto fail; 2681 string[i - SFF_8472_VENDOR_START] = i2cd.data[0]; 2682 } 2683 printf("Vendor %s\n", string); 2684 2685 bzero(&string, sizeof(string)); 2686 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) { 2687 i2cd.offset = i; 2688 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2689 goto fail; 2690 string[i - SFF_8472_SN_START] = i2cd.data[0]; 2691 } 2692 printf("SN %s\n", string); 2693 2694 bzero(&string, sizeof(string)); 2695 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) { 2696 i2cd.offset = i; 2697 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2698 goto fail; 2699 string[i - SFF_8472_PN_START] = i2cd.data[0]; 2700 } 2701 printf("PN %s\n", string); 2702 2703 bzero(&string, sizeof(string)); 2704 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) { 2705 i2cd.offset = i; 2706 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2707 goto fail; 2708 string[i - SFF_8472_REV_START] = i2cd.data[0]; 2709 } 2710 printf("Rev %s\n", string); 2711 2712 i2cd.offset = SFF_8472_DIAG_TYPE; 2713 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2714 goto fail; 2715 2716 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL | 2717 SFF_8472_DIAG_INTERNAL)) { 2718 2719 /* Switch to reading from the Diagnostic address. */ 2720 i2cd.dev_addr = SFF_8472_DIAG; 2721 i2cd.len = 1; 2722 2723 i2cd.offset = SFF_8472_TEMP; 2724 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2725 goto fail; 2726 temp = i2cd.data[0] << 8; 2727 printf("Temp: "); 2728 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN) 2729 printf("-"); 2730 else 2731 printf("+"); 2732 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >> 2733 SFF_8472_TEMP_SHIFT); 2734 2735 i2cd.offset = SFF_8472_VCC; 2736 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2737 goto fail; 2738 vcc = i2cd.data[0] << 8; 2739 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR); 2740 2741 i2cd.offset = SFF_8472_TX_BIAS; 2742 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2743 goto fail; 2744 tx_bias = i2cd.data[0] << 8; 2745 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR); 2746 2747 i2cd.offset = SFF_8472_TX_POWER; 2748 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2749 goto fail; 2750 tx_power = i2cd.data[0] << 8; 2751 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR); 2752 2753 i2cd.offset = SFF_8472_RX_POWER; 2754 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2755 goto fail; 2756 rx_power = i2cd.data[0] << 8; 2757 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR); 2758 2759 } else 2760 printf("Diagnostics not supported.\n"); 2761 2762 return(0); 2763 2764fail: 2765 if (rc == EPERM) 2766 warnx("No module/cable in port %ld", port); 2767 return (rc); 2768 2769} 2770 2771/* XXX: pass in a low/high and do range checks as well */ 2772static int 2773get_sched_param(const char *param, const char *args[], long *val) 2774{ 2775 char *p; 2776 2777 if (strcmp(param, args[0]) != 0) 2778 return (EINVAL); 2779 2780 p = str_to_number(args[1], val, NULL); 2781 if (*p) { 2782 warnx("parameter \"%s\" has bad value \"%s\"", args[0], 2783 args[1]); 2784 return (EINVAL); 2785 } 2786 2787 return (0); 2788} 2789 2790static int 2791sched_class(int argc, const char *argv[]) 2792{ 2793 struct t4_sched_params op; 2794 int errs, i; 2795 2796 memset(&op, 0xff, sizeof(op)); 2797 op.subcmd = -1; 2798 op.type = -1; 2799 if (argc == 0) { 2800 warnx("missing scheduling sub-command"); 2801 return (EINVAL); 2802 } 2803 if (!strcmp(argv[0], "config")) { 2804 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG; 2805 op.u.config.minmax = -1; 2806 } else if (!strcmp(argv[0], "params")) { 2807 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS; 2808 op.u.params.level = op.u.params.mode = op.u.params.rateunit = 2809 op.u.params.ratemode = op.u.params.channel = 2810 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate = 2811 op.u.params.weight = op.u.params.pktsize = -1; 2812 } else { 2813 warnx("invalid scheduling sub-command \"%s\"", argv[0]); 2814 return (EINVAL); 2815 } 2816 2817 /* Decode remaining arguments ... */ 2818 errs = 0; 2819 for (i = 1; i < argc; i += 2) { 2820 const char **args = &argv[i]; 2821 long l; 2822 2823 if (i + 1 == argc) { 2824 warnx("missing argument for \"%s\"", args[0]); 2825 errs++; 2826 break; 2827 } 2828 2829 if (!strcmp(args[0], "type")) { 2830 if (!strcmp(args[1], "packet")) 2831 op.type = SCHED_CLASS_TYPE_PACKET; 2832 else { 2833 warnx("invalid type parameter \"%s\"", args[1]); 2834 errs++; 2835 } 2836 2837 continue; 2838 } 2839 2840 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2841 if(!get_sched_param("minmax", args, &l)) 2842 op.u.config.minmax = (int8_t)l; 2843 else { 2844 warnx("unknown scheduler config parameter " 2845 "\"%s\"", args[0]); 2846 errs++; 2847 } 2848 2849 continue; 2850 } 2851 2852 /* Rest applies only to SUBCMD_PARAMS */ 2853 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS) 2854 continue; 2855 2856 if (!strcmp(args[0], "level")) { 2857 if (!strcmp(args[1], "cl-rl")) 2858 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL; 2859 else if (!strcmp(args[1], "cl-wrr")) 2860 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR; 2861 else if (!strcmp(args[1], "ch-rl")) 2862 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL; 2863 else { 2864 warnx("invalid level parameter \"%s\"", 2865 args[1]); 2866 errs++; 2867 } 2868 } else if (!strcmp(args[0], "mode")) { 2869 if (!strcmp(args[1], "class")) 2870 op.u.params.mode = SCHED_CLASS_MODE_CLASS; 2871 else if (!strcmp(args[1], "flow")) 2872 op.u.params.mode = SCHED_CLASS_MODE_FLOW; 2873 else { 2874 warnx("invalid mode parameter \"%s\"", args[1]); 2875 errs++; 2876 } 2877 } else if (!strcmp(args[0], "rate-unit")) { 2878 if (!strcmp(args[1], "bits")) 2879 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS; 2880 else if (!strcmp(args[1], "pkts")) 2881 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS; 2882 else { 2883 warnx("invalid rate-unit parameter \"%s\"", 2884 args[1]); 2885 errs++; 2886 } 2887 } else if (!strcmp(args[0], "rate-mode")) { 2888 if (!strcmp(args[1], "relative")) 2889 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL; 2890 else if (!strcmp(args[1], "absolute")) 2891 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS; 2892 else { 2893 warnx("invalid rate-mode parameter \"%s\"", 2894 args[1]); 2895 errs++; 2896 } 2897 } else if (!get_sched_param("channel", args, &l)) 2898 op.u.params.channel = (int8_t)l; 2899 else if (!get_sched_param("class", args, &l)) 2900 op.u.params.cl = (int8_t)l; 2901 else if (!get_sched_param("min-rate", args, &l)) 2902 op.u.params.minrate = (int32_t)l; 2903 else if (!get_sched_param("max-rate", args, &l)) 2904 op.u.params.maxrate = (int32_t)l; 2905 else if (!get_sched_param("weight", args, &l)) 2906 op.u.params.weight = (int16_t)l; 2907 else if (!get_sched_param("pkt-size", args, &l)) 2908 op.u.params.pktsize = (int16_t)l; 2909 else { 2910 warnx("unknown scheduler parameter \"%s\"", args[0]); 2911 errs++; 2912 } 2913 } 2914 2915 /* 2916 * Catch some logical fallacies in terms of argument combinations here 2917 * so we can offer more than just the EINVAL return from the driver. 2918 * The driver will be able to catch a lot more issues since it knows 2919 * the specifics of the device hardware capabilities like how many 2920 * channels, classes, etc. the device supports. 2921 */ 2922 if (op.type < 0) { 2923 warnx("sched \"type\" parameter missing"); 2924 errs++; 2925 } 2926 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2927 if (op.u.config.minmax < 0) { 2928 warnx("sched config \"minmax\" parameter missing"); 2929 errs++; 2930 } 2931 } 2932 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) { 2933 if (op.u.params.level < 0) { 2934 warnx("sched params \"level\" parameter missing"); 2935 errs++; 2936 } 2937 if (op.u.params.mode < 0 && 2938 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2939 warnx("sched params \"mode\" parameter missing"); 2940 errs++; 2941 } 2942 if (op.u.params.rateunit < 0 && 2943 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2944 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2945 warnx("sched params \"rate-unit\" parameter missing"); 2946 errs++; 2947 } 2948 if (op.u.params.ratemode < 0 && 2949 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2950 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2951 warnx("sched params \"rate-mode\" parameter missing"); 2952 errs++; 2953 } 2954 if (op.u.params.channel < 0) { 2955 warnx("sched params \"channel\" missing"); 2956 errs++; 2957 } 2958 if (op.u.params.cl < 0 && 2959 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2960 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR)) { 2961 warnx("sched params \"class\" missing"); 2962 errs++; 2963 } 2964 if (op.u.params.maxrate < 0 && 2965 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2966 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2967 warnx("sched params \"max-rate\" missing for " 2968 "rate-limit level"); 2969 errs++; 2970 } 2971 if (op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR && 2972 (op.u.params.weight < 1 || op.u.params.weight > 99)) { 2973 warnx("sched params \"weight\" missing or invalid " 2974 "(not 1-99) for weighted-round-robin level"); 2975 errs++; 2976 } 2977 if (op.u.params.pktsize < 0 && 2978 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2979 warnx("sched params \"pkt-size\" missing for " 2980 "rate-limit level"); 2981 errs++; 2982 } 2983 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW && 2984 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) { 2985 warnx("sched params mode flow needs rate-mode absolute"); 2986 errs++; 2987 } 2988 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL && 2989 !in_range(op.u.params.maxrate, 1, 100)) { 2990 warnx("sched params \"max-rate\" takes " 2991 "percentage value(1-100) for rate-mode relative"); 2992 errs++; 2993 } 2994 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS && 2995 !in_range(op.u.params.maxrate, 1, 100000000)) { 2996 warnx("sched params \"max-rate\" takes " 2997 "value(1-100000000) for rate-mode absolute"); 2998 errs++; 2999 } 3000 if (op.u.params.maxrate > 0 && 3001 op.u.params.maxrate < op.u.params.minrate) { 3002 warnx("sched params \"max-rate\" is less than " 3003 "\"min-rate\""); 3004 errs++; 3005 } 3006 } 3007 3008 if (errs > 0) { 3009 warnx("%d error%s in sched-class command", errs, 3010 errs == 1 ? "" : "s"); 3011 return (EINVAL); 3012 } 3013 3014 return doit(CHELSIO_T4_SCHED_CLASS, &op); 3015} 3016 3017static int 3018sched_queue(int argc, const char *argv[]) 3019{ 3020 struct t4_sched_queue op = {0}; 3021 char *p; 3022 long val; 3023 3024 if (argc != 3) { 3025 /* need "<port> <queue> <class> */ 3026 warnx("incorrect number of arguments."); 3027 return (EINVAL); 3028 } 3029 3030 p = str_to_number(argv[0], &val, NULL); 3031 if (*p || val > UCHAR_MAX) { 3032 warnx("invalid port id \"%s\"", argv[0]); 3033 return (EINVAL); 3034 } 3035 op.port = (uint8_t)val; 3036 3037 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*")) 3038 op.queue = -1; 3039 else { 3040 p = str_to_number(argv[1], &val, NULL); 3041 if (*p || val < -1) { 3042 warnx("invalid queue \"%s\"", argv[1]); 3043 return (EINVAL); 3044 } 3045 op.queue = (int8_t)val; 3046 } 3047 3048 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear")) 3049 op.cl = -1; 3050 else { 3051 p = str_to_number(argv[2], &val, NULL); 3052 if (*p || val < -1) { 3053 warnx("invalid class \"%s\"", argv[2]); 3054 return (EINVAL); 3055 } 3056 op.cl = (int8_t)val; 3057 } 3058 3059 return doit(CHELSIO_T4_SCHED_QUEUE, &op); 3060} 3061 3062static int 3063parse_offload_settings_word(const char *s, char **pnext, const char *ws, 3064 int *pneg, struct offload_settings *os) 3065{ 3066 3067 while (*s == '!') { 3068 (*pneg)++; 3069 s++; 3070 } 3071 3072 if (!strcmp(s, "not")) { 3073 (*pneg)++; 3074 return (0); 3075 } 3076 3077 if (!strcmp(s, "offload")) { 3078 os->offload = (*pneg + 1) & 1; 3079 *pneg = 0; 3080 } else if (!strcmp(s , "coalesce")) { 3081 os->rx_coalesce = (*pneg + 1) & 1; 3082 *pneg = 0; 3083 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) { 3084 os->tstamp = (*pneg + 1) & 1; 3085 *pneg = 0; 3086 } else if (!strcmp(s, "sack")) { 3087 os->sack = (*pneg + 1) & 1; 3088 *pneg = 0; 3089 } else if (!strcmp(s, "nagle")) { 3090 os->nagle = (*pneg + 1) & 1; 3091 *pneg = 0; 3092 } else if (!strcmp(s, "ecn")) { 3093 os->ecn = (*pneg + 1) & 1; 3094 *pneg = 0; 3095 } else if (!strcmp(s, "ddp")) { 3096 os->ddp = (*pneg + 1) & 1; 3097 *pneg = 0; 3098 } else if (!strcmp(s, "tls")) { 3099 os->tls = (*pneg + 1) & 1; 3100 *pneg = 0; 3101 } else { 3102 char *param, *p; 3103 long val; 3104 3105 /* Settings with additional parameter handled here. */ 3106 3107 if (*pneg) { 3108 warnx("\"%s\" is not a valid keyword, or it does not " 3109 "support negation.", s); 3110 return (EINVAL); 3111 } 3112 3113 while ((param = strsep(pnext, ws)) != NULL) { 3114 if (*param != '\0') 3115 break; 3116 } 3117 if (param == NULL) { 3118 warnx("\"%s\" is not a valid keyword, or it requires a " 3119 "parameter that has not been provided.", s); 3120 return (EINVAL); 3121 } 3122 3123 if (!strcmp(s, "cong")) { 3124 if (!strcmp(param, "reno")) 3125 os->cong_algo = 0; 3126 else if (!strcmp(param, "tahoe")) 3127 os->cong_algo = 1; 3128 else if (!strcmp(param, "newreno")) 3129 os->cong_algo = 2; 3130 else if (!strcmp(param, "highspeed")) 3131 os->cong_algo = 3; 3132 else { 3133 warnx("unknown congestion algorithm \"%s\".", s); 3134 return (EINVAL); 3135 } 3136 } else if (!strcmp(s, "class")) { 3137 val = -1; 3138 p = str_to_number(param, &val, NULL); 3139 /* (nsched_cls - 1) is spelled 15 here. */ 3140 if (*p || val < 0 || val > 15) { 3141 warnx("invalid scheduling class \"%s\". " 3142 "\"class\" needs an integer value where " 3143 "0 <= value <= 15", param); 3144 return (EINVAL); 3145 } 3146 os->sched_class = val; 3147 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") || 3148 !strcmp(s, "rxq")) { 3149 val = -1; 3150 if (strcmp(param, "random")) { 3151 p = str_to_number(param, &val, NULL); 3152 if (*p || val < 0 || val > 0xffff) { 3153 warnx("invalid queue specification " 3154 "\"%s\". \"%s\" needs an integer" 3155 " value, or \"random\".", 3156 param, s); 3157 return (EINVAL); 3158 } 3159 } 3160 if (!strcmp(s, "bind")) { 3161 os->txq = val; 3162 os->rxq = val; 3163 } else if (!strcmp(s, "txq")) { 3164 os->txq = val; 3165 } else if (!strcmp(s, "rxq")) { 3166 os->rxq = val; 3167 } else { 3168 return (EDOOFUS); 3169 } 3170 } else if (!strcmp(s, "mss")) { 3171 val = -1; 3172 p = str_to_number(param, &val, NULL); 3173 if (*p || val <= 0) { 3174 warnx("invalid MSS specification \"%s\". " 3175 "\"mss\" needs a positive integer value", 3176 param); 3177 return (EINVAL); 3178 } 3179 os->mss = val; 3180 } else { 3181 warnx("unknown settings keyword: \"%s\"", s); 3182 return (EINVAL); 3183 } 3184 } 3185 3186 return (0); 3187} 3188 3189static int 3190parse_offload_settings(const char *settings_ro, struct offload_settings *os) 3191{ 3192 const char *ws = " \f\n\r\v\t"; 3193 char *settings, *s, *next; 3194 int rc, nsettings, neg; 3195 static const struct offload_settings default_settings = { 3196 .offload = 0, /* No settings imply !offload */ 3197 .rx_coalesce = -1, 3198 .cong_algo = -1, 3199 .sched_class = -1, 3200 .tstamp = -1, 3201 .sack = -1, 3202 .nagle = -1, 3203 .ecn = -1, 3204 .ddp = -1, 3205 .tls = -1, 3206 .txq = -1, 3207 .rxq = -1, 3208 .mss = -1, 3209 }; 3210 3211 *os = default_settings; 3212 3213 next = settings = strdup(settings_ro); 3214 if (settings == NULL) { 3215 warn (NULL); 3216 return (errno); 3217 } 3218 3219 nsettings = 0; 3220 rc = 0; 3221 neg = 0; 3222 while ((s = strsep(&next, ws)) != NULL) { 3223 if (*s == '\0') 3224 continue; 3225 nsettings++; 3226 rc = parse_offload_settings_word(s, &next, ws, &neg, os); 3227 if (rc != 0) 3228 goto done; 3229 } 3230 if (nsettings == 0) { 3231 warnx("no settings provided"); 3232 rc = EINVAL; 3233 goto done; 3234 } 3235 if (neg > 0) { 3236 warnx("%d stray negation(s) at end of offload settings", neg); 3237 rc = EINVAL; 3238 goto done; 3239 } 3240done: 3241 free(settings); 3242 return (rc); 3243} 3244 3245static int 3246isempty_line(char *line, size_t llen) 3247{ 3248 3249 /* skip leading whitespace */ 3250 while (isspace(*line)) { 3251 line++; 3252 llen--; 3253 } 3254 if (llen == 0 || *line == '#' || *line == '\n') 3255 return (1); 3256 3257 return (0); 3258} 3259 3260static int 3261special_offload_rule(char *str) 3262{ 3263 3264 /* skip leading whitespaces */ 3265 while (isspace(*str)) 3266 str++; 3267 3268 /* check for special strings: "-", "all", "any" */ 3269 if (*str == '-') { 3270 str++; 3271 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) { 3272 str += 3; 3273 } else { 3274 return (0); 3275 } 3276 3277 /* skip trailing whitespaces */ 3278 while (isspace(*str)) 3279 str++; 3280 3281 return (*str == '\0'); 3282} 3283 3284/* 3285 * A rule has 3 parts: an open-type, a match expression, and offload settings. 3286 * 3287 * [<open-type>] <expr> => <settings> 3288 */ 3289static int 3290parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd, 3291 struct offload_rule *r) 3292{ 3293 char *expr, *settings, *s; 3294 3295 bzero(r, sizeof(*r)); 3296 3297 /* Skip leading whitespace. */ 3298 while (isspace(*line)) 3299 line++; 3300 /* Trim trailing whitespace */ 3301 s = &line[llen - 1]; 3302 while (isspace(*s)) { 3303 *s-- = '\0'; 3304 llen--; 3305 } 3306 3307 /* 3308 * First part of the rule: '[X]' where X = A/D/L/P 3309 */ 3310 if (*line++ != '[') { 3311 warnx("missing \"[\" on line %zd", lno); 3312 return (EINVAL); 3313 } 3314 switch (*line) { 3315 case 'A': 3316 case 'D': 3317 case 'L': 3318 case 'P': 3319 r->open_type = *line; 3320 break; 3321 default: 3322 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno); 3323 return (EINVAL); 3324 } 3325 line++; 3326 if (*line++ != ']') { 3327 warnx("missing \"]\" after \"[%c\" on line %zd", 3328 r->open_type, lno); 3329 return (EINVAL); 3330 } 3331 3332 /* Skip whitespace. */ 3333 while (isspace(*line)) 3334 line++; 3335 3336 /* 3337 * Rest of the rule: <expr> => <settings> 3338 */ 3339 expr = line; 3340 s = strstr(line, "=>"); 3341 if (s == NULL) 3342 return (EINVAL); 3343 settings = s + 2; 3344 while (isspace(*settings)) 3345 settings++; 3346 *s = '\0'; 3347 3348 /* 3349 * <expr> is either a special name (all, any) or a pcap-filter(7). 3350 * In case of a special name the bpf_prog stays all-zero. 3351 */ 3352 if (!special_offload_rule(expr)) { 3353 if (pcap_compile(pd, &r->bpf_prog, expr, 1, 3354 PCAP_NETMASK_UNKNOWN) < 0) { 3355 warnx("failed to compile \"%s\" on line %zd: %s", expr, 3356 lno, pcap_geterr(pd)); 3357 return (EINVAL); 3358 } 3359 } 3360 3361 /* settings to apply on a match. */ 3362 if (parse_offload_settings(settings, &r->settings) != 0) { 3363 warnx("failed to parse offload settings \"%s\" on line %zd", 3364 settings, lno); 3365 pcap_freecode(&r->bpf_prog); 3366 return (EINVAL); 3367 } 3368 3369 return (0); 3370 3371} 3372 3373/* 3374 * Note that op itself is not dynamically allocated. 3375 */ 3376static void 3377free_offload_policy(struct t4_offload_policy *op) 3378{ 3379 int i; 3380 3381 for (i = 0; i < op->nrules; i++) { 3382 /* 3383 * pcap_freecode can cope with empty bpf_prog, which is the case 3384 * for an rule that matches on 'any/all/-'. 3385 */ 3386 pcap_freecode(&op->rule[i].bpf_prog); 3387 } 3388 free(op->rule); 3389 op->nrules = 0; 3390 op->rule = NULL; 3391} 3392 3393#define REALLOC_STRIDE 32 3394 3395/* 3396 * Fills up op->nrules and op->rule. 3397 */ 3398static int 3399parse_offload_policy(const char *fname, struct t4_offload_policy *op) 3400{ 3401 FILE *fp; 3402 char *line; 3403 int lno, maxrules, rc; 3404 size_t lcap, llen; 3405 struct offload_rule *r; 3406 pcap_t *pd; 3407 3408 fp = fopen(fname, "r"); 3409 if (fp == NULL) { 3410 warn("Unable to open file \"%s\"", fname); 3411 return (errno); 3412 } 3413 pd = pcap_open_dead(DLT_EN10MB, 128); 3414 if (pd == NULL) { 3415 warnx("Failed to open pcap device"); 3416 fclose(fp); 3417 return (EIO); 3418 } 3419 3420 rc = 0; 3421 lno = 0; 3422 lcap = 0; 3423 maxrules = 0; 3424 op->nrules = 0; 3425 op->rule = NULL; 3426 line = NULL; 3427 3428 while ((llen = getline(&line, &lcap, fp)) != -1) { 3429 lno++; 3430 3431 /* Skip empty lines. */ 3432 if (isempty_line(line, llen)) 3433 continue; 3434 3435 if (op->nrules == maxrules) { 3436 maxrules += REALLOC_STRIDE; 3437 r = realloc(op->rule, 3438 maxrules * sizeof(struct offload_rule)); 3439 if (r == NULL) { 3440 warnx("failed to allocate memory for %d rules", 3441 maxrules); 3442 rc = ENOMEM; 3443 goto done; 3444 } 3445 op->rule = r; 3446 } 3447 3448 r = &op->rule[op->nrules]; 3449 rc = parse_offload_policy_line(lno, line, llen, pd, r); 3450 if (rc != 0) { 3451 warnx("Error parsing line %d of \"%s\"", lno, fname); 3452 goto done; 3453 } 3454 3455 op->nrules++; 3456 } 3457 free(line); 3458 3459 if (!feof(fp)) { 3460 warn("Error while reading from file \"%s\" at line %d", 3461 fname, lno); 3462 rc = errno; 3463 goto done; 3464 } 3465 3466 if (op->nrules == 0) { 3467 warnx("No valid rules found in \"%s\"", fname); 3468 rc = EINVAL; 3469 } 3470done: 3471 pcap_close(pd); 3472 fclose(fp); 3473 if (rc != 0) { 3474 free_offload_policy(op); 3475 } 3476 3477 return (rc); 3478} 3479 3480static int 3481load_offload_policy(int argc, const char *argv[]) 3482{ 3483 int rc = 0; 3484 const char *fname = argv[0]; 3485 struct t4_offload_policy op = {0}; 3486 3487 if (argc != 1) { 3488 warnx("incorrect number of arguments."); 3489 return (EINVAL); 3490 } 3491 3492 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) { 3493 /* op.nrules is 0 and that means clear policy */ 3494 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op)); 3495 } 3496 3497 rc = parse_offload_policy(fname, &op); 3498 if (rc != 0) { 3499 /* Error message displayed already */ 3500 return (EINVAL); 3501 } 3502 3503 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op); 3504 free_offload_policy(&op); 3505 3506 return (rc); 3507} 3508 3509static int 3510run_cmd(int argc, const char *argv[]) 3511{ 3512 int rc = -1; 3513 const char *cmd = argv[0]; 3514 3515 /* command */ 3516 argc--; 3517 argv++; 3518 3519 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) 3520 rc = register_io(argc, argv, 4); 3521 else if (!strcmp(cmd, "reg64")) 3522 rc = register_io(argc, argv, 8); 3523 else if (!strcmp(cmd, "regdump")) 3524 rc = dump_regs(argc, argv); 3525 else if (!strcmp(cmd, "filter")) 3526 rc = filter_cmd(argc, argv, 0); 3527 else if (!strcmp(cmd, "context")) 3528 rc = get_sge_context(argc, argv); 3529 else if (!strcmp(cmd, "loadfw")) 3530 rc = loadfw(argc, argv); 3531 else if (!strcmp(cmd, "memdump")) 3532 rc = memdump(argc, argv); 3533 else if (!strcmp(cmd, "tcb")) 3534 rc = read_tcb(argc, argv); 3535 else if (!strcmp(cmd, "i2c")) 3536 rc = read_i2c(argc, argv); 3537 else if (!strcmp(cmd, "clearstats")) 3538 rc = clearstats(argc, argv); 3539 else if (!strcmp(cmd, "tracer")) 3540 rc = tracer_cmd(argc, argv); 3541 else if (!strcmp(cmd, "modinfo")) 3542 rc = modinfo(argc, argv); 3543 else if (!strcmp(cmd, "sched-class")) 3544 rc = sched_class(argc, argv); 3545 else if (!strcmp(cmd, "sched-queue")) 3546 rc = sched_queue(argc, argv); 3547 else if (!strcmp(cmd, "loadcfg")) 3548 rc = loadcfg(argc, argv); 3549 else if (!strcmp(cmd, "loadboot")) 3550 rc = loadboot(argc, argv); 3551 else if (!strcmp(cmd, "loadboot-cfg")) 3552 rc = loadbootcfg(argc, argv); 3553 else if (!strcmp(cmd, "dumpstate")) 3554 rc = dumpstate(argc, argv); 3555 else if (!strcmp(cmd, "policy")) 3556 rc = load_offload_policy(argc, argv); 3557 else if (!strcmp(cmd, "hashfilter")) 3558 rc = filter_cmd(argc, argv, 1); 3559 else { 3560 rc = EINVAL; 3561 warnx("invalid command \"%s\"", cmd); 3562 } 3563 3564 return (rc); 3565} 3566 3567#define MAX_ARGS 15 3568static int 3569run_cmd_loop(void) 3570{ 3571 int i, rc = 0; 3572 char buffer[128], *buf; 3573 const char *args[MAX_ARGS + 1]; 3574 3575 /* 3576 * Simple loop: displays a "> " prompt and processes any input as a 3577 * cxgbetool command. You're supposed to enter only the part after 3578 * "cxgbetool t4nexX". Use "quit" or "exit" to exit. 3579 */ 3580 for (;;) { 3581 fprintf(stdout, "> "); 3582 fflush(stdout); 3583 buf = fgets(buffer, sizeof(buffer), stdin); 3584 if (buf == NULL) { 3585 if (ferror(stdin)) { 3586 warn("stdin error"); 3587 rc = errno; /* errno from fgets */ 3588 } 3589 break; 3590 } 3591 3592 i = 0; 3593 while ((args[i] = strsep(&buf, " \t\n")) != NULL) { 3594 if (args[i][0] != 0 && ++i == MAX_ARGS) 3595 break; 3596 } 3597 args[i] = 0; 3598 3599 if (i == 0) 3600 continue; /* skip empty line */ 3601 3602 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) 3603 break; 3604 3605 rc = run_cmd(i, args); 3606 } 3607 3608 /* rc normally comes from the last command (not including quit/exit) */ 3609 return (rc); 3610} 3611 3612int 3613main(int argc, const char *argv[]) 3614{ 3615 int rc = -1; 3616 3617 progname = argv[0]; 3618 3619 if (argc == 2) { 3620 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { 3621 usage(stdout); 3622 exit(0); 3623 } 3624 } 3625 3626 if (argc < 3) { 3627 usage(stderr); 3628 exit(EINVAL); 3629 } 3630 3631 nexus = argv[1]; 3632 chip_id = nexus[1] - '0'; 3633 3634 /* progname and nexus */ 3635 argc -= 2; 3636 argv += 2; 3637 3638 if (argc == 1 && !strcmp(argv[0], "stdio")) 3639 rc = run_cmd_loop(); 3640 else 3641 rc = run_cmd(argc, argv); 3642 3643 return (rc); 3644} 3645