tick.c revision 330897
1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2006-2007 Bruce M. Simpson. 5 * Copyright (c) 2003-2004 Juli Mallett. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30/* 31 * Simple driver for the 32-bit interval counter built in to all 32 * MIPS32 CPUs. 33 */ 34 35#include <sys/cdefs.h> 36__FBSDID("$FreeBSD: stable/11/sys/mips/rmi/tick.c 330897 2018-03-14 03:19:51Z eadler $"); 37 38#include <sys/param.h> 39#include <sys/systm.h> 40#include <sys/sysctl.h> 41#include <sys/bus.h> 42#include <sys/kernel.h> 43#include <sys/module.h> 44#include <sys/rman.h> 45#include <sys/power.h> 46#include <sys/smp.h> 47#include <sys/time.h> 48#include <sys/timeet.h> 49#include <sys/timetc.h> 50 51#include <machine/hwfunc.h> 52#include <machine/clock.h> 53#include <machine/locore.h> 54#include <machine/md_var.h> 55#include <machine/intr_machdep.h> 56#include <mips/rmi/interrupt.h> 57 58uint64_t counter_freq; 59 60struct timecounter *platform_timecounter; 61 62static DPCPU_DEFINE(uint32_t, cycles_per_tick); 63static uint32_t cycles_per_usec; 64 65static DPCPU_DEFINE(volatile uint32_t, counter_upper); 66static DPCPU_DEFINE(volatile uint32_t, counter_lower_last); 67static DPCPU_DEFINE(uint32_t, compare_ticks); 68static DPCPU_DEFINE(uint32_t, lost_ticks); 69 70struct clock_softc { 71 int intr_rid; 72 struct resource *intr_res; 73 void *intr_handler; 74 struct timecounter tc; 75 struct eventtimer et; 76}; 77static struct clock_softc *softc; 78 79/* 80 * Device methods 81 */ 82static int clock_probe(device_t); 83static void clock_identify(driver_t *, device_t); 84static int clock_attach(device_t); 85static unsigned counter_get_timecount(struct timecounter *tc); 86 87void 88mips_timer_early_init(uint64_t clock_hz) 89{ 90 /* Initialize clock early so that we can use DELAY sooner */ 91 counter_freq = clock_hz; 92 cycles_per_usec = (clock_hz / (1000 * 1000)); 93} 94 95void 96platform_initclocks(void) 97{ 98 99 if (platform_timecounter != NULL) 100 tc_init(platform_timecounter); 101} 102 103static uint64_t 104tick_ticker(void) 105{ 106 uint64_t ret; 107 uint32_t ticktock; 108 uint32_t t_lower_last, t_upper; 109 110 /* 111 * Disable preemption because we are working with cpu specific data. 112 */ 113 critical_enter(); 114 115 /* 116 * Note that even though preemption is disabled, interrupts are 117 * still enabled. In particular there is a race with clock_intr() 118 * reading the values of 'counter_upper' and 'counter_lower_last'. 119 * 120 * XXX this depends on clock_intr() being executed periodically 121 * so that 'counter_upper' and 'counter_lower_last' are not stale. 122 */ 123 do { 124 t_upper = DPCPU_GET(counter_upper); 125 t_lower_last = DPCPU_GET(counter_lower_last); 126 } while (t_upper != DPCPU_GET(counter_upper)); 127 128 ticktock = mips_rd_count(); 129 130 critical_exit(); 131 132 /* COUNT register wrapped around */ 133 if (ticktock < t_lower_last) 134 t_upper++; 135 136 ret = ((uint64_t)t_upper << 32) | ticktock; 137 return (ret); 138} 139 140void 141mips_timer_init_params(uint64_t platform_counter_freq, int double_count) 142{ 143 144 /* 145 * XXX: Do not use printf here: uart code 8250 may use DELAY so this 146 * function should be called before cninit. 147 */ 148 counter_freq = platform_counter_freq; 149 /* 150 * XXX: Some MIPS32 cores update the Count register only every two 151 * pipeline cycles. 152 * We know this because of status registers in CP0, make it automatic. 153 */ 154 if (double_count != 0) 155 counter_freq /= 2; 156 157 cycles_per_usec = counter_freq / (1 * 1000 * 1000); 158 set_cputicker(tick_ticker, counter_freq, 1); 159} 160 161static int 162sysctl_machdep_counter_freq(SYSCTL_HANDLER_ARGS) 163{ 164 int error; 165 uint64_t freq; 166 167 if (softc == NULL) 168 return (EOPNOTSUPP); 169 freq = counter_freq; 170 error = sysctl_handle_64(oidp, &freq, sizeof(freq), req); 171 if (error == 0 && req->newptr != NULL) { 172 counter_freq = freq; 173 softc->et.et_frequency = counter_freq; 174 softc->tc.tc_frequency = counter_freq; 175 } 176 return (error); 177} 178 179SYSCTL_PROC(_machdep, OID_AUTO, counter_freq, CTLTYPE_U64 | CTLFLAG_RW, 180 NULL, 0, sysctl_machdep_counter_freq, "QU", 181 "Timecounter frequency in Hz"); 182 183static unsigned 184counter_get_timecount(struct timecounter *tc) 185{ 186 187 return (mips_rd_count()); 188} 189 190/* 191 * Wait for about n microseconds (at least!). 192 */ 193void 194DELAY(int n) 195{ 196 uint32_t cur, last, delta, usecs; 197 198 /* 199 * This works by polling the timer and counting the number of 200 * microseconds that go by. 201 */ 202 last = mips_rd_count(); 203 delta = usecs = 0; 204 205 while (n > usecs) { 206 cur = mips_rd_count(); 207 208 /* Check to see if the timer has wrapped around. */ 209 if (cur < last) 210 delta += cur + (0xffffffff - last) + 1; 211 else 212 delta += cur - last; 213 214 last = cur; 215 216 if (delta >= cycles_per_usec) { 217 usecs += delta / cycles_per_usec; 218 delta %= cycles_per_usec; 219 } 220 } 221} 222 223static int 224clock_start(struct eventtimer *et, sbintime_t first, sbintime_t period) 225{ 226 uint32_t fdiv, div, next; 227 228 if (period != 0) 229 div = (et->et_frequency * period) >> 32; 230 else 231 div = 0; 232 if (first != 0) 233 fdiv = (et->et_frequency * first) >> 32; 234 else 235 fdiv = div; 236 DPCPU_SET(cycles_per_tick, div); 237 next = mips_rd_count() + fdiv; 238 DPCPU_SET(compare_ticks, next); 239 mips_wr_compare(next); 240 return (0); 241} 242 243static int 244clock_stop(struct eventtimer *et) 245{ 246 247 DPCPU_SET(cycles_per_tick, 0); 248 mips_wr_compare(0xffffffff); 249 return (0); 250} 251 252/* 253 * Device section of file below 254 */ 255static int 256clock_intr(void *arg) 257{ 258 struct clock_softc *sc = (struct clock_softc *)arg; 259 uint32_t cycles_per_tick; 260 uint32_t count, compare_last, compare_next, lost_ticks; 261 262 cycles_per_tick = DPCPU_GET(cycles_per_tick); 263 /* 264 * Set next clock edge. 265 */ 266 count = mips_rd_count(); 267 compare_last = DPCPU_GET(compare_ticks); 268 if (cycles_per_tick > 0) { 269 compare_next = count + cycles_per_tick; 270 DPCPU_SET(compare_ticks, compare_next); 271 mips_wr_compare(compare_next); 272 } else /* In one-shot mode timer should be stopped after the event. */ 273 mips_wr_compare(0xffffffff); 274 275 /* COUNT register wrapped around */ 276 if (count < DPCPU_GET(counter_lower_last)) { 277 DPCPU_SET(counter_upper, DPCPU_GET(counter_upper) + 1); 278 } 279 DPCPU_SET(counter_lower_last, count); 280 281 if (cycles_per_tick > 0) { 282 283 /* 284 * Account for the "lost time" between when the timer interrupt 285 * fired and when 'clock_intr' actually started executing. 286 */ 287 lost_ticks = DPCPU_GET(lost_ticks); 288 lost_ticks += count - compare_last; 289 290 /* 291 * If the COUNT and COMPARE registers are no longer in sync 292 * then make up some reasonable value for the 'lost_ticks'. 293 * 294 * This could happen, for e.g., after we resume normal 295 * operations after exiting the debugger. 296 */ 297 if (lost_ticks > 2 * cycles_per_tick) 298 lost_ticks = cycles_per_tick; 299 300 while (lost_ticks >= cycles_per_tick) { 301 if (sc->et.et_active) 302 sc->et.et_event_cb(&sc->et, sc->et.et_arg); 303 lost_ticks -= cycles_per_tick; 304 } 305 DPCPU_SET(lost_ticks, lost_ticks); 306 } 307 if (sc->et.et_active) 308 sc->et.et_event_cb(&sc->et, sc->et.et_arg); 309 return (FILTER_HANDLED); 310} 311 312static int 313clock_probe(device_t dev) 314{ 315 316 device_set_desc(dev, "Generic MIPS32 ticker"); 317 return (BUS_PROBE_NOWILDCARD); 318} 319 320static void 321clock_identify(driver_t * drv, device_t parent) 322{ 323 324 BUS_ADD_CHILD(parent, 0, "clock", 0); 325} 326 327static int 328clock_attach(device_t dev) 329{ 330 struct clock_softc *sc; 331 332 if (device_get_unit(dev) != 0) 333 panic("can't attach more clocks"); 334 335 softc = sc = device_get_softc(dev); 336 cpu_establish_hardintr("compare", clock_intr, NULL, 337 sc, IRQ_TIMER, INTR_TYPE_CLK, &sc->intr_handler); 338 339 sc->tc.tc_get_timecount = counter_get_timecount; 340 sc->tc.tc_counter_mask = 0xffffffff; 341 sc->tc.tc_frequency = counter_freq; 342 sc->tc.tc_name = "MIPS32"; 343 sc->tc.tc_quality = 800; 344 sc->tc.tc_priv = sc; 345 tc_init(&sc->tc); 346 sc->et.et_name = "MIPS32"; 347 sc->et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT | 348 ET_FLAGS_PERCPU; 349 sc->et.et_quality = 800; 350 sc->et.et_frequency = counter_freq; 351 sc->et.et_min_period = 0x00004000LLU; /* To be safe. */ 352 sc->et.et_max_period = (0xfffffffeLLU << 32) / sc->et.et_frequency; 353 sc->et.et_start = clock_start; 354 sc->et.et_stop = clock_stop; 355 sc->et.et_priv = sc; 356 et_register(&sc->et); 357 return (0); 358} 359 360static device_method_t clock_methods[] = { 361 /* Device interface */ 362 DEVMETHOD(device_probe, clock_probe), 363 DEVMETHOD(device_identify, clock_identify), 364 DEVMETHOD(device_attach, clock_attach), 365 DEVMETHOD(device_detach, bus_generic_detach), 366 DEVMETHOD(device_shutdown, bus_generic_shutdown), 367 368 {0, 0} 369}; 370 371static driver_t clock_driver = { 372 "clock", 373 clock_methods, 374 sizeof(struct clock_softc), 375}; 376 377static devclass_t clock_devclass; 378 379DRIVER_MODULE(clock, nexus, clock_driver, clock_devclass, 0, 0); 380