sgmii.h revision 331722 
1/*-
2 * Copyright (c) 2003-2012 Broadcom Corporation
3 * All Rights Reserved
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in
13 *    the documentation and/or other materials provided with the
14 *    distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * $FreeBSD: stable/11/sys/mips/nlm/hal/sgmii.h 331722 2018-03-29 02:50:57Z eadler $
29 */
30
31#ifndef __NLM_SGMII_H__
32#define	__NLM_SGMII_H__
33
34/**
35* @file_name sgmii.h
36* @author Netlogic Microsystems
37* @brief Basic definitions of XLP SGMII ports
38*/
39
40#define	SGMII_MAC_CONF1(block, i)		NAE_REG(block, i, 0x00)
41#define	SGMII_MAC_CONF2(block, i)		NAE_REG(block, i, 0x01)
42#define	SGMII_IPG_IFG(block, i)			NAE_REG(block, i, 0x02)
43#define	SGMII_HLF_DUP(block, i)			NAE_REG(block, i, 0x03)
44#define	SGMII_MAX_FRAME(block, i)		NAE_REG(block, i, 0x04)
45#define	SGMII_TEST(block, i)			NAE_REG(block, i, 0x07)
46#define	SGMII_MIIM_CONF(block, i)		NAE_REG(block, i, 0x08)
47#define	SGMII_MIIM_CMD(block, i)		NAE_REG(block, i, 0x09)
48#define	SGMII_MIIM_ADDR(block, i)		NAE_REG(block, i, 0x0a)
49#define	SGMII_MIIM_CTRL(block, i)		NAE_REG(block, i, 0x0b)
50#define	SGMII_MIIM_STAT(block, i)		NAE_REG(block, i, 0x0c)
51#define	SGMII_MIIM_IND(block, i)		NAE_REG(block, i, 0x0d)
52#define	SGMII_IO_CTRL(block, i)			NAE_REG(block, i, 0x0e)
53#define	SGMII_IO_STAT(block, i)			NAE_REG(block, i, 0x0f)
54#define	SGMII_STATS_MLR(block, i)		NAE_REG(block, i, 0x1f)
55#define	SGMII_STATS_TR64(block, i)		NAE_REG(block, i, 0x20)
56#define	SGMII_STATS_TR127(block, i)		NAE_REG(block, i, 0x21)
57#define	SGMII_STATS_TR255(block, i)		NAE_REG(block, i, 0x22)
58#define	SGMII_STATS_TR511(block, i)		NAE_REG(block, i, 0x23)
59#define	SGMII_STATS_TR1K(block, i)		NAE_REG(block, i, 0x24)
60#define	SGMII_STATS_TRMAX(block, i)		NAE_REG(block, i, 0x25)
61#define	SGMII_STATS_TRMGV(block, i)		NAE_REG(block, i, 0x26)
62#define	SGMII_STATS_RBYT(block, i)		NAE_REG(block, i, 0x27)
63#define	SGMII_STATS_RPKT(block, i)		NAE_REG(block, i, 0x28)
64#define	SGMII_STATS_RFCS(block, i)		NAE_REG(block, i, 0x29)
65#define	SGMII_STATS_RMCA(block, i)		NAE_REG(block, i, 0x2a)
66#define	SGMII_STATS_RBCA(block, i)		NAE_REG(block, i, 0x2b)
67#define	SGMII_STATS_RXCF(block, i)		NAE_REG(block, i, 0x2c)
68#define	SGMII_STATS_RXPF(block, i)		NAE_REG(block, i, 0x2d)
69#define	SGMII_STATS_RXUO(block, i)		NAE_REG(block, i, 0x2e)
70#define	SGMII_STATS_RALN(block, i)		NAE_REG(block, i, 0x2f)
71#define	SGMII_STATS_RFLR(block, i)		NAE_REG(block, i, 0x30)
72#define	SGMII_STATS_RCDE(block, i)		NAE_REG(block, i, 0x31)
73#define	SGMII_STATS_RCSE(block, i)		NAE_REG(block, i, 0x32)
74#define	SGMII_STATS_RUND(block, i)		NAE_REG(block, i, 0x33)
75#define	SGMII_STATS_ROVR(block, i)		NAE_REG(block, i, 0x34)
76#define	SGMII_STATS_RFRG(block, i)		NAE_REG(block, i, 0x35)
77#define	SGMII_STATS_RJBR(block, i)		NAE_REG(block, i, 0x36)
78#define	SGMII_STATS_TBYT(block, i)		NAE_REG(block, i, 0x38)
79#define	SGMII_STATS_TPKT(block, i)		NAE_REG(block, i, 0x39)
80#define	SGMII_STATS_TMCA(block, i)		NAE_REG(block, i, 0x3a)
81#define	SGMII_STATS_TBCA(block, i)		NAE_REG(block, i, 0x3b)
82#define	SGMII_STATS_TXPF(block, i)		NAE_REG(block, i, 0x3c)
83#define	SGMII_STATS_TDFR(block, i)		NAE_REG(block, i, 0x3d)
84#define	SGMII_STATS_TEDF(block, i)		NAE_REG(block, i, 0x3e)
85#define	SGMII_STATS_TSCL(block, i)		NAE_REG(block, i, 0x3f)
86#define	SGMII_STATS_TMCL(block, i)		NAE_REG(block, i, 0x40)
87#define	SGMII_STATS_TLCL(block, i)		NAE_REG(block, i, 0x41)
88#define	SGMII_STATS_TXCL(block, i)		NAE_REG(block, i, 0x42)
89#define	SGMII_STATS_TNCL(block, i)		NAE_REG(block, i, 0x43)
90#define	SGMII_STATS_TJBR(block, i)		NAE_REG(block, i, 0x46)
91#define	SGMII_STATS_TFCS(block, i)		NAE_REG(block, i, 0x47)
92#define	SGMII_STATS_TXCF(block, i)		NAE_REG(block, i, 0x48)
93#define	SGMII_STATS_TOVR(block, i)		NAE_REG(block, i, 0x49)
94#define	SGMII_STATS_TUND(block, i)		NAE_REG(block, i, 0x4a)
95#define	SGMII_STATS_TFRG(block, i)		NAE_REG(block, i, 0x4b)
96#define	SGMII_STATS_CAR1(block, i)		NAE_REG(block, i, 0x4c)
97#define	SGMII_STATS_CAR2(block, i)		NAE_REG(block, i, 0x4d)
98#define	SGMII_STATS_CAM1(block, i)		NAE_REG(block, i, 0x4e)
99#define	SGMII_STATS_CAM2(block, i)		NAE_REG(block, i, 0x4f)
100#define	SGMII_MAC_ADDR0_LO(block, i)		NAE_REG(block, i, 0x50)
101#define	SGMII_MAC_ADDR0_HI(block, i)		NAE_REG(block, i, 0x51)
102#define	SGMII_MAC_ADDR1_LO(block, i)		NAE_REG(block, i, 0x52)
103#define	SGMII_MAC_ADDR1_HI(block, i)		NAE_REG(block, i, 0x53)
104#define	SGMII_MAC_ADDR2_LO(block, i)		NAE_REG(block, i, 0x54)
105#define	SGMII_MAC_ADDR2_HI(block, i)		NAE_REG(block, i, 0x55)
106#define	SGMII_MAC_ADDR3_LO(block, i)		NAE_REG(block, i, 0x56)
107#define	SGMII_MAC_ADDR3_HI(block, i)		NAE_REG(block, i, 0x57)
108#define	SGMII_MAC_ADDR_MASK0_LO(block, i)	NAE_REG(block, i, 0x58)
109#define	SGMII_MAC_ADDR_MASK0_HI(block, i)	NAE_REG(block, i, 0x59)
110#define	SGMII_MAC_ADDR_MASK1_LO(block, i)	NAE_REG(block, i, 0x5a)
111#define	SGMII_MAC_ADDR_MASK1_HI(block, i)	NAE_REG(block, i, 0x5b)
112#define	SGMII_MAC_FILTER_CONFIG(block, i)	NAE_REG(block, i, 0x5c)
113#define	SGMII_HASHTBL_VEC_B31_0(block, i)	NAE_REG(block, i, 0x60)
114#define	SGMII_HASHTBL_VEC_B63_32(block, i)	NAE_REG(block, i, 0x61)
115#define	SGMII_HASHTBL_VEC_B95_64(block, i)	NAE_REG(block, i, 0x62)
116#define	SGMII_HASHTBL_VEC_B127_96(block, i)	NAE_REG(block, i, 0x63)
117#define	SGMII_HASHTBL_VEC_B159_128(block, i)	NAE_REG(block, i, 0x64)
118#define	SGMII_HASHTBL_VEC_B191_160(block, i)	NAE_REG(block, i, 0x65)
119#define	SGMII_HASHTBL_VEC_B223_192(block, i)	NAE_REG(block, i, 0x66)
120#define	SGMII_HASHTBL_VEC_B255_224(block, i)	NAE_REG(block, i, 0x67)
121#define	SGMII_HASHTBL_VEC_B287_256(block, i)	NAE_REG(block, i, 0x68)
122#define	SGMII_HASHTBL_VEC_B319_288(block, i)	NAE_REG(block, i, 0x69)
123#define	SGMII_HASHTBL_VEC_B351_320(block, i)	NAE_REG(block, i, 0x6a)
124#define	SGMII_HASHTBL_VEC_B383_352(block, i)	NAE_REG(block, i, 0x6b)
125#define	SGMII_HASHTBL_VEC_B415_384(block, i)	NAE_REG(block, i, 0x6c)
126#define	SGMII_HASHTBL_VEC_B447_416(block, i)	NAE_REG(block, i, 0x6d)
127#define	SGMII_HASHTBL_VEC_B479_448(block, i)	NAE_REG(block, i, 0x6e)
128#define	SGMII_HASHTBL_VEC_B511_480(block, i)	NAE_REG(block, i, 0x6f)
129
130#define	SGMII_NETIOR_VLANTYPE_FILTER(block, i)	NAE_REG(block, i, 0x76)
131#define	SGMII_NETIOR_RXDROP_CNTR(block, i)	NAE_REG(block, i, 0x77)
132#define	SGMII_NETIOR_PAUSE_QUANTAMULT(block, i)	NAE_REG(block, i, 0x78)
133#define	SGMII_NETIOR_MAC_CTRL_OPCODE(block, i)	NAE_REG(block, i, 0x79)
134#define	SGMII_NETIOR_MAC_DA_H(block, i)		NAE_REG(block, i, 0x7a)
135#define	SGMII_NETIOR_MAC_DA_L(block, i)		NAE_REG(block, i, 0x7b)
136#define	SGMII_NET_IFACE_CTRL3(block, i)		NAE_REG(block, i, 0x7c)
137#define	SGMII_NETIOR_GMAC_STAT(block, i)	NAE_REG(block, i, 0x7d)
138#define	SGMII_NET_IFACE_CTRL2(block, i)		NAE_REG(block, i, 0x7e)
139#define	SGMII_NET_IFACE_CTRL(block, i)		NAE_REG(block, i, 0x7f)
140
141#if !defined(LOCORE) && !defined(__ASSEMBLY__)
142/* speed */
143enum nlm_sgmii_speed {
144	NLM_SGMII_SPEED_10,
145	NLM_SGMII_SPEED_100,
146	NLM_SGMII_SPEED_1000,
147	NLM_SGMII_SPEED_RSVD
148};
149
150/* duplexity */
151enum nlm_sgmii_duplex_mode {
152	NLM_SGMII_DUPLEX_AUTO,
153	NLM_SGMII_DUPLEX_HALF,
154	NLM_SGMII_DUPLEX_FULL
155};
156
157/* stats */
158enum {
159	nlm_sgmii_stats_mlr,
160	nlm_sgmii_stats_tr64,
161	nlm_sgmii_stats_tr127,
162	nlm_sgmii_stats_tr255,
163	nlm_sgmii_stats_tr511,
164	nlm_sgmii_stats_tr1k,
165	nlm_sgmii_stats_trmax,
166	nlm_sgmii_stats_trmgv,
167	nlm_sgmii_stats_rbyt,
168	nlm_sgmii_stats_rpkt,
169	nlm_sgmii_stats_rfcs,
170	nlm_sgmii_stats_rmca,
171	nlm_sgmii_stats_rbca,
172	nlm_sgmii_stats_rxcf,
173	nlm_sgmii_stats_rxpf,
174	nlm_sgmii_stats_rxuo,
175	nlm_sgmii_stats_raln,
176	nlm_sgmii_stats_rflr,
177	nlm_sgmii_stats_rcde,
178	nlm_sgmii_stats_rcse,
179	nlm_sgmii_stats_rund,
180	nlm_sgmii_stats_rovr,
181	nlm_sgmii_stats_rfrg,
182	nlm_sgmii_stats_rjbr,
183	nlm_sgmii_stats_rdummy, /* not used */
184	nlm_sgmii_stats_tbyt,
185	nlm_sgmii_stats_tpkt,
186	nlm_sgmii_stats_tmca,
187	nlm_sgmii_stats_tbca,
188	nlm_sgmii_stats_txpf,
189	nlm_sgmii_stats_tdfr,
190	nlm_sgmii_stats_tedf,
191	nlm_sgmii_stats_tscl,
192	nlm_sgmii_stats_tmcl,
193	nlm_sgmii_stats_tlcl,
194	nlm_sgmii_stats_txcl,
195	nlm_sgmii_stats_tncl,
196	nlm_sgmii_stats_tjbr,
197	nlm_sgmii_stats_tfcs,
198	nlm_sgmii_stats_txcf,
199	nlm_sgmii_stats_tovr,
200	nlm_sgmii_stats_tund,
201	nlm_sgmii_stats_tfrg,
202	nlm_sgmii_stats_car1,
203	nlm_sgmii_stats_car2,
204	nlm_sgmii_stats_cam1,
205	nlm_sgmii_stats_cam2
206};
207
208void nlm_configure_sgmii_interface(uint64_t, int, int, int, int);
209void nlm_sgmii_pcs_init(uint64_t, uint32_t);
210void nlm_nae_setup_mac(uint64_t, int, int, int, int, int, int, int);
211void nlm_nae_setup_rx_mode_sgmii(uint64_t, int, int, int, int, int,
212    int, int);
213void nlm_nae_setup_mac_addr_sgmii(uint64_t, int, int, int, uint8_t *);
214
215#endif /* !(LOCORE) && !(__ASSEMBLY__) */
216
217#endif
218