octeon_gpiovar.h revision 331722 
1/*-
2 * Copyright (c) 2011, Oleksandr Tymoshenko <gonzo@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice unmodified, this list of conditions, and the following
10 *    disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: stable/11/sys/mips/cavium/octeon_gpiovar.h 331722 2018-03-29 02:50:57Z eadler $
28 *
29 */
30
31#ifndef __OCTEON_GPIOVAR_H__
32#define __OCTEON_GPIOVAR_H__
33
34#define GPIO_LOCK(_sc)		mtx_lock(&(_sc)->gpio_mtx)
35#define GPIO_UNLOCK(_sc)	mtx_unlock(&(_sc)->gpio_mtx)
36#define GPIO_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->gpio_mtx, MA_OWNED)
37
38#define	OCTEON_GPIO_IRQ_LEVEL		0
39#define	OCTEON_GPIO_IRQ_EDGE		1
40
41#define	OCTEON_GPIO_PINS	24
42#define	OCTEON_GPIO_IRQS	16
43
44struct octeon_gpio_softc {
45	device_t		dev;
46	device_t		busdev;
47	struct mtx		gpio_mtx;
48	struct resource		*gpio_irq_res[OCTEON_GPIO_IRQS];
49	int			gpio_irq_rid[OCTEON_GPIO_IRQS];
50	void			*gpio_ih[OCTEON_GPIO_IRQS];
51	void			*gpio_intr_cookies[OCTEON_GPIO_IRQS];
52	int			gpio_npins;
53	struct gpio_pin		gpio_pins[OCTEON_GPIO_PINS];
54};
55
56#endif	/* __OCTEON_GPIOVAR_H__ */
57