beri_pic.c revision 331722
1/*- 2 * Copyright (c) 2013 SRI International 3 * All rights reserved. 4 * 5 * This software was developed by SRI International and the University of 6 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237) 7 * ("CTSRD"), as part of the DARPA CRASH research programme. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 */ 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: stable/11/sys/mips/beri/beri_pic.c 331722 2018-03-29 02:50:57Z eadler $"); 33 34#include <sys/param.h> 35#include <sys/kernel.h> 36#include <sys/lock.h> 37#include <sys/malloc.h> 38#include <sys/module.h> 39#include <sys/mutex.h> 40#include <sys/systm.h> 41#include <sys/bus.h> 42 43#include <machine/bus.h> 44#include <machine/intr_machdep.h> 45 46#include <dev/ofw/ofw_bus.h> 47#include <dev/ofw/ofw_bus_subr.h> 48 49#include <dev/fdt/fdt_common.h> 50 51#include "fdt_ic_if.h" 52 53struct beripic_softc; 54 55static uint64_t bp_read_cfg(struct beripic_softc *, int); 56static void bp_write_cfg(struct beripic_softc *, int, uint64_t); 57static void bp_detach_resources(device_t); 58static char *bp_strconfig(uint64_t, char *, size_t); 59static void bp_config_source(device_t, int, int, u_long, u_long); 60#ifdef __mips__ 61static void bp_set_counter_name(device_t, device_t, int); 62#endif 63 64static int beripic_fdt_probe(device_t); 65static int beripic_fdt_attach(device_t); 66 67static int beripic_activate_intr(device_t, struct resource *); 68static struct resource * 69 beripic_alloc_intr(device_t, device_t, int *, u_long, u_int); 70static int beripic_config_intr(device_t, int, enum intr_trigger, 71 enum intr_polarity); 72static int beripic_release_intr(device_t, struct resource *); 73static int beripic_setup_intr(device_t, device_t, struct resource *, 74 int, driver_filter_t *, driver_intr_t *, void *, void **); 75static int beripic_teardown_intr(device_t, device_t, struct resource *, 76 void *); 77 78static int beripic_filter(void *); 79static void beripic_intr(void *); 80 81#define BP_MAX_HARD_IRQS 6 82#define BP_FIRST_SOFT 64 83 84struct beripic_softc { 85 device_t bp_dev; 86 struct resource *bp_cfg_res; 87 struct resource *bp_read_res; 88 struct resource *bp_set_res; 89 struct resource *bp_clear_res; 90 int bp_cfg_rid; 91 int bp_read_rid; 92 int bp_set_rid; 93 int bp_clear_rid; 94 bus_space_tag_t bp_cfg_bst; 95 bus_space_tag_t bp_read_bst; 96 bus_space_tag_t bp_set_bst; 97 bus_space_tag_t bp_clear_bst; 98 bus_space_handle_t bp_cfg_bsh; 99 bus_space_handle_t bp_read_bsh; 100 bus_space_handle_t bp_set_bsh; 101 bus_space_handle_t bp_clear_bsh; 102 103 struct resource *bp_irqs[BP_MAX_HARD_IRQS]; 104 int bp_irq_rids[BP_MAX_HARD_IRQS]; 105 int bp_nirqs; 106 int bp_next_irq; 107 int bp_next_tid; 108 109 int bp_nthreads; 110 111 int bp_nhard; 112 int bp_nsoft; 113 int bp_nsrcs; 114 struct rman bp_src_rman; 115 116#ifdef __mips__ 117 mips_intrcnt_t *bp_counters; 118#endif 119 120 struct mtx bp_cfgmtx; 121}; 122 123struct beripic_intr_arg { 124 driver_filter_t *filter; 125 driver_intr_t *intr; 126 void *arg; 127 struct resource *irq; 128#ifdef __mips__ 129 mips_intrcnt_t counter; 130#endif 131}; 132 133struct beripic_cookie { 134 struct beripic_intr_arg *bpia; 135 struct resource *hirq; 136 void *cookie; 137}; 138 139#define BP_CFG_MASK_E 0x80000000ull 140#define BP_CFG_SHIFT_E 31 141#define BP_CFG_MASK_TID 0x7FFFFF00ull /* Depends on CPU */ 142#define BP_CFG_SHIFT_TID 8 143#define BP_CFG_MASK_IRQ 0x0000000Full 144#define BP_CFG_SHIFT_IRQ 0 145#define BP_CFG_VALID (BP_CFG_MASK_E|BP_CFG_MASK_TID|BP_CFG_MASK_IRQ) 146#define BP_CFG_RESERVED ~BP_CFG_VALID 147 148#define BP_CFG_ENABLED(cfg) (((cfg) & BP_CFG_MASK_E) >> BP_CFG_SHIFT_E) 149#define BP_CFG_TID(cfg) (((cfg) & BP_CFG_MASK_TID) >> BP_CFG_SHIFT_TID) 150#define BP_CFG_IRQ(cfg) (((cfg) & BP_CFG_MASK_IRQ) >> BP_CFG_SHIFT_IRQ) 151 152MALLOC_DEFINE(M_BERIPIC, "beripic", "beripic memory"); 153 154static uint64_t 155bp_read_cfg(struct beripic_softc *sc, int irq) 156{ 157 158 KASSERT((irq >= 0 && irq < sc->bp_nsrcs), 159 ("IRQ of of range %d (0-%d)", irq, sc->bp_nsrcs - 1)); 160 return (bus_space_read_8(sc->bp_cfg_bst, sc->bp_cfg_bsh, irq * 8)); 161} 162 163static void 164bp_write_cfg(struct beripic_softc *sc, int irq, uint64_t config) 165{ 166 167 KASSERT((irq >= 0 && irq < sc->bp_nsrcs), 168 ("IRQ of of range %d (0-%d)", irq, sc->bp_nsrcs - 1)); 169 bus_space_write_8(sc->bp_cfg_bst, sc->bp_cfg_bsh, irq * 8, config); 170} 171 172static void 173bp_detach_resources(device_t dev) 174{ 175 struct beripic_softc *sc; 176 int i; 177 178 sc = device_get_softc(dev); 179 180 if (sc->bp_cfg_res != NULL) { 181 bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_cfg_rid, 182 sc->bp_cfg_res); 183 sc->bp_cfg_res = NULL; 184 } 185 if (sc->bp_read_res != NULL) { 186 bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_read_rid, 187 sc->bp_read_res); 188 sc->bp_read_res = NULL; 189 } 190 if (sc->bp_set_res != NULL) { 191 bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_set_rid, 192 sc->bp_set_res); 193 sc->bp_set_res = NULL; 194 } 195 if (sc->bp_clear_res != NULL) { 196 bus_release_resource(dev, SYS_RES_MEMORY, sc->bp_clear_rid, 197 sc->bp_clear_res); 198 sc->bp_clear_res = NULL; 199 } 200 for (i = sc->bp_nirqs - 1; i >= 0; i--) { 201 bus_release_resource(dev, SYS_RES_IRQ, sc->bp_irq_rids[i], 202 sc->bp_irqs[i]); 203 } 204 sc->bp_nirqs = 0; 205} 206 207static char * 208bp_strconfig(uint64_t config, char *configstr, size_t len) 209{ 210 211 if (snprintf(configstr, len, "%s tid: %llu hardintr %llu", 212 BP_CFG_ENABLED(config) ? "enabled" : "disabled", 213 BP_CFG_TID(config), BP_CFG_IRQ(config)) > len - 1) 214 return (NULL); 215 return (configstr); 216} 217 218static void 219bp_config_source(device_t ic, int src, int enable, u_long tid, u_long irq) 220{ 221 struct beripic_softc *sc; 222 uint64_t config; 223 224 sc = device_get_softc(ic); 225 226 config = 0; 227 config |= enable << BP_CFG_SHIFT_E; 228 config |= tid << BP_CFG_SHIFT_TID; 229 config |= irq << BP_CFG_SHIFT_IRQ; 230 231 bp_write_cfg(sc, src, config); 232} 233 234#ifdef __mips__ 235static void 236bp_set_counter_name(device_t ic, device_t child, int src) 237{ 238 struct beripic_softc *sc; 239 char name[MAXCOMLEN + 1]; 240 241 sc = device_get_softc(ic); 242 243 if (snprintf(name, sizeof(name), "bp%dsrc%d%s%s%s", 244 device_get_unit(ic), src, src < sc->bp_nhard ? "" : "s", 245 child == NULL ? "" : " ", 246 child == NULL ? " " : device_get_nameunit(child)) >= sizeof(name)) 247 name[sizeof(name) - 2] = '+'; 248 249 mips_intrcnt_setname(sc->bp_counters[src], name); 250} 251#endif 252 253static int 254beripic_fdt_probe(device_t dev) 255{ 256 257 if (!ofw_bus_status_okay(dev)) 258 return (ENXIO); 259 260 if (!ofw_bus_is_compatible(dev, "sri-cambridge,beri-pic")) 261 return (ENXIO); 262 263 device_set_desc(dev, "BERI Programmable Interrupt Controller"); 264 return (BUS_PROBE_DEFAULT); 265} 266 267static int 268beripic_fdt_attach(device_t dev) 269{ 270 char configstr[64]; 271 struct beripic_softc *sc; 272 struct fdt_ic *fic; 273 pcell_t nhard, nsoft; 274 phandle_t ph; 275 int error, i, src; 276 uint64_t config; 277 278 sc = device_get_softc(dev); 279 sc->bp_dev = dev; 280 281 mtx_init(&sc->bp_cfgmtx, "beripic config lock", NULL, MTX_DEF); 282 283 /* 284 * FDT lists CONFIG, IP_READ, IP_SET, and IP_CLEAR registers as 285 * seperate memory regions in that order. 286 */ 287 sc->bp_cfg_rid = 0; 288 sc->bp_cfg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 289 &sc->bp_cfg_rid, RF_ACTIVE); 290 if (sc->bp_cfg_res == NULL) { 291 device_printf(dev, "failed to map config memory"); 292 error = ENXIO; 293 goto err; 294 } 295 if (bootverbose) 296 device_printf(sc->bp_dev, "config region at mem %p-%p\n", 297 (void *)rman_get_start(sc->bp_cfg_res), 298 (void *)(rman_get_start(sc->bp_cfg_res) + 299 rman_get_size(sc->bp_cfg_res))); 300 301 sc->bp_read_rid = 1; 302 sc->bp_read_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 303 &sc->bp_read_rid, RF_ACTIVE); 304 if (sc->bp_read_res == NULL) { 305 device_printf(dev, "failed to map IP read memory"); 306 error = ENXIO; 307 goto err; 308 } 309 if (bootverbose) 310 device_printf(sc->bp_dev, "IP read region at mem %p-%p\n", 311 (void *)rman_get_start(sc->bp_read_res), 312 (void *)(rman_get_start(sc->bp_read_res) + 313 rman_get_size(sc->bp_read_res))); 314 315 sc->bp_set_rid = 2; 316 sc->bp_set_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 317 &sc->bp_set_rid, RF_ACTIVE); 318 if (sc->bp_set_res == NULL) { 319 device_printf(dev, "failed to map IP read memory"); 320 error = ENXIO; 321 goto err; 322 } 323 if (bootverbose) 324 device_printf(sc->bp_dev, "IP set region at mem %p-%p\n", 325 (void *)rman_get_start(sc->bp_set_res), 326 (void *)(rman_get_start(sc->bp_set_res) + 327 rman_get_size(sc->bp_set_res))); 328 329 sc->bp_clear_rid = 3; 330 sc->bp_clear_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 331 &sc->bp_clear_rid, RF_ACTIVE); 332 if (sc->bp_clear_res == NULL) { 333 device_printf(dev, "failed to map IP read memory"); 334 error = ENXIO; 335 goto err; 336 } 337 if (bootverbose) 338 device_printf(sc->bp_dev, "IP clear region at mem %p-%p\n", 339 (void *)rman_get_start(sc->bp_clear_res), 340 (void *)(rman_get_start(sc->bp_clear_res) + 341 rman_get_size(sc->bp_clear_res))); 342 343 i = 0; 344 for (i = 0; i < BP_MAX_HARD_IRQS; i++) { 345 sc->bp_irq_rids[i] = i; 346 sc->bp_irqs[i] = bus_alloc_resource_any(dev, SYS_RES_IRQ, 347 &sc->bp_irq_rids[i], RF_ACTIVE | RF_SHAREABLE); 348 if (sc->bp_irqs[i] == NULL) 349 break; 350 } 351 if (i == 0) { 352 device_printf(dev, "failed to allocate any parent IRQs!"); 353 error = ENXIO; 354 goto err; 355 } 356 sc->bp_nirqs = i; 357 358 ph = ofw_bus_gen_get_node(device_get_parent(dev), dev); 359 360#ifndef SMP 361 sc->bp_nthreads = 1; 362#else 363 sc->bp_nthreads = 1; 364 /* XXX: get nthreads from cpu(s) somehow */ 365#endif 366 367 if (OF_getprop(ph, "hard-interrupt-sources", &nhard, sizeof(nhard)) 368 <= 0) { 369 device_printf(dev, "failed to get number of hard sources"); 370 error = ENXIO; 371 goto err; 372 } 373 if (OF_getprop(ph, "soft-interrupt-sources", &nsoft, sizeof(nsoft)) 374 <= 0) { 375 device_printf(dev, "failed to get number of soft sources"); 376 error = ENXIO; 377 goto err; 378 } 379 380 sc->bp_nhard = nhard; 381 sc->bp_nsoft = nsoft; 382 sc->bp_nsrcs = sc->bp_nhard + sc->bp_nsoft; 383 /* XXX: should deal with gap between hard and soft */ 384 KASSERT(sc->bp_nhard <= BP_FIRST_SOFT, 385 ("too many hard sources")); 386 KASSERT(rman_get_size(sc->bp_cfg_res) / 8 == sc->bp_nsrcs, 387 ("config space size does not match sources")); 388 KASSERT(sc->bp_nhard % 64 == 0, 389 ("Non-multiple of 64 intr counts not supported")); 390 KASSERT(sc->bp_nsoft % 64 == 0, 391 ("Non-multiple of 64 intr counts not supported")); 392 if (bootverbose) 393 device_printf(dev, "%d hard and %d soft sources\n", 394 sc->bp_nhard, sc->bp_nsoft); 395 396#ifdef __mips__ 397 sc->bp_counters = malloc(sizeof(*sc->bp_counters) * sc->bp_nsrcs, 398 M_BERIPIC, M_WAITOK|M_ZERO); 399 for (i = 0; i < sc->bp_nsrcs; i++) { 400 sc->bp_counters[i] = mips_intrcnt_create(""); 401 bp_set_counter_name(dev, NULL, i); 402 } 403#endif 404 405 sc->bp_src_rman.rm_start = 0; 406 sc->bp_src_rman.rm_end = sc->bp_nsrcs - 1; 407 sc->bp_src_rman.rm_type = RMAN_ARRAY; 408 sc->bp_src_rman.rm_descr = "Interrupt source"; 409 if (rman_init(&(sc->bp_src_rman)) != 0 || 410 rman_manage_region(&(sc->bp_src_rman), 0, sc->bp_nsrcs - 1) != 0) { 411 device_printf(dev, "Failed to set up sources rman"); 412 error = ENXIO; 413 goto err; 414 } 415 416 sc->bp_cfg_bst = rman_get_bustag(sc->bp_cfg_res); 417 sc->bp_cfg_bsh = rman_get_bushandle(sc->bp_cfg_res); 418 sc->bp_read_bst = rman_get_bustag(sc->bp_read_res); 419 sc->bp_read_bsh = rman_get_bushandle(sc->bp_read_res); 420 sc->bp_set_bst = rman_get_bustag(sc->bp_set_res); 421 sc->bp_set_bsh = rman_get_bushandle(sc->bp_set_res); 422 sc->bp_clear_bst = rman_get_bustag(sc->bp_clear_res); 423 sc->bp_clear_bsh = rman_get_bushandle(sc->bp_clear_res); 424 425 for (src = 0; src < sc->bp_nsrcs; src++) { 426 config = bp_read_cfg(sc, src); 427 if (config == 0) 428 continue; 429 430 if (bootverbose) { 431 device_printf(dev, "initial config: src %d: %s\n", src, 432 bp_strconfig(config, configstr, sizeof(configstr))); 433 if (config & BP_CFG_RESERVED) 434 device_printf(dev, 435 "reserved bits not 0: 0x%016jx\n", 436 (uintmax_t) config); 437 } 438 439 bp_config_source(dev, src, 0, 0, 0); 440 } 441 442 fic = malloc(sizeof(*fic), M_BERIPIC, M_WAITOK|M_ZERO); 443 fic->iph = ph; 444 fic->dev = dev; 445 SLIST_INSERT_HEAD(&fdt_ic_list_head, fic, fdt_ics); 446 447 return (0); 448err: 449 bp_detach_resources(dev); 450 451 return (error); 452} 453 454static struct resource * 455beripic_alloc_intr(device_t ic, device_t child, int *rid, u_long irq, 456 u_int flags) 457{ 458 struct beripic_softc *sc; 459 struct resource *rv; 460 461 sc = device_get_softc(ic); 462 463 rv = rman_reserve_resource(&(sc->bp_src_rman), irq, irq, 1, flags, 464 child); 465 if (rv == NULL) 466 printf("%s: could not reserve source interrupt for %s\n", 467 __func__, device_get_nameunit(child)); 468 rman_set_rid(rv, *rid); 469 470 if ((flags & RF_ACTIVE) && 471 beripic_activate_intr(ic, rv) != 0) { 472 printf("%s: could not activate interrupt\n", __func__); 473 rman_release_resource(rv); 474 return (NULL); 475 } 476 477 return (rv); 478} 479 480static int 481beripic_release_intr(device_t ic, struct resource *r) 482{ 483 484 return (rman_release_resource(r)); 485} 486 487static int 488beripic_activate_intr(device_t ic, struct resource *r) 489{ 490 491 return (rman_activate_resource(r)); 492} 493 494static int 495beripic_deactivate_intr(device_t ic, struct resource *r) 496{ 497 498 return (rman_deactivate_resource(r)); 499} 500 501static int 502beripic_config_intr(device_t dev, int irq, enum intr_trigger trig, 503 enum intr_polarity pol) 504{ 505 506 if (trig != INTR_TRIGGER_CONFORM || pol != INTR_POLARITY_CONFORM) 507 return (EINVAL); 508 509 return (0); 510} 511 512static int 513beripic_setup_intr(device_t ic, device_t child, struct resource *irq, 514 int flags, driver_filter_t *filter, driver_intr_t *intr, void *arg, 515 void **cookiep) 516{ 517 struct beripic_softc *sc; 518 struct beripic_intr_arg *bpia; 519 struct beripic_cookie *bpc; 520 int error; 521 u_long hirq, src, tid; 522 523 sc = device_get_softc(ic); 524 525 src = rman_get_start(irq); 526 527 KASSERT(src < sc->bp_nsrcs, ("source (%lu) out of range 0-%d", 528 src, sc->bp_nsrcs - 1)); 529 530 bpia = malloc(sizeof(*bpia), M_BERIPIC, M_WAITOK|M_ZERO); 531 bpia->filter = filter; 532 bpia->intr = intr; 533 bpia->arg = arg; 534 bpia->irq = irq; 535#ifdef __mips__ 536 bpia->counter = sc->bp_counters[src]; 537 bp_set_counter_name(ic, child, src); 538#endif 539 540 bpc = malloc(sizeof(*bpc), M_BERIPIC, M_WAITOK|M_ZERO); 541 bpc->bpia = bpia; 542 543 mtx_lock(&(sc->bp_cfgmtx)); 544 bpc->hirq = sc->bp_irqs[sc->bp_next_irq]; 545 hirq = rman_get_start(bpc->hirq); 546 tid = sc->bp_next_tid; 547 548 error = BUS_SETUP_INTR(device_get_parent(ic), ic, bpc->hirq, flags, 549 beripic_filter, intr == NULL ? NULL : beripic_intr, bpia, 550 &(bpc->cookie)); 551 if (error != 0) 552 goto err; 553 554#ifdef NOTYET 555#ifdef SMP 556 /* XXX: bind ithread to cpu */ 557 sc->bp_next_tid++; 558 if (sc->bp_next_tid >= sc->bp_nthreads) 559 sc->bp_next_tid = 0; 560#endif 561#endif 562 if (sc->bp_next_tid == 0) { 563 sc->bp_next_irq++; 564 if (sc->bp_next_irq >= sc->bp_nirqs) 565 sc->bp_next_irq = 0; 566 } 567 mtx_unlock(&(sc->bp_cfgmtx)); 568 569 *cookiep = bpc; 570 571 bp_config_source(ic, rman_get_start(irq), 1, tid, hirq); 572 573 return (0); 574err: 575 free(bpc, M_BERIPIC); 576 free(bpia, M_BERIPIC); 577 578 return (error); 579} 580 581static int 582beripic_teardown_intr(device_t dev, device_t child, struct resource *irq, 583 void *cookie) 584{ 585 struct beripic_cookie *bpc; 586 int error; 587 588 bpc = cookie; 589 590 bp_config_source(dev, rman_get_start(irq), 0, 0, 0); 591 592 free(bpc->bpia, M_BERIPIC); 593 594 error = BUS_TEARDOWN_INTR(device_get_parent(dev), dev, bpc->hirq, 595 bpc->cookie); 596 597 free(bpc, M_BERIPIC); 598 599 return (error); 600} 601 602static int 603beripic_filter(void *arg) 604{ 605 struct beripic_intr_arg *bpic; 606 607 bpic = arg; 608 609#ifdef __mips__ 610 mips_intrcnt_inc(bpic->counter); 611#endif 612 613 /* XXX: Add a check that our source is high */ 614 615 if (bpic->filter == NULL) 616 return (FILTER_SCHEDULE_THREAD); 617 618 return (bpic->filter(bpic->arg)); 619} 620 621static void 622beripic_intr(void *arg) 623{ 624 struct beripic_intr_arg *bpic; 625 626 bpic = arg; 627 628 KASSERT(bpic->intr != NULL, 629 ("%s installed, but no child intr", __func__)); 630 631 bpic->intr(bpic->arg); 632} 633 634#ifdef SMP 635static void 636beripic_setup_ipi(device_t ic, u_int tid, u_int ipi_irq) 637{ 638 639 bp_config_source(ic, BP_FIRST_SOFT + tid, 1, tid, ipi_irq); 640} 641 642static void 643beripic_send_ipi(device_t ic, u_int tid) 644{ 645 struct beripic_softc *sc; 646 uint64_t bit; 647 648 sc = device_get_softc(ic); 649 650 KASSERT(tid < sc->bp_nsoft, ("tid (%d) too large\n", tid)); 651 652 bit = 1ULL << (tid % 64); 653 bus_space_write_8(sc->bp_set_bst, sc->bp_set_bsh, 654 (BP_FIRST_SOFT / 8) + (tid / 64), bit); 655} 656 657static void 658beripic_clear_ipi(device_t ic, u_int tid) 659{ 660 struct beripic_softc *sc; 661 uint64_t bit; 662 663 sc = device_get_softc(ic); 664 665 KASSERT(tid < sc->bp_nsoft, ("tid (%d) to large\n", tid)); 666 667 bit = 1ULL << (tid % 64); 668 bus_space_write_8(sc->bp_clear_bst, sc->bp_clear_bsh, 669 (BP_FIRST_SOFT / 8) + (tid / 64), bit); 670} 671#endif 672 673devclass_t beripic_devclass; 674 675static device_method_t beripic_fdt_methods[] = { 676 /* Device interface */ 677 DEVMETHOD(device_probe, beripic_fdt_probe), 678 DEVMETHOD(device_attach, beripic_fdt_attach), 679 680 DEVMETHOD(fdt_ic_activate_intr, beripic_activate_intr), 681 DEVMETHOD(fdt_ic_alloc_intr, beripic_alloc_intr), 682 DEVMETHOD(fdt_ic_config_intr, beripic_config_intr), 683 DEVMETHOD(fdt_ic_deactivate_intr, beripic_deactivate_intr), 684 DEVMETHOD(fdt_ic_release_intr, beripic_release_intr), 685 DEVMETHOD(fdt_ic_setup_intr, beripic_setup_intr), 686 DEVMETHOD(fdt_ic_teardown_intr, beripic_teardown_intr), 687 688#ifdef SMP 689 DEVMETHOD(fdt_ic_setup_ipi, beripic_setup_ipi), 690 DEVMETHOD(fdt_ic_clear_ipi, beripic_clear_ipi), 691 DEVMETHOD(fdt_ic_send_ipi, beripic_send_ipi), 692#endif 693 694 { 0, 0 }, 695}; 696 697static driver_t beripic_fdt_driver = { 698 "beripic", 699 beripic_fdt_methods, 700 sizeof(struct beripic_softc) 701}; 702 703DRIVER_MODULE(beripic, simplebus, beripic_fdt_driver, beripic_devclass, 0, 0); 704