if_admswvar.h revision 330897
1/* $NetBSD: if_admswvar.h,v 1.1 2007/03/20 08:52:02 dyoung Exp $ */ 2 3/*- 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 * Copyright (c) 2007 Ruslan Ermilov and Vsevolod Lobko. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or 10 * without modification, are permitted provided that the following 11 * conditions are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer in the documentation and/or other materials provided 17 * with the distribution. 18 * 3. The names of the authors may not be used to endorse or promote 19 * products derived from this software without specific prior 20 * written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY 23 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 24 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 25 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, 27 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, 29 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 31 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 32 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 33 * OF SUCH DAMAGE. 34 */ 35#ifndef _IF_ADMSWVAR_H_ 36#define _IF_ADMSWVAR_H_ 37 38#include <sys/cdefs.h> 39__FBSDID("$FreeBSD: stable/11/sys/mips/adm5120/if_admswvar.h 330897 2018-03-14 03:19:51Z eadler $"); 40 41#include <sys/param.h> 42#include <sys/systm.h> 43#include <sys/bus.h> 44#include <sys/kernel.h> 45#include <sys/mbuf.h> 46#include <sys/malloc.h> 47#include <sys/module.h> 48#include <sys/rman.h> 49#include <sys/socket.h> 50#include <sys/sockio.h> 51#include <sys/sysctl.h> 52#include <machine/bus.h> 53 54#include <net/ethernet.h> 55#include <net/if.h> 56#include <net/if_arp.h> 57#include <net/if_dl.h> 58#include <net/if_media.h> 59#include <net/if_mib.h> 60#include <net/if_types.h> 61 62#ifdef INET 63#include <netinet/in.h> 64#include <netinet/in_systm.h> 65#include <netinet/in_var.h> 66#include <netinet/ip.h> 67#endif 68 69#include <net/bpf.h> 70#include <net/bpfdesc.h> 71 72#include <dev/mii/mii.h> 73#include <dev/mii/miivar.h> 74 75#include <mips/adm5120/adm5120reg.h> 76#include <mips/adm5120/if_admswreg.h> 77 78#define MAC_BUFLEN 0x07ff 79 80#define ADMSW_NTXHDESC 4 81#define ADMSW_NRXHDESC 32 82#define ADMSW_NTXLDESC 32 83#define ADMSW_NRXLDESC 32 84 85#define ADMSW_NTXHDESC_MASK (ADMSW_NTXHDESC - 1) 86#define ADMSW_NRXHDESC_MASK (ADMSW_NRXHDESC - 1) 87#define ADMSW_NTXLDESC_MASK (ADMSW_NTXLDESC - 1) 88#define ADMSW_NRXLDESC_MASK (ADMSW_NRXLDESC - 1) 89 90#define ADMSW_NEXTTXH(x) (((x) + 1) & ADMSW_NTXHDESC_MASK) 91#define ADMSW_NEXTRXH(x) (((x) + 1) & ADMSW_NRXHDESC_MASK) 92#define ADMSW_NEXTTXL(x) (((x) + 1) & ADMSW_NTXLDESC_MASK) 93#define ADMSW_NEXTRXL(x) (((x) + 1) & ADMSW_NRXLDESC_MASK) 94 95#define ADMSW_IRQ 9 96 97struct admsw_control_data { 98 /* The transmit descriptors. */ 99 struct admsw_desc acd_txhdescs[ADMSW_NTXHDESC]; 100 101 /* The receive descriptors. */ 102 struct admsw_desc acd_rxhdescs[ADMSW_NRXHDESC]; 103 104 /* The transmit descriptors. */ 105 struct admsw_desc acd_txldescs[ADMSW_NTXLDESC]; 106 107 /* The receive descriptors. */ 108 struct admsw_desc acd_rxldescs[ADMSW_NRXLDESC]; 109}; 110 111#define ADMSW_CDOFF(x) offsetof(struct admsw_control_data, x) 112#define ADMSW_CDTXHOFF(x) ADMSW_CDOFF(acd_txhdescs[(x)]) 113#define ADMSW_CDTXLOFF(x) ADMSW_CDOFF(acd_txldescs[(x)]) 114#define ADMSW_CDRXHOFF(x) ADMSW_CDOFF(acd_rxhdescs[(x)]) 115#define ADMSW_CDRXLOFF(x) ADMSW_CDOFF(acd_rxldescs[(x)]) 116 117struct admsw_descsoft { 118 struct mbuf *ds_mbuf; 119 bus_dmamap_t ds_dmamap; 120 /* Up to 2 segments */ 121 uint32_t ds_addr[2]; 122 uint32_t ds_len[2]; 123 uint32_t ds_nsegs; 124}; 125 126/* 127 * Software state per device. 128 */ 129struct admsw_softc { 130 device_t sc_dev; /* generic device information */ 131 uint8_t sc_enaddr[ETHER_ADDR_LEN]; 132 bus_dma_tag_t sc_control_dmat; 133 /* bus DMA tag for control structs*/ 134 bus_dma_tag_t sc_bufs_dmat; /* bus DMA tag for buffers */ 135 struct ifmedia sc_ifmedia[SW_DEVS]; 136 int ndevs; /* number of IFF_RUNNING interfaces */ 137 struct ifnet *sc_ifnet[SW_DEVS]; 138 struct callout sc_watchdog; 139 int sc_timer; 140 /* Ethernet common data */ 141 void *sc_ih; /* interrupt cookie */ 142 struct resource *irq_res; 143 struct resource *mem_res; 144 bus_dmamap_t sc_cddmamap; /* control data DMA map */ 145 uint32_t sc_cddma; 146 struct admsw_control_data *sc_control_data; 147 148 struct admsw_descsoft sc_txhsoft[ADMSW_NTXHDESC]; 149 struct admsw_descsoft sc_rxhsoft[ADMSW_NRXHDESC]; 150 struct admsw_descsoft sc_txlsoft[ADMSW_NTXLDESC]; 151 struct admsw_descsoft sc_rxlsoft[ADMSW_NRXLDESC]; 152#define sc_txhdescs sc_control_data->acd_txhdescs 153#define sc_rxhdescs sc_control_data->acd_rxhdescs 154#define sc_txldescs sc_control_data->acd_txldescs 155#define sc_rxldescs sc_control_data->acd_rxldescs 156 157 int sc_txfree; /* number of free Tx descriptors */ 158 int sc_txnext; /* next Tx descriptor to use */ 159 int sc_txdirty; /* first dirty Tx descriptor */ 160 int sc_rxptr; /* next ready Rx descriptor */ 161}; 162 163#define ADMSW_CDTXHADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDTXHOFF((x))) 164#define ADMSW_CDTXLADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDTXLOFF((x))) 165#define ADMSW_CDRXHADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDRXHOFF((x))) 166#define ADMSW_CDRXLADDR(sc, x) ((sc)->sc_cddma + ADMSW_CDRXLOFF((x))) 167 168#define ADMSW_CDTXHSYNC(sc, x, ops) \ 169 bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops)) 170 171#define ADMSW_CDTXLSYNC(sc, x, ops) \ 172 bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops)) 173 174#define ADMSW_CDRXHSYNC(sc, x, ops) \ 175 bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops)) 176 177#define ADMSW_CDRXLSYNC(sc, x, ops) \ 178 bus_dmamap_sync((sc)->sc_control_dmat, (sc)->sc_cddmamap, (ops)) 179 180#define ADMSW_INIT_RXHDESC(sc, x) \ 181do { \ 182 struct admsw_descsoft *__ds = &(sc)->sc_rxhsoft[(x)]; \ 183 struct admsw_desc *__desc = &(sc)->sc_rxhdescs[(x)]; \ 184 struct mbuf *__m = __ds->ds_mbuf; \ 185 \ 186 __m->m_data = __m->m_ext.ext_buf + 2; \ 187 __desc->data = __ds->ds_addr[0] + 2; \ 188 __desc->cntl = 0; \ 189 __desc->len = min(MCLBYTES - 2, MAC_BUFLEN - 2); \ 190 __desc->status = 0; \ 191 if ((x) == ADMSW_NRXHDESC - 1) \ 192 __desc->data |= ADM5120_DMA_RINGEND; \ 193 __desc->data |= ADM5120_DMA_OWN; \ 194 ADMSW_CDRXHSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ 195} while (0) 196 197#define ADMSW_INIT_RXLDESC(sc, x) \ 198do { \ 199 struct admsw_descsoft *__ds = &(sc)->sc_rxlsoft[(x)]; \ 200 struct admsw_desc *__desc = &(sc)->sc_rxldescs[(x)]; \ 201 struct mbuf *__m = __ds->ds_mbuf; \ 202 \ 203 __m->m_data = __m->m_ext.ext_buf + 2; \ 204 __desc->data = __ds->ds_addr[0] + 2; \ 205 __desc->cntl = 0; \ 206 __desc->len = min(MCLBYTES - 2, MAC_BUFLEN - 2); \ 207 __desc->status = 0; \ 208 if ((x) == ADMSW_NRXLDESC - 1) \ 209 __desc->data |= ADM5120_DMA_RINGEND; \ 210 __desc->data |= ADM5120_DMA_OWN; \ 211 ADMSW_CDRXLSYNC((sc), (x), BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE); \ 212} while (0) 213 214void admwdog_attach(struct admsw_softc *); 215 216#endif /* _IF_ADMSWVAR_H_ */ 217