vxge-defs.h revision 330897 
1/*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright(c) 2002-2011 Exar Corp.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification are permitted provided the following conditions are met:
9 *
10 *    1. Redistributions of source code must retain the above copyright notice,
11 *       this list of conditions and the following disclaimer.
12 *
13 *    2. Redistributions in binary form must reproduce the above copyright
14 *       notice, this list of conditions and the following disclaimer in the
15 *       documentation and/or other materials provided with the distribution.
16 *
17 *    3. Neither the name of the Exar Corporation nor the names of its
18 *       contributors may be used to endorse or promote products derived from
19 *       this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33/*$FreeBSD: stable/11/sys/dev/vxge/include/vxge-defs.h 330897 2018-03-14 03:19:51Z eadler $*/
34
35#ifndef	VXGE_DEFS_H
36#define	VXGE_DEFS_H
37
38#define	VXGE_PCI_VENDOR_ID			0x17D5
39#define	VXGE_PCI_DEVICE_ID_TITAN_1		0x5833
40#define	VXGE_PCI_REVISION_TITAN_1		1
41#define	VXGE_PCI_DEVICE_ID_TITAN_1A		0x5833
42#define	VXGE_PCI_REVISION_TITAN_1A		2
43#define	VXGE_PCI_DEVICE_ID_TITAN_2		0x5834
44#define	VXGE_PCI_REVISION_TITAN_2		1
45
46#define	VXGE_MIN_FW_MAJOR_VERSION		1
47#define	VXGE_MIN_FW_MINOR_VERSION		8
48#define	VXGE_MIN_FW_BUILD_NUMBER		1
49
50#define	VXGE_DRIVER_VENDOR			"Exar Corp."
51#define	VXGE_CHIP_FAMILY			"X3100"
52#define	VXGE_SUPPORTED_MEDIA_0			"Fiber"
53
54#define	VXGE_DRIVER_NAME			\
55	"Neterion X3100 10GbE PCIe Server Adapter Driver"
56/*
57 * mBIT(loc) - set bit at offset
58 */
59#define	mBIT(loc)		(0x8000000000000000ULL >> (loc))
60
61/*
62 * vBIT(val, loc, sz) - set bits at offset
63 */
64#define	vBIT(val, loc, sz)	(((u64)(val)) << (64-(loc)-(sz)))
65#define	vBIT32(val, loc, sz)	(((u32)(val)) << (32-(loc)-(sz)))
66
67/*
68 * bVALx(bits, loc) - Get the value of x bits at location
69 */
70#define	bVAL1(bits, loc)  ((((u64)bits) >> (64-(loc+1))) & 0x1)
71#define	bVAL2(bits, loc)  ((((u64)bits) >> (64-(loc+2))) & 0x3)
72#define	bVAL3(bits, loc)  ((((u64)bits) >> (64-(loc+3))) & 0x7)
73#define	bVAL4(bits, loc)  ((((u64)bits) >> (64-(loc+4))) & 0xF)
74#define	bVAL5(bits, loc)  ((((u64)bits) >> (64-(loc+5))) & 0x1F)
75#define	bVAL6(bits, loc)  ((((u64)bits) >> (64-(loc+6))) & 0x3F)
76#define	bVAL7(bits, loc)  ((((u64)bits) >> (64-(loc+7))) & 0x7F)
77#define	bVAL8(bits, loc)  ((((u64)bits) >> (64-(loc+8))) & 0xFF)
78#define	bVAL9(bits, loc)  ((((u64)bits) >> (64-(loc+9))) & 0x1FF)
79#define	bVAL11(bits, loc) ((((u64)bits) >> (64-(loc+11))) & 0x7FF)
80#define	bVAL12(bits, loc) ((((u64)bits) >> (64-(loc+12))) & 0xFFF)
81#define	bVAL14(bits, loc) ((((u64)bits) >> (64-(loc+14))) & 0x3FFF)
82#define	bVAL15(bits, loc) ((((u64)bits) >> (64-(loc+15))) & 0x7FFF)
83#define	bVAL16(bits, loc) ((((u64)bits) >> (64-(loc+16))) & 0xFFFF)
84#define	bVAL17(bits, loc) ((((u64)bits) >> (64-(loc+17))) & 0x1FFFF)
85#define	bVAL18(bits, loc) ((((u64)bits) >> (64-(loc+18))) & 0x3FFFF)
86#define	bVAL20(bits, loc) ((((u64)bits) >> (64-(loc+20))) & 0xFFFFF)
87#define	bVAL22(bits, loc) ((((u64)bits) >> (64-(loc+22))) & 0x3FFFFF)
88#define	bVAL24(bits, loc) ((((u64)bits) >> (64-(loc+24))) & 0xFFFFFF)
89#define	bVAL28(bits, loc) ((((u64)bits) >> (64-(loc+28))) & 0xFFFFFFF)
90#define	bVAL32(bits, loc) ((((u64)bits) >> (64-(loc+32))) & 0xFFFFFFFF)
91#define	bVAL36(bits, loc) ((((u64)bits) >> (64-(loc+36))) & 0xFFFFFFFFFULL)
92#define	bVAL40(bits, loc) ((((u64)bits) >> (64-(loc+40))) & 0xFFFFFFFFFFULL)
93#define	bVAL44(bits, loc) ((((u64)bits) >> (64-(loc+44))) & 0xFFFFFFFFFFFULL)
94#define	bVAL48(bits, loc) ((((u64)bits) >> (64-(loc+48))) & 0xFFFFFFFFFFFFULL)
95#define	bVAL52(bits, loc) ((((u64)bits) >> (64-(loc+52))) & 0xFFFFFFFFFFFFFULL)
96#define	bVAL56(bits, loc) ((((u64)bits) >> (64-(loc+56))) & 0xFFFFFFFFFFFFFFULL)
97#define	bVAL60(bits, loc)   \
98		((((u64)bits) >> (64-(loc+60))) & 0xFFFFFFFFFFFFFFFULL)
99#define	bVAL61(bits, loc)   \
100		((((u64)bits) >> (64-(loc+61))) & 0x1FFFFFFFFFFFFFFFULL)
101
102#define	VXGE_HAL_VPATH_BMAP_START	47
103#define	VXGE_HAL_VPATH_BMAP_END		63
104
105#define	VXGE_HAL_ALL_FOXES		0xFFFFFFFFFFFFFFFFULL
106
107#define	VXGE_HAL_INTR_MASK_ALL		0xFFFFFFFFFFFFFFFFULL
108
109#define	VXGE_HAL_MAX_VIRTUAL_PATHS	17
110
111#define	VXGE_HAL_MAX_FUNCTIONS		8
112
113#define	VXGE_HAL_MAX_ITABLE_ENTRIES	256
114
115#define	VXGE_HAL_MAX_RSS_KEY_SIZE	40
116
117#define	VXGE_HAL_MAC_MAX_WIRE_PORTS	2
118
119#define	VXGE_HAL_MAC_SWITCH_PORT	2
120
121#define	VXGE_HAL_MAC_MAX_AGGR_PORTS	2
122
123#define	VXGE_HAL_MAC_MAX_PORTS		3
124
125#define	VXGE_HAL_INTR_ALARM		(1<<4)
126
127#define	VXGE_HAL_INTR_TX		(1<<(3-VXGE_HAL_VPATH_INTR_TX))
128
129#define	VXGE_HAL_INTR_RX		(1<<(3-VXGE_HAL_VPATH_INTR_RX))
130
131#define	VXGE_HAL_INTR_EINTA		(1<<(3-VXGE_HAL_VPATH_INTR_EINTA))
132
133#define	VXGE_HAL_INTR_BMAP		(1<<(3-VXGE_HAL_VPATH_INTR_BMAP))
134
135#define	VXGE_HAL_PCI_CONFIG_SPACE_SIZE	VXGE_OS_PCI_CONFIG_SIZE
136
137#define	VXGE_HAL_DEFAULT_32		0xffffffff
138
139#define	VXGE_HAL_DEFAULT_64		0xffffffffffffffff
140
141#define	VXGE_HAL_DUMP_BUF_SIZE		0x10000
142
143#define	VXGE_HAL_VPD_BUFFER_SIZE	128
144
145#define	VXGE_HAL_VPD_LENGTH		80
146
147/* Check whether an address is multicast. */
148#define	VXGE_HAL_IS_NULL(Address)	(Address == 0x0000000000000000ULL)
149
150/* Check whether an address is multicast. */
151#define	VXGE_HAL_IS_MULTICAST(Address)	(Address & 0x0000010000000000ULL)
152
153/* Check whether an address is broadcast. */
154#define	VXGE_HAL_IS_BROADCAST(Address)	\
155	((Address & 0x0000FFFF00000000ULL) == 0x0000FFFF00000000ULL)
156
157#define	VXGE_HAL_IS_UNICAST(Address)		\
158	(!(VXGE_HAL_IS_NULL(Address) ||		\
159	VXGE_HAL_IS_MULTICAST(Address) ||	\
160	VXGE_HAL_IS_BROADCAST(Address)))
161
162/* frames sizes */
163#define	VXGE_HAL_HEADER_ETHERNET_II_802_3_SIZE		14
164#define	VXGE_HAL_HEADER_802_2_SIZE			3
165#define	VXGE_HAL_HEADER_SNAP_SIZE			5
166#define	VXGE_HAL_HEADER_VLAN_SIZE			4
167#define	VXGE_HAL_MAC_HEADER_MAX_SIZE \
168			(VXGE_HAL_HEADER_ETHERNET_II_802_3_SIZE + \
169			VXGE_HAL_HEADER_802_2_SIZE + \
170			VXGE_HAL_HEADER_SNAP_SIZE)
171
172#define	VXGE_HAL_TCPIP_HEADER_MAX_SIZE			(64 + 64)
173
174/* 32bit alignments */
175
176/* A receive data corruption can occur resulting in either a single-bit or
177double-bit ECC error being flagged in the ASIC if starting offset of a
178buffer in single buffer mode is 0x2 to 0xa. Single bit ECC error will not
179lock up the card but can hide the data corruption while the double-bit ECC
180error will lock up the card. Limiting the starting offset of the buffers to
1810x0, 0x1 or to a value greater than 0xF will workaround this issue.
182VXGE_HAL_HEADER_ETHERNET_II_802_3_ALIGN of 2 causes the starting offset of
183buffer to be 0x2, 0x12 and so on, to have the start of the ip header dword
184aligned. The start of buffer of 0x2 will cause this problem to occur.
185To avoid this problem in all cases, add 0x10 to 0x2, to ensure that the start
186of buffer is outside of the problem causing offsets.
187*/
188
189#define	VXGE_HAL_HEADER_ETHERNET_II_802_3_ALIGN		0x12
190#define	VXGE_HAL_HEADER_802_2_SNAP_ALIGN		2
191#define	VXGE_HAL_HEADER_802_2_ALIGN			3
192#define	VXGE_HAL_HEADER_SNAP_ALIGN			1
193
194#define	VXGE_HAL_MIN_MTU				46
195#define	VXGE_HAL_MAX_MTU				9600
196#define	VXGE_HAL_DEFAULT_MTU				1500
197
198#define	VXGE_HAL_SEGEMENT_OFFLOAD_MAX_SIZE		81920
199
200#if defined(__EXTERN_BEGIN_DECLS)
201#undef __EXTERN_BEGIN_DECLS
202#endif
203
204#if defined(__EXTERN_END_DECLS)
205#undef __EXTERN_END_DECLS
206#endif
207
208#if defined(__cplusplus)
209#define	__EXTERN_BEGIN_DECLS		extern "C" {
210#define	__EXTERN_END_DECLS			}
211#else
212#define	__EXTERN_BEGIN_DECLS
213#define	__EXTERN_END_DECLS
214#endif
215
216__EXTERN_BEGIN_DECLS
217
218/* --------------------------- common stuffs ------------------------------ */
219/*
220 * VXGE_OS_DMA_REQUIRES_SYNC  - should be defined or
221 * NOT defined in the Makefile
222 */
223#define	VXGE_OS_DMA_CACHELINE_ALIGNED		0x1
224
225/*
226 * Either STREAMING or CONSISTENT should be used.
227 * The combination of both or none is invalid
228 */
229#define	VXGE_OS_DMA_STREAMING			0x2
230#define	VXGE_OS_DMA_CONSISTENT			0x4
231#define	VXGE_OS_SPRINTF_STRLEN			64
232
233/* --------------------------- common stuffs ------------------------------ */
234#ifndef	VXGE_OS_LLXFMT
235#define	VXGE_OS_LLXFMT				"%llx"
236#endif
237
238#ifndef	VXGE_OS_LLDFMT
239#define	VXGE_OS_LLDFMT				"%lld"
240#endif
241
242#ifndef	VXGE_OS_STXFMT
243#define	VXGE_OS_STXFMT				"%zx"
244#endif
245
246#ifndef	VXGE_OS_STDFMT
247#define	VXGE_OS_STDFMT				"%zd"
248#endif
249
250
251__EXTERN_END_DECLS
252
253#endif	/* VXGE_DEFS_H */
254