mrml_bridge.c revision 308333 
1/*
2 * Copyright (C) 2016 Cavium Inc.
3 * All rights reserved.
4 *
5 * Developed by Semihalf.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28#include "opt_platform.h"
29
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD: stable/11/sys/dev/vnic/mrml_bridge.c 308333 2016-11-05 10:23:02Z mmel $");
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/bus.h>
36#include <sys/kernel.h>
37#include <sys/module.h>
38#include <sys/resource.h>
39#include <sys/rman.h>
40#include <sys/socket.h>
41#include <sys/queue.h>
42
43#include <dev/ofw/ofw_bus.h>
44#include <dev/ofw/ofw_bus_subr.h>
45#include <dev/fdt/simplebus.h>
46
47#include <machine/bus.h>
48#include <machine/resource.h>
49
50static MALLOC_DEFINE(M_MRMLB, "MRML bridge", "Cavium MRML bridge");
51
52static device_probe_t mrmlb_fdt_probe;
53static device_attach_t mrmlb_fdt_attach;
54
55static struct resource * mrmlb_ofw_bus_alloc_res(device_t, device_t, int, int *,
56    rman_res_t, rman_res_t, rman_res_t, u_int);
57
58static const struct ofw_bus_devinfo * mrmlb_ofw_get_devinfo(device_t, device_t);
59
60static device_method_t mrmlbus_fdt_methods[] = {
61	/* Device interface */
62	DEVMETHOD(device_probe,		mrmlb_fdt_probe),
63	DEVMETHOD(device_attach,	mrmlb_fdt_attach),
64
65	/* Bus interface */
66	DEVMETHOD(bus_alloc_resource,		mrmlb_ofw_bus_alloc_res),
67	DEVMETHOD(bus_release_resource,		bus_generic_release_resource),
68	DEVMETHOD(bus_activate_resource,	bus_generic_activate_resource),
69
70	/* ofw_bus interface */
71	DEVMETHOD(ofw_bus_get_devinfo,	mrmlb_ofw_get_devinfo),
72	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
73	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
74	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
75	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
76	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
77
78	DEVMETHOD_END
79};
80
81DEFINE_CLASS_0(mrmlbus, mrmlbus_fdt_driver, mrmlbus_fdt_methods,
82    sizeof(struct simplebus_softc));
83
84static devclass_t mrmlbus_fdt_devclass;
85
86EARLY_DRIVER_MODULE(mrmlbus, pcib, mrmlbus_fdt_driver, mrmlbus_fdt_devclass, 0, 0,
87    BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
88MODULE_VERSION(mrmlbus, 1);
89
90static int mrmlb_ofw_fill_ranges(phandle_t, struct simplebus_softc *);
91static int mrmlb_ofw_bus_attach(device_t);
92
93static int
94mrmlb_fdt_probe(device_t dev)
95{
96
97	if (!ofw_bus_status_okay(dev))
98		return (ENXIO);
99
100	if (!ofw_bus_is_compatible(dev, "cavium,thunder-8890-mrml-bridge"))
101		return (ENXIO);
102
103	device_set_desc(dev, "Cavium ThunderX MRML bridge");
104	return (BUS_PROBE_SPECIFIC);
105}
106
107static int
108mrmlb_fdt_attach(device_t dev)
109{
110	int err;
111
112	err = mrmlb_ofw_bus_attach(dev);
113	if (err != 0)
114		return (err);
115
116	return (bus_generic_attach(dev));
117}
118
119/* OFW bus interface */
120struct mrmlb_ofw_devinfo {
121	struct ofw_bus_devinfo	di_dinfo;
122	struct resource_list	di_rl;
123};
124
125static const struct ofw_bus_devinfo *
126mrmlb_ofw_get_devinfo(device_t bus __unused, device_t child)
127{
128	struct mrmlb_ofw_devinfo *di;
129
130	di = device_get_ivars(child);
131	return (&di->di_dinfo);
132}
133
134static struct resource *
135mrmlb_ofw_bus_alloc_res(device_t bus, device_t child, int type, int *rid,
136    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
137{
138	struct simplebus_softc *sc;
139	struct mrmlb_ofw_devinfo *di;
140	struct resource_list_entry *rle;
141	int i;
142
143	if (RMAN_IS_DEFAULT_RANGE(start, end)) {
144		if ((di = device_get_ivars(child)) == NULL)
145			return (NULL);
146		if (type == SYS_RES_IOPORT)
147		    type = SYS_RES_MEMORY;
148
149		/* Find defaults for this rid */
150		rle = resource_list_find(&di->di_rl, type, *rid);
151		if (rle == NULL)
152			return (NULL);
153
154		start = rle->start;
155		end = rle->end;
156		count = rle->count;
157	}
158
159	sc = device_get_softc(bus);
160
161	if (type == SYS_RES_MEMORY) {
162		/* Remap through ranges property */
163		for (i = 0; i < sc->nranges; i++) {
164			if (start >= sc->ranges[i].bus && end <
165			    sc->ranges[i].bus + sc->ranges[i].size) {
166				start -= sc->ranges[i].bus;
167				start += sc->ranges[i].host;
168				end -= sc->ranges[i].bus;
169				end += sc->ranges[i].host;
170				break;
171			}
172		}
173
174		if (i == sc->nranges && sc->nranges != 0) {
175			device_printf(bus, "Could not map resource "
176			    "%#lx-%#lx\n", start, end);
177			return (NULL);
178		}
179	}
180
181	return (bus_generic_alloc_resource(bus, child, type, rid, start, end,
182	    count, flags));
183}
184
185/* Helper functions */
186
187static int
188mrmlb_ofw_fill_ranges(phandle_t node, struct simplebus_softc *sc)
189{
190	int host_address_cells;
191	cell_t *base_ranges;
192	ssize_t nbase_ranges;
193	int err;
194	int i, j, k;
195
196	err = OF_searchencprop(OF_parent(node), "#address-cells",
197	    &host_address_cells, sizeof(host_address_cells));
198	if (err <= 0)
199		return (-1);
200
201	nbase_ranges = OF_getproplen(node, "ranges");
202	if (nbase_ranges < 0)
203		return (-1);
204	sc->nranges = nbase_ranges / sizeof(cell_t) /
205	    (sc->acells + host_address_cells + sc->scells);
206	if (sc->nranges == 0)
207		return (0);
208
209	sc->ranges = malloc(sc->nranges * sizeof(sc->ranges[0]),
210	    M_MRMLB, M_WAITOK);
211	base_ranges = malloc(nbase_ranges, M_MRMLB, M_WAITOK);
212	OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
213
214	for (i = 0, j = 0; i < sc->nranges; i++) {
215		sc->ranges[i].bus = 0;
216		for (k = 0; k < sc->acells; k++) {
217			sc->ranges[i].bus <<= 32;
218			sc->ranges[i].bus |= base_ranges[j++];
219		}
220		sc->ranges[i].host = 0;
221		for (k = 0; k < host_address_cells; k++) {
222			sc->ranges[i].host <<= 32;
223			sc->ranges[i].host |= base_ranges[j++];
224		}
225		sc->ranges[i].size = 0;
226		for (k = 0; k < sc->scells; k++) {
227			sc->ranges[i].size <<= 32;
228			sc->ranges[i].size |= base_ranges[j++];
229		}
230	}
231
232	free(base_ranges, M_MRMLB);
233	return (sc->nranges);
234}
235
236static int
237mrmlb_ofw_bus_attach(device_t dev)
238{
239	struct simplebus_softc *sc;
240	struct mrmlb_ofw_devinfo *di;
241	device_t child;
242	phandle_t parent, node;
243
244	parent = ofw_bus_get_node(dev);
245	simplebus_init(dev, parent);
246
247	sc = device_get_softc(dev);
248
249	if (mrmlb_ofw_fill_ranges(parent, sc) < 0) {
250		device_printf(dev, "could not get ranges\n");
251		return (ENXIO);
252	}
253	/* Iterate through all bus subordinates */
254	for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
255		/* Allocate and populate devinfo. */
256		di = malloc(sizeof(*di), M_MRMLB, M_WAITOK | M_ZERO);
257		if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) {
258			free(di, M_MRMLB);
259			continue;
260		}
261
262		/* Initialize and populate resource list. */
263		resource_list_init(&di->di_rl);
264		ofw_bus_reg_to_rl(dev, node, sc->acells, sc->scells,
265		    &di->di_rl);
266		ofw_bus_intr_to_rl(dev, node, &di->di_rl, NULL);
267
268		/* Add newbus device for this FDT node */
269		child = device_add_child(dev, NULL, -1);
270		if (child == NULL) {
271			resource_list_free(&di->di_rl);
272			ofw_bus_gen_destroy_devinfo(&di->di_dinfo);
273			free(di, M_MRMLB);
274			continue;
275		}
276
277		device_set_ivars(child, di);
278	}
279
280	return (0);
281}
282