ehci_ixp4xx.c revision 330897 
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2008 Sam Leffler.  All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27/*
28 * IXP435 attachment driver for the USB Enhanced Host Controller.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: stable/11/sys/dev/usb/controller/ehci_ixp4xx.c 330897 2018-03-14 03:19:51Z eadler $");
33
34#include "opt_bus.h"
35
36#include <sys/stdint.h>
37#include <sys/stddef.h>
38#include <sys/param.h>
39#include <sys/queue.h>
40#include <sys/types.h>
41#include <sys/systm.h>
42#include <sys/kernel.h>
43#include <sys/bus.h>
44#include <sys/module.h>
45#include <sys/lock.h>
46#include <sys/mutex.h>
47#include <sys/condvar.h>
48#include <sys/sysctl.h>
49#include <sys/sx.h>
50#include <sys/unistd.h>
51#include <sys/callout.h>
52#include <sys/malloc.h>
53#include <sys/priv.h>
54
55#include <dev/usb/usb.h>
56#include <dev/usb/usbdi.h>
57
58#include <dev/usb/usb_core.h>
59#include <dev/usb/usb_busdma.h>
60#include <dev/usb/usb_process.h>
61#include <dev/usb/usb_util.h>
62
63#include <dev/usb/usb_controller.h>
64#include <dev/usb/usb_bus.h>
65#include <dev/usb/controller/ehci.h>
66#include <dev/usb/controller/ehcireg.h>
67
68#include <arm/xscale/ixp425/ixp425reg.h>
69#include <arm/xscale/ixp425/ixp425var.h>
70
71#define EHCI_VENDORID_IXP4XX	0x42fa05
72#define EHCI_HC_DEVSTR		"IXP4XX Integrated USB 2.0 controller"
73
74struct ixp_ehci_softc {
75	ehci_softc_t		base;	/* storage for EHCI code */
76	bus_space_tag_t		iot;
77	bus_space_handle_t	ioh;
78	struct bus_space	tag;	/* tag for private bus space ops */
79};
80
81static device_attach_t ehci_ixp_attach;
82static device_detach_t ehci_ixp_detach;
83
84static uint8_t ehci_bs_r_1(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
85static void ehci_bs_w_1(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, u_int8_t);
86static uint16_t ehci_bs_r_2(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
87static void ehci_bs_w_2(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, uint16_t);
88static uint32_t ehci_bs_r_4(bus_space_tag_t tag, bus_space_handle_t, bus_size_t);
89static void ehci_bs_w_4(bus_space_tag_t tag, bus_space_handle_t, bus_size_t, uint32_t);
90
91static void
92ehci_ixp_post_reset(struct ehci_softc *ehci_softc)
93{
94	uint32_t usbmode;
95
96	/* Force HOST mode, select big-endian mode */
97	usbmode = EOREAD4(ehci_softc, EHCI_USBMODE_NOLPM);
98	usbmode &= ~EHCI_UM_CM;
99	usbmode |= EHCI_UM_CM_HOST;
100	usbmode |= EHCI_UM_ES_BE;
101	EOWRITE4(ehci_softc, EHCI_USBMODE_NOLPM, usbmode);
102}
103
104static int
105ehci_ixp_probe(device_t self)
106{
107
108	device_set_desc(self, EHCI_HC_DEVSTR);
109
110	return (BUS_PROBE_DEFAULT);
111}
112
113static int
114ehci_ixp_attach(device_t self)
115{
116	struct ixp_ehci_softc *isc = device_get_softc(self);
117	ehci_softc_t *sc = &isc->base;
118	int err;
119	int rid;
120
121	/* initialise some bus fields */
122	sc->sc_bus.parent = self;
123	sc->sc_bus.devices = sc->sc_devices;
124	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
125	sc->sc_bus.dma_bits = 32;
126
127	/* get all DMA memory */
128	if (usb_bus_mem_alloc_all(&sc->sc_bus,
129	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
130		return (ENOMEM);
131	}
132
133	/* NB: hints fix the memory location and irq */
134
135	rid = 0;
136	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
137	if (!sc->sc_io_res) {
138		device_printf(self, "Could not map memory\n");
139		goto error;
140	}
141
142	/*
143	 * Craft special resource for bus space ops that handle
144	 * byte-alignment of non-word addresses.  Also, since
145	 * we're already intercepting bus space ops we handle
146	 * the register window offset that could otherwise be
147	 * done with bus_space_subregion.
148	 */
149	isc->iot = rman_get_bustag(sc->sc_io_res);
150	isc->tag.bs_privdata = isc->iot;
151	/* read single */
152	isc->tag.bs_r_1	= ehci_bs_r_1;
153	isc->tag.bs_r_2	= ehci_bs_r_2;
154	isc->tag.bs_r_4	= ehci_bs_r_4;
155	/* write (single) */
156	isc->tag.bs_w_1	= ehci_bs_w_1;
157	isc->tag.bs_w_2	= ehci_bs_w_2;
158	isc->tag.bs_w_4	= ehci_bs_w_4;
159
160	sc->sc_io_tag = &isc->tag;
161	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
162	sc->sc_io_size = IXP435_USB1_SIZE - 0x100;
163
164	rid = 0;
165	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
166	    RF_ACTIVE);
167	if (sc->sc_irq_res == NULL) {
168		device_printf(self, "Could not allocate irq\n");
169		goto error;
170	}
171	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
172	if (!sc->sc_bus.bdev) {
173		device_printf(self, "Could not add USB device\n");
174		goto error;
175	}
176	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
177	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
178
179	sprintf(sc->sc_vendor, "Intel");
180
181
182	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
183	    NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
184	if (err) {
185		device_printf(self, "Could not setup irq, %d\n", err);
186		sc->sc_intr_hdl = NULL;
187		goto error;
188	}
189
190	/*
191	 * Select big-endian byte alignment and arrange to not terminate
192	 * reset operations (the adapter will ignore it if we do but might
193	 * as well save a reg write). Also, the controller has an embedded
194	 * Transaction Translator which means port speed must be read from
195	 * the Port Status register following a port enable.
196	 */
197	sc->sc_flags |= EHCI_SCFLG_TT
198		     | EHCI_SCFLG_BIGEDESC
199		     | EHCI_SCFLG_NORESTERM
200		     ;
201
202	/* Setup callbacks. */
203	sc->sc_vendor_post_reset = ehci_ixp_post_reset;
204	sc->sc_vendor_get_port_speed = ehci_get_port_speed_portsc;
205
206	err = ehci_init(sc);
207	if (!err) {
208		err = device_probe_and_attach(sc->sc_bus.bdev);
209	}
210	if (err) {
211		device_printf(self, "USB init failed err=%d\n", err);
212		goto error;
213	}
214	return (0);
215
216error:
217	ehci_ixp_detach(self);
218	return (ENXIO);
219}
220
221static int
222ehci_ixp_detach(device_t self)
223{
224	struct ixp_ehci_softc *isc = device_get_softc(self);
225	ehci_softc_t *sc = &isc->base;
226	int err;
227
228	/* during module unload there are lots of children leftover */
229	device_delete_children(self);
230
231 	if (sc->sc_irq_res && sc->sc_intr_hdl) {
232		/*
233		 * only call ehci_detach() after ehci_init()
234		 */
235		ehci_detach(sc);
236
237		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
238
239		if (err)
240			/* XXX or should we panic? */
241			device_printf(self, "Could not tear down irq, %d\n",
242			    err);
243		sc->sc_intr_hdl = NULL;
244	}
245
246 	if (sc->sc_irq_res) {
247		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
248		sc->sc_irq_res = NULL;
249	}
250	if (sc->sc_io_res) {
251		bus_release_resource(self, SYS_RES_MEMORY, 0,
252		    sc->sc_io_res);
253		sc->sc_io_res = NULL;
254	}
255	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
256
257	return (0);
258}
259
260/*
261 * Bus space accessors for PIO operations.
262 */
263
264static uint8_t
265ehci_bs_r_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
266{
267	return bus_space_read_1((bus_space_tag_t)tag->bs_privdata, h,
268	    0x100 + (o &~ 3) + (3 - (o & 3)));
269}
270
271static void
272ehci_bs_w_1(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, u_int8_t v)
273{
274	panic("%s", __func__);
275}
276
277static uint16_t
278ehci_bs_r_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
279{
280	return bus_space_read_2((bus_space_tag_t)tag->bs_privdata, h,
281	    0x100 + (o &~ 3) + (2 - (o & 3)));
282}
283
284static void
285ehci_bs_w_2(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, uint16_t v)
286{
287	panic("%s", __func__);
288}
289
290static uint32_t
291ehci_bs_r_4(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o)
292{
293	return bus_space_read_4((bus_space_tag_t) tag->bs_privdata, h, 0x100 + o);
294}
295
296static void
297ehci_bs_w_4(bus_space_tag_t tag, bus_space_handle_t h, bus_size_t o, uint32_t v)
298{
299	bus_space_write_4((bus_space_tag_t) tag->bs_privdata, h, 0x100 + o, v);
300}
301
302static device_method_t ehci_methods[] = {
303	/* Device interface */
304	DEVMETHOD(device_probe, ehci_ixp_probe),
305	DEVMETHOD(device_attach, ehci_ixp_attach),
306	DEVMETHOD(device_detach, ehci_ixp_detach),
307	DEVMETHOD(device_suspend, bus_generic_suspend),
308	DEVMETHOD(device_resume, bus_generic_resume),
309	DEVMETHOD(device_shutdown, bus_generic_shutdown),
310
311	DEVMETHOD_END
312};
313
314static driver_t ehci_driver = {
315	"ehci",
316	ehci_methods,
317	sizeof(struct ixp_ehci_softc),
318};
319
320static devclass_t ehci_devclass;
321
322DRIVER_MODULE(ehci, ixp, ehci_driver, ehci_devclass, 0, 0);
323MODULE_DEPEND(ehci, usb, 1, 1, 1);
324