mk48txxreg.h revision 330897
1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 * 31 * $NetBSD: mk48txxreg.h,v 1.10 2008/04/28 20:23:50 martin Exp $ 32 * 33 * $FreeBSD: stable/11/sys/dev/mk48txx/mk48txxreg.h 330897 2018-03-14 03:19:51Z eadler $ 34 */ 35 36/* 37 * Mostek MK48Txx clocks. 38 * 39 * The MK48T02 has 2KB of non-volatile memory. The time-of-day clock 40 * registers start at offset 0x7f8. 41 * 42 * The MK48T08 and MK48T18 have 8KB of non-volatile memory 43 * 44 * The MK48T59 also has 8KB of non-volatile memory but in addition it 45 * has a battery low detection bit and a power supply wakeup alarm for 46 * power management. It's at offset 0x1ff0 in the NVRAM. 47 */ 48 49/* 50 * Mostek MK48TXX register definitions 51 */ 52 53/* 54 * The first bank of eight registers at offset (nvramsz - 16) is 55 * available only on recenter (which?) MK48Txx models. 56 */ 57#define MK48TXX_FLAGS 0 /* flags register */ 58#define MK48TXX_UNUSED 1 /* unused */ 59#define MK48TXX_ASEC 2 /* alarm seconds (0..59; BCD) */ 60#define MK48TXX_AMIN 3 /* alarm minutes (0..59; BCD) */ 61#define MK48TXX_AHOUR 4 /* alarm hours (0..23; BCD) */ 62#define MK48TXX_ADAY 5 /* alarm day in month (1..31; BCD) */ 63#define MK48TXX_INTR 6 /* interrupts register */ 64#define MK48TXX_WDOG 7 /* watchdog register */ 65 66#define MK48TXX_ICSR 8 /* control register */ 67#define MK48TXX_ISEC 9 /* seconds (0..59; BCD) */ 68#define MK48TXX_IMIN 10 /* minutes (0..59; BCD) */ 69#define MK48TXX_IHOUR 11 /* hours (0..23; BCD) */ 70#define MK48TXX_IWDAY 12 /* weekday (1..7) */ 71#define MK48TXX_IDAY 13 /* day in month (1..31; BCD) */ 72#define MK48TXX_IMON 14 /* month (1..12; BCD) */ 73#define MK48TXX_IYEAR 15 /* year (0..99; BCD) */ 74 75/* 76 * Note that some of the bits below that are not in the first eight 77 * registers are also only available on models with an extended 78 * register set. 79 */ 80 81/* Bits in the flags register (extended only) */ 82#define MK48TXX_FLAGS_BL 0x10 /* battery low (read only) */ 83#define MK48TXX_FLAGS_AF 0x40 /* alarm flag (read only) */ 84#define MK48TXX_FLAGS_WDF 0x80 /* watchdog flag (read only) */ 85 86/* Bits in the alarm seconds register (extended only) */ 87#define MK48TXX_ASEC_MASK 0x7f /* mask for alarm seconds */ 88#define MK48TXX_ASEC_RPT1 0x80 /* alarm repeat mode bit 1 */ 89 90/* Bits in the alarm minutes register (extended only) */ 91#define MK48TXX_AMIN_MASK 0x7f /* mask for alarm minutes */ 92#define MK48TXX_AMIN_RPT2 0x80 /* alarm repeat mode bit 2 */ 93 94/* Bits in the alarm hours register (extended only) */ 95#define MK48TXX_AHOUR_MASK 0x3f /* mask for alarm hours */ 96#define MK48TXX_AHOUR_RPT3 0x80 /* alarm repeat mode bit 3 */ 97 98/* Bits in the alarm day in month register (extended only) */ 99#define MK48TXX_ADAY_MASK 0x3f /* mask for alarm day in month */ 100#define MK48TXX_ADAY_RPT4 0x80 /* alarm repeat mode bit 4 */ 101 102/* Bits in the interrupts register (extended only) */ 103#define MK48TXX_INTR_ABE 0x20 /* alarm in battery back-up mode */ 104#define MK48TXX_INTR_AFE 0x80 /* alarm flag enable */ 105 106/* Bits in the watchdog register (extended only) */ 107#define MK48TXX_WDOG_RB_1_16 0x00 /* watchdog resolution 1/16 second */ 108#define MK48TXX_WDOG_RB_1_4 0x01 /* watchdog resolution 1/4 second */ 109#define MK48TXX_WDOG_RB_1 0x02 /* watchdog resolution 1 second */ 110#define MK48TXX_WDOG_RB_4 0x03 /* watchdog resolution 4 seconds */ 111#define MK48TXX_WDOG_BMB_MASK 0x7c /* mask for watchdog multiplier */ 112#define MK48TXX_WDOG_BMB_SHIFT 2 /* shift for watchdog multiplier */ 113#define MK48TXX_WDOG_WDS 0x80 /* watchdog steering bit */ 114 115/* Bits in the control register */ 116#define MK48TXX_CSR_CALIB_MASK 0x1f /* mask for calibration step width */ 117#define MK48TXX_CSR_SIGN 0x20 /* sign of above calibration witdh */ 118#define MK48TXX_CSR_READ 0x40 /* want to read (freeze clock) */ 119#define MK48TXX_CSR_WRITE 0x80 /* want to write */ 120 121/* Bits in the seconds register */ 122#define MK48TXX_SEC_MASK 0x7f /* mask for seconds */ 123#define MK48TXX_SEC_ST 0x80 /* stop oscillator */ 124 125/* Bits in the minutes register */ 126#define MK48TXX_MIN_MASK 0x7f /* mask for minutes */ 127 128/* Bits in the hours register */ 129#define MK48TXX_HOUR_MASK 0x3f /* mask for hours */ 130 131/* Bits in the century/weekday register */ 132#define MK48TXX_WDAY_MASK 0x07 /* mask for weekday */ 133#define MK48TXX_WDAY_CB 0x10 /* century bit (extended only) */ 134#define MK48TXX_WDAY_CB_SHIFT 4 /* shift for century bit */ 135#define MK48TXX_WDAY_CEB 0x20 /* century enable bit (extended only) */ 136#define MK48TXX_WDAY_FT 0x40 /* frequency test */ 137 138/* Bits in the day in month register */ 139#define MK48TXX_DAY_MASK 0x3f /* mask for day in month */ 140 141/* Bits in the month register */ 142#define MK48TXX_MON_MASK 0x1f /* mask for month */ 143 144/* Bits in the year register */ 145#define MK48TXX_YEAR_MASK 0xff /* mask for year */ 146 147/* Model specific NVRAM sizes and clock offsets */ 148#define MK48T02_CLKSZ 2048 149#define MK48T02_CLKOFF 0x7f0 150 151#define MK48T08_CLKSZ 8192 152#define MK48T08_CLKOFF 0x1ff0 153 154#define MK48T18_CLKSZ 8192 155#define MK48T18_CLKOFF 0x1ff0 156 157#define MK48T37_CLKSZ 32768 158#define MK48T37_CLKOFF 0x1ff0 159 160#define MK48T59_CLKSZ 8192 161#define MK48T59_CLKOFF 0x1ff0 162