rdcphyreg.h revision 331722
1/*- 2 * Copyright (c) 2010, Pyun YongHyeon <yongari@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice unmodified, this list of conditions, and the following 10 * disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD: stable/11/sys/dev/mii/rdcphyreg.h 331722 2018-03-29 02:50:57Z eadler $ 28 */ 29 30#ifndef _DEV_MII_RDCPHYREG_H_ 31#define _DEV_MII_RDCPHYREG_H_ 32 33#define MII_RDCPHY_DEBUG 0x11 34#define DEBUG_JABBER_DIS 0x0040 35#define DEBUG_LOOP_BACK_10MBPS 0x0400 36 37#define MII_RDCPHY_CTRL 0x14 38#define CTRL_SQE_ENB 0x0100 39#define CTRL_NEG_POLARITY 0x0400 40#define CTRL_AUTO_POLARITY 0x0800 41#define CTRL_MDIXSEL_RX 0x2000 42#define CTRL_MDIXSEL_TX 0x4000 43#define CTRL_AUTO_MDIX_DIS 0x8000 44 45#define MII_RDCPHY_CTRL2 0x15 46#define CTRL2_LED_DUPLEX 0x0000 47#define CTRL2_LED_DUPLEX_COL 0x0008 48#define CTRL2_LED_ACT 0x0010 49#define CTRL2_LED_SPEED_ACT 0x0018 50#define CTRL2_LED_BLK_100MBPS_DIS 0x0020 51#define CTRL2_LED_BLK_10MBPS_DIS 0x0040 52#define CTRL2_LED_BLK_LINK_ACT_DIS 0x0080 53#define CTRL2_SDT_THRESH_MASK 0x3E00 54#define CTRL2_TIMING_ERR_SEL 0x4000 55#define CTRL2_LED_BLK_80MS 0x8000 56#define CTRL2_LED_BLK_160MS 0x0000 57#define CTRL2_LED_MASK 0x0018 58 59#define MII_RDCPHY_STATUS 0x16 60#define STATUS_AUTO_MDIX_RX 0x0200 61#define STATUS_AUTO_MDIX_TX 0x0400 62#define STATUS_NEG_POLARITY 0x0800 63#define STATUS_FULL_DUPLEX 0x1000 64#define STATUS_SPEED_10 0x0000 65#define STATUS_SPEED_100 0x2000 66#define STATUS_SPEED_MASK 0x6000 67#define STATUS_LINK_UP 0x8000 68 69/* Analog test register 2 */ 70#define MII_RDCPHY_TEST2 0x1A 71#define TEST2_PWR_DOWN 0x0200 72 73#endif /* _DEV_MII_RDCPHYREG_H_ */ 74