hptintf.h revision 330897
1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2011 HighPoint Technologies, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD: stable/11/sys/dev/hptnr/hptintf.h 330897 2018-03-14 03:19:51Z eadler $ 29 */ 30 31#include <dev/hptnr/hptnr_config.h> 32 33#ifndef HPT_INTF_H 34#define HPT_INTF_H 35 36#if defined(__BIG_ENDIAN__)&&!defined(__BIG_ENDIAN_BITFIELD) 37#define __BIG_ENDIAN_BITFIELD 38#endif 39 40#ifdef __cplusplus 41extern "C" { 42#endif 43 44#ifndef __GNUC__ 45#define __attribute__(x) 46#endif 47 48#pragma pack(1) 49 50/* 51 * Version of this interface. 52 * The user mode application must first issue a hpt_get_version() call to 53 * check HPT_INTERFACE_VERSION. When an utility using newer version interface 54 * is used with old version drivers, it must call only the functions that 55 * driver supported. 56 * A new version interface should only add ioctl functions; it should implement 57 * all old version functions without change their definition. 58 */ 59#define __this_HPT_INTERFACE_VERSION 0x02010000 60 61#ifndef HPT_INTERFACE_VERSION 62#error "You must define HPT_INTERFACE_VERSION you implemented" 63#endif 64 65#if HPT_INTERFACE_VERSION > __this_HPT_INTERFACE_VERSION 66#error "HPT_INTERFACE_VERSION is invalid" 67#endif 68 69/* 70 * DEFINITION 71 * Logical device --- a device that can be accessed by OS. 72 * Physical device --- device attached to the controller. 73 * A logical device can be simply a physical device. 74 * 75 * Each logical and physical device has a 32bit ID. GUI will use this ID 76 * to identify devices. 77 * 1. The ID must be unique. 78 * 2. The ID must be immutable. Once an ID is assigned to a device, it 79 * must not change when system is running and the device exists. 80 * 3. The ID of logical device must be NOT reusable. If a device is 81 * removed, other newly created logical device must not use the same ID. 82 * 4. The ID must not be zero or 0xFFFFFFFF. 83 */ 84typedef HPT_U32 DEVICEID; 85 86/* 87 * logical device type. 88 * Identify array (logical device) and physical device. 89 */ 90#define LDT_ARRAY 1 91#define LDT_DEVICE 2 92 93/* 94 * Array types 95 * GUI will treat all array as 1-level RAID. No RAID0/1 or RAID1/0. 96 * A RAID0/1 device is type AT_RAID1. A RAID1/0 device is type AT_RAID0. 97 * Their members may be another array of type RAID0 or RAID1. 98 */ 99#define AT_UNKNOWN 0 100#define AT_RAID0 1 101#define AT_RAID1 2 102#define AT_RAID5 3 103#define AT_RAID6 4 104#define AT_RAID3 5 105#define AT_RAID4 6 106#define AT_JBOD 7 107#define AT_RAID1E 8 108 109/* 110 * physical device type 111 */ 112#define PDT_UNKNOWN 0 113#define PDT_HARDDISK 1 114#define PDT_CDROM 2 115#define PDT_TAPE 3 116 117/* 118 * Some constants. 119 */ 120#define MAX_NAME_LENGTH 36 121#define MAX_ARRAYNAME_LEN 16 122 123#define MAX_ARRAY_MEMBERS_V1 8 124 125#ifndef MAX_ARRAY_MEMBERS_V2 126#define MAX_ARRAY_MEMBERS_V2 16 127#endif 128 129#ifndef MAX_ARRAY_MEMBERS_V3 130#define MAX_ARRAY_MEMBERS_V3 64 131#endif 132 133/* keep definition for source code compatibility */ 134#define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1 135 136/* 137 * io commands 138 * GUI use these commands to do IO on logical/physical devices. 139 */ 140#define IO_COMMAND_READ 1 141#define IO_COMMAND_WRITE 2 142 143 144 145/* 146 * array flags 147 */ 148#define ARRAY_FLAG_DISABLED 0x00000001 /* The array is disabled */ 149#define ARRAY_FLAG_NEEDBUILDING 0x00000002 /* array data need to be rebuilt */ 150#define ARRAY_FLAG_REBUILDING 0x00000004 /* array is in rebuilding process */ 151#define ARRAY_FLAG_BROKEN 0x00000008 /* broken but may still working */ 152#define ARRAY_FLAG_BOOTDISK 0x00000010 /* array has a active partition */ 153 154#define ARRAY_FLAG_BOOTMARK 0x00000040 /* array has boot mark set */ 155#define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */ 156#define ARRAY_FLAG_VERIFYING 0x00000100 /* is being verified */ 157#define ARRAY_FLAG_INITIALIZING 0x00000200 /* is being initialized */ 158#define ARRAY_FLAG_TRANSFORMING 0x00000400 /* transform in progress */ 159#define ARRAY_FLAG_NEEDTRANSFORM 0x00000800 /* array need transform */ 160#define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* the array's initialization hasn't finished*/ 161#define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant (raid6) */ 162#define ARRAY_FLAG_RAID15PLUS 0x80000000 /* display this RAID 1 as RAID 1.5 */ 163 164#define ARRAY_FLAG_ZERO_STARTING 0x40000000 /* start lba of all members of this array is 0 */ 165 166/* 167 * device flags 168 */ 169#define DEVICE_FLAG_DISABLED 0x00000001 /* device is disabled */ 170#define DEVICE_FLAG_BOOTDISK 0x00000002 /* disk has a active partition */ 171#define DEVICE_FLAG_BOOTMARK 0x00000004 /* disk has boot mark set */ 172#define DEVICE_FLAG_WITH_601 0x00000008 /* has HPT601 connected */ 173#define DEVICE_FLAG_SATA 0x00000010 /* SATA or SAS device */ 174#define DEVICE_FLAG_ON_PM_PORT 0x00000020 /* PM port */ 175#define DEVICE_FLAG_SAS 0x00000040 /* SAS device */ 176#define DEVICE_FLAG_IN_ENCLOSURE 0x00000080 /* PathId is enclosure# */ 177#define DEVICE_FLAG_UNINITIALIZED 0x00010000 /* device is not initialized, can't be used to create array */ 178#define DEVICE_FLAG_LEGACY 0x00020000 /* single disk & mbr contains at least one partition */ 179#define DEVICE_FLAG_BAD_SECTOR_FOUND 0x00040000 /* found bad sector on target disk, set and clear by GUI */ 180 181#define DEVICE_FLAG_IS_SPARE 0x80000000 /* is a spare disk */ 182 183 184#define DEVICE_FLAG_SSD 0x00000100 /* SSD device */ 185#define DEVICE_FLAG_3G 0x10000000 186#define DEVICE_FLAG_6G 0x20000000 187 188 189/* 190 * array states used by hpt_set_array_state() 191 */ 192/* old defines */ 193#define MIRROR_REBUILD_START 1 194#define MIRROR_REBUILD_ABORT 2 195#define MIRROR_REBUILD_COMPLETE 3 196/* new defines */ 197#define AS_REBUILD_START 1 198#define AS_REBUILD_ABORT 2 199#define AS_REBUILD_PAUSE AS_REBUILD_ABORT 200#define AS_REBUILD_COMPLETE 3 201#define AS_VERIFY_START 4 202#define AS_VERIFY_ABORT 5 203#define AS_VERIFY_COMPLETE 6 204#define AS_INITIALIZE_START 7 205#define AS_INITIALIZE_ABORT 8 206#define AS_INITIALIZE_COMPLETE 9 207#define AS_VERIFY_FAILED 10 208#define AS_REBUILD_STOP 11 209#define AS_SAVE_STATE 12 210#define AS_TRANSFORM_START 13 211#define AS_TRANSFORM_ABORT 14 212 213/************************************************************************ 214 * ioctl code 215 * It would be better if ioctl code are the same on different platforms, 216 * but we must not conflict with system defined ioctl code. 217 ************************************************************************/ 218#if defined(LINUX) || defined(__FreeBSD_version) || defined(linux) 219#define HPT_CTL_CODE(x) (x+0xFF00) 220#define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00) 221#elif defined(_MS_WIN32_) || defined(WIN32) 222 223#ifndef CTL_CODE 224#define CTL_CODE( DeviceType, Function, Method, Access ) \ 225 (((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method)) 226#endif 227#define HPT_CTL_CODE(x) CTL_CODE(0x370, 0x900+(x), 0, 0) 228#define HPT_CTL_CODE_WIN32_TO_IOP(x) ((((x) & 0xffff)>>2)-0x900) 229 230#else 231#define HPT_CTL_CODE(x) (x) 232#endif 233 234#define HPT_IOCTL_GET_VERSION HPT_CTL_CODE(0) 235#define HPT_IOCTL_GET_CONTROLLER_COUNT HPT_CTL_CODE(1) 236#define HPT_IOCTL_GET_CONTROLLER_INFO HPT_CTL_CODE(2) 237#define HPT_IOCTL_GET_CHANNEL_INFO HPT_CTL_CODE(3) 238#define HPT_IOCTL_GET_LOGICAL_DEVICES HPT_CTL_CODE(4) 239#define HPT_IOCTL_GET_DEVICE_INFO HPT_CTL_CODE(5) 240#define HPT_IOCTL_CREATE_ARRAY HPT_CTL_CODE(6) 241#define HPT_IOCTL_DELETE_ARRAY HPT_CTL_CODE(7) 242#define HPT_IOCTL_ARRAY_IO HPT_CTL_CODE(8) 243#define HPT_IOCTL_DEVICE_IO HPT_CTL_CODE(9) 244#define HPT_IOCTL_GET_EVENT HPT_CTL_CODE(10) 245#define HPT_IOCTL_REBUILD_MIRROR HPT_CTL_CODE(11) 246/* use HPT_IOCTL_REBUILD_DATA_BLOCK from now on */ 247#define HPT_IOCTL_REBUILD_DATA_BLOCK HPT_IOCTL_REBUILD_MIRROR 248#define HPT_IOCTL_ADD_SPARE_DISK HPT_CTL_CODE(12) 249#define HPT_IOCTL_REMOVE_SPARE_DISK HPT_CTL_CODE(13) 250#define HPT_IOCTL_ADD_DISK_TO_ARRAY HPT_CTL_CODE(14) 251#define HPT_IOCTL_SET_ARRAY_STATE HPT_CTL_CODE(15) 252#define HPT_IOCTL_SET_ARRAY_INFO HPT_CTL_CODE(16) 253#define HPT_IOCTL_SET_DEVICE_INFO HPT_CTL_CODE(17) 254#define HPT_IOCTL_RESCAN_DEVICES HPT_CTL_CODE(18) 255#define HPT_IOCTL_GET_DRIVER_CAPABILITIES HPT_CTL_CODE(19) 256#define HPT_IOCTL_GET_601_INFO HPT_CTL_CODE(20) 257#define HPT_IOCTL_SET_601_INFO HPT_CTL_CODE(21) 258#define HPT_IOCTL_LOCK_DEVICE HPT_CTL_CODE(22) 259#define HPT_IOCTL_UNLOCK_DEVICE HPT_CTL_CODE(23) 260#define HPT_IOCTL_IDE_PASS_THROUGH HPT_CTL_CODE(24) 261#define HPT_IOCTL_VERIFY_DATA_BLOCK HPT_CTL_CODE(25) 262#define HPT_IOCTL_INITIALIZE_DATA_BLOCK HPT_CTL_CODE(26) 263#define HPT_IOCTL_ADD_DEDICATED_SPARE HPT_CTL_CODE(27) 264#define HPT_IOCTL_DEVICE_IO_EX HPT_CTL_CODE(28) 265#define HPT_IOCTL_SET_BOOT_MARK HPT_CTL_CODE(29) 266#define HPT_IOCTL_QUERY_REMOVE HPT_CTL_CODE(30) 267#define HPT_IOCTL_REMOVE_DEVICES HPT_CTL_CODE(31) 268#define HPT_IOCTL_CREATE_ARRAY_V2 HPT_CTL_CODE(32) 269#define HPT_IOCTL_GET_DEVICE_INFO_V2 HPT_CTL_CODE(33) 270#define HPT_IOCTL_SET_DEVICE_INFO_V2 HPT_CTL_CODE(34) 271#define HPT_IOCTL_REBUILD_DATA_BLOCK_V2 HPT_CTL_CODE(35) 272#define HPT_IOCTL_VERIFY_DATA_BLOCK_V2 HPT_CTL_CODE(36) 273#define HPT_IOCTL_INITIALIZE_DATA_BLOCK_V2 HPT_CTL_CODE(37) 274#define HPT_IOCTL_LOCK_DEVICE_V2 HPT_CTL_CODE(38) 275#define HPT_IOCTL_DEVICE_IO_V2 HPT_CTL_CODE(39) 276#define HPT_IOCTL_DEVICE_IO_EX_V2 HPT_CTL_CODE(40) 277#define HPT_IOCTL_CREATE_TRANSFORM HPT_CTL_CODE(41) 278#define HPT_IOCTL_STEP_TRANSFORM HPT_CTL_CODE(42) 279#define HPT_IOCTL_SET_VDEV_INFO HPT_CTL_CODE(43) 280#define HPT_IOCTL_CALC_MAX_CAPACITY HPT_CTL_CODE(44) 281#define HPT_IOCTL_INIT_DISKS HPT_CTL_CODE(45) 282#define HPT_IOCTL_GET_DEVICE_INFO_V3 HPT_CTL_CODE(46) 283#define HPT_IOCTL_GET_CONTROLLER_INFO_V2 HPT_CTL_CODE(47) 284#define HPT_IOCTL_I2C_TRANSACTION HPT_CTL_CODE(48) 285#define HPT_IOCTL_GET_PARAMETER_LIST HPT_CTL_CODE(49) 286#define HPT_IOCTL_GET_PARAMETER HPT_CTL_CODE(50) 287#define HPT_IOCTL_SET_PARAMETER HPT_CTL_CODE(51) 288#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_V2 HPT_CTL_CODE(52) 289#define HPT_IOCTL_GET_CHANNEL_INFO_V2 HPT_CTL_CODE(53) 290#define HPT_IOCTL_GET_CONTROLLER_INFO_V3 HPT_CTL_CODE(54) 291#define HPT_IOCTL_GET_DEVICE_INFO_V4 HPT_CTL_CODE(55) 292#define HPT_IOCTL_CREATE_ARRAY_V3 HPT_CTL_CODE(56) 293#define HPT_IOCTL_CREATE_TRANSFORM_V2 HPT_CTL_CODE(57) 294#define HPT_IOCTL_CALC_MAX_CAPACITY_V2 HPT_CTL_CODE(58) 295#define HPT_IOCTL_SCSI_PASSTHROUGH HPT_CTL_CODE(59) 296#define HPT_IOCTL_GET_PHYSICAL_DEVICES HPT_CTL_CODE(60) 297#define HPT_IOCTL_GET_ENCLOSURE_COUNT HPT_CTL_CODE(61) 298#define HPT_IOCTL_GET_ENCLOSURE_INFO HPT_CTL_CODE(62) 299#define HPT_IOCTL_GET_PERFMON_STATUS HPT_CTL_CODE(63) 300#define HPT_IOCTL_SET_PERFMON_STATUS HPT_CTL_CODE(64) 301#define HPT_IOCTL_GET_PERFMON_DATA HPT_CTL_CODE(65) 302#define HPT_IOCTL_IDE_PASS_THROUGH_V2 HPT_CTL_CODE(66) 303#define HPT_IOCTL_GET_ENCLOSURE_INFO_V2 HPT_CTL_CODE(67) 304#define HPT_IOCTL_GET_ENCLOSURE_INFO_V3 HPT_CTL_CODE(68) 305#define HPT_IOCTL_ACCESS_CONFIG_REG HPT_CTL_CODE(69) 306 307#define HPT_IOCTL_GET_ENCLOSURE_INFO_V4 HPT_CTL_CODE(70) 308#define HPT_IOCTL_GET_ENCLOSURE_ELEMENT_INFO HPT_CTL_CODE(71) 309#define HPT_IOCTL_DUMP_METADATA HPT_CTL_CODE(72) 310#define HPT_IOCTL_GET_CONTROLLER_INFO_V2_EXT HPT_CTL_CODE(73) 311 312 313#define HPT_IOCTL_GET_CONTROLLER_IDS HPT_CTL_CODE(100) 314#define HPT_IOCTL_GET_DCB HPT_CTL_CODE(101) 315 316#define HPT_IOCTL_EPROM_IO HPT_CTL_CODE(102) 317#define HPT_IOCTL_GET_CONTROLLER_VENID HPT_CTL_CODE(103) 318 319 320#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_CC HPT_CTL_CODE(200) 321#define HPT_IOCTL_GET_CCS_INFO HPT_CTL_CODE(201) 322#define HPT_IOCTL_CREATE_CC HPT_CTL_CODE(202) 323#define HPT_IOCTL_DELETE_CC HPT_CTL_CODE(203) 324#define HPT_IOCTL_REENABLE_ARRAY HPT_CTL_CODE(204) 325 326/************************************************************************ 327 * shared data structures 328 ************************************************************************/ 329 330/* 331 * Chip Type 332 */ 333#define CHIP_TYPE_HPT366 1 334#define CHIP_TYPE_HPT368 2 335#define CHIP_TYPE_HPT370 3 336#define CHIP_TYPE_HPT370A 4 337#define CHIP_TYPE_HPT370B 5 338#define CHIP_TYPE_HPT374 6 339#define CHIP_TYPE_HPT372 7 340#define CHIP_TYPE_HPT372A 8 341#define CHIP_TYPE_HPT302 9 342#define CHIP_TYPE_HPT371 10 343#define CHIP_TYPE_HPT372N 11 344#define CHIP_TYPE_HPT302N 12 345#define CHIP_TYPE_HPT371N 13 346#define CHIP_TYPE_SI3112A 14 347#define CHIP_TYPE_ICH5 15 348#define CHIP_TYPE_ICH5R 16 349#define CHIP_TYPE_MV50XX 20 350#define CHIP_TYPE_MV60X1 21 351#define CHIP_TYPE_MV60X2 22 352#define CHIP_TYPE_MV70X2 23 353#define CHIP_TYPE_MV5182 24 354#define CHIP_TYPE_IOP331 31 355#define CHIP_TYPE_IOP333 32 356#define CHIP_TYPE_IOP341 33 357#define CHIP_TYPE_IOP348 34 358 359/* 360 * Chip Flags 361 */ 362#define CHIP_SUPPORT_ULTRA_66 0x20 363#define CHIP_SUPPORT_ULTRA_100 0x40 364#define CHIP_HPT3XX_DPLL_MODE 0x80 365#define CHIP_SUPPORT_ULTRA_133 0x01 366#define CHIP_SUPPORT_ULTRA_150 0x02 367#define CHIP_MASTER 0x04 368#define CHIP_SUPPORT_SATA_300 0x08 369 370#define HPT_SPIN_UP_MODE_NOSUPPORT 0 371#define HPT_SPIN_UP_MODE_FULL 1 372#define HPT_SPIN_UP_MODE_STANDBY 2 373 374#define HPT_CAP_DUMP_METADATA 0x1 375#define HPT_CAP_DISK_CHECKING 0x2 376#define HPT_CAP_REPORT_SECTOR_SIZE 0x10 377 378typedef struct _DRIVER_CAPABILITIES { 379 HPT_U32 dwSize; 380 381 HPT_U8 MaximumControllers; /* maximum controllers the driver can support */ 382 HPT_U8 SupportCrossControllerRAID; /* 1-support, 0-not support */ 383 HPT_U8 MinimumBlockSizeShift; /* minimum block size shift */ 384 HPT_U8 MaximumBlockSizeShift; /* maximum block size shift */ 385 386 HPT_U8 SupportDiskModeSetting; 387 HPT_U8 SupportSparePool; 388 HPT_U8 MaximumArrayNameLength; 389 /* only one HPT_U8 left here! */ 390#ifdef __BIG_ENDIAN_BITFIELD 391 HPT_U8 reserved: 2; 392 HPT_U8 SupportPerformanceMonitor: 1; 393 HPT_U8 SupportVariableSectorSize: 1; 394 HPT_U8 SupportHotSwap: 1; 395 HPT_U8 HighPerformanceRAID1: 1; 396 HPT_U8 RebuildProcessInDriver: 1; 397 HPT_U8 SupportDedicatedSpare: 1; 398#else 399 HPT_U8 SupportDedicatedSpare: 1; /* call hpt_add_dedicated_spare() for dedicated spare. */ 400 HPT_U8 RebuildProcessInDriver: 1; /* Windows only. used by mid layer for rebuild control. */ 401 HPT_U8 HighPerformanceRAID1: 1; 402 HPT_U8 SupportHotSwap: 1; 403 HPT_U8 SupportVariableSectorSize: 1; 404 HPT_U8 SupportPerformanceMonitor: 1; 405 HPT_U8 reserved: 2; 406#endif 407 408 409 HPT_U8 SupportedRAIDTypes[16]; 410 /* maximum members in an array corresponding to SupportedRAIDTypes */ 411 HPT_U8 MaximumArrayMembers[16]; 412} 413DRIVER_CAPABILITIES, *PDRIVER_CAPABILITIES; 414 415typedef struct _DRIVER_CAPABILITIES_V2 { 416 DRIVER_CAPABILITIES v1; 417 HPT_U8 SupportedCachePolicies[16]; 418 HPT_U32 ConfigRegSize; /* max sectors */ 419 HPT_U32 SupportDiskCachePolicy; /* disable/enable disk cache policy */ 420 HPT_U32 Flags; 421 HPT_U32 reserved[14]; 422} 423DRIVER_CAPABILITIES_V2, *PDRIVER_CAPABILITIES_V2; 424 425/* 426 * Controller information. 427 */ 428typedef struct _CONTROLLER_INFO { 429 HPT_U8 ChipType; /* chip type */ 430 HPT_U8 InterruptLevel; /* IRQ level */ 431 HPT_U8 NumBuses; /* bus count */ 432 HPT_U8 ChipFlags; 433 434 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */ 435 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */ 436 437} CONTROLLER_INFO, *PCONTROLLER_INFO; 438 439#if HPT_INTERFACE_VERSION>=0x01020000 440typedef struct _CONTROLLER_INFO_V2 { 441 HPT_U8 ChipType; /* chip type */ 442 HPT_U8 InterruptLevel; /* IRQ level */ 443 HPT_U8 NumBuses; /* bus count */ 444 HPT_U8 ChipFlags; 445 446 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */ 447 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */ 448 449 HPT_U32 GroupId; /* low 32bit of vbus pointer the controller belongs 450 * the master controller has CHIP_MASTER flag set*/ 451 HPT_U8 pci_tree; 452 HPT_U8 pci_bus; 453 HPT_U8 pci_device; 454 HPT_U8 pci_function; 455 456 HPT_U32 ExFlags; 457} CONTROLLER_INFO_V2, *PCONTROLLER_INFO_V2; 458 459typedef struct _CONTROLLER_INFO_V2_EXT { 460 HPT_U8 MaxWidth; 461 HPT_U8 CurrentWidth; 462 HPT_U8 MaxSpeed; 463 HPT_U8 CurrentSpeed; 464 HPT_U8 reserve[64]; 465} CONTROLLER_INFO_V2_EXT, *PCONTROLLER_INFO_V2_EXT; 466 467 468#define CEXF_IOPModel 1 469#define CEXF_SDRAMSize 2 470#define CEXF_BatteryInstalled 4 471#define CEXF_BatteryStatus 8 472#define CEXF_BatteryVoltage 0x10 473#define CEXF_BatteryBackupTime 0x20 474#define CEXF_FirmwareVersion 0x40 475#define CEXF_SerialNumber 0x80 476#define CEXF_BatteryTemperature 0x100 477#define CEXF_Power12v 0x200 478#define CEXF_Power5v 0x400 479#define CEXF_Power3p3v 0x800 480#define CEXF_Power2p5v 0x1000 481#define CEXF_Power1p8v 0x2000 482#define CEXF_Core1p8v 0x4000 483#define CEXF_Core1p2v 0x8000 484#define CEXF_DDR1p8v 0x10000 485#define CEXF_DDR1p8vRef 0x20000 486#define CEXF_CPUTemperature 0x40000 487#define CEXF_BoardTemperature 0x80000 488#define CEXF_FanSpeed 0x100000 489#define CEXF_Core1p0v 0x200000 490#define CEXF_Fan2Speed 0x400000 491#define CEXF_Power1p0v 0x800000 492#define CEXF_Power1p5v 0x1000000 493#define CEXF_SASAddress 0x2000000 494 495typedef struct _CONTROLLER_INFO_V3 { 496 HPT_U8 ChipType; 497 HPT_U8 InterruptLevel; 498 HPT_U8 NumBuses; 499 HPT_U8 ChipFlags; 500 HPT_U8 szProductID[MAX_NAME_LENGTH]; 501 HPT_U8 szVendorID[MAX_NAME_LENGTH]; 502 HPT_U32 GroupId; 503 HPT_U8 pci_tree; 504 HPT_U8 pci_bus; 505 HPT_U8 pci_device; 506 HPT_U8 pci_function; 507 HPT_U32 ExFlags; 508 HPT_U8 IOPModel[32]; 509 HPT_U32 SDRAMSize; 510 HPT_U8 BatteryInstalled; 511 HPT_U8 BatteryStatus; 512 HPT_U16 BatteryVoltage; 513 HPT_U32 BatteryBackupTime; 514 HPT_U32 FirmwareVersion; 515 HPT_U8 SerialNumber[32]; 516 HPT_U8 BatteryMBInstalled; 517 HPT_U8 BatteryTemperature; 518 signed char CPUTemperature; 519 signed char BoardTemperature; 520 HPT_U16 FanSpeed; 521 HPT_U16 Power12v; 522 HPT_U16 Power5v; 523 HPT_U16 Power3p3v; 524 HPT_U16 Power2p5v; 525 HPT_U16 Power1p8v; 526 HPT_U16 Core1p8v; 527 HPT_U16 Core1p2v; 528 HPT_U16 DDR1p8v; 529 HPT_U16 DDR1p8vRef; 530 HPT_U16 Core1p0v; 531 HPT_U16 Fan2Speed; 532 HPT_U16 Power1p0v; 533 HPT_U16 Power1p5v; 534 HPT_U8 SASAddress[8]; 535 HPT_U8 reserve[48]; 536} 537CONTROLLER_INFO_V3, *PCONTROLLER_INFO_V3; 538typedef char check_CONTROLLER_INFO_V3[sizeof(CONTROLLER_INFO_V3)==256? 1:-1]; 539#endif 540/* 541 * Channel information. 542 */ 543typedef struct _CHANNEL_INFO { 544 HPT_U32 IoPort; /* IDE Base Port Address */ 545 HPT_U32 ControlPort; /* IDE Control Port Address */ 546 547 DEVICEID Devices[2]; /* device connected to this channel */ 548 549} CHANNEL_INFO, *PCHANNEL_INFO; 550 551typedef struct _CHANNEL_INFO_V2 { 552 HPT_U32 IoPort; /* IDE Base Port Address */ 553 HPT_U32 ControlPort; /* IDE Control Port Address */ 554 555 DEVICEID Devices[2+13]; /* device connected to this channel, PMPort max=15 */ 556} CHANNEL_INFO_V2, *PCHANNEL_INFO_V2; 557 558typedef struct _ENCLOSURE_INFO { 559 HPT_U8 EnclosureType; 560 HPT_U8 NumberOfPhys; 561 HPT_U8 AttachedTo; 562 HPT_U8 Status; 563 HPT_U8 VendorId[8]; 564 HPT_U8 ProductId[16]; 565 HPT_U8 ProductRevisionLevel[4]; 566 HPT_U32 PortPhyMap; 567 HPT_U32 reserve[55]; 568} ENCLOSURE_INFO, *PENCLOSURE_INFO; 569 570 571typedef struct _SES_ELEMENT_STATUS { 572 HPT_U8 ElementType; 573 HPT_U8 ElementOverallIndex; 574 HPT_U8 ElementStatus; 575 HPT_U8 Reserved; 576 HPT_U32 ElementValue; 577 HPT_U8 ElementDescriptor[32]; 578}SES_ELEMENT_STATUS,*PSES_ELEMENT_STATUS; 579 580#define MAX_ELEMENT_COUNT 80 581/* Element Type */ 582#define SES_TYPE_UNSPECIFIED 0x00 583#define SES_TYPE_DEVICE 0x01 584#define SES_TYPE_POWER_SUPPLY 0x02 585#define SES_TYPE_FAN 0x03 586#define SES_TYPE_TEMPERATURE_SENSOR 0x04 587#define SES_TYPE_DOOR_LOCK 0x05 588#define SES_TYPE_SPEAKER 0x06 589#define SES_TYPE_ES_CONTROLLER 0x07 590#define SES_TYPE_SCC_CONTROLLER 0x08 591#define SES_TYPE_NONVOLATILE_CACHE 0x09 592#define SES_TYPE_UPS 0x0B 593#define SES_TYPE_DISPLAY 0x0C 594#define SES_TYPE_KEYPAD 0x0D 595#define SES_TYPE_ENCLOSURE 0x0E 596#define SES_TYPE_SCSI_TRANSCEIVER 0x0F 597#define SES_TYPE_LANGUAGE 0x10 598#define SES_TYPE_COMM_PORT 0x11 599#define SES_TYPE_VOLTAGE_SENSOR 0x12 600#define SES_TYPE_CURRENT_SENSOR 0x13 601#define SES_TYPE_SCSI_TARGET_PORT 0x14 602#define SES_TYPE_SCSI_INITIATOR_PORT 0x15 603#define SES_TYPE_SIMPLE_SUBENCLOSURE 0x16 604#define SES_TYPE_ARRAY_DEVICE 0x17 605#define SES_TYPE_VENDOR_SPECIFIC 0x80 606 607/* Element Status */ 608 609#define SES_STATUS_UNSUPPORTED 0x00 610#define SES_STATUS_OK 0x01 611#define SES_STATUS_CRITICAL 0x02 612#define SES_STATUS_NONCRITICAL 0x03 613#define SES_STATUS_UNRECOVERABLE 0x04 614#define SES_STATUS_NOTINSTALLED 0x05 615#define SES_STATUS_UNKNOWN 0x06 616#define SES_STATUS_NOTAVAILABLE 0x07 617#define SES_STATUS_RESERVED 0x08 618 619 620typedef struct _ENCLOSURE_INFO_V2 { 621 HPT_U8 EnclosureType; 622 HPT_U8 NumberOfPhys; 623 HPT_U8 AttachedTo; 624 HPT_U8 Status; 625 HPT_U8 VendorId[8]; 626 HPT_U8 ProductId[16]; 627 HPT_U8 ProductRevisionLevel[4]; 628 HPT_U32 PortPhyMap; 629 SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT]; 630} ENCLOSURE_INFO_V2, *PENCLOSURE_INFO_V2; 631 632typedef struct _ENCLOSURE_INFO_V3 { 633 HPT_U8 EnclosureType; 634 HPT_U8 NumberOfPhys; 635 HPT_U8 AttachedTo; 636 HPT_U8 Status; 637 HPT_U8 VendorId[8]; 638 HPT_U8 ProductId[16]; 639 HPT_U8 ProductRevisionLevel[4]; 640 HPT_U32 PortPhyMap; 641 HPT_U32 UnitId; /*272x card has two Cores, unitId is used to distinguish them */ 642 HPT_U32 reserved[32]; 643 SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT]; 644} ENCLOSURE_INFO_V3, *PENCLOSURE_INFO_V3; 645 646typedef struct _ENCLOSURE_INFO_V4 { 647 HPT_U8 EnclosureType; 648 HPT_U8 NumberOfPhys; 649 HPT_U8 AttachedTo; 650 HPT_U8 Status; 651 HPT_U8 VendorId[8]; 652 HPT_U8 ProductId[16]; 653 HPT_U8 ProductRevisionLevel[4]; 654 HPT_U32 PortPhyMap; 655 HPT_U32 UnitId; /*272x card has two Cores, unitId is used to distinguish them */ 656 HPT_U32 ElementCount; 657 HPT_U32 reserved[32]; 658} ENCLOSURE_INFO_V4, *PENCLOSURE_INFO_V4; 659 660#define ENCLOSURE_STATUS_OFFLINE 1 661 662#define ENCLOSURE_TYPE_INTERNAL 0 663#define ENCLOSURE_TYPE_SMP 1 664#define ENCLOSURE_TYPE_PM 2 665 666#ifndef __KERNEL__ 667/* 668 * time represented in HPT_U32 format 669 */ 670typedef struct _TIME_RECORD { 671 HPT_U32 seconds:6; /* 0 - 59 */ 672 HPT_U32 minutes:6; /* 0 - 59 */ 673 HPT_U32 month:4; /* 1 - 12 */ 674 HPT_U32 hours:6; /* 0 - 59 */ 675 HPT_U32 day:5; /* 1 - 31 */ 676 HPT_U32 year:5; /* 0=2000, 31=2031 */ 677} TIME_RECORD; 678#endif 679 680/* 681 * Array information. 682 */ 683typedef struct _HPT_ARRAY_INFO { 684 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 685 HPT_U8 Description[64]; /* array description */ 686 HPT_U8 CreateManager[16]; /* who created it */ 687 TIME_RECORD CreateTime; /* when created it */ 688 689 HPT_U8 ArrayType; /* array type */ 690 HPT_U8 BlockSizeShift; /* stripe size */ 691 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 692 HPT_U8 SubArrayType; 693 694 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 695 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1]; /* member array/disks */ 696 697 /* 698 * rebuilding progress, xx.xx% = sprintf(s, "%.2f%%", RebuildingProgress/100.0); 699 * only valid if rebuilding is done by driver code. 700 * Member Flags will have ARRAY_FLAG_REBUILDING set at this case. 701 * Verify operation use same fields below, the only difference is 702 * ARRAY_FLAG_VERIFYING is set. 703 */ 704 HPT_U32 RebuildingProgress; 705 HPT_U32 RebuiltSectors; /* rebuilding point (LBA) for single member */ 706 707} HPT_ARRAY_INFO, *PHPT_ARRAY_INFO; 708 709#if HPT_INTERFACE_VERSION>=0x01010000 710typedef struct _HPT_ARRAY_INFO_V2 { 711 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 712 HPT_U8 Description[64]; /* array description */ 713 HPT_U8 CreateManager[16]; /* who created it */ 714 TIME_RECORD CreateTime; /* when created it */ 715 716 HPT_U8 ArrayType; /* array type */ 717 HPT_U8 BlockSizeShift; /* stripe size */ 718 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 719 HPT_U8 SubArrayType; 720 721 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 722 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */ 723 724 HPT_U32 RebuildingProgress; 725 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 726 727 HPT_U32 reserve4[4]; 728} HPT_ARRAY_INFO_V2, *PHPT_ARRAY_INFO_V2; 729#endif 730 731#if HPT_INTERFACE_VERSION>=0x01020000 732typedef struct _HPT_ARRAY_INFO_V3 { 733 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 734 HPT_U8 Description[64]; /* array description */ 735 HPT_U8 CreateManager[16]; /* who created it */ 736 TIME_RECORD CreateTime; /* when created it */ 737 738 HPT_U8 ArrayType; /* array type */ 739 HPT_U8 BlockSizeShift; /* stripe size */ 740 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 741 HPT_U8 SubArrayType; 742 743 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 744 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */ 745 746 HPT_U32 RebuildingProgress; 747 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 748 749 DEVICEID TransformSource; 750 DEVICEID TransformTarget; /* destination device ID */ 751 HPT_U32 TransformingProgress; 752 HPT_U32 Signature; /* persistent identification*/ 753#if MAX_ARRAY_MEMBERS_V2==16 754 HPT_U16 Critical_Members; /* bit mask of critical members */ 755 HPT_U16 reserve2; 756 HPT_U32 reserve; 757#else 758 HPT_U32 Critical_Members; 759 HPT_U32 reserve; 760#endif 761} HPT_ARRAY_INFO_V3, *PHPT_ARRAY_INFO_V3; 762#endif 763 764#if HPT_INTERFACE_VERSION>=0x02000001 765typedef struct _HPT_ARRAY_INFO_V4 { 766 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 767 HPT_U8 Description[64]; /* array description */ 768 HPT_U8 CreateManager[16]; /* who created it */ 769 TIME_RECORD CreateTime; /* when created it */ 770 771 HPT_U8 ArrayType; /* array type */ 772 HPT_U8 BlockSizeShift; /* stripe size */ 773 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 774 HPT_U8 SubArrayType; 775 776 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 777 778 HPT_U32 RebuildingProgress; 779 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 780 781 DEVICEID TransformSource; 782 DEVICEID TransformTarget; /* destination device ID */ 783 HPT_U32 TransformingProgress; 784 HPT_U32 Signature; /* persistent identification*/ 785 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/ 786 HPT_U8 reserved2[7]; 787 HPT_U64 Critical_Members; 788 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3]; /* member array/disks */ 789} HPT_ARRAY_INFO_V4, *PHPT_ARRAY_INFO_V4; 790#endif 791 792 793/* 794 * ATA/ATAPI Device identify data without the Reserved4. 795 */ 796typedef struct _IDENTIFY_DATA2 { 797 HPT_U16 GeneralConfiguration; 798 HPT_U16 NumberOfCylinders; 799 HPT_U16 Reserved1; 800 HPT_U16 NumberOfHeads; 801 HPT_U16 UnformattedBytesPerTrack; 802 HPT_U16 UnformattedBytesPerSector; 803 HPT_U8 SasAddress[8]; 804 HPT_U16 SerialNumber[10]; 805 HPT_U16 BufferType; 806 HPT_U16 BufferSectorSize; 807 HPT_U16 NumberOfEccBytes; 808 HPT_U16 FirmwareRevision[4]; 809 HPT_U16 ModelNumber[20]; 810 HPT_U8 MaximumBlockTransfer; 811 HPT_U8 VendorUnique2; 812 HPT_U16 DoubleWordIo; 813 HPT_U16 Capabilities; 814 HPT_U16 Reserved2; 815 HPT_U8 VendorUnique3; 816 HPT_U8 PioCycleTimingMode; 817 HPT_U8 VendorUnique4; 818 HPT_U8 DmaCycleTimingMode; 819 HPT_U16 TranslationFieldsValid; 820 HPT_U16 NumberOfCurrentCylinders; 821 HPT_U16 NumberOfCurrentHeads; 822 HPT_U16 CurrentSectorsPerTrack; 823 HPT_U32 CurrentSectorCapacity; 824 HPT_U16 CurrentMultiSectorSetting; 825 HPT_U32 UserAddressableSectors; 826 HPT_U8 SingleWordDMASupport; 827 HPT_U8 SingleWordDMAActive; 828 HPT_U8 MultiWordDMASupport; 829 HPT_U8 MultiWordDMAActive; 830 HPT_U8 AdvancedPIOModes; 831 HPT_U8 Reserved4; 832 HPT_U16 MinimumMWXferCycleTime; 833 HPT_U16 RecommendedMWXferCycleTime; 834 HPT_U16 MinimumPIOCycleTime; 835 HPT_U16 MinimumPIOCycleTimeIORDY; 836 HPT_U16 Reserved5[2]; 837 HPT_U16 ReleaseTimeOverlapped; 838 HPT_U16 ReleaseTimeServiceCommand; 839 HPT_U16 MajorRevision; 840 HPT_U16 MinorRevision; 841} __attribute__((packed)) IDENTIFY_DATA2, *PIDENTIFY_DATA2; 842 843/* 844 * physical device information. 845 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data. 846 */ 847typedef struct _DEVICE_INFO { 848 HPT_U8 ControllerId; /* controller id */ 849 HPT_U8 PathId; /* bus */ 850 HPT_U8 TargetId; /* id */ 851 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */ 852 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 853 HPT_U8 DeviceType; /* device type */ 854 HPT_U8 UsableMode; /* highest usable mode */ 855 856#ifdef __BIG_ENDIAN_BITFIELD 857 HPT_U8 NCQEnabled: 1; 858 HPT_U8 NCQSupported: 1; 859 HPT_U8 TCQEnabled: 1; 860 HPT_U8 TCQSupported: 1; 861 HPT_U8 WriteCacheEnabled: 1; 862 HPT_U8 WriteCacheSupported: 1; 863 HPT_U8 ReadAheadEnabled: 1; 864 HPT_U8 ReadAheadSupported: 1; 865 HPT_U8 reserved6: 6; 866 HPT_U8 SpinUpMode: 2; 867#else 868 HPT_U8 ReadAheadSupported: 1; 869 HPT_U8 ReadAheadEnabled: 1; 870 HPT_U8 WriteCacheSupported: 1; 871 HPT_U8 WriteCacheEnabled: 1; 872 HPT_U8 TCQSupported: 1; 873 HPT_U8 TCQEnabled: 1; 874 HPT_U8 NCQSupported: 1; 875 HPT_U8 NCQEnabled: 1; 876 HPT_U8 SpinUpMode: 2; 877 HPT_U8 reserved6: 6; 878#endif 879 880 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */ 881 882 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */ 883 884} 885__attribute__((packed)) DEVICE_INFO, *PDEVICE_INFO; 886 887#if HPT_INTERFACE_VERSION>=0x01020000 888#define MAX_PARENTS_PER_DISK 8 889/* 890 * physical device information. 891 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data. 892 */ 893typedef struct _DEVICE_INFO_V2 { 894 HPT_U8 ControllerId; /* controller id */ 895 HPT_U8 PathId; /* bus */ 896 HPT_U8 TargetId; /* id */ 897 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */ 898 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 899 HPT_U8 DeviceType; /* device type */ 900 HPT_U8 UsableMode; /* highest usable mode */ 901 902#ifdef __BIG_ENDIAN_BITFIELD 903 HPT_U8 NCQEnabled: 1; 904 HPT_U8 NCQSupported: 1; 905 HPT_U8 TCQEnabled: 1; 906 HPT_U8 TCQSupported: 1; 907 HPT_U8 WriteCacheEnabled: 1; 908 HPT_U8 WriteCacheSupported: 1; 909 HPT_U8 ReadAheadEnabled: 1; 910 HPT_U8 ReadAheadSupported: 1; 911 HPT_U8 reserved6: 6; 912 HPT_U8 SpinUpMode: 2; 913#else 914 HPT_U8 ReadAheadSupported: 1; 915 HPT_U8 ReadAheadEnabled: 1; 916 HPT_U8 WriteCacheSupported: 1; 917 HPT_U8 WriteCacheEnabled: 1; 918 HPT_U8 TCQSupported: 1; 919 HPT_U8 TCQEnabled: 1; 920 HPT_U8 NCQSupported: 1; 921 HPT_U8 NCQEnabled: 1; 922 HPT_U8 SpinUpMode: 2; 923 HPT_U8 reserved6: 6; 924#endif 925 926 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */ 927 928 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */ 929 930 HPT_U64 TotalFree; 931 HPT_U64 MaxFree; 932 HPT_U64 BadSectors; 933 DEVICEID ParentArrays[MAX_PARENTS_PER_DISK]; 934 935} 936__attribute__((packed)) DEVICE_INFO_V2, *PDEVICE_INFO_V2, DEVICE_INFO_V3, *PDEVICE_INFO_V3; 937 938/* 939 * HPT601 information 940 */ 941#endif 942/* 943 * HPT601 information 944 */ 945#define HPT601_INFO_DEVICEID 1 946#define HPT601_INFO_TEMPERATURE 2 947#define HPT601_INFO_FANSTATUS 4 948#define HPT601_INFO_BEEPERCONTROL 8 949#define HPT601_INFO_LED1CONTROL 0x10 950#define HPT601_INFO_LED2CONTROL 0x20 951#define HPT601_INFO_POWERSTATUS 0x40 952 953typedef struct _HPT601_INFO_ { 954 HPT_U16 ValidFields; /* mark valid fields below */ 955 HPT_U16 DeviceId; /* 0x5A3E */ 956 HPT_U16 Temperature; /* Read: temperature sensor value. Write: temperature limit */ 957 HPT_U16 FanStatus; /* Fan status */ 958 HPT_U16 BeeperControl; /* bit4: beeper control bit. bit0-3: frequency bits */ 959 HPT_U16 LED1Control; /* bit4: twinkling control bit. bit0-3: frequency bits */ 960 HPT_U16 LED2Control; /* bit4: twinkling control bit. bit0-3: frequency bits */ 961 HPT_U16 PowerStatus; /* 1: has power 2: no power */ 962} HPT601_INFO, *PHPT601_INFO; 963 964#if HPT_INTERFACE_VERSION>=0x01010000 965#ifndef __KERNEL__ 966/* cache policy for each vdev, copied from ldm.h */ 967#define CACHE_POLICY_NONE 0 968#define CACHE_POLICY_WRITE_THROUGH 1 969#define CACHE_POLICY_WRITE_BACK 2 970 971#endif 972#endif 973/* 974 * Logical device information. 975 * Union of ArrayInfo and DeviceInfo. 976 * Common properties will be put in logical device information. 977 */ 978typedef struct _LOGICAL_DEVICE_INFO { 979 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 980 HPT_U8 reserved[3]; 981 982 HPT_U32 Capacity; /* array capacity */ 983 DEVICEID ParentArray; 984 985 union { 986 HPT_ARRAY_INFO array; 987 DEVICE_INFO device; 988 } __attribute__((packed)) u; 989 990} __attribute__((packed)) LOGICAL_DEVICE_INFO, *PLOGICAL_DEVICE_INFO; 991 992#if HPT_INTERFACE_VERSION>=0x01010000 993typedef struct _LOGICAL_DEVICE_INFO_V2 { 994 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 995 HPT_U8 reserved[3]; 996 997 HPT_U64 Capacity; /* array capacity */ 998 DEVICEID ParentArray; /* for physical device, Please don't use this field. 999 * use ParentArrays field in DEVICE_INFO_V2 1000 */ 1001 1002 union { 1003 HPT_ARRAY_INFO_V2 array; 1004 DEVICE_INFO device; 1005 } __attribute__((packed)) u; 1006 1007} __attribute__((packed)) LOGICAL_DEVICE_INFO_V2, *PLOGICAL_DEVICE_INFO_V2; 1008#endif 1009 1010#if HPT_INTERFACE_VERSION>=0x01020000 1011#define INVALID_TARGET_ID 0xFF 1012#define INVALID_BUS_ID 0xFF 1013typedef struct _LOGICAL_DEVICE_INFO_V3 { 1014 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 1015 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */ 1016 HPT_U8 VBusId; /* vbus sequence in vbus_list */ 1017 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */ 1018 /* OS disk name: HPT DISK $VBusId_$TargetId */ 1019 HPT_U64 Capacity; /* array capacity */ 1020 DEVICEID ParentArray; /* for physical device, don't use this field. 1021 * use ParentArrays field in DEVICE_INFO_V2 instead. 1022 */ 1023 HPT_U32 TotalIOs; 1024 HPT_U32 TobalMBs; 1025 HPT_U32 IOPerSec; 1026 HPT_U32 MBPerSec; 1027 1028 union { 1029 HPT_ARRAY_INFO_V3 array; 1030 DEVICE_INFO_V2 device; 1031 } __attribute__((packed)) u; 1032 1033} 1034__attribute__((packed)) LOGICAL_DEVICE_INFO_V3, *PLOGICAL_DEVICE_INFO_V3; 1035#endif 1036 1037#if HPT_INTERFACE_VERSION>=0x02000001 1038typedef struct _LOGICAL_DEVICE_INFO_V4 { 1039 HPT_U32 dwSize; 1040 HPT_U8 revision; 1041 HPT_U8 reserved[7]; 1042 1043 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 1044 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */ 1045 HPT_U8 VBusId; /* vbus sequence in vbus_list */ 1046 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */ 1047 /* OS disk name: HPT DISK $VBusId_$TargetId */ 1048 HPT_U64 Capacity; /* array capacity */ 1049 DEVICEID ParentArray; /* for physical device, don't use this field. 1050 * use ParentArrays field in DEVICE_INFO_V2 instead. 1051 */ 1052 HPT_U32 TotalIOs; 1053 HPT_U32 TobalMBs; 1054 HPT_U32 IOPerSec; 1055 HPT_U32 MBPerSec; 1056 1057 union { 1058 HPT_ARRAY_INFO_V4 array; 1059 DEVICE_INFO_V3 device; 1060 } __attribute__((packed)) u; 1061} 1062__attribute__((packed)) LOGICAL_DEVICE_INFO_V4, *PLOGICAL_DEVICE_INFO_V4; 1063 1064/*LOGICAL_DEVICE_INFO_V4 max revision number*/ 1065#define LOGICAL_DEVICE_INFO_V4_REVISION 0 1066/*If new revision was defined please check evey revision size*/ 1067#define LOGICAL_DEVICE_INFO_V4_R0_SIZE (sizeof(LOGICAL_DEVICE_INFO_V4)) 1068#endif 1069 1070/* 1071 * ALTERABLE_ARRAY_INFO and ALTERABLE_DEVICE_INFO, used in set_array_info() 1072 * and set_device_info(). 1073 * When set_xxx_info() is called, the ValidFields member indicates which 1074 * fields in the structure are valid. 1075 */ 1076/* field masks */ 1077#define AAIF_NAME 1 1078#define AAIF_DESCRIPTION 2 1079 1080#define ADIF_MODE 1 1081#define ADIF_TCQ 2 1082#define ADIF_NCQ 4 1083#define ADIF_WRITE_CACHE 8 1084#define ADIF_READ_AHEAD 0x10 1085#define ADIF_SPIN_UP_MODE 0x20 1086#define ADIF_SET_BAD 0x40 1087 1088typedef struct _ALTERABLE_ARRAY_INFO { 1089 HPT_U32 ValidFields; /* mark valid fields below */ 1090 HPT_U8 Name[MAX_ARRAYNAME_LEN]; /* array name */ 1091 HPT_U8 Description[64]; /* array description */ 1092}__attribute__((packed))ALTERABLE_ARRAY_INFO, *PALTERABLE_ARRAY_INFO; 1093 1094typedef struct _ALTERABLE_DEVICE_INFO { 1095 HPT_U32 ValidFields; /* mark valid fields below */ 1096 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 1097}__attribute__((packed))ALTERABLE_DEVICE_INFO, *PALTERABLE_DEVICE_INFO; 1098 1099typedef struct _ALTERABLE_DEVICE_INFO_V2 { 1100 HPT_U32 ValidFields; /* mark valid fields below */ 1101 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 1102 HPT_U8 TCQEnabled; 1103 HPT_U8 NCQEnabled; 1104 HPT_U8 WriteCacheEnabled; 1105 HPT_U8 ReadAheadEnabled; 1106 HPT_U8 SpinUpMode; 1107 HPT_U8 SetBadSector; 1108 HPT_U8 reserve[1]; 1109 HPT_U32 reserve2[13]; /* pad to 64 bytes */ 1110}__attribute__((packed))ALTERABLE_DEVICE_INFO_V2, *PALTERABLE_DEVICE_INFO_V2; 1111 1112#if HPT_INTERFACE_VERSION>=0x01020000 1113 1114#define TARGET_TYPE_DEVICE 0 1115#define TARGET_TYPE_ARRAY 1 1116 1117 1118#define AIT_NAME 0 1119#define AIT_DESCRIPTION 1 1120#define AIT_CACHE_POLICY 2 1121 1122 1123#define DIT_MODE 0 1124#define DIT_READ_AHEAD 1 1125#define DIT_WRITE_CACHE 2 1126#define DIT_TCQ 3 1127#define DIT_NCQ 4 1128#define DIT_IDENTIFY 5 1129 1130#define DISK_CACHE_POLICY_UNCHANGE 0 1131#define DISK_CACHE_POLICY_ENABLE 1 1132#define DISK_CACHE_POLICY_DISABLE 2 1133 1134/* param type is determined by target_type and info_type*/ 1135typedef struct _SET_DEV_INFO 1136{ 1137 HPT_U8 target_type; 1138 HPT_U8 infor_type; 1139 HPT_U16 param_length; 1140 #define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO)) 1141 /* HPT_U8 param[0]; */ 1142} SET_VDEV_INFO, * PSET_VDEV_INFO; 1143 1144typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ; 1145typedef HPT_U8 PARAM_ARRAY_DES[64]; 1146typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY; 1147 1148#endif 1149 1150/* 1151 * CREATE_ARRAY_PARAMS 1152 * Param structure used to create an array. 1153 */ 1154typedef struct _CREATE_ARRAY_PARAMS { 1155 HPT_U8 ArrayType; /* 1-level array type */ 1156 HPT_U8 nDisk; /* number of elements in Members[] array */ 1157 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 1158 HPT_U8 CreateFlags; /* See CAF_xxx */ 1159 1160 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 1161 HPT_U8 Description[64]; /* array description */ 1162 HPT_U8 CreateManager[16]; /* who created it */ 1163 TIME_RECORD CreateTime; /* when created it */ 1164 1165 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1];/* ID of array members, a member can be an array */ 1166 1167} CREATE_ARRAY_PARAMS, *PCREATE_ARRAY_PARAMS; 1168 1169#if HPT_INTERFACE_VERSION>=0x01010000 1170typedef struct _CREATE_ARRAY_PARAMS_V2 { 1171 HPT_U8 ArrayType; /* 1-level array type */ 1172 HPT_U8 nDisk; /* number of elements in Members[] array */ 1173 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 1174 HPT_U8 CreateFlags; /* See CAF_xxx */ 1175 1176 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 1177 HPT_U8 Description[64]; /* array description */ 1178 HPT_U8 CreateManager[16]; /* who created it */ 1179 TIME_RECORD CreateTime; /* when created it */ 1180 HPT_U64 Capacity; 1181 1182 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2];/* ID of array members, a member can be an array */ 1183 1184} CREATE_ARRAY_PARAMS_V2, *PCREATE_ARRAY_PARAMS_V2; 1185#endif 1186 1187#if HPT_INTERFACE_VERSION>=0x02000001 1188typedef struct _CREATE_ARRAY_PARAMS_V3 { 1189 HPT_U32 dwSize; 1190 HPT_U8 revision; /*CREATE_ARRAY_PARAMS_V3_REVISION*/ 1191 HPT_U8 diskCachePolicy; /*unchange:0 enable:1 disable:2*/ 1192 HPT_U8 reserved[4]; 1193 HPT_U8 subDisks; /* RAIDn0 sub array */ 1194 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/ 1195 HPT_U8 ArrayType; /* 1-level array type */ 1196 HPT_U8 nDisk; /* number of elements in Members[] array */ 1197 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 1198 HPT_U8 CreateFlags; /* See CAF_xxx */ 1199 1200 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 1201 HPT_U8 Description[64]; /* array description */ 1202 HPT_U8 CreateManager[16]; /* who created it */ 1203 TIME_RECORD CreateTime; /* when created it */ 1204 HPT_U64 Capacity; 1205 1206 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3];/* ID of array members, a member can be an array */ 1207} CREATE_ARRAY_PARAMS_V3, *PCREATE_ARRAY_PARAMS_V3; 1208 1209/*CREATE_ARRAY_PARAMS_V3 current max revision*/ 1210#define CREATE_ARRAY_PARAMS_V3_REVISION 0 1211/*If new revision defined please check evey revision size*/ 1212#define CREATE_ARRAY_PARAMS_V3_R0_SIZE (sizeof(CREATE_ARRAY_PARAMS_V3)) 1213#endif 1214 1215#if HPT_INTERFACE_VERSION < 0x01020000 1216/* 1217 * Flags used for creating an RAID 1 array 1218 * 1219 * CAF_CREATE_AND_DUPLICATE 1220 * Copy source disk contents to target for RAID 1. If user choose "create and duplicate" 1221 * to create an array, GUI will call CreateArray() with this flag set. Then GUI should 1222 * call hpt_get_device_info() with the returned array ID and check returned flags to 1223 * see if ARRAY_FLAG_REBUILDING is set. If not set, driver does not support rebuilding 1224 * and GUI must do duplication itself. 1225 * CAF_DUPLICATE_MUST_DONE 1226 * If the duplication is aborted or fails, do not create the array. 1227 */ 1228#define CAF_CREATE_AND_DUPLICATE 1 1229#define CAF_DUPLICATE_MUST_DONE 2 1230#define CAF_CREATE_AS_RAID15 4 1231/* 1232 * Flags used for creating an RAID 5 array 1233 */ 1234#define CAF_CREATE_R5_NO_BUILD 1 1235#define CAF_CREATE_R5_ZERO_INIT 2 1236#define CAF_CREATE_R5_BUILD_PARITY 4 1237 1238#else 1239/* 1240 * Flags used for creating 1241 */ 1242#define CAF_FOREGROUND_INITIALIZE 1 1243#define CAF_BACKGROUND_INITIALIZE 2 1244#define CAF_CREATE_R5_WRITE_BACK (CACHE_POLICY_WRITE_BACK<<CAF_CACHE_POLICY_SHIFT) 1245 1246 1247#define CAF_CACHE_POLICY_MASK 0x1C 1248#define CAF_CACHE_POLICY_SHIFT 2 1249 1250#endif 1251 1252#define CAF_KEEP_DATA_ALWAYS 0x80 1253 1254/* Flags used for deleting an array 1255 * 1256 * DAF_KEEP_DATA_IF_POSSIBLE 1257 * If this flag is set, deleting a RAID 1 array will not destroy the data on both disks. 1258 * Deleting a JBOD should keep partitions on first disk ( not implement now ). 1259 * Deleting a RAID 0/1 should result as two RAID 0 array ( not implement now ). 1260 */ 1261#define DAF_KEEP_DATA_IF_POSSIBLE 1 1262#define DAF_KEEP_DATA_ALWAYS 2 1263 1264/* 1265 * event types 1266 */ 1267#define ET_DEVICE_REMOVED 1 /* device removed */ 1268#define ET_DEVICE_PLUGGED 2 /* device plugged */ 1269#define ET_DEVICE_ERROR 3 /* device I/O error */ 1270#define ET_REBUILD_STARTED 4 1271#define ET_REBUILD_ABORTED 5 1272#define ET_REBUILD_FINISHED 6 1273#define ET_SPARE_TOOK_OVER 7 1274#define ET_REBUILD_FAILED 8 1275#define ET_VERIFY_STARTED 9 1276#define ET_VERIFY_ABORTED 10 1277#define ET_VERIFY_FAILED 11 1278#define ET_VERIFY_FINISHED 12 1279#define ET_INITIALIZE_STARTED 13 1280#define ET_INITIALIZE_ABORTED 14 1281#define ET_INITIALIZE_FAILED 15 1282#define ET_INITIALIZE_FINISHED 16 1283#define ET_VERIFY_DATA_ERROR 17 1284#define ET_TRANSFORM_STARTED 18 1285#define ET_TRANSFORM_ABORTED 19 1286#define ET_TRANSFORM_FAILED 20 1287#define ET_TRANSFORM_FINISHED 21 1288#define ET_SMART_FAILED 22 1289#define ET_SMART_PASSED 23 1290#define ET_SECTOR_REPAIR_FAIL 24 1291#define ET_SECTOR_REPAIR_SUCCESS 25 1292#define ET_ERASE_FAIL 26 1293#define ET_ERASE_SUCCESS 27 1294#define ET_CONTINUE_REBUILD_ON_ERROR 28 1295 1296 1297/* 1298 * event structure 1299 */ 1300typedef struct _HPT_EVENT { 1301 TIME_RECORD Time; 1302 DEVICEID DeviceID; 1303 HPT_U8 EventType; 1304 HPT_U8 reserved[3]; 1305 1306 HPT_U8 Data[32]; /* various data depend on EventType */ 1307} HPT_EVENT, *PHPT_EVENT; 1308 1309/* 1310 * IDE pass-through command. Use it at your own risk! 1311 */ 1312typedef struct _IDE_PASS_THROUGH_HEADER { 1313 DEVICEID idDisk; /* disk ID */ 1314 HPT_U8 bFeaturesReg; /* feature register */ 1315 HPT_U8 bSectorCountReg; /* IDE sector count register. */ 1316 HPT_U8 bLbaLowReg; /* IDE LBA low value. */ 1317 HPT_U8 bLbaMidReg; /* IDE LBA mid register. */ 1318 HPT_U8 bLbaHighReg; /* IDE LBA high value. */ 1319 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */ 1320 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */ 1321 HPT_U8 nSectors; /* data size in sectors, if the command has data transfer */ 1322 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */ 1323 HPT_U8 reserve[3]; 1324 #define IDE_PASS_THROUGH_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER)) 1325 /* HPT_U8 DataBuffer[0]; */ 1326} 1327IDE_PASS_THROUGH_HEADER, *PIDE_PASS_THROUGH_HEADER; 1328 1329typedef struct _IDE_PASS_THROUGH_HEADER_V2 { 1330 DEVICEID idDisk; /* disk ID */ 1331 HPT_U16 bFeaturesReg; /* feature register */ 1332 HPT_U16 bSectorCountReg; /* IDE sector count register. */ 1333 HPT_U16 bLbaLowReg; /* IDE LBA low value. */ 1334 HPT_U16 bLbaMidReg; /* IDE LBA mid register. */ 1335 HPT_U16 bLbaHighReg; /* IDE LBA high value. */ 1336 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */ 1337 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */ 1338 HPT_U16 nSectors; /* data size in sectors, if the command has data transfer */ 1339 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */ 1340 HPT_U8 reserve; 1341 #define IDE_PASS_THROUGH_V2_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER_V2)) 1342 /* HPT_U8 DataBuffer[0]; */ 1343} 1344IDE_PASS_THROUGH_HEADER_V2, *PIDE_PASS_THROUGH_HEADER_V2; 1345 1346typedef struct _HPT_SCSI_PASSTHROUGH_IN { 1347 DEVICEID idDisk; 1348 HPT_U8 protocol; 1349 HPT_U8 reserve1; 1350 HPT_U8 reserve2; 1351 HPT_U8 cdbLength; 1352 HPT_U8 cdb[16]; 1353 HPT_U32 dataLength; 1354 /* data follows, if any */ 1355} 1356HPT_SCSI_PASSTHROUGH_IN, *PHPT_SCSI_PASSTHROUGH_IN; 1357 1358typedef struct _HPT_SCSI_PASSTHROUGH_OUT { 1359 HPT_U8 scsiStatus; 1360 HPT_U8 reserve1; 1361 HPT_U8 reserve2; 1362 HPT_U8 reserve3; 1363 HPT_U32 dataLength; 1364 /* data/sense follows if any */ 1365} 1366HPT_SCSI_PASSTHROUGH_OUT, *PHPT_SCSI_PASSTHROUGH_OUT; 1367 1368/* 1369 * device io packet format 1370 */ 1371typedef struct _DEVICE_IO_EX_PARAMS { 1372 DEVICEID idDisk; 1373 HPT_U32 Lba; 1374 HPT_U16 nSectors; 1375 HPT_U8 Command; /* IO_COMMAD_xxx */ 1376 HPT_U8 BufferType; /* BUFFER_TYPE_xxx, see below */ 1377 HPT_U32 BufferPtr; 1378} 1379DEVICE_IO_EX_PARAMS, *PDEVICE_IO_EX_PARAMS; 1380 1381#define BUFFER_TYPE_LOGICAL 1 /* logical pointer to buffer */ 1382#define BUFFER_TYPE_PHYSICAL 2 /* physical address of buffer */ 1383#define BUFFER_TYPE_LOGICAL_LOGICAL_SG 3 /* logical pointer to logical S/G table */ 1384#define BUFFER_TYPE_LOGICAL_PHYSICAL_SG 4 /* logical pointer to physical S/G table */ 1385#define BUFFER_TYPE_PHYSICAL_LOGICAL_SG 5 /* physical address to logical S/G table */ 1386#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG 6 /* physical address of physical S/G table */ 1387#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG_PIO 7 /* non DMA capable physical address of physical S/G table */ 1388 1389typedef struct _HPT_DRIVER_PARAMETER { 1390 char name[32]; 1391 HPT_U8 value[32]; 1392 HPT_U8 type; /* HPT_DRIVER_PARAMETER_TYPE_* */ 1393 HPT_U8 persistent; 1394 HPT_U8 reserve2[2]; 1395 HPT_U8 location; /* 0 - system */ 1396 HPT_U8 controller; 1397 HPT_U8 bus; 1398 HPT_U8 reserve1; 1399 char desc[128]; 1400} 1401HPT_DRIVER_PARAMETER, *PHPT_DRIVER_PARAMETER; 1402 1403#define HPT_DRIVER_PARAMETER_TYPE_INT 1 1404#define HPT_DRIVER_PARAMETER_TYPE_BOOL 2 1405 1406typedef struct _HPT_PM_CMDSTAT { 1407 HPT_U64 timeStamp; 1408 HPT_U64 lba; 1409 HPT_U16 sectors; 1410 HPT_U16 reserved; 1411 HPT_U32 rspTime; 1412} 1413HPT_PM_CMDSTAT, *PHPT_PM_CMDSTAT; 1414 1415#define HIGHEST_RSPTIME_CMD_SAVE 10 1416#define RSPTIME_HISTOGRAM_SEGMENT_COUNT 38 1417 1418typedef struct _HPT_PM_IOSTAT { 1419 HPT_PM_CMDSTAT highestRspCmdStatData[HIGHEST_RSPTIME_CMD_SAVE]; 1420 HPT_U32 rspTimeHistogram[RSPTIME_HISTOGRAM_SEGMENT_COUNT]; 1421 HPT_U16 pendingIo; 1422 HPT_U16 activeIo; 1423 HPT_U32 instantKBPs; 1424 HPT_U32 averageKBPs; 1425 HPT_U32 instantIOPs; 1426 HPT_U32 averageIOPs; 1427} 1428HPT_PM_IOSTAT, *PHPT_PM_IOSTAT; 1429 1430/* 1431 * disk config region 1432 */ 1433typedef struct _ACCESS_CONFIG_REG { 1434 DEVICEID id; 1435 HPT_U16 start; 1436 HPT_U8 sectors; 1437 HPT_U8 read; 1438 HPT_U32 Reserved; 1439 #define ACCESS_CONFIG_REG_buffer(p) ((HPT_U8 *)(p) + sizeof(ACCESS_CONFIG_REG_PARAMS)) 1440} __attribute__((packed))ACCESS_CONFIG_REG_PARAMS, *PACCESS_CONFIG_REG_PARAMS; 1441 1442/* 1443 * dump meta data 1444 */ 1445typedef struct _DUMP_METADATA { 1446 DEVICEID id; 1447 HPT_U8 sectors; 1448 HPT_U8 backsectors; 1449 HPT_U8 offset; 1450 HPT_U8 backoffset; 1451} __attribute__((packed))DUMP_METADATA_PARAMS, *PDUMP_METADATA_PARAMS; 1452 1453 1454 1455/* 1456 * ioctl structure 1457 */ 1458#define HPT_IOCTL_MAGIC32 0x1A2B3C4D 1459#define HPT_IOCTL_MAGIC 0xA1B2C3D4 1460 1461typedef struct _HPT_IOCTL_PARAM { 1462 HPT_U32 Magic; /* used to check if it's a valid ioctl packet */ 1463 HPT_U32 dwIoControlCode; /* operation control code */ 1464 HPT_PTR lpInBuffer; /* input data buffer */ 1465 HPT_U32 nInBufferSize; /* size of input data buffer */ 1466 HPT_PTR lpOutBuffer; /* output data buffer */ 1467 HPT_U32 nOutBufferSize; /* size of output data buffer */ 1468 HPT_PTR lpBytesReturned; /* count of HPT_U8s returned */ 1469} 1470HPT_IOCTL_PARAM, *PHPT_IOCTL_PARAM; 1471 1472/* for 32-bit app running on 64-bit system */ 1473typedef struct _HPT_IOCTL_PARAM32 { 1474 HPT_U32 Magic; 1475 HPT_U32 dwIoControlCode; 1476 HPT_U32 lpInBuffer; 1477 HPT_U32 nInBufferSize; 1478 HPT_U32 lpOutBuffer; 1479 HPT_U32 nOutBufferSize; 1480 HPT_U32 lpBytesReturned; 1481} 1482HPT_IOCTL_PARAM32, *PHPT_IOCTL_PARAM32; 1483 1484#if !defined(__KERNEL__) || defined(SIMULATE) 1485/* 1486 * User-mode ioctl parameter passing conventions: 1487 * The ioctl function implementation is platform specific, so we don't 1488 * have forced rules for it. However, it's suggested to use a parameter 1489 * passing method as below 1490 * 1) Put all input data continuously in an input buffer. 1491 * 2) Prepare an output buffer with enough size if needed. 1492 * 3) Fill a HPT_IOCTL_PARAM structure. 1493 * 4) Pass the structure to driver through a platform-specific method. 1494 * This is implemented in the mid-layer user-mode library. The UI 1495 * programmer needn't care about it. 1496 */ 1497 1498/************************************************************************ 1499 * User mode functions 1500 ************************************************************************/ 1501/* 1502 * hpt_get_version 1503 * Version compatibility: all versions 1504 * Parameters: 1505 * None 1506 * Returns: 1507 * interface version. 0 when fail. 1508 */ 1509HPT_U32 hpt_get_version(void); 1510 1511/* 1512 * hpt_get_driver_capabilities 1513 * Version compatibility: v1.0.0.2 or later 1514 * Parameters: 1515 * Pointer to receive a DRIVE_CAPABILITIES structure. The caller must set 1516 * dwSize member to sizeof(DRIVER_CAPABILITIES). The callee must check this 1517 * member to see if it's correct. 1518 * Returns: 1519 * 0 - Success 1520 */ 1521int hpt_get_driver_capabilities(PDRIVER_CAPABILITIES cap); 1522int hpt_get_driver_capabilities_v2(PDRIVER_CAPABILITIES_V2 cap); 1523 1524/* 1525 * hpt_get_controller_count 1526 * Version compatibility: v1.0.0.1 or later 1527 * Parameters: 1528 * None 1529 * Returns: 1530 * number of controllers 1531 */ 1532int hpt_get_controller_count(void); 1533 1534/* hpt_get_controller_info 1535 * Version compatibility: v1.0.0.1 or later 1536 * Parameters: 1537 * id Controller id 1538 * pInfo pointer to CONTROLLER_INFO buffer 1539 * Returns: 1540 * 0 Success, controller info is put into (*pInfo ). 1541 */ 1542int hpt_get_controller_info(int id, PCONTROLLER_INFO pInfo); 1543 1544#if HPT_INTERFACE_VERSION>=0x01020000 1545/* hpt_get_controller_info_v2 1546 * Version compatibility: v2.0.0.0 or later 1547 * Parameters: 1548 * id Controller id 1549 * pInfo pointer to CONTROLLER_INFO_V2 buffer 1550 * Returns: 1551 * 0 Success, controller info is put into (*pInfo ). 1552 */ 1553int hpt_get_controller_info_v2(int id, PCONTROLLER_INFO_V2 pInfo); 1554 1555/* hpt_get_controller_info_v2_ext 1556 * Version compatibility: v2.0.0.0 or later 1557 * Parameters: 1558 * id Controller id 1559 * pInfo pointer to CONTROLLER_INFO_V2_EXT buffer 1560 * Returns: 1561 * 0 Success, controller info is put into (*pInfo ). 1562 */ 1563int hpt_get_controller_info_v2_ext(int id, PCONTROLLER_INFO_V2_EXT pInfo); 1564 1565/* hpt_get_controller_info_v3 1566 * Version compatibility: v2.0.0.0 or later 1567 * Parameters: 1568 * id Controller id 1569 * pInfo pointer to CONTROLLER_INFO_V3 buffer 1570 * Returns: 1571 * 0 Success, controller info is put into (*pInfo ). 1572 */ 1573int hpt_get_controller_info_v3(int id, PCONTROLLER_INFO_V3 pInfo); 1574#endif 1575 1576/* hpt_get_channel_info 1577 * Version compatibility: v1.0.0.1 or later 1578 * Parameters: 1579 * id Controller id 1580 * bus bus number 1581 * pInfo pointer to CHANNEL_INFO buffer 1582 * Returns: 1583 * 0 Success, channel info is put into (*pInfo ). 1584 */ 1585int hpt_get_channel_info(int id, int bus, PCHANNEL_INFO pInfo); 1586 1587/* hpt_get_channel_info_v2 1588 * Version compatibility: v1.0.0.1 or later 1589 * Parameters: 1590 * id Controller id 1591 * bus bus number 1592 * pInfo pointer to CHANNEL_INFO buffer 1593 * Returns: 1594 * 0 Success, channel info is put into (*pInfo ). 1595 */ 1596int hpt_get_channel_info_v2(int id, int bus, PCHANNEL_INFO_V2 pInfo); 1597 1598/* hpt_get_logical_devices 1599 * Version compatibility: v1.0.0.1 or later 1600 * Parameters: 1601 * pIds pointer to a DEVICEID array 1602 * nMaxCount array size 1603 * Returns: 1604 * Number of ID returned. All logical device IDs are put into pIds array. 1605 * Note: A spare disk is not a logical device. 1606 */ 1607int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount); 1608 1609/* hpt_get_physical_devices 1610 * Version compatibility: v2.1.0.0 or later 1611 * Parameters: 1612 * pIds pointer to a DEVICEID array 1613 * nMaxCount array size 1614 * Returns: 1615 * Number of ID returned. All physical device IDs are put into pIds array. 1616 */ 1617int hpt_get_physical_devices(DEVICEID * pIds, int nMaxCount); 1618 1619/* hpt_get_device_info 1620 * Version compatibility: v1.0.0.1 or later 1621 * Parameters: 1622 * id logical device id 1623 * pInfo pointer to LOGICAL_DEVICE_INFO structure 1624 * Returns: 1625 * 0 - Success 1626 */ 1627int hpt_get_device_info(DEVICEID id, PLOGICAL_DEVICE_INFO pInfo); 1628 1629/* hpt_create_array 1630 * Version compatibility: v1.0.0.1 or later 1631 * Parameters: 1632 * pParam pointer to CREATE_ARRAY_PARAMS structure 1633 * Returns: 1634 * 0 failed 1635 * else return array id 1636 */ 1637DEVICEID hpt_create_array(PCREATE_ARRAY_PARAMS pParam); 1638 1639/* hpt_delete_array 1640 * Version compatibility: v1.0.0.1 or later 1641 * Parameters: 1642 * id array id 1643 * Returns: 1644 * 0 Success 1645 */ 1646int hpt_delete_array(DEVICEID id, HPT_U32 options); 1647 1648/* hpt_device_io 1649 * Read/write data on array and physcal device. 1650 * Version compatibility: v1.0.0.1 or later 1651 * Parameters: 1652 * id device id. If it's an array ID, IO will be performed on the array. 1653 * If it's a physical device ID, IO will be performed on the device. 1654 * cmd IO_COMMAND_READ or IO_COMMAND_WRITE 1655 * buffer data buffer 1656 * length data size 1657 * Returns: 1658 * 0 Success 1659 */ 1660int hpt_device_io(DEVICEID id, int cmd, HPT_U32 lba, HPT_U32 nSector, void * buffer); 1661 1662/* hpt_add_disk_to_array 1663 * Used to dynamicly add a disk to an RAID1, RAID0/1, RAID1/0 or RAID5 array. 1664 * Auto-rebuild will start. 1665 * Version compatibility: v1.0.0.1 or later 1666 * Parameters: 1667 * idArray array id 1668 * idDisk disk id 1669 * Returns: 1670 * 0 Success 1671 */ 1672int hpt_add_disk_to_array(DEVICEID idArray, DEVICEID idDisk); 1673 1674/* hpt_add_spare_disk 1675 * Version compatibility: v1.0.0.1 or later 1676 * Add a disk to spare pool. 1677 * Parameters: 1678 * idDisk disk id 1679 * Returns: 1680 * 0 Success 1681 */ 1682int hpt_add_spare_disk(DEVICEID idDisk); 1683 1684/* hpt_add_dedicated_spare 1685 * Version compatibility: v1.0.0.3 or later 1686 * Add a spare disk to an array 1687 * Parameters: 1688 * idDisk disk id 1689 * idArray array id 1690 * Returns: 1691 * 0 Success 1692 */ 1693int hpt_add_dedicated_spare(DEVICEID idDisk, DEVICEID idArray); 1694 1695/* hpt_remove_spare_disk 1696 * remove a disk from spare pool. 1697 * Version compatibility: v1.0.0.1 or later 1698 * Parameters: 1699 * idDisk disk id 1700 * Returns: 1701 * 0 Success 1702 */ 1703int hpt_remove_spare_disk(DEVICEID idDisk); 1704 1705/* hpt_get_event 1706 * Used to poll events from driver. 1707 * Version compatibility: v1.0.0.1 or later 1708 * Parameters: 1709 * pEvent pointer to HPT_EVENT structure 1710 * Returns: 1711 * 0 Success, event info is filled in *pEvent 1712 */ 1713int hpt_get_event(PHPT_EVENT pEvent); 1714 1715/* hpt_rebuild_data_block 1716 * Used to copy data from source disk and mirror disk. 1717 * Version compatibility: v1.0.0.1 or later 1718 * Parameters: 1719 * idArray Array ID (RAID1, 0/1 or RAID5) 1720 * Lba Start LBA for each array member 1721 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter) 1722 * 1723 * Returns: 1724 * 0 Success, event info is filled in *pEvent 1725 */ 1726int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector); 1727#define hpt_rebuild_mirror(p1, p2, p3) hpt_rebuild_data_block(p1, p2, p3) 1728 1729/* hpt_set_array_state 1730 * set array state. 1731 * Version compatibility: v1.0.0.1 or later 1732 * Parameters: 1733 * idArray Array ID 1734 * state See above 'array states' constants, possible values are: 1735 * MIRROR_REBUILD_START 1736 * Indicate that GUI wants to rebuild a mirror array 1737 * MIRROR_REBUILD_ABORT 1738 * GUI wants to abort rebuilding an array 1739 * MIRROR_REBUILD_COMPLETE 1740 * GUI finished to rebuild an array. If rebuild is done by driver this 1741 * state has no use 1742 * 1743 * Returns: 1744 * 0 Success 1745 */ 1746int hpt_set_array_state(DEVICEID idArray, HPT_U32 state); 1747 1748/* hpt_set_array_info 1749 * set array info. 1750 * Version compatibility: v1.0.0.1 or later 1751 * Parameters: 1752 * idArray Array ID 1753 * pInfo pointer to new info 1754 * 1755 * Returns: 1756 * 0 Success 1757 */ 1758int hpt_set_array_info(DEVICEID idArray, PALTERABLE_ARRAY_INFO pInfo); 1759 1760/* hpt_set_device_info 1761 * set device info. 1762 * Version compatibility: v1.0.0.1 or later 1763 * Parameters: 1764 * idDisk device ID 1765 * pInfo pointer to new info 1766 * 1767 * Returns: 1768 * 0 Success 1769 * Additional notes: 1770 * If idDisk==0, call to this function will stop buzzer on the adapter 1771 * (if supported by driver). 1772 */ 1773int hpt_set_device_info(DEVICEID idDisk, PALTERABLE_DEVICE_INFO pInfo); 1774 1775#if HPT_INTERFACE_VERSION >= 0x01000004 1776int hpt_set_device_info_v2(DEVICEID idDisk, PALTERABLE_DEVICE_INFO_V2 pInfo); 1777#endif 1778 1779/* hpt_rescan_devices 1780 * rescan devices 1781 * Version compatibility: v1.0.0.1 or later 1782 * Parameters: 1783 * None 1784 * Returns: 1785 * 0 Success 1786 */ 1787int hpt_rescan_devices(void); 1788 1789/* hpt_get_601_info 1790 * Get HPT601 status 1791 * Version compatibiilty: v1.0.0.3 or later 1792 * Parameters: 1793 * idDisk - Disk handle 1794 * PHPT601_INFO - pointer to HPT601 info buffer 1795 * Returns: 1796 * 0 Success 1797 */ 1798int hpt_get_601_info(DEVICEID idDisk, PHPT601_INFO pInfo); 1799 1800/* hpt_set_601_info 1801 * HPT601 function control 1802 * Version compatibiilty: v1.0.0.3 or later 1803 * Parameters: 1804 * idDisk - Disk handle 1805 * PHPT601_INFO - pointer to HPT601 info buffer 1806 * Returns: 1807 * 0 Success 1808 */ 1809int hpt_set_601_info(DEVICEID idDisk, PHPT601_INFO pInfo); 1810 1811/* hpt_lock_device 1812 * Lock a block on a device (prevent OS accessing it) 1813 * Version compatibiilty: v1.0.0.3 or later 1814 * Parameters: 1815 * idDisk - Disk handle 1816 * Lba - Start LBA 1817 * nSectors - number of sectors 1818 * Returns: 1819 * 0 Success 1820 */ 1821int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors); 1822 1823/* hpt_lock_device 1824 * Unlock a device 1825 * Version compatibiilty: v1.0.0.3 or later 1826 * Parameters: 1827 * idDisk - Disk handle 1828 * Returns: 1829 * 0 Success 1830 */ 1831int hpt_unlock_device(DEVICEID idDisk); 1832 1833/* hpt_ide_pass_through 1834 * send a ATA passthrough command to a device. 1835 * Version compatibility: v1.0.0.3 or later 1836 * Parameters: 1837 * p - IDE_PASS_THROUGH header pointer 1838 * Returns: 1839 * 0 Success 1840 */ 1841int hpt_ide_pass_through(PIDE_PASS_THROUGH_HEADER p); 1842int hpt_ide_pass_through_v2(PIDE_PASS_THROUGH_HEADER_V2 p); 1843 1844/* hpt_scsi_passthrough 1845 * send a SCSI passthrough command to a device. 1846 * Version compatibility: v2.0.0.0 or later 1847 * Parameters: 1848 * in - HPT_SCSI_PASSTHROUGH_IN header pointer 1849 * out - PHPT_SCSI_PASSTHROUGH_OUT header pointer 1850 * insize, outsize - in/out buffer size 1851 * Returns: 1852 * 0 Success 1853 */ 1854int hpt_scsi_passthrough(PHPT_SCSI_PASSTHROUGH_IN in, HPT_U32 insize, 1855 PHPT_SCSI_PASSTHROUGH_OUT out, HPT_U32 outsize); 1856 1857/* hpt_verify_data_block 1858 * verify data block on RAID1 or RAID5. 1859 * Version compatibility: v1.0.0.3 or later 1860 * Parameters: 1861 * idArray - Array ID 1862 * Lba - block number (on each array member, not logical block!) 1863 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 1864 * Returns: 1865 * 0 Success 1866 * 1 Data compare error 1867 * 2 I/O error 1868 */ 1869int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors); 1870 1871/* hpt_initialize_data_block 1872 * initialize data block (fill with zero) on RAID5 1873 * Version compatibility: v1.0.0.3 or later 1874 * Parameters: 1875 * idArray - Array ID 1876 * Lba - block number (on each array member, not logical block!) 1877 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 1878 * Returns: 1879 * 0 Success 1880 */ 1881int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors); 1882 1883/* hpt_device_io_ex 1884 * extended device I/O function 1885 * Version compatibility: v1.0.0.3 or later 1886 * Parameters: 1887 * idArray - Array ID 1888 * Lba - block number (on each array member, not logical block!) 1889 * nSectors - Sectors for each member 1890 * buffer - I/O buffer or s/g address 1891 * Returns: 1892 * 0 Success 1893 */ 1894int hpt_device_io_ex(PDEVICE_IO_EX_PARAMS param); 1895 1896/* hpt_set_boot_mark 1897 * select boot device 1898 * Version compatibility: v1.0.0.3 or later 1899 * Parameters: 1900 * id - logical device ID. If id is 0 the boot mark will be removed. 1901 * Returns: 1902 * 0 Success 1903 */ 1904int hpt_set_boot_mark(DEVICEID id); 1905 1906/* hpt_query_remove 1907 * check if device can be removed safely 1908 * Version compatibility: v1.0.0.4 or later 1909 * Parameters: 1910 * ndev - number of devices 1911 * pIds - device ID list 1912 * Returns: 1913 * 0 - Success 1914 * -1 - unknown error 1915 * n - the n-th device that can't be removed 1916 */ 1917int hpt_query_remove(HPT_U32 ndev, DEVICEID *pIds); 1918 1919/* hpt_remove_devices 1920 * remove a list of devices 1921 * Version compatibility: v1.0.0.4 or later 1922 * Parameters: 1923 * ndev - number of devices 1924 * pIds - device ID list 1925 * Returns: 1926 * 0 - Success 1927 * -1 - unknown error 1928 * n - the n-th device that can't be removed 1929 */ 1930int hpt_remove_devices(HPT_U32 ndev, DEVICEID *pIds); 1931 1932/* hpt_create_array_v2 1933 * Version compatibility: v1.1.0.0 or later 1934 * Parameters: 1935 * pParam pointer to CREATE_ARRAY_PARAMS_V2 structure 1936 * Returns: 1937 * 0 failed 1938 * else return array id 1939 */ 1940#if HPT_INTERFACE_VERSION>=0x01010000 1941DEVICEID hpt_create_array_v2(PCREATE_ARRAY_PARAMS_V2 pParam); 1942#endif 1943 1944/* hpt_create_array_v3 1945 * Version compatibility: v2.0.0.1 or later 1946 * Parameters: 1947 * pParam pointer to CREATE_ARRAY_PARAMS_V3 structure 1948 * Returns: 1949 * 0 failed 1950 * else return array id 1951 */ 1952#if HPT_INTERFACE_VERSION>=0x02000001 1953DEVICEID hpt_create_array_v3(PCREATE_ARRAY_PARAMS_V3 pParam); 1954#endif 1955 1956/* hpt_get_device_info_v2 1957 * Version compatibility: v1.1.0.0 or later 1958 * Parameters: 1959 * id logical device id 1960 * pInfo pointer to LOGICAL_DEVICE_INFO_V2 structure 1961 * Returns: 1962 * 0 - Success 1963 */ 1964#if HPT_INTERFACE_VERSION>=0x01010000 1965int hpt_get_device_info_v2(DEVICEID id, PLOGICAL_DEVICE_INFO_V2 pInfo); 1966#endif 1967 1968/* hpt_get_device_info_v3 1969 * Version compatibility: v1.2.0.0 or later 1970 * Parameters: 1971 * id logical device id 1972 * pInfo pointer to LOGICAL_DEVICE_INFO_V3 structure 1973 * Returns: 1974 * 0 - Success 1975 */ 1976#if HPT_INTERFACE_VERSION>=0x01020000 1977int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo); 1978#endif 1979 1980/* hpt_get_device_info_v4 1981 * Version compatibility: v2.0.0.1 or later 1982 * Parameters: 1983 * id logical device id 1984 * pInfo pointer to LOGICAL_DEVICE_INFO_V4 structure 1985 * Returns: 1986 * 0 - Success 1987 */ 1988#if HPT_INTERFACE_VERSION>=0x02000001 1989int hpt_get_device_info_v4(DEVICEID id, PLOGICAL_DEVICE_INFO_V4 pInfo); 1990#endif 1991 1992/* hpt_create_transform 1993 * create a transform instance. 1994 * Version compatibility: v2.0.0.0 or later 1995 * Parameters: 1996 * idArray - source array 1997 * destInfo - destination array info 1998 * Returns: 1999 * destination array id 2000 */ 2001#if HPT_INTERFACE_VERSION>=0x02000000 2002DEVICEID hpt_create_transform(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V2 destInfo); 2003#endif 2004 2005/* hpt_create_transform_v2 2006 * create a transform instance. 2007 * Version compatibility: v2.0.0.1 or later 2008 * Parameters: 2009 * idArray - source array 2010 * destInfo - destination array info 2011 * Returns: 2012 * destination array id 2013 */ 2014#if HPT_INTERFACE_VERSION>=0x02000001 2015DEVICEID hpt_create_transform_v2(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V3 destInfo); 2016#endif 2017 2018/* hpt_step_transform 2019 * move a block in a transform progress. 2020 * This function is called by mid-layer, not GUI (which uses set_array_state instead). 2021 * Version compatibility: v2.0.0.0 or later 2022 * Parameters: 2023 * idArray - destination array ID 2024 * the source ID will be invalid when transform complete. 2025 * Returns: 2026 * 0 - Success 2027 */ 2028#if HPT_INTERFACE_VERSION>=0x02000000 2029int hpt_step_transform(DEVICEID idArray); 2030#endif 2031 2032/* hpt_set_vdev_info 2033 * set information for disk or array 2034 * Version compatibility: v1.2.0.0 or later 2035 * Parameters: 2036 * dev - destination device 2037 * 2038 * Returns: 2039 * 0 - Success 2040 */ 2041#if HPT_INTERFACE_VERSION>=0x01020000 2042int hpt_set_vdev_info(DEVICEID dev, PSET_VDEV_INFO pInfo); 2043#endif 2044 2045/* hpt_init_disks 2046 * initialize disks for use 2047 * Version compatibility: v2.0.0.0 or later 2048 * Parameters: 2049 * ndev - number of disks to initialize 2050 * pIds - array of DEVICEID 2051 * 2052 * Returns: 2053 * 0 - Success 2054 */ 2055#if HPT_INTERFACE_VERSION>=0x02000000 2056int hpt_init_disks(HPT_U32 ndev, DEVICEID * pIds); 2057#endif 2058 2059/* hpt_calc_max_array_capacity 2060 * cap max capacity of the array user want to create or transform 2061 * Version compatibility: v1.2.0.0 or later 2062 * Parameters: 2063 * source - if transform, this is the source array, otherwise, it should be zero 2064 * destInfo - target array params 2065 * Returns: 2066 * 0 - Success 2067 * cap - max capacity of the target array 2068 */ 2069#if HPT_INTERFACE_VERSION>=0x01020000 2070int hpt_calc_max_array_capacity(DEVICEID source, PCREATE_ARRAY_PARAMS_V2 destInfo, HPT_U64 * cap); 2071#endif 2072 2073/* hpt_calc_max_array_capacity_v2 2074 * cap max capacity of the array user want to create or transform 2075 * Version compatibility: v2.0.0.1 or later 2076 * Parameters: 2077 * source - if transform, this is the source array, otherwise, it should be zero 2078 * destInfo - target array params 2079 * Returns: 2080 * 0 - Success 2081 * cap - max capacity of the target array 2082 */ 2083#if HPT_INTERFACE_VERSION>=0x02000001 2084int hpt_calc_max_array_capacity_v2(DEVICEID source, PCREATE_ARRAY_PARAMS_V3 destInfo, HPT_U64 * cap); 2085#endif 2086 2087/* hpt_rebuild_data_block2 2088 * Used to copy data from source disk and mirror disk. 2089 * Version compatibility: v1.1.0.0 or later 2090 * Parameters: 2091 * idArray Array ID (RAID1, 0/1 or RAID5) 2092 * Lba Start LBA for each array member 2093 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter) 2094 * 2095 * Returns: 2096 * 0 Success, event info is filled in *pEvent 2097 */ 2098#if HPT_INTERFACE_VERSION>=0x01010000 2099int hpt_rebuild_data_block_v2(DEVICEID idMirror, HPT_U64 Lba, HPT_U16 nSector); 2100#endif 2101 2102/* hpt_verify_data_block2 2103 * verify data block on RAID1 or RAID5. 2104 * Version compatibility: v1.1.0.0 or later 2105 * Parameters: 2106 * idArray - Array ID 2107 * Lba - block number (on each array member, not logical block!) 2108 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 2109 * Returns: 2110 * 0 Success 2111 * 1 Data compare error 2112 * 2 I/O error 2113 */ 2114#if HPT_INTERFACE_VERSION>=0x01010000 2115int hpt_verify_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors); 2116#endif 2117 2118/* hpt_initialize_data_block2 2119 * initialize data block (fill with zero) on RAID5 2120 * Version compatibility: v1.1.0.0 or later 2121 * Parameters: 2122 * idArray - Array ID 2123 * Lba - block number (on each array member, not logical block!) 2124 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 2125 * Returns: 2126 * 0 Success 2127 */ 2128#if HPT_INTERFACE_VERSION>=0x01010000 2129int hpt_initialize_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors); 2130#endif 2131 2132/* hpt_i2c_transaction 2133 * perform an transaction on i2c bus 2134 * Version compatibility: v2.0.0.0 or later 2135 * Parameters: 2136 * indata[0] - controller ID 2137 * Returns: 2138 * 0 Success 2139 */ 2140#if HPT_INTERFACE_VERSION>=0x01020000 2141int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen); 2142#endif 2143 2144/* hpt_get_parameter_list 2145 * get a list of driver parameters. 2146 * Version compatibility: v1.0.0.0 or later 2147 * Parameters: 2148 * location - parameter location 2149 * outBuffer - a buffer to hold the output 2150 * outBufferSize - size of outBuffer 2151 * Returns: 2152 * 0 Success 2153 * put in outBuffer a list of zero terminated parameter names. the whole list 2154 * is terminated with an additional zero byte. 2155 */ 2156int hpt_get_parameter_list(HPT_U32 location, char *outBuffer, HPT_U32 outBufferSize); 2157 2158/* hpt_{get,set}_parameter 2159 * get/set a parameter value. 2160 * Version compatibility: v1.0.0.0 or later 2161 * Parameters: 2162 * pParam - a pointer to HPT_DRIVER_PARAMETER. 2163 * Returns: 2164 * 0 Success 2165 */ 2166int hpt_get_parameter(PHPT_DRIVER_PARAMETER pParam); 2167int hpt_set_parameter(PHPT_DRIVER_PARAMETER pParam); 2168int hpt_reenumerate_device(DEVICEID id); 2169 2170/* 2171 * hpt_get_enclosure_count 2172 * Version compatibility: v2.1.0.0 or later 2173 * Parameters: 2174 * controller_id 2175 * Returns: 2176 * number of enclosurers 2177 */ 2178int hpt_get_enclosure_count(int ctlr_id); 2179 2180/* hpt_get_enclosure_info 2181 * Version compatibility: v2.1.0.0 or later 2182 * Parameters: 2183 * id enclosure id 2184 * pInfo pointer to ENCLOSURE_INFO buffer 2185 * Returns: 2186 * 0 Success, enclosure info is put into (*pInfo ). 2187 */ 2188int hpt_get_enclosure_info(int ctlr_id, int enc_id, PENCLOSURE_INFO pInfo); 2189 2190int hpt_get_enclosure_info_v2(int ctlr_id, int enc_id, PENCLOSURE_INFO_V2 pInfo); 2191 2192int hpt_get_enclosure_info_v3(int ctlr_id, int enc_id, PENCLOSURE_INFO_V3 pInfo); 2193 2194int hpt_get_enclosure_info_v4(int ctlr_id, int enc_id, PENCLOSURE_INFO_V4 pInfo); 2195int hpt_get_enclosure_element_info(int ctlr_id, int enc_id, int ele_id, PSES_ELEMENT_STATUS pInfo); 2196 2197/* performance monitor interface 2198 * Version compatibility: v2.1.0.0 or later 2199 */ 2200int hpt_get_perfmon_status(int ctlr_id, int *p_status); 2201int hpt_set_perfmon_status(int ctlr_id, int enable); 2202int hpt_get_perfmon_data(DEVICEID id, PHPT_PM_IOSTAT iostat); 2203 2204/* hpt_get_controller_venid 2205 * Version compatibility: v1.0.0.0 or later 2206 */ 2207int hpt_get_controller_venid(int ctlr_id, HPT_U32 *venid); 2208 2209/* hpt_access_config_reg 2210 * access the reserved config space on disk 2211 * Parameters: 2212 * p - ACCESS_CONFIG_REG_PARAMS header pointer 2213 * Returns: 2214 * 0 Success 2215 */ 2216int hpt_access_config_reg(PACCESS_CONFIG_REG_PARAMS p); 2217 2218/* hpt_dump_metadata 2219 * dump internal metadata 2220 * Parameters: 2221 * p - PDUMP_METADATA_PARAMS header pointer 2222 * Returns: 2223 * 0 Success 2224 */ 2225int hpt_dump_metadata(PDUMP_METADATA_PARAMS p); 2226 2227#endif 2228 2229#pragma pack() 2230 2231#ifdef __cplusplus 2232} 2233#endif 2234#endif 2235