hpt27xx_os_bsd.c revision 331722 
1/*-
2 * HighPoint RAID Driver for FreeBSD
3 *
4 * Copyright (C) 2005-2011 HighPoint Technologies, Inc. All Rights Reserved.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD: stable/11/sys/dev/hpt27xx/hpt27xx_os_bsd.c 331722 2018-03-29 02:50:57Z eadler $
29 */
30
31#include <dev/hpt27xx/hpt27xx_config.h>
32
33#include <dev/hpt27xx/os_bsd.h>
34
35BUS_ADDRESS get_dmapool_phy_addr(void *osext, void * dmapool_virt_addr);
36
37/* hardware access */
38HPT_U8   os_inb  (void *port) { return inb((unsigned)(HPT_UPTR)port); }
39HPT_U16  os_inw  (void *port) { return inw((unsigned)(HPT_UPTR)port); }
40HPT_U32  os_inl  (void *port) { return inl((unsigned)(HPT_UPTR)port); }
41
42void os_outb (void *port, HPT_U8 value) { outb((unsigned)(HPT_UPTR)port, (value)); }
43void os_outw (void *port, HPT_U16 value) { outw((unsigned)(HPT_UPTR)port, (value)); }
44void os_outl (void *port, HPT_U32 value) { outl((unsigned)(HPT_UPTR)port, (value)); }
45
46void os_insw (void *port, HPT_U16 *buffer, HPT_U32 count)
47{ insw((unsigned)(HPT_UPTR)port, (void *)buffer, count); }
48
49void os_outsw(void *port, HPT_U16 *buffer, HPT_U32 count)
50{ outsw((unsigned)(HPT_UPTR)port, (void *)buffer, count); }
51
52HPT_U32 __dummy_reg = 0;
53
54/* PCI configuration space */
55HPT_U8  os_pci_readb (void *osext, HPT_U8 offset)
56{
57    return  pci_read_config(((PHBA)osext)->pcidev, offset, 1);
58}
59
60HPT_U16 os_pci_readw (void *osext, HPT_U8 offset)
61{
62    return  pci_read_config(((PHBA)osext)->pcidev, offset, 2);
63}
64
65HPT_U32 os_pci_readl (void *osext, HPT_U8 offset)
66{
67    return  pci_read_config(((PHBA)osext)->pcidev, offset, 4);
68}
69
70void os_pci_writeb (void *osext, HPT_U8 offset, HPT_U8 value)
71{
72    pci_write_config(((PHBA)osext)->pcidev, offset, value, 1);
73}
74
75void os_pci_writew (void *osext, HPT_U8 offset, HPT_U16 value)
76{
77    pci_write_config(((PHBA)osext)->pcidev, offset, value, 2);
78}
79
80void os_pci_writel (void *osext, HPT_U8 offset, HPT_U32 value)
81{
82    pci_write_config(((PHBA)osext)->pcidev, offset, value, 4);
83}
84
85BUS_ADDRESS get_dmapool_phy_addr(void *osext, void * dmapool_virt_addr)
86{
87	return (BUS_ADDRESS)vtophys(dmapool_virt_addr);
88}
89
90/* PCI space access */
91HPT_U8 pcicfg_read_byte (HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg)
92{
93	return (HPT_U8)pci_cfgregread(bus, dev, func, reg, 1);
94}
95HPT_U32 pcicfg_read_dword(HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg)
96{
97	return (HPT_U32)pci_cfgregread(bus, dev, func, reg, 4);
98}
99void pcicfg_write_byte (HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg, HPT_U8 v)
100{
101	pci_cfgregwrite(bus, dev, func, reg, v, 1);
102}
103void pcicfg_write_dword(HPT_U8 bus, HPT_U8 dev, HPT_U8 func, HPT_U8 reg, HPT_U32 v)
104{
105	pci_cfgregwrite(bus, dev, func, reg, v, 4);
106}/* PCI space access */
107
108void *os_map_pci_bar(
109    void *osext,
110    int index,
111    HPT_U32 offset,
112    HPT_U32 length
113)
114{
115	PHBA hba = (PHBA)osext;
116	HPT_U32 base;
117
118	hba->pcibar[index].rid = 0x10 + index * 4;
119	base = pci_read_config(hba->pcidev, hba->pcibar[index].rid, 4);
120
121	if (base & 1) {
122		hba->pcibar[index].type = SYS_RES_IOPORT;
123		hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev,
124			hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE);
125		hba->pcibar[index].base = (void *)(unsigned long)(base & ~0x1);
126	} else {
127		hba->pcibar[index].type = SYS_RES_MEMORY;
128		hba->pcibar[index].res = bus_alloc_resource_any(hba->pcidev,
129			hba->pcibar[index].type, &hba->pcibar[index].rid, RF_ACTIVE);
130		hba->pcibar[index].base = (char *)rman_get_virtual(hba->pcibar[index].res) + offset;
131	}
132
133	return hba->pcibar[index].base;
134}
135
136void os_unmap_pci_bar(void *osext, void *base)
137{
138	PHBA hba = (PHBA)osext;
139	int index;
140
141	for (index=0; index<6; index++) {
142		if (hba->pcibar[index].base==base) {
143			bus_release_resource(hba->pcidev, hba->pcibar[index].type,
144				hba->pcibar[index].rid, hba->pcibar[index].res);
145			hba->pcibar[index].base = 0;
146			return;
147		}
148	}
149}
150
151void freelist_reserve(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT count)
152{
153    PVBUS_EXT vbus_ext = osext;
154
155    if (vbus_ext->ext_type!=EXT_TYPE_VBUS)
156        vbus_ext = ((PHBA)osext)->vbus_ext;
157
158    list->next = vbus_ext->freelist_head;
159    vbus_ext->freelist_head = list;
160    list->dma = 0;
161    list->size = size;
162    list->head = 0;
163#if DBG
164    list->reserved_count =
165#endif
166    list->count = count;
167}
168
169void *freelist_get(struct freelist *list)
170{
171    void * result;
172    if (list->count) {
173        HPT_ASSERT(list->head);
174        result = list->head;
175        list->head = *(void **)result;
176        list->count--;
177        return result;
178    }
179    return 0;
180}
181
182void freelist_put(struct freelist * list, void *p)
183{
184    HPT_ASSERT(list->dma==0);
185    list->count++;
186    *(void **)p = list->head;
187    list->head = p;
188}
189
190void freelist_reserve_dma(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT alignment, HPT_UINT count)
191{
192    PVBUS_EXT vbus_ext = osext;
193
194    if (vbus_ext->ext_type!=EXT_TYPE_VBUS)
195        vbus_ext = ((PHBA)osext)->vbus_ext;
196
197    list->next = vbus_ext->freelist_dma_head;
198    vbus_ext->freelist_dma_head = list;
199    list->dma = 1;
200    list->alignment = alignment;
201    list->size = size;
202    list->head = 0;
203#if DBG
204    list->reserved_count =
205#endif
206    list->count = count;
207}
208
209void *freelist_get_dma(struct freelist *list, BUS_ADDRESS *busaddr)
210{
211    void *result;
212    HPT_ASSERT(list->dma);
213    result = freelist_get(list);
214    if (result)
215        *busaddr = *(BUS_ADDRESS *)((void **)result+1);
216    return result;
217}
218
219void freelist_put_dma(struct freelist *list, void *p, BUS_ADDRESS busaddr)
220{
221    HPT_ASSERT(list->dma);
222    list->count++;
223    *(void **)p = list->head;
224    *(BUS_ADDRESS *)((void **)p+1) = busaddr;
225    list->head = p;
226}
227
228HPT_U32 os_get_stamp(void)
229{
230    HPT_U32 stamp;
231    do { stamp = random(); } while (stamp==0);
232    return stamp;
233}
234
235void os_stallexec(HPT_U32 microseconds)
236{
237    DELAY(microseconds);
238}
239
240static void os_timer_for_ldm(void *arg)
241{
242	PVBUS_EXT vbus_ext = (PVBUS_EXT)arg;
243	ldm_on_timer((PVBUS)vbus_ext->vbus);
244}
245
246void  os_request_timer(void * osext, HPT_U32 interval)
247{
248	PVBUS_EXT vbus_ext = osext;
249
250	HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS);
251
252#if (__FreeBSD_version >= 1000510)
253	callout_reset_sbt(&vbus_ext->timer, SBT_1US * interval, 0,
254	    os_timer_for_ldm, vbus_ext, 0);
255#else
256	untimeout(os_timer_for_ldm, vbus_ext, vbus_ext->timer);
257	vbus_ext->timer = timeout(os_timer_for_ldm, vbus_ext, interval * hz / 1000000);
258#endif
259}
260
261HPT_TIME os_query_time(void)
262{
263	return ticks * (1000000 / hz);
264}
265
266void os_schedule_task(void *osext, OSM_TASK *task)
267{
268	PVBUS_EXT vbus_ext = osext;
269
270	HPT_ASSERT(task->next==0);
271
272	if (vbus_ext->tasks==0)
273		vbus_ext->tasks = task;
274	else {
275		OSM_TASK *t = vbus_ext->tasks;
276		while (t->next) t = t->next;
277		t->next = task;
278	}
279
280	if (vbus_ext->worker.ta_context)
281		TASK_ENQUEUE(&vbus_ext->worker);
282}
283
284int os_revalidate_device(void *osext, int id)
285{
286
287    return 0;
288}
289
290int os_query_remove_device(void *osext, int id)
291{
292	return 0;
293}
294
295HPT_U8 os_get_vbus_seq(void *osext)
296{
297    return ((PVBUS_EXT)osext)->sim->path_id;
298}
299
300int  os_printk(char *fmt, ...)
301{
302    va_list args;
303    static char buf[512];
304
305    va_start(args, fmt);
306    vsnprintf(buf, sizeof(buf), fmt, args);
307    va_end(args);
308    return printf("%s: %s\n", driver_name, buf);
309}
310
311#if DBG
312void os_check_stack(const char *location, int size){}
313
314void __os_dbgbreak(const char *file, int line)
315{
316    printf("*** break at %s:%d ***", file, line);
317    while (1);
318}
319
320int hpt_dbg_level = 1;
321#endif
322