dpt.h revision 330897
1/*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1997 by Simon Shapiro 5 * All Rights Reserved 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer, 12 * without modification, immediately at the beginning of the file. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * $FreeBSD: stable/11/sys/dev/dpt/dpt.h 330897 2018-03-14 03:19:51Z eadler $ 32 */ 33 34/* 35 * 36 * dpt.h: Definitions and constants used by the SCSI side of the DPT 37 * 38 * credits: Mike Neuffer; DPT low level code and in other areas as well. 39 * Mark Salyzyn; Many vital bits of info and diagnostics. 40 * Justin Gibbs; FreeBSD API, debugging and style 41 * Ron McDaniels; SCSI Software Interrupts 42 * FreeBSD.ORG; Great O/S to work on and for. 43 */ 44 45#ifndef _DPT_H 46#define _DPT_H 47 48#include <sys/ioccom.h> 49 50 51#undef DPT_USE_DLM_SWI 52 53#define DPT_RELEASE 1 54#define DPT_VERSION 4 55#define DPT_PATCH 5 56#define DPT_MONTH 8 57#define DPT_DAY 3 58#define DPT_YEAR 18 /* 1998 - 1980 */ 59 60#define DPT_CTL_RELEASE 1 61#define DPT_CTL_VERSION 0 62#define DPT_CTL_PATCH 6 63 64#ifndef PAGESIZ 65#define PAGESIZ 4096 66#endif 67 68#ifndef physaddr 69typedef void *physaddr; 70#endif 71 72#undef DPT_INQUIRE_DEVICES /* We have no buyers for this function */ 73#define DPT_SUPPORT_POLLING /* Use polled mode at boot (must be ON!) */ 74#define DPT_OPENNINGS 8 /* Commands-in-progress per device */ 75 76#define DPT_RETRIES 5 /* Times to retry failed commands */ 77#undef DPT_DISABLE_SG 78#define DPT_HAS_OPEN 79 80/* Arguments to dpt_run_queue() can be: */ 81 82#define DPT_MAX_TARGET_MODE_BUFFER_SIZE 8192 83#define DPT_FREE_LIST_INCREMENT 64 84#define DPT_CMD_LEN 12 85 86/* 87 * How many segments do we want in a Scatter/Gather list? 88 * Some HBA's can do 16, Some 8192. Since we pre-allocate 89 * them in fixed increments, we need to put a practical limit on 90 * these. A passed parameter (from kernel boot or lkm) would help 91 */ 92#define DPT_MAX_SEGS 32 93 94/* Debug levels */ 95 96#undef DPT_DEBUG_PCI 97#undef DPT_DEBUG_INIT 98#undef DPT_DEBUG_SETUP 99#undef DPT_DEBUG_STATES 100#undef DPT_DEBUG_CONFIG 101#undef DPT_DEBUG_QUEUES 102#undef DPT_DEBUG_SCSI_CMD 103#undef DPT_DEBUG_SOFTINTR 104#undef DPT_DEBUG_HARDINTR 105#undef DPT_DEBUG_HEX_DUMPS 106#undef DPT_DEBUG_POLLING 107#undef DPT_DEBUG_INQUIRE 108#undef DPT_DEBUG_COMPLETION 109#undef DPT_DEBUG_COMPLETION_ERRORS 110#define DPT_DEBUG_MINPHYS 111#undef DPT_DEBUG_SG 112#undef DPT_DEBUG_SG_SHOW_DATA 113#undef DPT_DEBUG_SCSI_CMD_NAME 114#undef DPT_DEBUG_CONTROL 115#undef DPT_DEBUG_TIMEOUTS 116#undef DPT_DEBUG_SHUTDOWN 117#define DPT_DEBUG_USER_CMD 118 119/* 120 * Misc. definitions 121 */ 122#undef TRUE 123#undef FALSE 124#define TRUE 1 125#define FALSE 0 126 127#define MAX_CHANNELS 3 128#define MAX_TARGETS 16 129#define MAX_LUNS 8 130 131/* Map minor numbers to device identity */ 132#define TARGET_MASK 0x000f 133#define BUS_MASK 0x0030 134#define HBA_MASK 0x01c0 135#define LUN_MASK 0x0e00 136 137#define minor2target(minor) ( minor & TARGET_MASK ) 138#define minor2bus(minor) ( (minor & BUS_MASK) >> 4 ) 139#define minor2hba(minor) ( (minor & HBA_MASK) >> 6 ) 140#define minor2lun(minor) ( (minor & LUN_MASK) >> 9 ) 141 142/* 143 * Valid values for cache_type 144 */ 145#define DPT_NO_CACHE 0 146#define DPT_CACHE_WRITETHROUGH 1 147#define DPT_CACHE_WRITEBACK 2 148 149#define min(a,b) ((a<b)?(a):(b)) 150 151#define MAXISA 4 152#define MAXEISA 16 153#define MAXPCI 16 154#define MAXIRQ 16 155#define MAXTARGET 16 156 157#define IS_ISA 'I' 158#define IS_EISA 'E' 159#define IS_PCI 'P' 160 161#define BROKEN_INQUIRY 1 162 163#define BUSMASTER 0xff 164#define PIO 0xfe 165 166#define EATA_SIGNATURE 0x41544145 /* little ENDIAN "EATA" */ 167#define DPT_BLINK_INDICATOR 0x42445054 168 169#define DPT_ID1 0x12 170#define DPT_ID2 0x1 171#define ATT_ID1 0x06 172#define ATT_ID2 0x94 173#define ATT_ID3 0x0 174 175#define NEC_ID1 0x38 176#define NEC_ID2 0xa3 177#define NEC_ID3 0x82 178 179#define MAX_PCI_DEVICES 32 /* Maximum # Of Devices Per Bus */ 180#define MAX_METHOD_2 16 /* Max Devices For Method 2 */ 181#define MAX_PCI_BUS 16 /* Maximum # Of Busses Allowed */ 182 183#define DPT_MAX_RETRIES 2 184 185#define READ 0 186#define WRITE 1 187#define OTHER 2 188 189#define HD(cmd) ((hostdata *)&(cmd->host->hostdata)) 190#define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble)) 191#define SD(host) ((hostdata *)&(host->hostdata)) 192 193/* 194 * EATA Command & Register definitions 195 */ 196 197#define PCI_REG_DPTconfig 0x40 198#define PCI_REG_PumpModeAddress 0x44 199#define PCI_REG_PumpModeData 0x48 200#define PCI_REG_ConfigParam1 0x50 201#define PCI_REG_ConfigParam2 0x54 202 203#define EATA_CMD_PIO_SETUPTEST 0xc6 204#define EATA_CMD_PIO_READ_CONFIG 0xf0 205#define EATA_CMD_PIO_SET_CONFIG 0xf1 206#define EATA_CMD_PIO_SEND_CP 0xf2 207#define EATA_CMD_PIO_RECEIVE_SP 0xf3 208#define EATA_CMD_PIO_TRUNC 0xf4 209 210#define EATA_CMD_RESET 0xf9 211#define EATA_COLD_BOOT 0x06 /* Last resort only! */ 212 213#define EATA_CMD_IMMEDIATE 0xfa 214 215#define EATA_CMD_DMA_READ_CONFIG 0xfd 216#define EATA_CMD_DMA_SET_CONFIG 0xfe 217#define EATA_CMD_DMA_SEND_CP 0xff 218 219#define ECS_EMULATE_SENSE 0xd4 220 221/* 222 * Immediate Commands 223 * Beware of this enumeration. Not all commands are in sequence! 224 */ 225 226enum dpt_immediate_cmd { 227 EATA_GENERIC_ABORT, 228 EATA_SPECIFIC_RESET, 229 EATA_BUS_RESET, 230 EATA_SPECIFIC_ABORT, 231 EATA_QUIET_INTR, 232 EATA_SMART_ROM_DL_EN, 233 EATA_COLD_BOOT_HBA, /* Only as a last resort */ 234 EATA_FORCE_IO, 235 EATA_SCSI_BUS_OFFLINE, 236 EATA_RESET_MASKED_BUS, 237 EATA_POWER_OFF_WARN 238}; 239 240#define HA_CTRLREG 0x206 /* control register for HBA */ 241#define HA_CTRL_DISINT 0x02 /* CTRLREG: disable interrupts */ 242#define HA_CTRL_RESCPU 0x04 /* CTRLREG: reset processo */ 243#define HA_CTRL_8HEADS 0x08 /* 244 * CTRLREG: set for drives with 245 * >=8 heads 246 * (WD1003 rudimentary :-) 247 */ 248 249#define HA_WCOMMAND 0x07 /* command register offset */ 250#define HA_WIFC 0x06 /* immediate command offset */ 251#define HA_WCODE 0x05 252#define HA_WCODE2 0x04 253#define HA_WDMAADDR 0x02 /* DMA address LSB offset */ 254#define HA_RERROR 0x01 /* Error Register, offset 1 from base */ 255#define HA_RAUXSTAT 0x08 /* aux status register offset */ 256#define HA_RSTATUS 0x07 /* status register offset */ 257#define HA_RDATA 0x00 /* data register (16bit) */ 258#define HA_WDATA 0x00 /* data register (16bit) */ 259 260#define HA_ABUSY 0x01 /* aux busy bit */ 261#define HA_AIRQ 0x02 /* aux IRQ pending bit */ 262#define HA_SERROR 0x01 /* pr. command ended in error */ 263#define HA_SMORE 0x02 /* more data soon to come */ 264#define HA_SCORR 0x04 /* datio_addra corrected */ 265#define HA_SDRQ 0x08 /* data request active */ 266#define HA_SSC 0x10 /* seek complete */ 267#define HA_SFAULT 0x20 /* write fault */ 268#define HA_SREADY 0x40 /* drive ready */ 269#define HA_SBUSY 0x80 /* drive busy */ 270#define HA_SDRDY (HA_SSC|HA_SREADY|HA_SDRQ) 271 272/* 273 * Message definitions 274 */ 275 276enum dpt_message { 277 HA_NO_ERROR, /* No Error */ 278 HA_ERR_SEL_TO, /* Selection Timeout */ 279 HA_ERR_CMD_TO, /* Command Timeout */ 280 HA_SCSIBUS_RESET, 281 HA_HBA_POWER_UP, /* Initial Controller Power-up */ 282 HA_UNX_BUSPHASE, /* Unexpected Bus Phase */ 283 HA_UNX_BUS_FREE, /* Unexpected Bus Free */ 284 HA_BUS_PARITY, /* Bus Parity Error */ 285 HA_SCSI_HUNG, /* SCSI Hung */ 286 HA_UNX_MSGRJCT, /* Unexpected Message Rejected */ 287 HA_RESET_STUCK, /* SCSI Bus Reset Stuck */ 288 HA_RSENSE_FAIL, /* Auto Request-Sense Failed */ 289 HA_PARITY_ERR, /* Controller Ram Parity Error */ 290 HA_CP_ABORT_NA, /* Abort Message sent to non-active cmd */ 291 HA_CP_ABORTED, /* Abort Message sent to active cmd */ 292 HA_CP_RESET_NA, /* Reset Message sent to non-active cmd */ 293 HA_CP_RESET, /* Reset Message sent to active cmd */ 294 HA_ECC_ERR, /* Controller Ram ECC Error */ 295 HA_PCI_PARITY, /* PCI Parity Error */ 296 HA_PCI_MABORT, /* PCI Master Abort */ 297 HA_PCI_TABORT, /* PCI Target Abort */ 298 HA_PCI_STABORT /* PCI Signaled Target Abort */ 299}; 300 301#define HA_STATUS_MASK 0x7F 302#define HA_IDENTIFY_MSG 0x80 303#define HA_DISCO_RECO 0x40 /* Disconnect/Reconnect */ 304 305#define DPT_RW_BUFF_HEART 0X00 306#define DPT_RW_BUFF_DLM 0x02 307#define DPT_RW_BUFF_ACCESS 0x03 308 309#define HA_INTR_OFF 1 310#define HA_INTR_ON 0 311 312/* This is really a one-time shot through some black magic */ 313#define DPT_EATA_REVA 0x1c 314#define DPT_EATA_REVB 0x1e 315#define DPT_EATA_REVC 0x22 316#define DPT_EATA_REVZ 0x24 317 318 319/* IOCTL List */ 320 321#define DPT_RW_CMD_LEN 32 322#define DPT_RW_CMD_DUMP_SOFTC "dump softc" 323#define DPT_RW_CMD_DUMP_SYSINFO "dump sysinfo" 324#define DPT_RW_CMD_DUMP_METRICS "dump metrics" 325#define DPT_RW_CMD_CLEAR_METRICS "clear metrics" 326#define DPT_RW_CMD_SHOW_LED "show LED" 327 328#define DPT_IOCTL_INTERNAL_METRICS _IOR('D', 1, dpt_perf_t) 329#define DPT_IOCTL_SOFTC _IOR('D', 2, dpt_user_softc_t) 330#define DPT_IOCTL_SEND _IOWR('D', 3, eata_pt_t) 331#define SDI_SEND 0x40044444 /* Observed from dptmgr */ 332 333/* 334 * Other definitions 335 */ 336 337#define DPT_HCP_LENGTH(page) (ntohs(*(int16_t *)(void *)(&page[2]))+4) 338#define DPT_HCP_FIRST(page) (&page[4]) 339#define DPT_HCP_NEXT(param) (¶m[3 + param[3] + 1]) 340#define DPT_HCP_CODE(param) (ntohs(*(int16_t *)(void *)param)) 341 342 343/* Possible return values from dpt_register_buffer() */ 344 345#define SCSI_TM_READ_BUFFER 0x3c 346#define SCSI_TM_WRITE_BUFFER 0x3b 347 348#define SCSI_TM_MODE_MASK 0x07 /* Strip off reserved and LUN */ 349#define SCSI_TM_LUN_MASK 0xe0 /* Strip off reserved and LUN */ 350 351typedef enum { 352 SUCCESSFULLY_REGISTERED, 353 DRIVER_DOWN, 354 ALREADY_REGISTERED, 355 REGISTERED_TO_ANOTHER, 356 NOT_REGISTERED, 357 INVALID_UNIT, 358 INVALID_SENDER, 359 INVALID_CALLBACK, 360 NO_RESOURCES 361} dpt_rb_t; 362 363typedef enum { 364 REGISTER_BUFFER, 365 RELEASE_BUFFER 366} dpt_rb_op_t; 367 368/* 369 * New way for completion routines to reliably copmplete processing. 370 * Should take properly typed dpt_softc_t and dpt_ccb_t, 371 * but interdependencies preclude that. 372 */ 373typedef void (*ccb_callback)(void *dpt, int bus, void *ccb); 374 375typedef void (*buff_wr_done)(int unit, u_int8_t channel, u_int8_t target, 376 u_int8_t lun, u_int16_t offset, u_int16_t length, 377 int result); 378 379typedef void (*dpt_rec_buff)(int unit, u_int8_t channel, u_int8_t target, 380 u_int8_t lun, void *buffer, u_int16_t offset, 381 u_int16_t length); 382 383/* HBA's Status port (register) bitmap */ 384typedef struct reg_bit { /* reading this one will clear the interrupt */ 385 u_int8_t error :1, /* previous command ended in an error */ 386 more :1, /* More DATA coming soon Poll BSY & DRQ (PIO) */ 387 corr :1, /* data read was successfully corrected with ECC */ 388 drq :1, /* data request active */ 389 sc :1, /* seek complete */ 390 fault :1, /* write fault */ 391 ready :1, /* drive ready */ 392 busy :1; /* controller busy */ 393} dpt_status_reg_t; 394 395/* HBA's Auxiliary status port (register) bitmap */ 396typedef struct reg_abit { /* reading this won't clear the interrupt */ 397 u_int8_t abusy :1, /* auxiliary busy */ 398 irq :1, /* set when drive interrupt is asserted */ 399 :6; 400} dpt_aux_status_t; 401 402/* The EATA Register Set as a structure */ 403typedef struct eata_register { 404 u_int8_t data_reg[2]; /* R, couldn't figure this one out */ 405 u_int8_t cp_addr[4]; /* W, CP address register */ 406 union { 407 u_int8_t command; /* 408 * W, command code: 409 * [read|set] conf, send CP 410 */ 411 struct reg_bit status; /* R, see register_bit1 */ 412 u_int8_t statusbyte; 413 } ovr; 414 struct reg_abit aux_stat; /* R, see register_bit2 */ 415} eata_reg_t; 416 417/* 418 * Holds the results of a READ_CONFIGURATION command 419 * Beware of data items which are larger than 1 byte. 420 * these come from the DPT in network order. 421 * On an Intel ``CPU'' they will be upside down and backwards! 422 * The dpt_get_conf function is normally responsible for flipping 423 * Everything back. 424 */ 425typedef struct get_conf { /* Read Configuration Array */ 426 union { 427 struct { 428 u_int8_t foo_DevType; 429 u_int8_t foo_PageCode; 430 u_int8_t foo_Reserved0; 431 u_int8_t foo_len; 432 } foo; 433 u_int32_t foo_length; /* Should return 0x22, 0x24, etc */ 434 } bar; 435#define gcs_length bar.foo_length 436#define gcs_PageCode bar.foo.foo_DevType 437#define gcs_reserved0 bar.foo.foo_Reserved0 438#define gcs_len bar.foo.foo_len 439 440 u_int32_t signature; /* Signature MUST be "EATA". ntohl()`ed */ 441 442 u_int8_t version2 :4, 443 version :4; /* EATA Version level */ 444 445 u_int8_t OCS_enabled :1, /* Overlap Command Support enabled */ 446 TAR_support :1, /* SCSI Target Mode supported */ 447 TRNXFR :1, /* Truncate Transfer Cmd Used in PIO Mode */ 448 MORE_support:1, /* MORE supported (PIO Mode Only) */ 449 DMA_support :1, /* DMA supported */ 450 DMA_valid :1, /* DRQ value in Byte 30 is valid */ 451 ATA :1, /* ATA device connected (not supported) */ 452 HAA_valid :1; /* Hostadapter Address is valid */ 453 454 u_int16_t cppadlen; /* 455 * Number of pad bytes send after CD data set 456 * to zero for DMA commands. Ntohl()`ed 457 */ 458 u_int8_t scsi_idS; /* SCSI ID of controller 2-0 Byte 0 res. */ 459 u_int8_t scsi_id2; /* If not, zero is returned */ 460 u_int8_t scsi_id1; 461 u_int8_t scsi_id0; 462 u_int32_t cplen; /* CP length: number of valid cp bytes */ 463 464 u_int32_t splen; /* Returned bytes for a received SP command */ 465 u_int16_t queuesiz; /* max number of queueable CPs */ 466 467 u_int16_t dummy; 468 u_int16_t SGsiz; /* max number of SG table entrie */ 469 470 u_int8_t IRQ :4,/* IRQ used this HBA */ 471 IRQ_TR :1,/* IRQ Trigger: 0=edge, 1=level */ 472 SECOND :1,/* This is a secondary controller */ 473 DMA_channel:2;/* DRQ index, DRQ is 2comp of DRQX */ 474 475 u_int8_t sync; /* 0-7 sync active bitmask (deprecated) */ 476 u_int8_t DSBLE :1, /* ISA i/o addressing is disabled */ 477 FORCADR :1, /* i/o address has been forced */ 478 SG_64K :1, 479 SG_UAE :1, 480 :4; 481 482 u_int8_t MAX_ID :5, /* Max number of SCSI target IDs */ 483 MAX_CHAN :3; /* Number of SCSI busses on HBA */ 484 485 u_int8_t MAX_LUN; /* Max number of LUNs */ 486 u_int8_t :3, 487 AUTOTRM :1, 488 M1_inst :1, 489 ID_qest :1, /* Raidnum ID is questionable */ 490 is_PCI :1, /* HBA is PCI */ 491 is_EISA :1; /* HBA is EISA */ 492 493 u_int8_t RAIDNUM; /* unique HBA identifier */ 494 u_int8_t unused[4]; /* When doing PIO, you GET 512 bytes */ 495 496 /* >>------>> End of The DPT structure <<------<< */ 497 498 u_int32_t length; /* True length, after ntohl conversion */ 499} dpt_conf_t; 500 501/* Scatter-Gather list entry */ 502typedef struct dpt_sg_segment { 503 u_int32_t seg_addr; /* All fields in network byte order */ 504 u_int32_t seg_len; 505} dpt_sg_t; 506 507 508/* Status Packet */ 509typedef struct eata_sp { 510 u_int8_t hba_stat :7, /* HBA status */ 511 EOC :1; /* True if command finished */ 512 513 u_int8_t scsi_stat; /* Target SCSI status */ 514 515 u_int8_t reserved[2]; 516 517 u_int32_t residue_len; /* Number of bytes not transferred */ 518 519 u_int32_t ccb_busaddr; 520 521 u_int8_t sp_ID_Message; 522 u_int8_t sp_Que_Message; 523 u_int8_t sp_Tag_Message; 524 u_int8_t msg[9]; 525} dpt_sp_t; 526 527/* 528 * A strange collection of O/S-Hardware releated bits and pieces. 529 * Used by the dpt_ioctl() entry point to return DPT_SYSINFO command. 530 */ 531typedef struct dpt_drive_parameters { 532 u_int16_t cylinders; /* Up to 1024 */ 533 u_int8_t heads; /* Up to 255 */ 534 u_int8_t sectors; /* Up to 63 */ 535} dpt_drive_t; 536 537typedef struct driveParam_S driveParam_T; 538 539#define SI_CMOS_Valid 0x0001 540#define SI_NumDrivesValid 0x0002 541#define SI_ProcessorValid 0x0004 542#define SI_MemorySizeValid 0x0008 543#define SI_DriveParamsValid 0x0010 544#define SI_SmartROMverValid 0x0020 545#define SI_OSversionValid 0x0040 546#define SI_OSspecificValid 0x0080 547#define SI_BusTypeValid 0x0100 548 549#define SI_ALL_VALID 0x0FFF 550#define SI_NO_SmartROM 0x8000 551 552#define SI_ISA_BUS 0x00 553#define SI_MCA_BUS 0x01 554#define SI_EISA_BUS 0x02 555#define SI_PCI_BUS 0x04 556 557#define HBA_BUS_ISA 0x00 558#define HBA_BUS_EISA 0x01 559#define HBA_BUS_PCI 0x02 560 561typedef struct dpt_sysinfo { 562 u_int8_t drive0CMOS; /* CMOS Drive 0 Type */ 563 u_int8_t drive1CMOS; /* CMOS Drive 1 Type */ 564 u_int8_t numDrives; /* 0040:0075 contents */ 565 u_int8_t processorFamily; /* Same as DPTSIG definition */ 566 u_int8_t processorType; /* Same as DPTSIG definition */ 567 u_int8_t smartROMMajorVersion; 568 u_int8_t smartROMMinorVersion; /* SmartROM version */ 569 u_int8_t smartROMRevision; 570 u_int16_t flags; /* See bit definitions above */ 571 u_int16_t conventionalMemSize; /* in KB */ 572 u_int32_t extendedMemSize; /* in KB */ 573 u_int32_t osType; /* Same as DPTSIG definition */ 574 u_int8_t osMajorVersion; 575 u_int8_t osMinorVersion; /* The OS version */ 576 u_int8_t osRevision; 577 u_int8_t osSubRevision; 578 u_int8_t busType; /* See defininitions above */ 579 u_int8_t pad[3]; /* For alignment */ 580 dpt_drive_t drives[16]; /* SmartROM Logical Drives */ 581} dpt_sysinfo_t; 582 583/* SEND_COMMAND packet structure */ 584typedef struct eata_ccb { 585 u_int8_t SCSI_Reset :1, /* Cause a SCSI Bus reset on the cmd */ 586 HBA_Init :1, /* Cause Controller to reinitialize */ 587 Auto_Req_Sen :1, /* Do Auto Request Sense on errors */ 588 scatter :1, /* Data Ptr points to a SG Packet */ 589 Quick :1, /* Set this one for NO Status PAcket */ 590 Interpret :1, /* Interpret the SCSI cdb for own use */ 591 DataOut :1, /* Data Out phase with command */ 592 DataIn :1; /* Data In phase with command */ 593 594 u_int8_t reqlen; /* Request Sense Length, if Auto_Req_Sen=1 */ 595 u_int8_t unused[3]; 596 u_int8_t FWNEST :1, /* send cmd to phys RAID component */ 597 unused2 :7; 598 599 u_int8_t Phsunit :1, /* physical unit on mirrored pair */ 600 I_AT :1, /* inhibit address translation */ 601 Disable_Cache :1, /* HBA inhibit caching */ 602 :5; 603 604 u_int8_t cp_id :5, /* SCSI Device ID of target */ 605 cp_channel :3; /* SCSI Channel # of HBA */ 606 607 u_int8_t cp_LUN :5, 608 cp_luntar :1, /* CP is for target ROUTINE */ 609 cp_dispri :1, /* Grant disconnect privilege */ 610 cp_identify :1; /* Always TRUE */ 611 612 u_int8_t cp_msg[3]; /* Message bytes 0-3 */ 613 614 union { 615 struct { 616 u_int8_t x_scsi_cmd; /* Partial SCSI CDB def */ 617 618 u_int8_t x_extent :1, 619 x_bytchk :1, 620 x_reladr :1, 621 x_cmplst :1, 622 x_fmtdata :1, 623 x_lun :3; 624 625 u_int8_t x_page; 626 u_int8_t reserved4; 627 u_int8_t x_len; 628 u_int8_t x_link :1; 629 u_int8_t x_flag :1; 630 u_int8_t reserved5 :4; 631 u_int8_t x_vendor :2; 632 } x; 633 u_int8_t z[12]; /* Command Descriptor Block (= 12) */ 634 } cp_w; 635 636#define cp_cdb cp_w.z 637#define cp_scsi_cmd cp_w.x.x_scsi_cmd 638#define cp_extent cp_w.x.x_extent 639#define cp_lun cp_w.x.x_lun 640#define cp_page cp_w.x.x_page 641#define cp_len cp_w.x.x_len 642 643#define MULTIFUNCTION_CMD 0x0e /* SCSI Multi Function Cmd */ 644#define BUS_QUIET 0x04 /* Quite Scsi Bus Code */ 645#define BUS_UNQUIET 0x05 /* Un Quiet Scsi Bus Code */ 646 647 u_int32_t cp_datalen; /* 648 * Data Transfer Length. If scatter=1 len (IN 649 * BYTES!) of the S/G array 650 */ 651 652 u_int32_t cp_busaddr; /* Unique identifier. Busaddr works well */ 653 u_int32_t cp_dataDMA; /* 654 * Data Address, if scatter=1 then it is the 655 * address of scatter packet 656 */ 657 u_int32_t cp_statDMA; /* address for Status Packet */ 658 u_int32_t cp_reqDMA; /* 659 * Request Sense Address, used if CP command 660 * ends with error 661 */ 662 u_int8_t CP_OpCode; 663 664} eata_ccb_t; 665 666/* 667 * DPT Signature Structure. 668 * Used by /dev/dpt to directly pass commands to the HBA 669 * We have more information here than we care for... 670 */ 671 672/* Current Signature Version - sigBYTE dsSigVersion; */ 673#define SIG_VERSION 1 674 675/* 676 * Processor Family - sigBYTE dsProcessorFamily; DISTINCT VALUE 677 * 678 * What type of processor the file is meant to run on. 679 * This will let us know whether to read sigWORDs as high/low or low/high. 680 */ 681#define PROC_INTEL 0x00 /* Intel 80x86 */ 682#define PROC_MOTOROLA 0x01 /* Motorola 68K */ 683#define PROC_MIPS4000 0x02 /* MIPS RISC 4000 */ 684#define PROC_ALPHA 0x03 /* DEC Alpha */ 685 686/* 687 * Specific Minimim Processor - sigBYTE dsProcessor; FLAG BITS 688 * 689 * Different bit definitions dependent on processor_family 690 */ 691 692/* PROC_INTEL: */ 693#define PROC_8086 0x01 /* Intel 8086 */ 694#define PROC_286 0x02 /* Intel 80286 */ 695#define PROC_386 0x04 /* Intel 80386 */ 696#define PROC_486 0x08 /* Intel 80486 */ 697#define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */ 698#define PROC_P6 0x20 /* Intel 686 aka P6 */ 699 700/* PROC_MOTOROLA: */ 701#define PROC_68000 0x01 /* Motorola 68000 */ 702#define PROC_68020 0x02 /* Motorola 68020 */ 703#define PROC_68030 0x04 /* Motorola 68030 */ 704#define PROC_68040 0x08 /* Motorola 68040 */ 705 706/* Filetype - sigBYTE dsFiletype; DISTINCT VALUES */ 707#define FT_EXECUTABLE 0 /* Executable Program */ 708#define FT_SCRIPT 1 /* Script/Batch File??? */ 709#define FT_HBADRVR 2 /* HBA Driver */ 710#define FT_OTHERDRVR 3 /* Other Driver */ 711#define FT_IFS 4 /* Installable Filesystem Driver */ 712#define FT_ENGINE 5 /* DPT Engine */ 713#define FT_COMPDRVR 6 /* Compressed Driver Disk */ 714#define FT_LANGUAGE 7 /* Foreign Language file */ 715#define FT_FIRMWARE 8 /* Downloadable or actual Firmware */ 716#define FT_COMMMODL 9 /* Communications Module */ 717#define FT_INT13 10 /* INT 13 style HBA Driver */ 718#define FT_HELPFILE 11 /* Help file */ 719#define FT_LOGGER 12 /* Event Logger */ 720#define FT_INSTALL 13 /* An Install Program */ 721#define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */ 722#define FT_RESOURCE 15 /* Storage Manager Resource File */ 723#define FT_MODEM_DB 16 /* Storage Manager Modem Database */ 724 725/* Filetype flags - sigBYTE dsFiletypeFlags; FLAG BITS */ 726#define FTF_DLL 0x01 /* Dynamic Link Library */ 727#define FTF_NLM 0x02 /* Netware Loadable Module */ 728#define FTF_OVERLAYS 0x04 /* Uses overlays */ 729#define FTF_DEBUG 0x08 /* Debug version */ 730#define FTF_TSR 0x10 /* TSR */ 731#define FTF_SYS 0x20 /* DOS Lodable driver */ 732#define FTF_PROTECTED 0x40 /* Runs in protected mode */ 733#define FTF_APP_SPEC 0x80 /* Application Specific */ 734 735/* OEM - sigBYTE dsOEM; DISTINCT VALUES */ 736#define OEM_DPT 0 /* DPT */ 737#define OEM_ATT 1 /* ATT */ 738#define OEM_NEC 2 /* NEC */ 739#define OEM_ALPHA 3 /* Alphatronix */ 740#define OEM_AST 4 /* AST */ 741#define OEM_OLIVETTI 5 /* Olivetti */ 742#define OEM_SNI 6 /* Siemens/Nixdorf */ 743 744/* Operating System - sigLONG dsOS; FLAG BITS */ 745#define OS_DOS 0x00000001 /* PC/MS-DOS */ 746#define OS_WINDOWS 0x00000002 /* Microsoft Windows 3.x */ 747#define OS_WINDOWS_NT 0x00000004 /* Microsoft Windows NT */ 748#define OS_OS2M 0x00000008 /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x */ 749#define OS_OS2L 0x00000010 /* Microsoft OS/2 1.301 - LADDR */ 750#define OS_OS22x 0x00000020 /* IBM OS/2 2.x */ 751#define OS_NW286 0x00000040 /* Novell NetWare 286 */ 752#define OS_NW386 0x00000080 /* Novell NetWare 386 */ 753#define OS_GEN_UNIX 0x00000100 /* Generic Unix */ 754#define OS_SCO_UNIX 0x00000200 /* SCO Unix */ 755#define OS_ATT_UNIX 0x00000400 /* ATT Unix */ 756#define OS_UNIXWARE 0x00000800 /* UnixWare Unix */ 757#define OS_INT_UNIX 0x00001000 /* Interactive Unix */ 758#define OS_SOLARIS 0x00002000 /* SunSoft Solaris */ 759#define OS_QN 0x00004000 /* QNX for Tom Moch */ 760#define OS_NEXTSTEP 0x00008000 /* NeXTSTEP */ 761#define OS_BANYAN 0x00010000 /* Banyan Vines */ 762#define OS_OLIVETTI_UNIX 0x00020000 /* Olivetti Unix */ 763#define OS_FREEBSD 0x00040000 /* FreeBSD 2.2 and later */ 764#define OS_OTHER 0x80000000 /* Other */ 765 766/* Capabilities - sigWORD dsCapabilities; FLAG BITS */ 767#define CAP_RAID0 0x0001 /* RAID-0 */ 768#define CAP_RAID1 0x0002 /* RAID-1 */ 769#define CAP_RAID3 0x0004 /* RAID-3 */ 770#define CAP_RAID5 0x0008 /* RAID-5 */ 771#define CAP_SPAN 0x0010 /* Spanning */ 772#define CAP_PASS 0x0020 /* Provides passthrough */ 773#define CAP_OVERLAP 0x0040 /* Passthrough supports overlapped commands */ 774#define CAP_ASPI 0x0080 /* Supports ASPI Command Requests */ 775#define CAP_ABOVE16MB 0x0100 /* ISA Driver supports greater than 16MB */ 776#define CAP_EXTEND 0x8000 /* Extended info appears after description */ 777 778/* Devices Supported - sigWORD dsDeviceSupp; FLAG BITS */ 779#define DEV_DASD 0x0001 /* DASD (hard drives) */ 780#define DEV_TAPE 0x0002 /* Tape drives */ 781#define DEV_PRINTER 0x0004 /* Printers */ 782#define DEV_PROC 0x0008 /* Processors */ 783#define DEV_WORM 0x0010 /* WORM drives */ 784#define DEV_CDROM 0x0020 /* CD-ROM drives */ 785#define DEV_SCANNER 0x0040 /* Scanners */ 786#define DEV_OPTICAL 0x0080 /* Optical Drives */ 787#define DEV_JUKEBOX 0x0100 /* Jukebox */ 788#define DEV_COMM 0x0200 /* Communications Devices */ 789#define DEV_OTHER 0x0400 /* Other Devices */ 790#define DEV_ALL 0xFFFF /* All SCSI Devices */ 791 792/* Adapters Families Supported - sigWORD dsAdapterSupp; FLAG BITS */ 793#define ADF_2001 0x0001 /* PM2001 */ 794#define ADF_2012A 0x0002 /* PM2012A */ 795#define ADF_PLUS_ISA 0x0004 /* PM2011,PM2021 */ 796#define ADF_PLUS_EISA 0x0008 /* PM2012B,PM2022 */ 797#define ADF_SC3_ISA 0x0010 /* PM2021 */ 798#define ADF_SC3_EISA 0x0020 /* PM2022,PM2122, etc */ 799#define ADF_SC3_PCI 0x0040 /* SmartCache III PCI */ 800#define ADF_SC4_ISA 0x0080 /* SmartCache IV ISA */ 801#define ADF_SC4_EISA 0x0100 /* SmartCache IV EISA */ 802#define ADF_SC4_PCI 0x0200 /* SmartCache IV PCI */ 803#define ADF_ALL_MASTER 0xFFFE /* All bus mastering */ 804#define ADF_ALL_CACHE 0xFFFC /* All caching */ 805#define ADF_ALL 0xFFFF /* ALL DPT adapters */ 806 807/* Application - sigWORD dsApplication; FLAG BITS */ 808#define APP_DPTMGR 0x0001 /* DPT Storage Manager */ 809#define APP_ENGINE 0x0002 /* DPT Engine */ 810#define APP_SYTOS 0x0004 /* Sytron Sytos Plus */ 811#define APP_CHEYENNE 0x0008 /* Cheyenne ARCServe + ARCSolo */ 812#define APP_MSCDEX 0x0010 /* Microsoft CD-ROM extensions */ 813#define APP_NOVABACK 0x0020 /* NovaStor Novaback */ 814#define APP_AIM 0x0040 /* Archive Information Manager */ 815 816/* Requirements - sigBYTE dsRequirements; FLAG BITS */ 817#define REQ_SMARTROM 0x01 /* Requires SmartROM to be present */ 818#define REQ_DPTDDL 0x02 /* Requires DPTDDL.SYS to be loaded */ 819#define REQ_HBA_DRIVER 0x04 /* Requires an HBA driver to be loaded */ 820#define REQ_ASPI_TRAN 0x08 /* Requires an ASPI Transport Modules */ 821#define REQ_ENGINE 0x10 /* Requires a DPT Engine to be loaded */ 822#define REQ_COMM_ENG 0x20 /* Requires a DPT Communications Engine */ 823 824typedef struct dpt_sig { 825 char dsSignature[6]; /* ALWAYS "dPtSiG" */ 826 u_int8_t SigVersion; /* signature version (currently 1) */ 827 u_int8_t ProcessorFamily; /* what type of processor */ 828 u_int8_t Processor; /* precise processor */ 829 u_int8_t Filetype; /* type of file */ 830 u_int8_t FiletypeFlags; /* flags to specify load type, etc. */ 831 u_int8_t OEM; /* OEM file was created for */ 832 u_int32_t OS; /* which Operating systems */ 833 u_int16_t Capabilities; /* RAID levels, etc. */ 834 u_int16_t DeviceSupp; /* Types of SCSI devices supported */ 835 u_int16_t AdapterSupp; /* DPT adapter families supported */ 836 u_int16_t Application; /* applications file is for */ 837 u_int8_t Requirements; /* Other driver dependencies */ 838 u_int8_t Version; /* 1 */ 839 u_int8_t Revision; /* 'J' */ 840 u_int8_t SubRevision; /* '9', ' ' if N/A */ 841 u_int8_t Month; /* creation month */ 842 u_int8_t Day; /* creation day */ 843 u_int8_t Year; /* creation year since 1980 */ 844 char *Description; /* description (NULL terminated) */ 845} dpt_sig_t; 846 847/* 32 bytes minimum - with no description. Put NULL at description[0] */ 848/* 81 bytes maximum - with 49 character description plus NULL. */ 849 850/* This line added at Roycroft's request */ 851/* Microsoft's NT compiler gets confused if you do a pack and don't */ 852/* restore it. */ 853typedef struct eata_pass_through { 854 u_int8_t eataID[4]; 855 u_int32_t command; 856 857#define EATAUSRCMD (('D'<<8)|65) /* EATA PassThrough Command */ 858#define DPT_SIGNATURE (('D'<<8)|67) /* Get Signature Structure */ 859#define DPT_NUMCTRLS (('D'<<8)|68) /* Get Number Of DPT Adapters */ 860#define DPT_CTRLINFO (('D'<<8)|69) /* Get Adapter Info Structure */ 861#define DPT_SYSINFO (('D'<<8)|72) /* Get System Info Structure */ 862#define DPT_BLINKLED (('D'<<8)|75) /* Get The BlinkLED Status */ 863 864 u_int8_t *command_buffer; 865 eata_ccb_t command_packet; 866 u_int32_t timeout; 867 u_int8_t host_status; 868 u_int8_t target_status; 869 u_int8_t retries; 870} eata_pt_t; 871 872typedef enum { 873 DCCB_FREE = 0x00, 874 DCCB_ACTIVE = 0x01, 875 DCCB_RELEASE_SIMQ = 0x02 876} dccb_state; 877 878typedef struct dpt_ccb { 879 eata_ccb_t eata_ccb; 880 bus_dmamap_t dmamap; 881 struct callout timer; 882 dpt_sg_t *sg_list; 883 u_int32_t sg_busaddr; 884 dccb_state state; 885 union ccb *ccb; 886 struct scsi_sense_data sense_data; 887 u_int8_t tag; 888 u_int8_t retries; 889 u_int8_t status; /* status of this queueslot */ 890 u_int8_t *cmd; /* address of cmd */ 891 892 u_int32_t transaction_id; 893 u_int32_t result; 894 caddr_t data; 895 SLIST_ENTRY(dpt_ccb) links; 896 897#ifdef DPT_MEASURE_PERFORMANCE 898 u_int32_t submitted_time; 899 struct timeval command_started; 900 struct timeval command_ended; 901#endif 902} dpt_ccb_t; 903 904/* 905 * This is provided for compatibility with UnixWare only. 906 * Some of the fields may be bogus. 907 * Others may have a totally different meaning. 908 */ 909typedef struct dpt_scsi_ha { 910 u_int32_t ha_state; /* Operational state */ 911 u_int8_t ha_id[MAX_CHANNELS]; /* Host adapter SCSI ids */ 912 int32_t ha_base; /* Base I/O address */ 913 int ha_max_jobs; /* Max number of Active Jobs */ 914 int ha_cache:2; /* Cache parameters */ 915 int ha_cachesize:30; /* In meg, only if cache present*/ 916 int ha_nbus; /* Number Of Busses on HBA */ 917 int ha_ntargets; /* Number Of Targets Supported */ 918 int ha_nluns; /* Number Of LUNs Supported */ 919 int ha_tshift; /* Shift value for target */ 920 int ha_bshift; /* Shift value for bus */ 921 int ha_npend; /* # of jobs sent to HBA */ 922 int ha_active_jobs; /* Number Of Active Jobs */ 923 char ha_fw_version[4]; /* Firmware Revision Level */ 924 void *ha_ccb; /* Controller command blocks */ 925 void *ha_cblist; /* Command block free list */ 926 void *ha_dev; /* Logical unit queues */ 927 void *ha_StPkt_lock; /* Status Packet Lock */ 928 void *ha_ccb_lock; /* CCB Lock */ 929 void *ha_LuQWaiting; /* Lu Queue Waiting List */ 930 void *ha_QWait_lock; /* Device Que Waiting Lock */ 931 int ha_QWait_opri; /* Saved Priority Level */ 932#ifdef DPT_TARGET_MODE 933 dpt_ccb_t *target_ccb[MAX_CHANNELS]; /* Command block waiting writebuf */ 934#endif 935} dpt_compat_ha_t; 936 937/* 938 * Describe the Inquiry Data returned on Page 0 from the Adapter. The 939 * Page C1 Inquiry Data is described in the DptConfig_t structure above. 940 */ 941typedef struct { 942 u_int8_t deviceType; 943 u_int8_t rm_dtq; 944 u_int8_t otherData[6]; 945 u_int8_t vendor[8]; 946 u_int8_t modelNum[16]; 947 u_int8_t firmware[4]; 948 u_int8_t protocol[4]; 949} dpt_inq_t; 950 951/* 952 * sp_EOC is not `safe', so I will check sp_Messages[0] instead! 953 */ 954#define DptStat_BUSY(x) ((x)->sp_ID_Message) 955#define DptStat_Reset_BUSY(x) \ 956 ((x)->msg[0] = 0xA5, (x)->EOC = 0, \ 957 (x)->ccb_busaddr = ~0) 958 959#ifdef DPT_MEASURE_PERFORMANCE 960#define BIG_ENOUGH 0x8fffffff 961typedef struct dpt_metrics { 962 u_int32_t command_count[256]; /* We assume MAX 256 SCSI commands */ 963 u_int32_t max_command_time[256]; 964 u_int32_t min_command_time[256]; 965 966 u_int32_t min_intr_time; 967 u_int32_t max_intr_time; 968 u_int32_t aborted_interrupts; 969 u_int32_t spurious_interrupts; 970 971 u_int32_t max_waiting_count; 972 u_int32_t max_submit_count; 973 u_int32_t max_complete_count; 974 975 u_int32_t min_waiting_time; 976 u_int32_t min_submit_time; 977 u_int32_t min_complete_time; 978 979 u_int32_t max_waiting_time; 980 u_int32_t max_submit_time; 981 u_int32_t max_complete_time; 982 983 u_int32_t command_collisions; 984 u_int32_t command_too_busy; 985 u_int32_t max_eata_tries; 986 u_int32_t min_eata_tries; 987 988 u_int32_t read_by_size_count[10]; 989 u_int32_t write_by_size_count[10]; 990 u_int32_t read_by_size_min_time[10]; 991 u_int32_t read_by_size_max_time[10]; 992 u_int32_t write_by_size_min_time[10]; 993 u_int32_t write_by_size_max_time[10]; 994 995#define SIZE_512 0 996#define SIZE_1K 1 997#define SIZE_2K 2 998#define SIZE_4K 3 999#define SIZE_8K 4 1000#define SIZE_16K 5 1001#define SIZE_32K 6 1002#define SIZE_64K 7 1003#define SIZE_BIGGER 8 1004#define SIZE_OTHER 9 1005 1006 struct timeval intr_started; 1007 1008 u_int32_t warm_starts; 1009 u_int32_t cold_boots; 1010} dpt_perf_t; 1011#endif 1012 1013struct sg_map_node { 1014 bus_dmamap_t sg_dmamap; 1015 bus_addr_t sg_physaddr; 1016 dpt_sg_t* sg_vaddr; 1017 SLIST_ENTRY(sg_map_node) links; 1018}; 1019 1020/* Main state machine and interface structure */ 1021typedef struct dpt_softc { 1022 device_t dev; 1023 struct mtx lock; 1024 1025 struct resource * io_res; 1026 int io_rid; 1027 int io_type; 1028 int io_offset; 1029 1030 struct resource * irq_res; 1031 int irq_rid; 1032 void * ih; 1033 1034 struct resource * drq_res; 1035 int drq_rid; 1036 1037 bus_dma_tag_t buffer_dmat; /* dmat for buffer I/O */ 1038 dpt_ccb_t *dpt_dccbs; /* Array of dpt ccbs */ 1039 bus_addr_t dpt_ccb_busbase; /* phys base address of array */ 1040 bus_addr_t dpt_ccb_busend; /* phys end address of array */ 1041 1042 u_int32_t handle_interrupts :1, /* Are we ready for real work? */ 1043 target_mode_enabled :1, 1044 resource_shortage :1, 1045 cache_type :2, 1046 spare :28; 1047 1048 int total_dccbs; 1049 int free_dccbs; 1050 int pending_ccbs; 1051 int completed_ccbs; 1052 1053 SLIST_HEAD(, dpt_ccb) free_dccb_list; 1054 LIST_HEAD(, ccb_hdr) pending_ccb_list; 1055 1056 bus_dma_tag_t parent_dmat; 1057 bus_dma_tag_t dccb_dmat; /* dmat for our ccb array */ 1058 bus_dmamap_t dccb_dmamap; 1059 bus_dma_tag_t sg_dmat; /* dmat for our sg maps */ 1060 SLIST_HEAD(, sg_map_node) sg_maps; 1061 1062 struct cam_sim *sims[MAX_CHANNELS]; 1063 struct cam_path *paths[MAX_CHANNELS]; 1064 u_int32_t commands_processed; 1065 u_int32_t lost_interrupts; 1066 1067 /* 1068 * These three parameters can be used to allow for wide scsi, and 1069 * for host adapters that support multiple busses. The first two 1070 * should be set to 1 more than the actual max id or lun (i.e. 8 for 1071 * normal systems). 1072 * 1073 * There is a FAT assumption here; We assume that these will never 1074 * exceed MAX_CHANNELS, MAX_TARGETS, MAX_LUNS 1075 */ 1076 u_int channels; /* # of avail scsi chan. */ 1077 u_int32_t max_id; 1078 u_int32_t max_lun; 1079 1080 u_int8_t irq; 1081 u_int8_t dma_channel; 1082 1083 TAILQ_ENTRY(dpt_softc) links; 1084 int init_level; 1085 1086 /* 1087 * Every object on a unit can have a receiver, if it treats 1088 * us as a target. We do that so that separate and independent 1089 * clients can consume received buffers. 1090 */ 1091 1092#define DPT_RW_BUFFER_SIZE (8 * 1024) 1093 dpt_ccb_t *target_ccb[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1094 u_int8_t *rw_buffer[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1095 dpt_rec_buff buffer_receiver[MAX_CHANNELS][MAX_TARGETS][MAX_LUNS]; 1096 1097 dpt_inq_t board_data; 1098 u_int8_t EATA_revision; 1099 u_int8_t bustype; /* bustype of HBA */ 1100 u_int32_t state; /* state of HBA */ 1101 1102#define DPT_HA_FREE 0x00000000 1103#define DPT_HA_OK 0x00000000 1104#define DPT_HA_NO_TIMEOUT 0x00000000 1105#define DPT_HA_BUSY 0x00000001 1106#define DPT_HA_TIMEOUT 0x00000002 1107#define DPT_HA_RESET 0x00000004 1108#define DPT_HA_LOCKED 0x00000008 1109#define DPT_HA_ABORTED 0x00000010 1110#define DPT_HA_CONTROL_ACTIVE 0x00000020 1111#define DPT_HA_SHUTDOWN_ACTIVE 0x00000040 1112#define DPT_HA_COMMAND_ACTIVE 0x00000080 1113#define DPT_HA_QUIET 0x00000100 1114 1115 u_int8_t primary; /* true if primary */ 1116 1117 u_int8_t more_support :1, /* HBA supports MORE flag */ 1118 immediate_support :1, /* HBA supports IMMEDIATE */ 1119 broken_INQUIRY :1, /* EISA HBA w/broken INQUIRY */ 1120 spare2 :5; 1121 1122 u_int8_t resetlevel[MAX_CHANNELS]; 1123 u_int32_t last_ccb; /* Last used ccb */ 1124 u_int32_t cplen; /* size of CP in words */ 1125 u_int16_t cppadlen; /* pad length of cp */ 1126 u_int16_t max_dccbs; 1127 u_int16_t sgsize; /* Entries in the SG list */ 1128 u_int8_t hostid[MAX_CHANNELS]; /* SCSI ID of HBA */ 1129 u_int32_t cache_size; 1130 1131 volatile dpt_sp_t *sp; /* status packet */ 1132 /* Copied from the status packet during interrupt handler */ 1133 u_int8_t hba_stat; 1134 u_int8_t scsi_stat; /* Target SCSI status */ 1135 u_int32_t residue_len; /* Number of bytes not transferred */ 1136 bus_addr_t sp_physaddr; /* phys address of status packet */ 1137 1138 /* 1139 * We put ALL conditional elements at the tail for the structure. 1140 * If we do not, then userland code will crash or trash based on which 1141 * kernel it is running with. 1142 * This isi most visible with usr/sbin/dpt_softc(8) 1143 */ 1144 1145#ifdef DPT_MEASURE_PERFORMANCE 1146 dpt_perf_t performance; 1147#endif 1148 1149#ifdef DPT_RESET_HBA 1150 struct timeval last_contact; 1151#endif 1152} dpt_softc_t; 1153 1154/* 1155 * This structure is used to pass dpt_softc contents to userland via the 1156 * ioctl DPT_IOCTL_SOFTC. The reason for this maddness, is that FreeBSD 1157 * (all BSDs ?) chose to actually assign a nasty meaning to the IOCTL word, 1158 * encoding 13 bits of it as size. As dpt_softc_t is somewhere between 1159 * 8,594 and 8,600 (depends on options), we have to copy the data to 1160 * something less than 4KB long. This siliness also solves the problem of 1161 * varying definition of dpt_softc_t, As the variants are exluded from 1162 * dpt_user_softc. 1163 * 1164 * See dpt_softc_t above for enumerations, comments and such. 1165 */ 1166typedef struct dpt_user_softc { 1167 int unit; 1168 u_int32_t handle_interrupts :1, /* Are we ready for real work? */ 1169 target_mode_enabled :1, 1170 spare :30; 1171 1172 int total_ccbs_count; 1173 int free_ccbs_count; 1174 int waiting_ccbs_count; 1175 int submitted_ccbs_count; 1176 int completed_ccbs_count; 1177 1178 u_int32_t queue_status; 1179 u_int32_t free_lock; 1180 u_int32_t waiting_lock; 1181 u_int32_t submitted_lock; 1182 u_int32_t completed_lock; 1183 1184 u_int32_t commands_processed; 1185 u_int32_t lost_interrupts; 1186 1187 u_int8_t channels; 1188 u_int32_t max_id; 1189 u_int32_t max_lun; 1190 1191 u_int16_t io_base; 1192 u_int8_t *v_membase; 1193 u_int8_t *p_membase; 1194 1195 u_int8_t irq; 1196 u_int8_t dma_channel; 1197 1198 dpt_inq_t board_data; 1199 u_int8_t EATA_revision; 1200 u_int8_t bustype; 1201 u_int32_t state; 1202 1203 u_int8_t primary; 1204 u_int8_t more_support :1, 1205 immediate_support :1, 1206 broken_INQUIRY :1, 1207 spare2 :5; 1208 1209 u_int8_t resetlevel[MAX_CHANNELS]; 1210 u_int32_t last_ccb; 1211 u_int32_t cplen; 1212 u_int16_t cppadlen; 1213 u_int16_t queuesize; 1214 u_int16_t sgsize; 1215 u_int8_t hostid[MAX_CHANNELS]; 1216 u_int32_t cache_type :2, 1217 cache_size :30; 1218} dpt_user_softc_t; 1219 1220/* 1221 * Externals: 1222 * These all come from dpt_scsi.c 1223 * 1224 */ 1225#ifdef _KERNEL 1226/* This function gets the current hi-res time and returns it to the caller */ 1227static __inline struct timeval 1228dpt_time_now(void) 1229{ 1230 struct timeval now; 1231 1232 microtime(&now); 1233 return(now); 1234} 1235 1236/* 1237 * Given a minor device number, get its SCSI Unit. 1238 */ 1239static __inline int 1240dpt_minor2unit(int minor) 1241{ 1242 return(minor2hba(minor)); 1243} 1244 1245dpt_softc_t *dpt_minor2softc(int minor_no); 1246 1247#endif /* _KERNEL */ 1248 1249/* 1250 * This function subtracts one timval structure from another, 1251 * Returning the result in usec. 1252 * It assumes that less than 4 billion usecs passed form start to end. 1253 * If times are sensless, ~0 is returned. 1254 */ 1255static __inline u_int32_t 1256dpt_time_delta(struct timeval start, 1257 struct timeval end) 1258{ 1259 if (start.tv_sec > end.tv_sec) 1260 return(~0); 1261 1262 if ( (start.tv_sec == end.tv_sec) && (start.tv_usec > end.tv_usec) ) 1263 return(~0); 1264 1265 return ( (end.tv_sec - start.tv_sec) * 1000000 + 1266 (end.tv_usec - start.tv_usec) ); 1267} 1268 1269extern devclass_t dpt_devclass; 1270 1271#ifdef _KERNEL 1272void dpt_alloc(device_t); 1273int dpt_detach(device_t); 1274int dpt_alloc_resources(device_t); 1275void dpt_release_resources(device_t); 1276#endif 1277void dpt_free(struct dpt_softc *dpt); 1278int dpt_init(struct dpt_softc *dpt); 1279int dpt_attach(dpt_softc_t * dpt); 1280void dpt_intr(void *arg); 1281 1282#ifdef DEV_EISA 1283dpt_conf_t * dpt_pio_get_conf(u_int32_t); 1284#endif 1285 1286#if 0 1287extern void hex_dump(u_char * data, int length, 1288 char *name, int no); 1289extern char *i2bin(unsigned int no, int length); 1290extern char *scsi_cmd_name(u_int8_t cmd); 1291 1292extern dpt_conf_t *dpt_get_conf(dpt_softc_t *dpt, u_int8_t page, 1293 u_int8_t target, u_int8_t size, 1294 int extent); 1295 1296extern int dpt_setup(dpt_softc_t * dpt, dpt_conf_t * conf); 1297extern int dpt_attach(dpt_softc_t * dpt); 1298extern void dpt_shutdown(int howto, dpt_softc_t *dpt); 1299extern void dpt_detect_cache(dpt_softc_t *dpt); 1300 1301extern int dpt_user_cmd(dpt_softc_t *dpt, eata_pt_t *user_cmd, 1302 caddr_t cmdarg, int minor_no); 1303 1304extern u_int8_t dpt_blinking_led(dpt_softc_t *dpt); 1305 1306extern dpt_rb_t dpt_register_buffer(int unit, u_int8_t channel, u_int8_t target, 1307 u_int8_t lun, u_int8_t mode, 1308 u_int16_t length, u_int16_t offset, 1309 dpt_rec_buff callback, dpt_rb_op_t op); 1310 1311extern int dpt_send_buffer(int unit, u_int8_t channel, u_int8_t target, 1312 u_int8_t lun, u_int8_t mode, u_int16_t length, 1313 u_int16_t offset, void *data, 1314 buff_wr_done callback); 1315 1316 1317 1318void dpt_reset_performance(dpt_softc_t *dpt); 1319#endif 1320 1321#endif /* _DPT_H */ 1322