common.h revision 331722
1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: stable/11/sys/dev/cxgbe/common/common.h 331722 2018-03-29 02:50:57Z eadler $ 27 * 28 */ 29 30#ifndef __CHELSIO_COMMON_H 31#define __CHELSIO_COMMON_H 32 33#include "t4_hw.h" 34 35#define GLBL_INTR_MASK (F_CIM | F_MPS | F_PL | F_PCIE | F_MC0 | F_EDC0 | \ 36 F_EDC1 | F_LE | F_TP | F_MA | F_PM_TX | F_PM_RX | F_ULP_RX | \ 37 F_CPL_SWITCH | F_SGE | F_ULP_TX) 38 39enum { 40 MAX_NPORTS = 4, /* max # of ports */ 41 SERNUM_LEN = 24, /* Serial # length */ 42 EC_LEN = 16, /* E/C length */ 43 ID_LEN = 16, /* ID length */ 44 PN_LEN = 16, /* Part Number length */ 45 MD_LEN = 16, /* MFG diags version length */ 46 MACADDR_LEN = 12, /* MAC Address length */ 47}; 48 49enum { 50 T4_REGMAP_SIZE = (160 * 1024), 51 T5_REGMAP_SIZE = (332 * 1024), 52}; 53 54enum { MEM_EDC0, MEM_EDC1, MEM_MC, MEM_MC0 = MEM_MC, MEM_MC1 }; 55 56enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST }; 57 58enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR }; 59 60enum { 61 PAUSE_RX = 1 << 0, 62 PAUSE_TX = 1 << 1, 63 PAUSE_AUTONEG = 1 << 2 64}; 65 66enum { 67 FEC_RS = 1 << 0, 68 FEC_BASER_RS = 1 << 1, 69 FEC_RESERVED = 1 << 2, 70}; 71 72struct port_stats { 73 u64 tx_octets; /* total # of octets in good frames */ 74 u64 tx_frames; /* all good frames */ 75 u64 tx_bcast_frames; /* all broadcast frames */ 76 u64 tx_mcast_frames; /* all multicast frames */ 77 u64 tx_ucast_frames; /* all unicast frames */ 78 u64 tx_error_frames; /* all error frames */ 79 80 u64 tx_frames_64; /* # of Tx frames in a particular range */ 81 u64 tx_frames_65_127; 82 u64 tx_frames_128_255; 83 u64 tx_frames_256_511; 84 u64 tx_frames_512_1023; 85 u64 tx_frames_1024_1518; 86 u64 tx_frames_1519_max; 87 88 u64 tx_drop; /* # of dropped Tx frames */ 89 u64 tx_pause; /* # of transmitted pause frames */ 90 u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */ 91 u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */ 92 u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */ 93 u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */ 94 u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */ 95 u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */ 96 u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */ 97 u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */ 98 99 u64 rx_octets; /* total # of octets in good frames */ 100 u64 rx_frames; /* all good frames */ 101 u64 rx_bcast_frames; /* all broadcast frames */ 102 u64 rx_mcast_frames; /* all multicast frames */ 103 u64 rx_ucast_frames; /* all unicast frames */ 104 u64 rx_too_long; /* # of frames exceeding MTU */ 105 u64 rx_jabber; /* # of jabber frames */ 106 u64 rx_fcs_err; /* # of received frames with bad FCS */ 107 u64 rx_len_err; /* # of received frames with length error */ 108 u64 rx_symbol_err; /* symbol errors */ 109 u64 rx_runt; /* # of short frames */ 110 111 u64 rx_frames_64; /* # of Rx frames in a particular range */ 112 u64 rx_frames_65_127; 113 u64 rx_frames_128_255; 114 u64 rx_frames_256_511; 115 u64 rx_frames_512_1023; 116 u64 rx_frames_1024_1518; 117 u64 rx_frames_1519_max; 118 119 u64 rx_pause; /* # of received pause frames */ 120 u64 rx_ppp0; /* # of received PPP prio 0 frames */ 121 u64 rx_ppp1; /* # of received PPP prio 1 frames */ 122 u64 rx_ppp2; /* # of received PPP prio 2 frames */ 123 u64 rx_ppp3; /* # of received PPP prio 3 frames */ 124 u64 rx_ppp4; /* # of received PPP prio 4 frames */ 125 u64 rx_ppp5; /* # of received PPP prio 5 frames */ 126 u64 rx_ppp6; /* # of received PPP prio 6 frames */ 127 u64 rx_ppp7; /* # of received PPP prio 7 frames */ 128 129 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */ 130 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */ 131 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */ 132 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */ 133 u64 rx_trunc0; /* buffer-group 0 truncated packets */ 134 u64 rx_trunc1; /* buffer-group 1 truncated packets */ 135 u64 rx_trunc2; /* buffer-group 2 truncated packets */ 136 u64 rx_trunc3; /* buffer-group 3 truncated packets */ 137}; 138 139struct lb_port_stats { 140 u64 octets; 141 u64 frames; 142 u64 bcast_frames; 143 u64 mcast_frames; 144 u64 ucast_frames; 145 u64 error_frames; 146 147 u64 frames_64; 148 u64 frames_65_127; 149 u64 frames_128_255; 150 u64 frames_256_511; 151 u64 frames_512_1023; 152 u64 frames_1024_1518; 153 u64 frames_1519_max; 154 155 u64 drop; 156 157 u64 ovflow0; 158 u64 ovflow1; 159 u64 ovflow2; 160 u64 ovflow3; 161 u64 trunc0; 162 u64 trunc1; 163 u64 trunc2; 164 u64 trunc3; 165}; 166 167struct tp_tcp_stats { 168 u32 tcp_out_rsts; 169 u64 tcp_in_segs; 170 u64 tcp_out_segs; 171 u64 tcp_retrans_segs; 172}; 173 174struct tp_usm_stats { 175 u32 frames; 176 u32 drops; 177 u64 octets; 178}; 179 180struct tp_fcoe_stats { 181 u32 frames_ddp; 182 u32 frames_drop; 183 u64 octets_ddp; 184}; 185 186struct tp_err_stats { 187 u32 mac_in_errs[MAX_NCHAN]; 188 u32 hdr_in_errs[MAX_NCHAN]; 189 u32 tcp_in_errs[MAX_NCHAN]; 190 u32 tnl_cong_drops[MAX_NCHAN]; 191 u32 ofld_chan_drops[MAX_NCHAN]; 192 u32 tnl_tx_drops[MAX_NCHAN]; 193 u32 ofld_vlan_drops[MAX_NCHAN]; 194 u32 tcp6_in_errs[MAX_NCHAN]; 195 u32 ofld_no_neigh; 196 u32 ofld_cong_defer; 197}; 198 199struct tp_proxy_stats { 200 u32 proxy[MAX_NCHAN]; 201}; 202 203struct tp_cpl_stats { 204 u32 req[MAX_NCHAN]; 205 u32 rsp[MAX_NCHAN]; 206}; 207 208struct tp_rdma_stats { 209 u32 rqe_dfr_pkt; 210 u32 rqe_dfr_mod; 211}; 212 213struct sge_params { 214 int timer_val[SGE_NTIMERS]; /* final, scaled values */ 215 int counter_val[SGE_NCOUNTERS]; 216 int fl_starve_threshold; 217 int fl_starve_threshold2; 218 int page_shift; 219 int eq_s_qpp; 220 int iq_s_qpp; 221 int spg_len; 222 int pad_boundary; 223 int pack_boundary; 224 int fl_pktshift; 225 u32 sge_control; 226 u32 sge_fl_buffer_size[SGE_FLBUF_SIZES]; 227}; 228 229struct tp_params { 230 unsigned int tre; /* log2 of core clocks per TP tick */ 231 unsigned int dack_re; /* DACK timer resolution */ 232 unsigned int la_mask; /* what events are recorded by TP LA */ 233 unsigned short tx_modq[MAX_NCHAN]; /* channel to modulation queue map */ 234 235 uint32_t vlan_pri_map; 236 uint32_t ingress_config; 237 __be16 err_vec_mask; 238 239 int8_t fcoe_shift; 240 int8_t port_shift; 241 int8_t vnic_shift; 242 int8_t vlan_shift; 243 int8_t tos_shift; 244 int8_t protocol_shift; 245 int8_t ethertype_shift; 246 int8_t macmatch_shift; 247 int8_t matchtype_shift; 248 int8_t frag_shift; 249}; 250 251struct vpd_params { 252 unsigned int cclk; 253 u8 ec[EC_LEN + 1]; 254 u8 sn[SERNUM_LEN + 1]; 255 u8 id[ID_LEN + 1]; 256 u8 pn[PN_LEN + 1]; 257 u8 na[MACADDR_LEN + 1]; 258 u8 md[MD_LEN + 1]; 259}; 260 261struct pci_params { 262 unsigned int vpd_cap_addr; 263 unsigned int mps; 264 unsigned short speed; 265 unsigned short width; 266}; 267 268/* 269 * Firmware device log. 270 */ 271struct devlog_params { 272 u32 memtype; /* which memory (FW_MEMTYPE_* ) */ 273 u32 start; /* start of log in firmware memory */ 274 u32 size; /* size of log */ 275 u32 addr; /* start address in flat addr space */ 276}; 277 278/* Stores chip specific parameters */ 279struct chip_params { 280 u8 nchan; 281 u8 pm_stats_cnt; 282 u8 cng_ch_bits_log; /* congestion channel map bits width */ 283 u8 nsched_cls; 284 u8 cim_num_obq; 285 u16 mps_rplc_size; 286 u16 vfcount; 287 u32 sge_fl_db; 288 u16 mps_tcam_size; 289}; 290 291/* VF-only parameters. */ 292 293/* 294 * Global Receive Side Scaling (RSS) parameters in host-native format. 295 */ 296struct rss_params { 297 unsigned int mode; /* RSS mode */ 298 union { 299 struct { 300 u_int synmapen:1; /* SYN Map Enable */ 301 u_int syn4tupenipv6:1; /* enable hashing 4-tuple IPv6 SYNs */ 302 u_int syn2tupenipv6:1; /* enable hashing 2-tuple IPv6 SYNs */ 303 u_int syn4tupenipv4:1; /* enable hashing 4-tuple IPv4 SYNs */ 304 u_int syn2tupenipv4:1; /* enable hashing 2-tuple IPv4 SYNs */ 305 u_int ofdmapen:1; /* Offload Map Enable */ 306 u_int tnlmapen:1; /* Tunnel Map Enable */ 307 u_int tnlalllookup:1; /* Tunnel All Lookup */ 308 u_int hashtoeplitz:1; /* use Toeplitz hash */ 309 } basicvirtual; 310 } u; 311}; 312 313/* 314 * Maximum resources provisioned for a PCI VF. 315 */ 316struct vf_resources { 317 unsigned int nvi; /* N virtual interfaces */ 318 unsigned int neq; /* N egress Qs */ 319 unsigned int nethctrl; /* N egress ETH or CTRL Qs */ 320 unsigned int niqflint; /* N ingress Qs/w free list(s) & intr */ 321 unsigned int niq; /* N ingress Qs */ 322 unsigned int tc; /* PCI-E traffic class */ 323 unsigned int pmask; /* port access rights mask */ 324 unsigned int nexactf; /* N exact MPS filters */ 325 unsigned int r_caps; /* read capabilities */ 326 unsigned int wx_caps; /* write/execute capabilities */ 327}; 328 329struct adapter_params { 330 struct sge_params sge; 331 struct tp_params tp; /* PF-only */ 332 struct vpd_params vpd; 333 struct pci_params pci; 334 struct devlog_params devlog; /* PF-only */ 335 struct rss_params rss; /* VF-only */ 336 struct vf_resources vfres; /* VF-only */ 337 unsigned int core_vdd; 338 339 unsigned int sf_size; /* serial flash size in bytes */ 340 unsigned int sf_nsec; /* # of flash sectors */ 341 342 unsigned int fw_vers; /* firmware version */ 343 unsigned int bs_vers; /* bootstrap version */ 344 unsigned int tp_vers; /* TP microcode version */ 345 unsigned int er_vers; /* expansion ROM version */ 346 unsigned int scfg_vers; /* Serial Configuration version */ 347 unsigned int vpd_vers; /* VPD version */ 348 349 unsigned short mtus[NMTUS]; 350 unsigned short a_wnd[NCCTRL_WIN]; 351 unsigned short b_wnd[NCCTRL_WIN]; 352 353 u_int ftid_min; 354 u_int ftid_max; 355 u_int etid_min; 356 u_int netids; 357 358 unsigned int cim_la_size; 359 360 uint8_t nports; /* # of ethernet ports */ 361 uint8_t portvec; 362 unsigned int chipid:4; /* chip ID. T4 = 4, T5 = 5, ... */ 363 unsigned int rev:4; /* chip revision */ 364 unsigned int fpga:1; /* this is an FPGA */ 365 unsigned int offload:1; /* hw is TOE capable, fw has divvied up card 366 resources for TOE operation. */ 367 unsigned int bypass:1; /* this is a bypass card */ 368 unsigned int ethoffload:1; 369 370 unsigned int ofldq_wr_cred; 371 unsigned int eo_wr_cred; 372 373 unsigned int max_ordird_qp; 374 unsigned int max_ird_adapter; 375 376 uint32_t mps_bg_map; /* rx buffer group map for all ports (upto 4) */ 377}; 378 379#define CHELSIO_T4 0x4 380#define CHELSIO_T5 0x5 381#define CHELSIO_T6 0x6 382 383/* 384 * State needed to monitor the forward progress of SGE Ingress DMA activities 385 * and possible hangs. 386 */ 387struct sge_idma_monitor_state { 388 unsigned int idma_1s_thresh; /* 1s threshold in Core Clock ticks */ 389 unsigned int idma_stalled[2]; /* synthesized stalled timers in HZ */ 390 unsigned int idma_state[2]; /* IDMA Hang detect state */ 391 unsigned int idma_qid[2]; /* IDMA Hung Ingress Queue ID */ 392 unsigned int idma_warn[2]; /* time to warning in HZ */ 393}; 394 395struct trace_params { 396 u32 data[TRACE_LEN / 4]; 397 u32 mask[TRACE_LEN / 4]; 398 unsigned short snap_len; 399 unsigned short min_len; 400 unsigned char skip_ofst; 401 unsigned char skip_len; 402 unsigned char invert; 403 unsigned char port; 404}; 405 406struct link_config { 407 /* OS-specific code owns all the requested_* fields */ 408 unsigned char requested_aneg; /* link aneg user has requested */ 409 unsigned char requested_fc; /* flow control user has requested */ 410 unsigned char requested_fec; /* FEC user has requested */ 411 unsigned int requested_speed; /* speed user has requested */ 412 413 unsigned short supported; /* link capabilities */ 414 unsigned short advertising; /* advertised capabilities */ 415 unsigned short lp_advertising; /* peer advertised capabilities */ 416 unsigned int speed; /* actual link speed */ 417 unsigned char fc; /* actual link flow control */ 418 unsigned char fec; /* actual FEC */ 419 unsigned char link_ok; /* link up? */ 420 unsigned char link_down_rc; /* link down reason */ 421}; 422 423#include "adapter.h" 424 425#ifndef PCI_VENDOR_ID_CHELSIO 426# define PCI_VENDOR_ID_CHELSIO 0x1425 427#endif 428 429#define for_each_port(adapter, iter) \ 430 for (iter = 0; iter < (adapter)->params.nports; ++iter) 431 432static inline int is_ftid(const struct adapter *sc, u_int tid) 433{ 434 435 return (tid >= sc->params.ftid_min && tid <= sc->params.ftid_max); 436} 437 438static inline int is_etid(const struct adapter *sc, u_int tid) 439{ 440 441 return (tid >= sc->params.etid_min); 442} 443 444static inline int is_offload(const struct adapter *adap) 445{ 446 return adap->params.offload; 447} 448 449static inline int is_ethoffload(const struct adapter *adap) 450{ 451 return adap->params.ethoffload; 452} 453 454static inline int chip_id(struct adapter *adap) 455{ 456 return adap->params.chipid; 457} 458 459static inline int chip_rev(struct adapter *adap) 460{ 461 return adap->params.rev; 462} 463 464static inline int is_t4(struct adapter *adap) 465{ 466 return adap->params.chipid == CHELSIO_T4; 467} 468 469static inline int is_t5(struct adapter *adap) 470{ 471 return adap->params.chipid == CHELSIO_T5; 472} 473 474static inline int is_t6(struct adapter *adap) 475{ 476 return adap->params.chipid == CHELSIO_T6; 477} 478 479static inline int is_fpga(struct adapter *adap) 480{ 481 return adap->params.fpga; 482} 483 484static inline unsigned int core_ticks_per_usec(const struct adapter *adap) 485{ 486 return adap->params.vpd.cclk / 1000; 487} 488 489static inline unsigned int us_to_core_ticks(const struct adapter *adap, 490 unsigned int us) 491{ 492 return (us * adap->params.vpd.cclk) / 1000; 493} 494 495static inline unsigned int core_ticks_to_us(const struct adapter *adapter, 496 unsigned int ticks) 497{ 498 /* add Core Clock / 2 to round ticks to nearest uS */ 499 return ((ticks * 1000 + adapter->params.vpd.cclk/2) / 500 adapter->params.vpd.cclk); 501} 502 503static inline unsigned int dack_ticks_to_usec(const struct adapter *adap, 504 unsigned int ticks) 505{ 506 return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap); 507} 508 509static inline u_int us_to_tcp_ticks(const struct adapter *adap, u_long us) 510{ 511 512 return (us * adap->params.vpd.cclk / 1000 >> adap->params.tp.tre); 513} 514 515void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val); 516 517int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd, 518 int size, void *rpl, bool sleep_ok, int timeout); 519int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, 520 void *rpl, bool sleep_ok); 521 522static inline int t4_wr_mbox_timeout(struct adapter *adap, int mbox, 523 const void *cmd, int size, void *rpl, 524 int timeout) 525{ 526 return t4_wr_mbox_meat_timeout(adap, mbox, cmd, size, rpl, true, 527 timeout); 528} 529 530static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, 531 int size, void *rpl) 532{ 533 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true); 534} 535 536static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd, 537 int size, void *rpl) 538{ 539 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false); 540} 541 542void t4_read_indirect(struct adapter *adap, unsigned int addr_reg, 543 unsigned int data_reg, u32 *vals, unsigned int nregs, 544 unsigned int start_idx); 545void t4_write_indirect(struct adapter *adap, unsigned int addr_reg, 546 unsigned int data_reg, const u32 *vals, 547 unsigned int nregs, unsigned int start_idx); 548 549u32 t4_hw_pci_read_cfg4(adapter_t *adapter, int reg); 550 551struct fw_filter_wr; 552 553void t4_intr_enable(struct adapter *adapter); 554void t4_intr_disable(struct adapter *adapter); 555void t4_intr_clear(struct adapter *adapter); 556int t4_slow_intr_handler(struct adapter *adapter); 557 558int t4_hash_mac_addr(const u8 *addr); 559int t4_link_l1cfg(struct adapter *adap, unsigned int mbox, unsigned int port, 560 struct link_config *lc); 561int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port); 562int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data); 563int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data); 564int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz); 565int t4_seeprom_wp(struct adapter *adapter, int enable); 566int t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords, 567 u32 *data, int byte_oriented); 568int t4_write_flash(struct adapter *adapter, unsigned int addr, 569 unsigned int n, const u8 *data, int byte_oriented); 570int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); 571int t4_fwcache(struct adapter *adap, enum fw_params_param_dev_fwcache op); 572int t5_fw_init_extern_mem(struct adapter *adap); 573int t4_load_bootcfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); 574int t4_load_boot(struct adapter *adap, u8 *boot_data, 575 unsigned int boot_addr, unsigned int size); 576int t4_flash_erase_sectors(struct adapter *adapter, int start, int end); 577int t4_flash_cfg_addr(struct adapter *adapter); 578int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); 579int t4_get_fw_version(struct adapter *adapter, u32 *vers); 580int t4_get_bs_version(struct adapter *adapter, u32 *vers); 581int t4_get_tp_version(struct adapter *adapter, u32 *vers); 582int t4_get_exprom_version(struct adapter *adapter, u32 *vers); 583int t4_get_scfg_version(struct adapter *adapter, u32 *vers); 584int t4_get_vpd_version(struct adapter *adapter, u32 *vers); 585int t4_get_version_info(struct adapter *adapter); 586int t4_init_hw(struct adapter *adapter, u32 fw_params); 587const struct chip_params *t4_get_chip_params(int chipid); 588int t4_prep_adapter(struct adapter *adapter, u32 *buf); 589int t4_shutdown_adapter(struct adapter *adapter); 590int t4_init_devlog_params(struct adapter *adapter, int fw_attach); 591int t4_init_sge_params(struct adapter *adapter); 592int t4_init_tp_params(struct adapter *adap, bool sleep_ok); 593int t4_filter_field_shift(const struct adapter *adap, int filter_sel); 594int t4_port_init(struct adapter *adap, int mbox, int pf, int vf, int port_id); 595void t4_fatal_err(struct adapter *adapter); 596void t4_db_full(struct adapter *adapter); 597void t4_db_dropped(struct adapter *adapter); 598int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp, 599 int filter_index, int enable); 600void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp, 601 int filter_index, int *enabled); 602int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, 603 int start, int n, const u16 *rspq, unsigned int nrspq); 604int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, 605 unsigned int flags); 606int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid, 607 unsigned int flags, unsigned int defq, unsigned int skeyidx, 608 unsigned int skey); 609int t4_read_rss(struct adapter *adapter, u16 *entries); 610void t4_read_rss_key(struct adapter *adapter, u32 *key, bool sleep_ok); 611void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx, 612 bool sleep_ok); 613void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, 614 u32 *valp, bool sleep_ok); 615void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index, 616 u32 val, bool sleep_ok); 617void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index, 618 u32 *vfl, u32 *vfh, bool sleep_ok); 619void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index, 620 u32 vfl, u32 vfh, bool sleep_ok); 621u32 t4_read_rss_pf_map(struct adapter *adapter, bool sleep_ok); 622void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap, bool sleep_ok); 623u32 t4_read_rss_pf_mask(struct adapter *adapter, bool sleep_ok); 624void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask, bool sleep_ok); 625int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask); 626void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 627void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 628void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres); 629int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); 630int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); 631int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n, 632 unsigned int *valp); 633int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n, 634 const unsigned int *valp); 635int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n, 636 unsigned int *valp); 637int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr); 638void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp, 639 unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr); 640void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp); 641int t4_get_flash_params(struct adapter *adapter); 642 643u32 t4_read_pcie_cfg4(struct adapter *adap, int reg, int drv_fw_attach); 644int t4_mc_read(struct adapter *adap, int idx, u32 addr, 645 __be32 *data, u64 *parity); 646int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity); 647int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size, 648 __be32 *data); 649void t4_idma_monitor_init(struct adapter *adapter, 650 struct sge_idma_monitor_state *idma); 651void t4_idma_monitor(struct adapter *adapter, 652 struct sge_idma_monitor_state *idma, 653 int hz, int ticks); 654 655unsigned int t4_get_regs_len(struct adapter *adapter); 656void t4_get_regs(struct adapter *adap, u8 *buf, size_t buf_size); 657 658const char *t4_get_port_type_description(enum fw_port_type port_type); 659void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p); 660void t4_get_port_stats_offset(struct adapter *adap, int idx, 661 struct port_stats *stats, 662 struct port_stats *offset); 663void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p); 664void t4_clr_port_stats(struct adapter *adap, int idx); 665 666void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log); 667void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]); 668void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]); 669void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps, 670 unsigned int *ipg, bool sleep_ok); 671void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr, 672 unsigned int mask, unsigned int val); 673void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr); 674void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st, 675 bool sleep_ok); 676void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st, 677 bool sleep_ok); 678void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st, 679 bool sleep_ok); 680void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st, 681 bool sleep_ok); 682void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st, 683 bool sleep_ok); 684void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4, 685 struct tp_tcp_stats *v6, bool sleep_ok); 686void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx, 687 struct tp_fcoe_stats *st, bool sleep_ok); 688void t4_load_mtus(struct adapter *adap, const unsigned short *mtus, 689 const unsigned short *alpha, const unsigned short *beta); 690 691void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf); 692 693int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps); 694int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg); 695int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals, 696 unsigned int start, unsigned int n); 697void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate); 698int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map, 699 bool sleep_ok); 700void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid); 701 702void t4_wol_magic_enable(struct adapter *adap, unsigned int port, const u8 *addr); 703int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, 704 u64 mask0, u64 mask1, unsigned int crc, bool enable); 705 706int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox, 707 enum dev_master master, enum dev_state *state); 708int t4_fw_bye(struct adapter *adap, unsigned int mbox); 709int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset); 710int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force); 711int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset); 712int t4_fw_upgrade(struct adapter *adap, unsigned int mbox, 713 const u8 *fw_data, unsigned int size, int force); 714int t4_fw_forceinstall(struct adapter *adap, const u8 *fw_data, 715 unsigned int size); 716int t4_fw_initialize(struct adapter *adap, unsigned int mbox); 717int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 718 unsigned int vf, unsigned int nparams, const u32 *params, 719 u32 *val); 720int t4_query_params_rw(struct adapter *adap, unsigned int mbox, unsigned int pf, 721 unsigned int vf, unsigned int nparams, const u32 *params, 722 u32 *val, int rw); 723int t4_set_params_timeout(struct adapter *adap, unsigned int mbox, 724 unsigned int pf, unsigned int vf, 725 unsigned int nparams, const u32 *params, 726 const u32 *val, int timeout); 727int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 728 unsigned int vf, unsigned int nparams, const u32 *params, 729 const u32 *val); 730int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, 731 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl, 732 unsigned int rxqi, unsigned int rxq, unsigned int tc, 733 unsigned int vi, unsigned int cmask, unsigned int pmask, 734 unsigned int exactf, unsigned int rcaps, unsigned int wxcaps); 735int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox, 736 unsigned int port, unsigned int pf, unsigned int vf, 737 unsigned int nmac, u8 *mac, u16 *rss_size, 738 unsigned int portfunc, unsigned int idstype); 739int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port, 740 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac, 741 u16 *rss_size); 742int t4_free_vi(struct adapter *adap, unsigned int mbox, 743 unsigned int pf, unsigned int vf, 744 unsigned int viid); 745int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid, 746 int mtu, int promisc, int all_multi, int bcast, int vlanex, 747 bool sleep_ok); 748int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid, 749 bool free, unsigned int naddr, const u8 **addr, u16 *idx, 750 u64 *hash, bool sleep_ok); 751int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid, 752 int idx, const u8 *addr, bool persist, bool add_smt); 753int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid, 754 bool ucast, u64 vec, bool sleep_ok); 755int t4_enable_vi_params(struct adapter *adap, unsigned int mbox, 756 unsigned int viid, bool rx_en, bool tx_en, bool dcb_en); 757int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid, 758 bool rx_en, bool tx_en); 759int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, 760 unsigned int nblinks); 761int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 762 unsigned int mmd, unsigned int reg, unsigned int *valp); 763int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 764 unsigned int mmd, unsigned int reg, unsigned int val); 765int t4_i2c_rd(struct adapter *adap, unsigned int mbox, 766 int port, unsigned int devid, 767 unsigned int offset, unsigned int len, 768 u8 *buf); 769int t4_i2c_wr(struct adapter *adap, unsigned int mbox, 770 int port, unsigned int devid, 771 unsigned int offset, unsigned int len, 772 u8 *buf); 773int t4_iq_stop(struct adapter *adap, unsigned int mbox, unsigned int pf, 774 unsigned int vf, unsigned int iqtype, unsigned int iqid, 775 unsigned int fl0id, unsigned int fl1id); 776int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 777 unsigned int vf, unsigned int iqtype, unsigned int iqid, 778 unsigned int fl0id, unsigned int fl1id); 779int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 780 unsigned int vf, unsigned int eqid); 781int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 782 unsigned int vf, unsigned int eqid); 783int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 784 unsigned int vf, unsigned int eqid); 785int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid, 786 enum ctxt_type ctype, u32 *data); 787int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype, 788 u32 *data); 789int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox); 790const char *t4_link_down_rc_str(unsigned char link_down_rc); 791int t4_update_port_info(struct port_info *pi); 792int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl); 793int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val); 794int t4_sched_config(struct adapter *adapter, int type, int minmaxen, 795 int sleep_ok); 796int t4_sched_params(struct adapter *adapter, int type, int level, int mode, 797 int rateunit, int ratemode, int channel, int cl, 798 int minrate, int maxrate, int weight, int pktsize, 799 int sleep_ok); 800int t4_sched_params_ch_rl(struct adapter *adapter, int channel, int ratemode, 801 unsigned int maxrate, int sleep_ok); 802int t4_sched_params_cl_wrr(struct adapter *adapter, int channel, int cl, 803 int weight, int sleep_ok); 804int t4_sched_params_cl_rl_kbps(struct adapter *adapter, int channel, int cl, 805 int mode, unsigned int maxrate, int pktsize, 806 int sleep_ok); 807int t4_config_watchdog(struct adapter *adapter, unsigned int mbox, 808 unsigned int pf, unsigned int vf, 809 unsigned int timeout, unsigned int action); 810int t4_get_devlog_level(struct adapter *adapter, unsigned int *level); 811int t4_set_devlog_level(struct adapter *adapter, unsigned int level); 812void t4_sge_decode_idma_state(struct adapter *adapter, int state); 813 814void t4_tp_pio_read(struct adapter *adap, u32 *buff, u32 nregs, 815 u32 start_index, bool sleep_ok); 816void t4_tp_pio_write(struct adapter *adap, const u32 *buff, u32 nregs, 817 u32 start_index, bool sleep_ok); 818void t4_tp_tm_pio_read(struct adapter *adap, u32 *buff, u32 nregs, 819 u32 start_index, bool sleep_ok); 820void t4_tp_mib_read(struct adapter *adap, u32 *buff, u32 nregs, 821 u32 start_index, bool sleep_ok); 822 823static inline int t4vf_query_params(struct adapter *adapter, 824 unsigned int nparams, const u32 *params, 825 u32 *vals) 826{ 827 return t4_query_params(adapter, 0, 0, 0, nparams, params, vals); 828} 829 830static inline int t4vf_set_params(struct adapter *adapter, 831 unsigned int nparams, const u32 *params, 832 const u32 *vals) 833{ 834 return t4_set_params(adapter, 0, 0, 0, nparams, params, vals); 835} 836 837static inline int t4vf_wr_mbox(struct adapter *adap, const void *cmd, 838 int size, void *rpl) 839{ 840 return t4_wr_mbox(adap, adap->mbox, cmd, size, rpl); 841} 842 843int t4vf_wait_dev_ready(struct adapter *adapter); 844int t4vf_fw_reset(struct adapter *adapter); 845int t4vf_get_sge_params(struct adapter *adapter); 846int t4vf_get_rss_glb_config(struct adapter *adapter); 847int t4vf_get_vfres(struct adapter *adapter); 848int t4vf_prep_adapter(struct adapter *adapter); 849 850#endif /* __CHELSIO_COMMON_H */ 851