bktr_reg.h revision 331722
1/*- 2 * $FreeBSD: stable/11/sys/dev/bktr/bktr_reg.h 331722 2018-03-29 02:50:57Z eadler $ 3 * 4 * Copyright (c) 1999 Roger Hardiman 5 * Copyright (c) 1998 Amancio Hasty 6 * Copyright (c) 1995 Mark Tinguely and Jim Lowe 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Mark Tinguely and Jim Lowe 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 31 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 32 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 * 35 */ 36 37#ifdef __NetBSD__ 38#include <machine/bus.h> /* struct device */ 39#include <sys/device.h> 40#include <sys/select.h> /* struct selinfo */ 41# ifdef DEBUG 42# define bootverbose 1 43# else 44# define bootverbose 0 45# endif 46#endif 47 48/* 49 * The kernel options for the driver now all begin with BKTR. 50 * Support the older kernel options on FreeBSD and OpenBSD. 51 * 52 */ 53#if defined(__FreeBSD__) || defined(__OpenBSD__) 54#if defined(BROOKTREE_ALLOC_PAGES) 55#define BKTR_ALLOC_PAGES BROOKTREE_ALLOC_PAGES 56#endif 57 58#if defined(BROOKTREE_SYSTEM_DEFAULT) 59#define BKTR_SYSTEM_DEFAULT BROOKTREE_SYSTEM_DEFAULT 60#endif 61 62#if defined(OVERRIDE_CARD) 63#define BKTR_OVERRIDE_CARD OVERRIDE_CARD 64#endif 65 66#if defined(OVERRIDE_TUNER) 67#define BKTR_OVERRIDE_TUNER OVERRIDE_TUNER 68#endif 69 70#if defined(OVERRIDE_DBX) 71#define BKTR_OVERRIDE_DBX OVERRIDE_DBX 72#endif 73 74#if defined(OVERRIDE_MSP) 75#define BKTR_OVERRIDE_MSP OVERRIDE_MSP 76#endif 77 78#endif 79 80 81#ifndef PCI_LATENCY_TIMER 82#define PCI_LATENCY_TIMER 0x0c /* pci timer register */ 83#endif 84 85/* 86 * Definitions for the Brooktree 848/878 video capture to pci interface. 87 */ 88#ifndef __NetBSD__ 89#define PCI_VENDOR_SHIFT 0 90#define PCI_VENDOR_MASK 0xffff 91#define PCI_VENDOR(id) \ 92 (((id) >> PCI_VENDOR_SHIFT) & PCI_VENDOR_MASK) 93 94#define PCI_PRODUCT_SHIFT 16 95#define PCI_PRODUCT_MASK 0xffff 96#define PCI_PRODUCT(id) \ 97 (((id) >> PCI_PRODUCT_SHIFT) & PCI_PRODUCT_MASK) 98 99/* PCI vendor ID */ 100#define PCI_VENDOR_BROOKTREE 0x109e /* Brooktree */ 101/* Brooktree products */ 102#define PCI_PRODUCT_BROOKTREE_BT848 0x0350 /* Bt848 Video Capture */ 103#define PCI_PRODUCT_BROOKTREE_BT849 0x0351 /* Bt849 Video Capture */ 104#define PCI_PRODUCT_BROOKTREE_BT878 0x036e /* Bt878 Video Capture */ 105#define PCI_PRODUCT_BROOKTREE_BT879 0x036f /* Bt879 Video Capture */ 106#endif 107 108#define BROOKTREE_848 1 109#define BROOKTREE_848A 2 110#define BROOKTREE_849A 3 111#define BROOKTREE_878 4 112#define BROOKTREE_879 5 113 114typedef volatile u_int bregister_t; 115/* 116 * if other persuasion endian, then compiler will probably require that 117 * these next 118 * macros be reversed 119 */ 120#define BTBYTE(what) bregister_t what:8; int :24 121#define BTWORD(what) bregister_t what:16; int: 16 122#define BTLONG(what) bregister_t what:32 123 124struct bt848_registers { 125 BTBYTE (dstatus); /* 0, 1,2,3 */ 126#define BT848_DSTATUS_PRES (1<<7) 127#define BT848_DSTATUS_HLOC (1<<6) 128#define BT848_DSTATUS_FIELD (1<<5) 129#define BT848_DSTATUS_NUML (1<<4) 130#define BT848_DSTATUS_CSEL (1<<3) 131#define BT848_DSTATUS_PLOCK (1<<2) 132#define BT848_DSTATUS_LOF (1<<1) 133#define BT848_DSTATUS_COF (1<<0) 134 BTBYTE (iform); /* 4, 5,6,7 */ 135#define BT848_IFORM_MUXSEL (0x3<<5) 136# define BT848_IFORM_M_MUX1 (0x03<<5) 137# define BT848_IFORM_M_MUX0 (0x02<<5) 138# define BT848_IFORM_M_MUX2 (0x01<<5) 139# define BT848_IFORM_M_MUX3 (0x0) 140# define BT848_IFORM_M_RSVD (0x00<<5) 141#define BT848_IFORM_XTSEL (0x3<<3) 142# define BT848_IFORM_X_AUTO (0x03<<3) 143# define BT848_IFORM_X_XT1 (0x02<<3) 144# define BT848_IFORM_X_XT0 (0x01<<3) 145# define BT848_IFORM_X_RSVD (0x00<<3) 146 BTBYTE (tdec); /* 8, 9,a,b */ 147 BTBYTE (e_crop); /* c, d,e,f */ 148 BTBYTE (e_vdelay_lo); /* 10, 11,12,13 */ 149 BTBYTE (e_vactive_lo); /* 14, 15,16,17 */ 150 BTBYTE (e_delay_lo); /* 18, 19,1a,1b */ 151 BTBYTE (e_hactive_lo); /* 1c, 1d,1e,1f */ 152 BTBYTE (e_hscale_hi); /* 20, 21,22,23 */ 153 BTBYTE (e_hscale_lo); /* 24, 25,26,27 */ 154 BTBYTE (bright); /* 28, 29,2a,2b */ 155 BTBYTE (e_control); /* 2c, 2d,2e,2f */ 156#define BT848_E_CONTROL_LNOTCH (1<<7) 157#define BT848_E_CONTROL_COMP (1<<6) 158#define BT848_E_CONTROL_LDEC (1<<5) 159#define BT848_E_CONTROL_CBSENSE (1<<4) 160#define BT848_E_CONTROL_RSVD (1<<3) 161#define BT848_E_CONTROL_CON_MSB (1<<2) 162#define BT848_E_CONTROL_SAT_U_MSB (1<<1) 163#define BT848_E_CONTROL_SAT_V_MSB (1<<0) 164 BTBYTE (contrast_lo); /* 30, 31,32,33 */ 165 BTBYTE (sat_u_lo); /* 34, 35,36,37 */ 166 BTBYTE (sat_v_lo); /* 38, 39,3a,3b */ 167 BTBYTE (hue); /* 3c, 3d,3e,3f */ 168 BTBYTE (e_scloop); /* 40, 41,42,43 */ 169#define BT848_E_SCLOOP_RSVD1 (1<<7) 170#define BT848_E_SCLOOP_CAGC (1<<6) 171#define BT848_E_SCLOOP_CKILL (1<<5) 172#define BT848_E_SCLOOP_HFILT (0x3<<3) 173# define BT848_E_SCLOOP_HFILT_ICON (0x3<<3) 174# define BT848_E_SCLOOP_HFILT_QCIF (0x2<<3) 175# define BT848_E_SCLOOP_HFILT_CIF (0x1<<3) 176# define BT848_E_SCLOOP_HFILT_AUTO (0x0<<3) 177#define BT848_E_SCLOOP_RSVD0 (0x7<<0) 178 int :32; /* 44, 45,46,47 */ 179 BTBYTE (oform); /* 48, 49,4a,4b */ 180 BTBYTE (e_vscale_hi); /* 4c, 4d,4e,4f */ 181 BTBYTE (e_vscale_lo); /* 50, 51,52,53 */ 182 BTBYTE (test); /* 54, 55,56,57 */ 183 int :32; /* 58, 59,5a,5b */ 184 int :32; /* 5c, 5d,5e,5f */ 185 BTLONG (adelay); /* 60, 61,62,63 */ 186 BTBYTE (bdelay); /* 64, 65,66,67 */ 187 BTBYTE (adc); /* 68, 69,6a,6b */ 188#define BT848_ADC_RESERVED (0x80) /* required pattern */ 189#define BT848_ADC_SYNC_T (1<<5) 190#define BT848_ADC_AGC_EN (1<<4) 191#define BT848_ADC_CLK_SLEEP (1<<3) 192#define BT848_ADC_Y_SLEEP (1<<2) 193#define BT848_ADC_C_SLEEP (1<<1) 194#define BT848_ADC_CRUSH (1<<0) 195 BTBYTE (e_vtc); /* 6c, 6d,6e,6f */ 196 int :32; /* 70, 71,72,73 */ 197 int :32; /* 74, 75,76,77 */ 198 int :32; /* 78, 79,7a,7b */ 199 BTLONG (sreset); /* 7c, 7d,7e,7f */ 200 u_char filler1[0x84-0x80]; 201 BTBYTE (tgctrl); /* 84, 85,86,87 */ 202#define BT848_TGCTRL_TGCKI (3<<3) 203#define BT848_TGCTRL_TGCKI_XTAL (0<<3) 204#define BT848_TGCTRL_TGCKI_PLL (1<<3) 205#define BT848_TGCTRL_TGCKI_GPCLK (2<<3) 206#define BT848_TGCTRL_TGCKI_GPCLK_I (3<<3) 207 u_char filler[0x8c-0x88]; 208 BTBYTE (o_crop); /* 8c, 8d,8e,8f */ 209 BTBYTE (o_vdelay_lo); /* 90, 91,92,93 */ 210 BTBYTE (o_vactive_lo); /* 94, 95,96,97 */ 211 BTBYTE (o_delay_lo); /* 98, 99,9a,9b */ 212 BTBYTE (o_hactive_lo); /* 9c, 9d,9e,9f */ 213 BTBYTE (o_hscale_hi); /* a0, a1,a2,a3 */ 214 BTBYTE (o_hscale_lo); /* a4, a5,a6,a7 */ 215 int :32; /* a8, a9,aa,ab */ 216 BTBYTE (o_control); /* ac, ad,ae,af */ 217#define BT848_O_CONTROL_LNOTCH (1<<7) 218#define BT848_O_CONTROL_COMP (1<<6) 219#define BT848_O_CONTROL_LDEC (1<<5) 220#define BT848_O_CONTROL_CBSENSE (1<<4) 221#define BT848_O_CONTROL_RSVD (1<<3) 222#define BT848_O_CONTROL_CON_MSB (1<<2) 223#define BT848_O_CONTROL_SAT_U_MSB (1<<1) 224#define BT848_O_CONTROL_SAT_V_MSB (1<<0) 225 u_char fillter4[16]; 226 BTBYTE (o_scloop); /* c0, c1,c2,c3 */ 227#define BT848_O_SCLOOP_RSVD1 (1<<7) 228#define BT848_O_SCLOOP_CAGC (1<<6) 229#define BT848_O_SCLOOP_CKILL (1<<5) 230#define BT848_O_SCLOOP_HFILT (0x3<<3) 231#define BT848_O_SCLOOP_HFILT_ICON (0x3<<3) 232#define BT848_O_SCLOOP_HFILT_QCIF (0x2<<3) 233#define BT848_O_SCLOOP_HFILT_CIF (0x1<<3) 234#define BT848_O_SCLOOP_HFILT_AUTO (0x0<<3) 235#define BT848_O_SCLOOP_RSVD0 (0x7<<0) 236 int :32; /* c4, c5,c6,c7 */ 237 int :32; /* c8, c9,ca,cb */ 238 BTBYTE (o_vscale_hi); /* cc, cd,ce,cf */ 239 BTBYTE (o_vscale_lo); /* d0, d1,d2,d3 */ 240 BTBYTE (color_fmt); /* d4, d5,d6,d7 */ 241 bregister_t color_ctl_swap :4; /* d8 */ 242#define BT848_COLOR_CTL_WSWAP_ODD (1<<3) 243#define BT848_COLOR_CTL_WSWAP_EVEN (1<<2) 244#define BT848_COLOR_CTL_BSWAP_ODD (1<<1) 245#define BT848_COLOR_CTL_BSWAP_EVEN (1<<0) 246 bregister_t color_ctl_gamma :1; 247 bregister_t color_ctl_rgb_ded :1; 248 bregister_t color_ctl_color_bars :1; 249 bregister_t color_ctl_ext_frmrate :1; 250#define BT848_COLOR_CTL_GAMMA (1<<4) 251#define BT848_COLOR_CTL_RGB_DED (1<<5) 252#define BT848_COLOR_CTL_COLOR_BARS (1<<6) 253#define BT848_COLOR_CTL_EXT_FRMRATE (1<<7) 254 int :24; /* d9,da,db */ 255 BTBYTE (cap_ctl); /* dc, dd,de,df */ 256#define BT848_CAP_CTL_DITH_FRAME (1<<4) 257#define BT848_CAP_CTL_VBI_ODD (1<<3) 258#define BT848_CAP_CTL_VBI_EVEN (1<<2) 259#define BT848_CAP_CTL_ODD (1<<1) 260#define BT848_CAP_CTL_EVEN (1<<0) 261 BTBYTE (vbi_pack_size); /* e0, e1,e2,e3 */ 262 BTBYTE (vbi_pack_del); /* e4, e5,e6,e7 */ 263 int :32; /* e8, e9,ea,eb */ 264 BTBYTE (o_vtc); /* ec, ed,ee,ef */ 265 BTBYTE (pll_f_lo); /* f0, f1,f2,f3 */ 266 BTBYTE (pll_f_hi); /* f4, f5,f6,f7 */ 267 BTBYTE (pll_f_xci); /* f8, f9,fa,fb */ 268#define BT848_PLL_F_C (1<<6) 269#define BT848_PLL_F_X (1<<7) 270 u_char filler2[0x100-0xfc]; 271 BTLONG (int_stat); /* 100, 101,102,103 */ 272 BTLONG (int_mask); /* 104, 105,106,107 */ 273#define BT848_INT_RISCS (0xf<<28) 274#define BT848_INT_RISC_EN (1<<27) 275#define BT848_INT_RACK (1<<25) 276#define BT848_INT_FIELD (1<<24) 277#define BT848_INT_MYSTERYBIT (1<<23) 278#define BT848_INT_SCERR (1<<19) 279#define BT848_INT_OCERR (1<<18) 280#define BT848_INT_PABORT (1<<17) 281#define BT848_INT_RIPERR (1<<16) 282#define BT848_INT_PPERR (1<<15) 283#define BT848_INT_FDSR (1<<14) 284#define BT848_INT_FTRGT (1<<13) 285#define BT848_INT_FBUS (1<<12) 286#define BT848_INT_RISCI (1<<11) 287#define BT848_INT_GPINT (1<<9) 288#define BT848_INT_I2CDONE (1<<8) 289#define BT848_INT_RSV1 (1<<7) 290#define BT848_INT_RSV0 (1<<6) 291#define BT848_INT_VPRES (1<<5) 292#define BT848_INT_HLOCK (1<<4) 293#define BT848_INT_OFLOW (1<<3) 294#define BT848_INT_HSYNC (1<<2) 295#define BT848_INT_VSYNC (1<<1) 296#define BT848_INT_FMTCHG (1<<0) 297 int :32; /* 108, 109,10a,10b */ 298 BTWORD (gpio_dma_ctl); /* 10c, 10d,10e,10f */ 299#define BT848_DMA_CTL_PL23TP4 (0<<6) /* planar1 trigger 4 */ 300#define BT848_DMA_CTL_PL23TP8 (1<<6) /* planar1 trigger 8 */ 301#define BT848_DMA_CTL_PL23TP16 (2<<6) /* planar1 trigger 16 */ 302#define BT848_DMA_CTL_PL23TP32 (3<<6) /* planar1 trigger 32 */ 303#define BT848_DMA_CTL_PL1TP4 (0<<4) /* planar1 trigger 4 */ 304#define BT848_DMA_CTL_PL1TP8 (1<<4) /* planar1 trigger 8 */ 305#define BT848_DMA_CTL_PL1TP16 (2<<4) /* planar1 trigger 16 */ 306#define BT848_DMA_CTL_PL1TP32 (3<<4) /* planar1 trigger 32 */ 307#define BT848_DMA_CTL_PKTP4 (0<<2) /* packed trigger 4 */ 308#define BT848_DMA_CTL_PKTP8 (1<<2) /* packed trigger 8 */ 309#define BT848_DMA_CTL_PKTP16 (2<<2) /* packed trigger 16 */ 310#define BT848_DMA_CTL_PKTP32 (3<<2) /* packed trigger 32 */ 311#define BT848_DMA_CTL_RISC_EN (1<<1) 312#define BT848_DMA_CTL_FIFO_EN (1<<0) 313 BTLONG (i2c_data_ctl); /* 110, 111,112,113 */ 314#define BT848_DATA_CTL_I2CDIV (0xf<<4) 315#define BT848_DATA_CTL_I2CSYNC (1<<3) 316#define BT848_DATA_CTL_I2CW3B (1<<2) 317#define BT848_DATA_CTL_I2CSCL (1<<1) 318#define BT848_DATA_CTL_I2CSDA (1<<0) 319 BTLONG (risc_strt_add); /* 114, 115,116,117 */ 320 BTLONG (gpio_out_en); /* 118, 119,11a,11b */ /* really 24 bits */ 321 BTLONG (gpio_reg_inp); /* 11c, 11d,11e,11f */ /* really 24 bits */ 322 BTLONG (risc_count); /* 120, 121,122,123 */ 323 u_char filler3[0x200-0x124]; 324 BTLONG (gpio_data); /* 200, 201,202,203 */ /* really 24 bits */ 325}; 326 327 328#define BKTR_DSTATUS 0x000 329#define BKTR_IFORM 0x004 330#define BKTR_TDEC 0x008 331#define BKTR_E_CROP 0x00C 332#define BKTR_O_CROP 0x08C 333#define BKTR_E_VDELAY_LO 0x010 334#define BKTR_O_VDELAY_LO 0x090 335#define BKTR_E_VACTIVE_LO 0x014 336#define BKTR_O_VACTIVE_LO 0x094 337#define BKTR_E_DELAY_LO 0x018 338#define BKTR_O_DELAY_LO 0x098 339#define BKTR_E_HACTIVE_LO 0x01C 340#define BKTR_O_HACTIVE_LO 0x09C 341#define BKTR_E_HSCALE_HI 0x020 342#define BKTR_O_HSCALE_HI 0x0A0 343#define BKTR_E_HSCALE_LO 0x024 344#define BKTR_O_HSCALE_LO 0x0A4 345#define BKTR_BRIGHT 0x028 346#define BKTR_E_CONTROL 0x02C 347#define BKTR_O_CONTROL 0x0AC 348#define BKTR_CONTRAST_LO 0x030 349#define BKTR_SAT_U_LO 0x034 350#define BKTR_SAT_V_LO 0x038 351#define BKTR_HUE 0x03C 352#define BKTR_E_SCLOOP 0x040 353#define BKTR_O_SCLOOP 0x0C0 354#define BKTR_OFORM 0x048 355#define BKTR_E_VSCALE_HI 0x04C 356#define BKTR_O_VSCALE_HI 0x0CC 357#define BKTR_E_VSCALE_LO 0x050 358#define BKTR_O_VSCALE_LO 0x0D0 359#define BKTR_TEST 0x054 360#define BKTR_ADELAY 0x060 361#define BKTR_BDELAY 0x064 362#define BKTR_ADC 0x068 363#define BKTR_E_VTC 0x06C 364#define BKTR_O_VTC 0x0EC 365#define BKTR_SRESET 0x07C 366#define BKTR_COLOR_FMT 0x0D4 367#define BKTR_COLOR_CTL 0x0D8 368#define BKTR_CAP_CTL 0x0DC 369#define BKTR_VBI_PACK_SIZE 0x0E0 370#define BKTR_VBI_PACK_DEL 0x0E4 371#define BKTR_INT_STAT 0x100 372#define BKTR_INT_MASK 0x104 373#define BKTR_RISC_COUNT 0x120 374#define BKTR_RISC_STRT_ADD 0x114 375#define BKTR_GPIO_DMA_CTL 0x10C 376#define BKTR_GPIO_OUT_EN 0x118 377#define BKTR_GPIO_REG_INP 0x11C 378#define BKTR_GPIO_DATA 0x200 379#define BKTR_I2C_DATA_CTL 0x110 380#define BKTR_TGCTRL 0x084 381#define BKTR_PLL_F_LO 0x0F0 382#define BKTR_PLL_F_HI 0x0F4 383#define BKTR_PLL_F_XCI 0x0F8 384 385/* 386 * device support for onboard tv tuners 387 */ 388 389/* description of the LOGICAL tuner */ 390struct TVTUNER { 391 int frequency; 392 u_char chnlset; 393 u_char channel; 394 u_char band; 395 u_char afc; 396 u_char radio_mode; /* current mode of the radio mode */ 397}; 398 399/* description of the PHYSICAL tuner */ 400struct TUNER { 401 char* name; 402 u_char type; 403 u_char pllControl[4]; 404 u_char bandLimits[ 2 ]; 405 u_char bandAddrs[ 4 ]; /* 3 first for the 3 TV 406 ** bands. Last for radio 407 ** band (0x00=NoRadio). 408 */ 409 410}; 411 412/* description of the card */ 413#define EEPROMBLOCKSIZE 32 414struct CARDTYPE { 415 unsigned int card_id; /* card id (from #define's) */ 416 char* name; 417 const struct TUNER* tuner; /* Tuner details */ 418 u_char tuner_pllAddr; /* Tuner i2c address */ 419 u_char dbx; /* Has DBX chip? */ 420 u_char msp3400c; /* Has msp3400c chip? */ 421 u_char dpl3518a; /* Has dpl3518a chip? */ 422 u_char eepromAddr; 423 u_char eepromSize; /* bytes / EEPROMBLOCKSIZE */ 424 u_int audiomuxs[ 5 ]; /* tuner, ext (line-in) */ 425 /* int/unused (radio) */ 426 /* mute, present */ 427 u_int gpio_mux_bits; /* GPIO mask for audio mux */ 428}; 429 430struct format_params { 431 /* Total lines, lines before image, image lines */ 432 int vtotal, vdelay, vactive; 433 /* Total unscaled horizontal pixels, pixels before image, image pixels */ 434 int htotal, hdelay, hactive; 435 /* Scaled horizontal image pixels, Total Scaled horizontal pixels */ 436 int scaled_hactive, scaled_htotal; 437 /* frame rate . for ntsc is 30 frames per second */ 438 int frame_rate; 439 /* A-delay and B-delay */ 440 u_char adelay, bdelay; 441 /* Iform XTSEL value */ 442 int iform_xtsel; 443 /* VBI number of lines per field, and number of samples per line */ 444 int vbi_num_lines, vbi_num_samples; 445}; 446 447#if defined(BKTR_USE_FREEBSD_SMBUS) 448struct bktr_i2c_softc { 449 int bus_owned; 450 451 device_t iicbb; 452 device_t smbus; 453}; 454#endif 455 456 457/* Bt848/878 register access 458 * The registers can either be access via a memory mapped structure 459 * or accessed via bus_space. 460 * bus_0pace access allows cross platform support, where as the 461 * memory mapped structure method only works on 32 bit processors 462 * with the right type of endianness. 463 */ 464#if defined(__NetBSD__) || defined(__FreeBSD__) 465#define INB(bktr,offset) bus_space_read_1((bktr)->memt,(bktr)->memh,(offset)) 466#define INW(bktr,offset) bus_space_read_2((bktr)->memt,(bktr)->memh,(offset)) 467#define INL(bktr,offset) bus_space_read_4((bktr)->memt,(bktr)->memh,(offset)) 468#define OUTB(bktr,offset,value) bus_space_write_1((bktr)->memt,(bktr)->memh,(offset),(value)) 469#define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value)) 470#define OUTL(bktr,offset,value) bus_space_write_4((bktr)->memt,(bktr)->memh,(offset),(value)) 471#else 472#define INB(bktr,offset) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) 473#define INW(bktr,offset) *(volatile unsigned short*)((int)((bktr)->memh)+(offset)) 474#define INL(bktr,offset) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset)) 475#define OUTB(bktr,offset,value) *(volatile unsigned char*) ((int)((bktr)->memh)+(offset)) = (value) 476#define OUTW(bktr,offset,value) *(volatile unsigned short*)((int)((bktr)->memh)+(offset)) = (value) 477#define OUTL(bktr,offset,value) *(volatile unsigned int*) ((int)((bktr)->memh)+(offset)) = (value) 478#endif 479 480 481typedef struct bktr_clip bktr_clip_t; 482 483/* 484 * BrookTree 848 info structure, one per bt848 card installed. 485 */ 486struct bktr_softc { 487 488#if defined (__bsdi__) 489 struct device bktr_dev; /* base device */ 490 struct isadev bktr_id; /* ISA device */ 491 struct intrhand bktr_ih; /* interrupt vectoring */ 492 #define pcici_t pci_devaddr_t 493#endif 494 495#if defined(__NetBSD__) 496 struct device bktr_dev; /* base device */ 497 bus_dma_tag_t dmat; /* DMA tag */ 498 bus_space_tag_t memt; 499 bus_space_handle_t memh; 500 bus_size_t obmemsz; /* size of en card (bytes) */ 501 void *ih; 502 bus_dmamap_t dm_prog; 503 bus_dmamap_t dm_oprog; 504 bus_dmamap_t dm_mem; 505 bus_dmamap_t dm_vbidata; 506 bus_dmamap_t dm_vbibuffer; 507#endif 508 509#if defined(__OpenBSD__) 510 struct device bktr_dev; /* base device */ 511 bus_dma_tag_t dmat; /* DMA tag */ 512 bus_space_tag_t memt; 513 bus_space_handle_t memh; 514 bus_size_t obmemsz; /* size of en card (bytes) */ 515 void *ih; 516 bus_dmamap_t dm_prog; 517 bus_dmamap_t dm_oprog; 518 bus_dmamap_t dm_mem; 519 bus_dmamap_t dm_vbidata; 520 bus_dmamap_t dm_vbibuffer; 521 size_t dm_mapsize; 522 pci_chipset_tag_t pc; /* Opaque PCI chipset tag */ 523 pcitag_t tag; /* PCI tag, for doing PCI commands */ 524 vm_offset_t phys_base; /* Bt848 register physical address */ 525#endif 526 527#if defined (__FreeBSD__) 528 int mem_rid; /* 4.x resource id */ 529 struct resource *res_mem; /* 4.x resource descriptor for registers */ 530 int irq_rid; /* 4.x resource id */ 531 struct resource *res_irq; /* 4.x resource descriptor for interrupt */ 532 void *res_ih; /* 4.x newbus interrupt handler cookie */ 533 struct cdev *bktrdev; /* 4.x device entry for /dev/bktrN */ 534 struct cdev *tunerdev; /* 4.x device entry for /dev/tunerN */ 535 struct cdev *vbidev; /* 4.x device entry for /dev/vbiN */ 536 struct cdev *bktrdev_alias; /* alias /dev/bktr to /dev/bktr0 */ 537 struct cdev *tunerdev_alias; /* alias /dev/tuner to /dev/tuner0 */ 538 struct cdev *vbidev_alias; /* alias /dev/vbi to /dev/vbi0 */ 539 #if (__FreeBSD_version >= 500000) 540 struct mtx vbimutex; /* Mutex protecting vbi buffer */ 541 #endif 542 bus_space_tag_t memt; /* Bus space register access functions */ 543 bus_space_handle_t memh; /* Bus space register access functions */ 544 bus_size_t obmemsz;/* Size of card (bytes) */ 545#if defined(BKTR_USE_FREEBSD_SMBUS) 546 struct bktr_i2c_softc i2c_sc; /* bt848_i2c device */ 547#endif 548 char bktr_xname[7]; /* device name and unit number */ 549#endif 550 551 552 /* The following definitions are for the contiguous memory */ 553#ifdef __NetBSD__ 554 vaddr_t bigbuf; /* buffer that holds the captured image */ 555 vaddr_t vbidata; /* RISC program puts VBI data from the current frame here */ 556 vaddr_t vbibuffer; /* Circular buffer holding VBI data for the user */ 557 vaddr_t dma_prog; /* RISC prog for single and/or even field capture*/ 558 vaddr_t odd_dma_prog; /* RISC program for Odd field capture */ 559#else 560 vm_offset_t bigbuf; /* buffer that holds the captured image */ 561 vm_offset_t vbidata; /* RISC program puts VBI data from the current frame here */ 562 vm_offset_t vbibuffer; /* Circular buffer holding VBI data for the user */ 563 vm_offset_t dma_prog; /* RISC prog for single and/or even field capture*/ 564 vm_offset_t odd_dma_prog;/* RISC program for Odd field capture */ 565#endif 566 567 568 /* the following definitions are common over all platforms */ 569 int alloc_pages; /* number of pages in bigbuf */ 570 int vbiinsert; /* Position for next write into circular buffer */ 571 int vbistart; /* Position of last read from circular buffer */ 572 int vbisize; /* Number of bytes in the circular buffer */ 573 uint32_t vbi_sequence_number; /* sequence number for VBI */ 574 int vbi_read_blocked; /* user process blocked on read() from /dev/vbi */ 575 struct selinfo vbi_select; /* Data used by select() on /dev/vbi */ 576 577 578 struct proc *proc; /* process to receive raised signal */ 579 int signal; /* signal to send to process */ 580 int clr_on_start; /* clear cap buf on capture start? */ 581#define METEOR_SIG_MODE_MASK 0xffff0000 582#define METEOR_SIG_FIELD_MODE 0x00010000 583#define METEOR_SIG_FRAME_MODE 0x00000000 584 char dma_prog_loaded; 585 struct meteor_mem *mem; /* used to control sync. multi-frame output */ 586 u_long synch_wait; /* wait for free buffer before continuing */ 587 short current; /* frame number in buffer (1-frames) */ 588 short rows; /* number of rows in a frame */ 589 short cols; /* number of columns in a frame */ 590 int capture_area_x_offset; /* Usually the full 640x480(NTSC) image is */ 591 int capture_area_y_offset; /* captured. The capture area allows for */ 592 int capture_area_x_size; /* example 320x200 pixels from the centre */ 593 int capture_area_y_size; /* of the video image to be captured. */ 594 char capture_area_enabled; /* When TRUE use user's capture area. */ 595 int pixfmt; /* active pixel format (idx into fmt tbl) */ 596 int pixfmt_compat; /* Y/N - in meteor pix fmt compat mode */ 597 u_long format; /* frame format rgb, yuv, etc.. */ 598 short frames; /* number of frames allocated */ 599 int frame_size; /* number of bytes in a frame */ 600 u_long fifo_errors; /* number of fifo capture errors since open */ 601 u_long dma_errors; /* number of DMA capture errors since open */ 602 u_long frames_captured;/* number of frames captured since open */ 603 u_long even_fields_captured; /* number of even fields captured */ 604 u_long odd_fields_captured; /* number of odd fields captured */ 605 u_long range_enable; /* enable range checking ?? */ 606 u_short capcontrol; /* reg 0xdc capture control */ 607 u_short bktr_cap_ctl; 608 volatile u_int flags; 609#define METEOR_INITALIZED 0x00000001 610#define METEOR_OPEN 0x00000002 611#define METEOR_MMAP 0x00000004 612#define METEOR_INTR 0x00000008 613#define METEOR_READ 0x00000010 /* XXX never gets referenced */ 614#define METEOR_SINGLE 0x00000020 /* get single frame */ 615#define METEOR_CONTIN 0x00000040 /* continuously get frames */ 616#define METEOR_SYNCAP 0x00000080 /* synchronously get frames */ 617#define METEOR_CAP_MASK 0x000000f0 618#define METEOR_NTSC 0x00000100 619#define METEOR_PAL 0x00000200 620#define METEOR_SECAM 0x00000400 621#define BROOKTREE_NTSC 0x00000100 /* used in video open() and */ 622#define BROOKTREE_PAL 0x00000200 /* in the kernel config */ 623#define BROOKTREE_SECAM 0x00000400 /* file */ 624#define METEOR_AUTOMODE 0x00000800 625#define METEOR_FORM_MASK 0x00000f00 626#define METEOR_DEV0 0x00001000 627#define METEOR_DEV1 0x00002000 628#define METEOR_DEV2 0x00004000 629#define METEOR_DEV3 0x00008000 630#define METEOR_DEV_SVIDEO 0x00006000 631#define METEOR_DEV_RGB 0x0000a000 632#define METEOR_DEV_MASK 0x0000f000 633#define METEOR_RGB16 0x00010000 634#define METEOR_RGB24 0x00020000 635#define METEOR_YUV_PACKED 0x00040000 636#define METEOR_YUV_PLANAR 0x00080000 637#define METEOR_WANT_EVEN 0x00100000 /* want even frame */ 638#define METEOR_WANT_ODD 0x00200000 /* want odd frame */ 639#define METEOR_WANT_MASK 0x00300000 640#define METEOR_ONLY_EVEN_FIELDS 0x01000000 641#define METEOR_ONLY_ODD_FIELDS 0x02000000 642#define METEOR_ONLY_FIELDS_MASK 0x03000000 643#define METEOR_YUV_422 0x04000000 644#define METEOR_OUTPUT_FMT_MASK 0x040f0000 645#define METEOR_WANT_TS 0x08000000 /* time-stamp a frame */ 646#define METEOR_RGB 0x20000000 /* meteor rgb unit */ 647#define METEOR_FIELD_MODE 0x80000000 648 u_char tflags; /* Tuner flags (/dev/tuner) */ 649#define TUNER_INITALIZED 0x00000001 650#define TUNER_OPEN 0x00000002 651 u_char vbiflags; /* VBI flags (/dev/vbi) */ 652#define VBI_INITALIZED 0x00000001 653#define VBI_OPEN 0x00000002 654#define VBI_CAPTURE 0x00000004 655 u_short fps; /* frames per second */ 656 struct meteor_video video; 657 struct TVTUNER tuner; 658 struct CARDTYPE card; 659 u_char audio_mux_select; /* current mode of the audio */ 660 u_char audio_mute_state; /* mute state of the audio */ 661 u_char format_params; 662 u_long current_sol; 663 u_long current_col; 664 int clip_start; 665 int line_length; 666 int last_y; 667 int y; 668 int y2; 669 int yclip; 670 int yclip2; 671 int max_clip_node; 672 bktr_clip_t clip_list[100]; 673 int reverse_mute; /* Swap the GPIO values for Mute and TV Audio */ 674 int bt848_tuner; 675 int bt848_card; 676 u_long id; 677#define BT848_USE_XTALS 0 678#define BT848_USE_PLL 1 679 int xtal_pll_mode; /* Use XTAL or PLL mode for PAL/SECAM */ 680 int remote_control; /* remote control detected */ 681 int remote_control_addr; /* remote control i2c address */ 682 char msp_version_string[9]; /* MSP version string 34xxx-xx */ 683 int msp_addr; /* MSP i2c address */ 684 char dpl_version_string[9]; /* DPL version string 35xxx-xx */ 685 int dpl_addr; /* DPL i2c address */ 686 int slow_msp_audio; /* 0 = use fast MSP3410/3415 programming sequence */ 687 /* 1 = use slow MSP3410/3415 programming sequence */ 688 /* 2 = use Tuner's Mono audio output via the MSP chip */ 689 int msp_use_mono_source; /* use Tuner's Mono audio output via the MSP chip */ 690 int audio_mux_present; /* 1 = has audio mux on GPIO lines, 0 = no audio mux */ 691 int msp_source_selected; /* 0 = TV source, 1 = Line In source, 2 = FM Radio Source */ 692 693#ifdef BKTR_NEW_MSP34XX_DRIVER 694 /* msp3400c related data */ 695 void * msp3400c_info; 696 int stereo_once; 697 int amsound; 698 int mspsimple; 699 int dolby; 700#endif 701 702}; 703 704typedef struct bktr_softc bktr_reg_t; 705typedef struct bktr_softc* bktr_ptr_t; 706 707#define Bt848_MAX_SIGN 16 708 709struct bt848_card_sig { 710 int card; 711 int tuner; 712 u_char signature[Bt848_MAX_SIGN]; 713}; 714 715 716/***********************************************************/ 717/* ioctl_cmd_t int on old versions, u_long on new versions */ 718/***********************************************************/ 719 720#if defined(__FreeBSD__) 721typedef u_long ioctl_cmd_t; 722#endif 723 724#if defined(__NetBSD__) || defined(__OpenBSD__) 725typedef u_long ioctl_cmd_t; 726#endif 727 728 729