ata-fsl.c revision 331722
1/*- 2 * Copyright (c) 2012 The FreeBSD Foundation 3 * All rights reserved. 4 * 5 * This software was developed by Oleksandr Rybalko under sponsorship 6 * from the FreeBSD Foundation. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30#include <sys/cdefs.h> 31__FBSDID("$FreeBSD: stable/11/sys/dev/ata/chipsets/ata-fsl.c 331722 2018-03-29 02:50:57Z eadler $"); 32 33#include <sys/param.h> 34#include <sys/module.h> 35#include <sys/systm.h> 36#include <sys/kernel.h> 37#include <sys/ata.h> 38#include <sys/bus.h> 39#include <sys/endian.h> 40#include <sys/malloc.h> 41#include <sys/lock.h> 42#include <sys/mutex.h> 43#include <sys/sema.h> 44#include <sys/taskqueue.h> 45#include <vm/uma.h> 46#include <machine/stdarg.h> 47#include <machine/resource.h> 48#include <machine/bus.h> 49#include <sys/rman.h> 50#include <dev/pci/pcivar.h> 51#include <dev/pci/pcireg.h> 52#include <dev/ata/ata-all.h> 53#include <dev/ata/ata-pci.h> 54#include <ata_if.h> 55 56#include <dev/fdt/fdt_common.h> 57#include <dev/ofw/openfirm.h> 58#include <dev/ofw/ofw_bus.h> 59#include <dev/ofw/ofw_bus_subr.h> 60 61#include <machine/fdt.h> 62 63/* local prototypes */ 64static int imx_ata_ch_attach(device_t dev); 65static int imx_ata_setmode(device_t dev, int target, int mode); 66 67static int 68imx_ata_probe(device_t dev) 69{ 70 struct ata_pci_controller *ctrl; 71 72 if (!ofw_bus_status_okay(dev)) 73 return (ENXIO); 74 75 if (!ofw_bus_is_compatible(dev, "fsl,imx51-ata") && 76 !ofw_bus_is_compatible(dev, "fsl,imx53-ata")) 77 return (ENXIO); 78 79 ctrl = device_get_softc(dev); 80 81 device_set_desc(dev, "Freescale Integrated PATA Controller"); 82 return (BUS_PROBE_LOW_PRIORITY); 83} 84 85static void 86imx_ata_intr(void *data) 87{ 88 struct ata_pci_controller *ctrl = data; 89 90 bus_write_2(ctrl->r_res1, 0x28, bus_read_2(ctrl->r_res1, 0x28)); 91 ctrl->interrupt[0].function(ctrl->interrupt[0].argument); 92} 93 94static int 95imx_ata_attach(device_t dev) 96{ 97 struct ata_pci_controller *ctrl; 98 device_t child; 99 int unit; 100 101 ctrl = device_get_softc(dev); 102 /* do chipset specific setups only needed once */ 103 ctrl->legacy = ata_legacy(dev); 104 ctrl->channels = 1; 105 ctrl->ichannels = -1; 106 ctrl->ch_attach = ata_pci_ch_attach; 107 ctrl->ch_detach = ata_pci_ch_detach; 108 ctrl->dev = dev; 109 110 ctrl->r_type1 = SYS_RES_MEMORY; 111 ctrl->r_rid1 = 0; 112 ctrl->r_res1 = bus_alloc_resource_any(dev, ctrl->r_type1, 113 &ctrl->r_rid1, RF_ACTIVE); 114 115 if (ata_setup_interrupt(dev, imx_ata_intr)) { 116 device_printf(dev, "failed to setup interrupt\n"); 117 return ENXIO; 118 } 119 120 ctrl->channels = 1; 121 122 ctrl->ch_attach = imx_ata_ch_attach; 123 ctrl->setmode = imx_ata_setmode; 124 125 /* attach all channels on this controller */ 126 unit = 0; 127 child = device_add_child(dev, "ata", ((unit == 0) && ctrl->legacy) ? 128 unit : devclass_find_free_unit(ata_devclass, 2)); 129 if (child == NULL) 130 device_printf(dev, "failed to add ata child device\n"); 131 else 132 device_set_ivars(child, (void *)(intptr_t)unit); 133 134 bus_generic_attach(dev); 135 return 0; 136} 137 138static int 139imx_ata_ch_attach(device_t dev) 140{ 141 struct ata_pci_controller *ctrl; 142 struct ata_channel *ch; 143 int i; 144 145 ctrl = device_get_softc(device_get_parent(dev)); 146 ch = device_get_softc(dev); 147 for (i = ATA_DATA; i < ATA_MAX_RES; i++) 148 ch->r_io[i].res = ctrl->r_res1; 149 150 bus_write_2(ctrl->r_res1, 0x24, 0x80); 151 DELAY(100); 152 bus_write_2(ctrl->r_res1, 0x24, 0xc0); 153 DELAY(100); 154 155 156 /* Write TIME_OFF/ON/1/2W */ 157 bus_write_1(ctrl->r_res1, 0x00, 3); 158 bus_write_1(ctrl->r_res1, 0x01, 3); 159 bus_write_1(ctrl->r_res1, 0x02, (25 + 15) / 15); 160 bus_write_1(ctrl->r_res1, 0x03, (70 + 15) / 15); 161 162 /* Write TIME_2R/AX/RDX/4 */ 163 bus_write_1(ctrl->r_res1, 0x04, (70 + 15) / 15); 164 bus_write_1(ctrl->r_res1, 0x05, (50 + 15) / 15 + 2); 165 bus_write_1(ctrl->r_res1, 0x06, 1); 166 bus_write_1(ctrl->r_res1, 0x07, (10 + 15) / 15); 167 168 /* Write TIME_9 ; the rest of timing registers is irrelevant for PIO */ 169 bus_write_1(ctrl->r_res1, 0x08, (10 + 15) / 15); 170 171 bus_write_2(ctrl->r_res1, 0x24, 0xc1); 172 DELAY(30000); 173 174 /* setup ATA registers */ 175 ch->r_io[ATA_DATA ].offset = 0xa0; 176 ch->r_io[ATA_FEATURE].offset = 0xa4; 177 ch->r_io[ATA_ERROR ].offset = 0xa4; 178 ch->r_io[ATA_COUNT ].offset = 0xa8; 179 ch->r_io[ATA_SECTOR ].offset = 0xac; 180 ch->r_io[ATA_CYL_LSB].offset = 0xb0; 181 ch->r_io[ATA_CYL_MSB].offset = 0xb4; 182 ch->r_io[ATA_DRIVE ].offset = 0xb8; 183 ch->r_io[ATA_COMMAND].offset = 0xbc; 184 185 ch->r_io[ATA_STATUS ].offset = 0xbc; 186 ch->r_io[ATA_ALTSTAT].offset = 0xd8; 187 ch->r_io[ATA_CONTROL].offset = 0xd8; 188 189 ata_pci_hw(dev); 190 191 ch->flags |= ATA_NO_SLAVE; 192 ch->flags |= ATA_USE_16BIT; 193 ch->flags |= ATA_CHECKS_CABLE; 194 ch->flags |= ATA_KNOWN_PRESENCE; 195 196 /* Clear pending interrupts. */ 197 bus_write_2(ctrl->r_res1, 0x28, 0xf8); 198 /* Enable all, but Idle interrupts. */ 199 bus_write_2(ctrl->r_res1, 0x2c, 0x88); 200 201 return 0; 202} 203 204static int 205imx_ata_setmode(device_t dev, int target, int mode) 206{ 207 208 return (min(mode, ATA_PIO4)); 209} 210 211static device_method_t imx_ata_methods[] = { 212 DEVMETHOD(device_probe, imx_ata_probe), 213 DEVMETHOD(device_attach, imx_ata_attach), 214 DEVMETHOD(device_detach, ata_pci_detach), 215 DEVMETHOD(device_suspend, ata_pci_suspend), 216 DEVMETHOD(device_resume, ata_pci_resume), 217 DEVMETHOD(device_shutdown, bus_generic_shutdown), 218 DEVMETHOD(bus_read_ivar, ata_pci_read_ivar), 219 DEVMETHOD(bus_write_ivar, ata_pci_write_ivar), 220 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 221 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 222 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 223 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 224 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 225 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 226 DEVMETHOD(pci_read_config, ata_pci_read_config), 227 DEVMETHOD(pci_write_config, ata_pci_write_config), 228 DEVMETHOD(bus_print_child, ata_pci_print_child), 229 DEVMETHOD(bus_child_location_str, ata_pci_child_location_str), 230 DEVMETHOD_END 231}; 232static driver_t imx_ata_driver = { 233 "atapci", 234 imx_ata_methods, 235 sizeof(struct ata_pci_controller) 236}; 237DRIVER_MODULE(imx_ata, simplebus, imx_ata_driver, ata_pci_devclass, NULL, 238 NULL); 239MODULE_VERSION(imx_ata, 1); 240MODULE_DEPEND(imx_ata, ata, 1, 1, 1); 241MODULE_DEPEND(imx_ata, atapci, 1, 1, 1); 242