ufw.dts revision 312756 
1/*-
2 * Copyright (c) 2016, 2017 Rubicon Communications, LLC (Netgate)
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 * 
26 * $FreeBSD: stable/11/sys/boot/fdt/dts/arm/ufw.dts 312756 2017-01-25 14:49:42Z loos $
27 */
28
29/dts-v1/;
30
31#include "am33xx.dtsi"
32
33/ {
34	model = "AM335x uFW";
35	compatible = "ti,am335x-ufw", "ti,am335x-ubmc", "ti,am33xx";
36
37	memory {
38		device_type = "memory";
39		reg = <0x80000000 0x10000000>; /* 256 MB */
40	};
41
42	vmmcsd_fixed: fixedregulator@0 {
43		compatible = "regulator-fixed";
44		regulator-name = "vmmcsd_fixed";
45		regulator-min-microvolt = <3300000>;
46		regulator-max-microvolt = <3300000>;
47	};
48};
49
50&am33xx_pinmux {
51	pinctrl-names = "default";
52	pinctrl-0 = <&clkout2_pin>;
53
54	i2c0_pins: pinmux_i2c0_pins {
55		pinctrl-single,pins = <
56			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
57			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
58		>;
59	};
60
61	i2c1_pins: pinmux_i2c1_pins {
62		pinctrl-single,pins = <
63			AM33XX_IOPAD(0x968, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart0_ctsn.i2c1_sda */
64			AM33XX_IOPAD(0x96c, PIN_INPUT_PULLUP | MUX_MODE3)	/* uart0_rtsn.i2c1_scl */
65		>;
66	};
67
68	uart0_pins: pinmux_uart0_pins {
69		pinctrl-single,pins = <
70			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
71			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
72		>;
73	};
74
75	clkout2_pin: pinmux_clkout2_pin {
76		pinctrl-single,pins = <
77			AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
78		>;
79	};
80
81	cpsw_default: cpsw_default {
82		pinctrl-single,pins = <
83			/* Slave 1 */
84			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii_1_txen */
85			AM33XX_IOPAD(0x918, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxdv.rgmii_1_rxdv */
86			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii_1_txd3 */
87			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii_1_txd2 */
88			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii_1_txd1 */
89			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii_1_txd0 */
90			AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii_1_txclk */
91			AM33XX_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxclk.rgmii_1_rxclk */
92			AM33XX_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxd3.rgmii_1_rxd3 */
93			AM33XX_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxd2.rgmii_1_rxd2 */
94			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxd1.rgmii_1_rxd1 */
95			AM33XX_IOPAD(0x940, PIN_INPUT_PULLUP | MUX_MODE2)	/* mii1_rxd0.rgmii_1_rxd0 */
96
97			/* Slave 2 */
98			AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a0.rgmii_2_txen */
99			AM33XX_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a1.rgmii_2_rxdv */
100			AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a2.rgmii_2_txd3 */
101			AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a3.rgmii_2_txd2 */
102			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a4.rgmii_2_txd1 */
103			AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a5.rgmii_2_txd0 */
104			AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gmpc_a6.rgmii_2_txclk */
105			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a7.rgmii_2_rxclk */
106			AM33XX_IOPAD(0x860, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a8.rgmii_2_rxd3 */
107			AM33XX_IOPAD(0x864, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a9.rgmii_2_rxd2 */
108			AM33XX_IOPAD(0x868, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a10.rgmii_2_rxd1 */
109			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLUP | MUX_MODE2)	/* gmpc_a11.rgmii_2_rxd0 */
110		>;
111	};
112
113	cpsw_sleep: cpsw_sleep {
114		pinctrl-single,pins = <
115			/* Slave 1 reset value */
116			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
117			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
118			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
119			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
120			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
121			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
122			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
123			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
124			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
125			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
126			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
127			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
128
129			/* Slave 2 reset value */
130			AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
131			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
132			AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
133			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
134			AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
135			AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
136			AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
137			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
138			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
139			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
140			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
141			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
142		>;
143	};
144
145	davinci_mdio_default: davinci_mdio_default {
146		pinctrl-single,pins = <
147			/* MDIO */
148			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
149			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
150		>;
151	};
152
153	davinci_mdio_sleep: davinci_mdio_sleep {
154		pinctrl-single,pins = <
155			/* MDIO reset value */
156			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
157			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
158		>;
159	};
160
161	mmc1_pins: pinmux_mmc1_pins {
162		pinctrl-single,pins = <
163			AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
164			AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
165			AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
166			AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
167			AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
168			AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
169			AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE5) /* spi0_cs1.mmc0_cd */
170		>;
171	};
172
173	emmc_pins: pinmux_emmc_pins {
174		pinctrl-single,pins = <
175			AM33XX_IOPAD(0x994, PIN_INPUT_PULLUP | MUX_MODE4) /* mcasp0_fsx.mmc1_cd */
176			AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
177			AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
178			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
179			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
180			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
181			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
182			AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
183			AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
184			AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
185			AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
186		>;
187	};
188};
189
190&uart0 {
191	pinctrl-names = "default";
192	pinctrl-0 = <&uart0_pins>;
193
194	status = "okay";
195};
196
197&usb {
198	status = "okay";
199};
200
201&usb_ctrl_mod {
202	status = "okay";
203};
204
205&usb0_phy {
206	status = "okay";
207};
208
209&usb1_phy {
210	status = "okay";
211};
212
213&usb0 {
214	status = "okay";
215	dr_mode = "host";
216};
217
218&usb1 {
219	status = "okay";
220	dr_mode = "host";
221};
222
223&cppi41dma  {
224	status = "okay";
225};
226
227&cpsw_emac0 {
228	phy_id = <&davinci_mdio>, <1>;
229	phy-mode = "rgmii";
230	dual_emac_res_vlan = <4071>;
231};
232
233&cpsw_emac1 {
234	phy_id = <&davinci_mdio>, <2>;
235	phy-mode = "rgmii";
236	dual_emac_res_vlan = <4072>;
237};
238
239&mac {
240	pinctrl-names = "default", "sleep";
241	pinctrl-0 = <&cpsw_default>;
242	pinctrl-1 = <&cpsw_sleep>;
243	active_slave = <1>;
244	status = "okay";
245	dual_emac;
246	txen-skew-ps = <0>;
247	rxdv-skew-ps = <1400>;
248	rxd0-skew-ps = <1400>;
249	rxd1-skew-ps = <1400>;
250	rxd2-skew-ps = <1400>;
251	rxd3-skew-ps = <1400>;
252	txd0-skew-ps = <0>;
253	txd1-skew-ps = <0>;
254	txd2-skew-ps = <0>;
255	txd3-skew-ps = <0>;
256	rxc-skew-ps = <4400>;
257	txc-skew-ps = <6200>;
258};
259
260&davinci_mdio {
261	pinctrl-names = "default", "sleep";
262	pinctrl-0 = <&davinci_mdio_default>;
263	pinctrl-1 = <&davinci_mdio_sleep>;
264	status = "okay";
265};
266
267&aes {
268	status = "okay";
269};
270
271&sham {
272	status = "okay";
273};
274
275&mmc1 {
276	vmmc-supply = <&vmmcsd_fixed>;
277	pinctrl-names = "default";
278	pinctrl-0 = <&mmc1_pins>;
279	bus-width = <4>;
280	non-removable;
281	wp-disable;
282	status = "okay";
283};
284
285&mmc2 {
286	vmmc-supply = <&vmmcsd_fixed>;
287	pinctrl-names = "default";
288	pinctrl-0 = <&emmc_pins>;
289	bus-width = <8>;
290	ti,dual-volt;
291	non-removable;
292	status = "okay";
293};
294
295&i2c0 {
296	pinctrl-names = "default";
297	pinctrl-0 = <&i2c0_pins>;
298
299	status = "okay";
300	clock-frequency = <400000>;
301
302	baseboard_eeprom: baseboard_eeprom@50 {
303		compatible = "atmel,24c02";
304		reg = <0x50>;
305
306		#address-cells = <1>;
307		#size-cells = <1>;
308		baseboard_data: baseboard_data@0 {
309			reg = <0 0x100>;
310		};
311	};
312};
313
314&i2c1 {
315	pinctrl-names = "default";
316	pinctrl-0 = <&i2c1_pins>;
317
318	status = "okay";
319};
320