mvvar.h revision 330897
1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2002, 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 * 37 * from: FreeBSD: //depot/projects/arm/src/sys/arm/xscale/pxa2x0/pxa2x0var.h, rev 1 38 * 39 * $FreeBSD: stable/11/sys/arm/mv/mvvar.h 330897 2018-03-14 03:19:51Z eadler $ 40 */ 41 42#ifndef _MVVAR_H_ 43#define _MVVAR_H_ 44 45#include <sys/rman.h> 46#include <machine/bus.h> 47#include <vm/vm.h> 48#include <vm/pmap.h> 49 50#include <dev/ofw/openfirm.h> 51 52#define MV_TYPE_PCI 0 53#define MV_TYPE_PCIE 1 54 55#define MV_MODE_ENDPOINT 0 56#define MV_MODE_ROOT 1 57 58struct gpio_config { 59 int gc_gpio; /* GPIO number */ 60 uint32_t gc_flags; /* GPIO flags */ 61 int gc_output; /* GPIO output value */ 62}; 63 64struct decode_win { 65 int target; /* Mbus unit ID */ 66 int attr; /* Attributes of the target interface */ 67 vm_paddr_t base; /* Physical base addr */ 68 uint32_t size; 69 vm_paddr_t remap; 70}; 71 72extern const struct gpio_config mv_gpio_config[]; 73extern const struct decode_win *cpu_wins; 74extern const struct decode_win *idma_wins; 75extern const struct decode_win *xor_wins; 76extern int idma_wins_no; 77extern int xor_wins_no; 78 79/* Function prototypes */ 80int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt, 81 void (*hand)(void *), void *arg, int pin, int flags, void **cookiep); 82void mv_gpio_intr_mask(int pin); 83void mv_gpio_intr_unmask(int pin); 84void mv_gpio_out(uint32_t pin, uint8_t val, uint8_t enable); 85uint8_t mv_gpio_in(uint32_t pin); 86 87int soc_decode_win(void); 88void soc_id(uint32_t *dev, uint32_t *rev); 89void soc_dump_decode_win(void); 90uint32_t soc_power_ctrl_get(uint32_t mask); 91void soc_power_ctrl_set(uint32_t mask); 92uint64_t get_sar_value(void); 93 94int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size, 95 vm_paddr_t remap); 96int decode_win_overlap(int, int, const struct decode_win *); 97int win_cpu_can_remap(int); 98void decode_win_pcie_setup(u_long); 99 100void ddr_disable(int i); 101int ddr_is_active(int i); 102uint32_t ddr_base(int i); 103uint32_t ddr_size(int i); 104uint32_t ddr_attr(int i); 105uint32_t ddr_target(int i); 106 107uint32_t cpu_extra_feat(void); 108uint32_t get_tclk(void); 109uint32_t get_l2clk(void); 110uint32_t read_cpu_ctrl(uint32_t); 111void write_cpu_ctrl(uint32_t, uint32_t); 112 113#if defined(SOC_MV_ARMADAXP) || defined(SOC_MV_ARMADA38X) 114uint32_t read_cpu_mp_clocks(uint32_t reg); 115void write_cpu_mp_clocks(uint32_t reg, uint32_t val); 116uint32_t read_cpu_misc(uint32_t reg); 117void write_cpu_misc(uint32_t reg, uint32_t val); 118#endif 119 120int mv_pcib_bar_win_set(device_t dev, uint32_t base, uint32_t size, 121 uint32_t remap, int winno, int busno); 122int mv_pcib_cpu_win_remap(device_t dev, uint32_t remap, uint32_t size); 123 124void mv_mask_endpoint_irq(uintptr_t nb, int unit); 125void mv_unmask_endpoint_irq(uintptr_t nb, int unit); 126 127int mv_drbl_get_next_irq(int dir, int unit); 128void mv_drbl_mask_all(int unit); 129void mv_drbl_mask_irq(uint32_t irq, int dir, int unit); 130void mv_drbl_unmask_irq(uint32_t irq, int dir, int unit); 131void mv_drbl_set_mask(uint32_t val, int dir, int unit); 132uint32_t mv_drbl_get_mask(int dir, int unit); 133void mv_drbl_set_cause(uint32_t val, int dir, int unit); 134uint32_t mv_drbl_get_cause(int dir, int unit); 135void mv_drbl_set_msg(uint32_t val, int mnr, int dir, int unit); 136uint32_t mv_drbl_get_msg(int mnr, int dir, int unit); 137 138int mv_msi_data(int irq, uint64_t *addr, uint32_t *data); 139 140struct devmap_entry; 141 142int mv_pci_devmap(phandle_t, struct devmap_entry *, vm_offset_t, 143 vm_offset_t); 144int fdt_localbus_devmap(phandle_t, struct devmap_entry *, int, int *); 145 146#endif /* _MVVAR_H_ */ 147