imx6_machdep.c revision 331501
1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include "opt_platform.h" 30 31#include <sys/cdefs.h> 32__FBSDID("$FreeBSD: stable/11/sys/arm/freescale/imx/imx6_machdep.c 331501 2018-03-24 22:39:38Z ian $"); 33 34#include <sys/param.h> 35#include <sys/systm.h> 36#include <sys/bus.h> 37#include <sys/reboot.h> 38#include <sys/devmap.h> 39 40#include <vm/vm.h> 41 42#include <machine/bus.h> 43#include <machine/intr.h> 44#include <machine/machdep.h> 45#include <machine/platformvar.h> 46 47#include <arm/arm/mpcore_timervar.h> 48#include <arm/freescale/imx/imx6_anatopreg.h> 49#include <arm/freescale/imx/imx6_anatopvar.h> 50#include <arm/freescale/imx/imx_machdep.h> 51 52#include <dev/fdt/fdt_common.h> 53#include <dev/ofw/openfirm.h> 54 55#include "platform_if.h" 56 57/* 58 * Fix FDT data related to interrupts. 59 * 60 * Driven by the needs of linux and its drivers (as always), the published FDT 61 * data for imx6 now sets the interrupt parent for most devices to the GPC 62 * interrupt controller, which is for use when the chip is in deep-sleep mode. 63 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts 64 * to be handled by the GIC. 65 * 66 * Luckily, the change to the FDT data was to assign the GPC as the interrupt 67 * parent for the soc node and letting that get inherited by all other devices 68 * (except a few that directly name GIC as their interrupt parent). So we can 69 * set the world right by just changing the interrupt-parent property of the soc 70 * node to refer to GIC instead of GPC. This will get us by until we write our 71 * own GPC driver (or until linux changes its mind and the FDT data again). 72 * 73 * We validate that we have data that looks like we expect before changing it: 74 * - SOC node exists and has GPC as its interrupt parent. 75 * - GPC node exists and has GIC as its interrupt parent. 76 * - GIC node exists and is its own interrupt parent or has no parent. 77 * 78 * This applies to all models of imx6. Luckily all of them have the devices 79 * involved at the same addresses on the same busses, so we don't need any 80 * per-soc logic. We handle this at platform attach time rather than via the 81 * fdt_fixup_table, because the latter requires matching on the FDT "model" 82 * property, and this applies to all boards including those not yet invented. 83 * 84 * This just in: as of the import of dts files from linux 4.15 on 2018-02-10, 85 * they appear to have applied a new style rule to the dts which forbids leading 86 * zeroes in the @address qualifiers on node names. Since we have to find those 87 * nodes by string matching we now have to search for both flavors of each node 88 * name involved. 89 */ 90static void 91fix_fdt_interrupt_data(void) 92{ 93 phandle_t gicipar, gicnode, gicxref; 94 phandle_t gpcipar, gpcnode, gpcxref; 95 phandle_t socipar, socnode; 96 int result; 97 98 socnode = OF_finddevice("/soc"); 99 if (socnode == -1) 100 return; 101 result = OF_getencprop(socnode, "interrupt-parent", &socipar, 102 sizeof(socipar)); 103 if (result <= 0) 104 return; 105 106 /* GIC node may be child of soc node, or appear directly at root. */ 107 gicnode = OF_finddevice("/soc/interrupt-controller@00a01000"); 108 if (gicnode == -1) 109 gicnode = OF_finddevice("/soc/interrupt-controller@a01000"); 110 if (gicnode == -1) { 111 gicnode = OF_finddevice("/interrupt-controller@00a01000"); 112 if (gicnode == -1) 113 gicnode = OF_finddevice("/interrupt-controller@a01000"); 114 if (gicnode == -1) 115 return; 116 } 117 gicxref = OF_xref_from_node(gicnode); 118 119 /* If gic node has no parent, pretend it is its own parent. */ 120 result = OF_getencprop(gicnode, "interrupt-parent", &gicipar, 121 sizeof(gicipar)); 122 if (result <= 0) 123 gicipar = gicxref; 124 125 gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000"); 126 if (gpcnode == -1) 127 gpcnode = OF_finddevice("/soc/aips-bus@2000000/gpc@20dc000"); 128 if (gpcnode == -1) 129 return; 130 result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar, 131 sizeof(gpcipar)); 132 if (result <= 0) 133 return; 134 gpcxref = OF_xref_from_node(gpcnode); 135 136 if (socipar != gpcxref || gpcipar != gicxref || gicipar != gicxref) 137 return; 138 139 gicxref = cpu_to_fdt32(gicxref); 140 OF_setprop(socnode, "interrupt-parent", &gicxref, sizeof(gicxref)); 141} 142 143static vm_offset_t 144imx6_lastaddr(platform_t plat) 145{ 146 147 return (devmap_lastaddr()); 148} 149 150static int 151imx6_attach(platform_t plat) 152{ 153 154 /* Fix soc interrupt-parent property. */ 155 fix_fdt_interrupt_data(); 156 157 /* Inform the MPCore timer driver that its clock is variable. */ 158 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES); 159 160 return (0); 161} 162 163static void 164imx6_late_init(platform_t plat) 165{ 166 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004; 167 168 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS); 169} 170 171/* 172 * Set up static device mappings. 173 * 174 * This attempts to cover the most-used devices with 1MB section mappings, which 175 * is good for performance (uses fewer TLB entries for device access). 176 * 177 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the 178 * L2 cache controller. Most of the 1MB range is unused reserved space. 179 * 180 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. 181 * 182 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in 183 * the memory map. When we get support for graphics it might make sense to 184 * static map some of that area. Be careful with other things in that area such 185 * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory. 186 */ 187static int 188imx6_devmap_init(platform_t plat) 189{ 190 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; 191 const uint32_t IMX6_ARMMP_SIZE = 0x00100000; 192 const uint32_t IMX6_AIPS1_PHYS = 0x02000000; 193 const uint32_t IMX6_AIPS1_SIZE = 0x00100000; 194 const uint32_t IMX6_AIPS2_PHYS = 0x02100000; 195 const uint32_t IMX6_AIPS2_SIZE = 0x00100000; 196 197 devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); 198 devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); 199 devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); 200 201 return (0); 202} 203 204void 205cpu_reset(void) 206{ 207 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; 208 209 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); 210} 211 212/* 213 * Determine what flavor of imx6 we're running on. 214 * 215 * This code is based on the way u-boot does it. Information found on the web 216 * indicates that Freescale themselves were the original source of this logic, 217 * including the strange check for number of CPUs in the SCU configuration 218 * register, which is apparently needed on some revisions of the SOLO. 219 * 220 * According to the documentation, there is such a thing as an i.MX6 Dual 221 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a 222 * number or provided any logic to handle it in their detection code. 223 * 224 * Note that the ANALOG_DIGPROG and SCU configuration registers are not 225 * documented in the chip reference manual. (SCU configuration is mentioned, 226 * but not mapped out in detail.) I think the bottom two bits of the scu config 227 * register may be ncpu-1. 228 * 229 * This hasn't been tested yet on a dual[-lite]. 230 * 231 * On a solo: 232 * digprog = 0x00610001 233 * hwsoc = 0x00000062 234 * scu config = 0x00000500 235 * On a quad: 236 * digprog = 0x00630002 237 * hwsoc = 0x00000063 238 * scu config = 0x00005503 239 */ 240u_int imx_soc_type() 241{ 242 uint32_t digprog, hwsoc; 243 uint32_t *pcr; 244 static u_int soctype; 245 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; 246#define HWSOC_MX6SL 0x60 247#define HWSOC_MX6DL 0x61 248#define HWSOC_MX6SOLO 0x62 249#define HWSOC_MX6Q 0x63 250#define HWSOC_MX6UL 0x64 251 252 if (soctype != 0) 253 return (soctype); 254 255 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); 256 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & 257 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; 258 259 if (hwsoc != HWSOC_MX6SL) { 260 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); 261 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> 262 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; 263 /*printf("digprog = 0x%08x\n", digprog);*/ 264 if (hwsoc == HWSOC_MX6DL) { 265 pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4); 266 if (pcr != NULL) { 267 /*printf("scu config = 0x%08x\n", *pcr);*/ 268 if ((*pcr & 0x03) == 0) { 269 hwsoc = HWSOC_MX6SOLO; 270 } 271 } 272 } 273 } 274 /* printf("hwsoc 0x%08x\n", hwsoc); */ 275 276 switch (hwsoc) { 277 case HWSOC_MX6SL: 278 soctype = IMXSOC_6SL; 279 break; 280 case HWSOC_MX6SOLO: 281 soctype = IMXSOC_6S; 282 break; 283 case HWSOC_MX6DL: 284 soctype = IMXSOC_6DL; 285 break; 286 case HWSOC_MX6Q : 287 soctype = IMXSOC_6Q; 288 break; 289 case HWSOC_MX6UL: 290 soctype = IMXSOC_6UL; 291 break; 292 default: 293 printf("imx_soc_type: Don't understand hwsoc 0x%02x, " 294 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); 295 soctype = IMXSOC_6Q; 296 break; 297 } 298 299 return (soctype); 300} 301 302/* 303 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 304 * option SOCDEV_PA=0x02000000 305 * option SOCDEV_VA=0x02000000 306 * option EARLY_PRINTF 307 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It 308 * makes sense now, but if multiple SOCs do that it will make early_putc another 309 * duplicate symbol to be eliminated on the path to a generic kernel. 310 */ 311#if 0 312static void 313imx6_early_putc(int c) 314{ 315 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098; 316 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040; 317 const uint32_t UART_TXRDY = (1 << 3); 318 319 while ((*UART_STAT_REG & UART_TXRDY) == 0) 320 continue; 321 *UART_TX_REG = c; 322} 323early_putc_t *early_putc = imx6_early_putc; 324#endif 325 326static platform_method_t imx6_methods[] = { 327 PLATFORMMETHOD(platform_attach, imx6_attach), 328 PLATFORMMETHOD(platform_lastaddr, imx6_lastaddr), 329 PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init), 330 PLATFORMMETHOD(platform_late_init, imx6_late_init), 331 332 PLATFORMMETHOD_END, 333}; 334 335FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 0); 336FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 0); 337FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 0); 338FDT_PLATFORM_DEF2(imx6, imx6ul, "i.MX6 UltraLite", 0, "fsl,imx6ul", 0); 339