imx6_machdep.c revision 323404
1/*- 2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include "opt_platform.h" 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: stable/11/sys/arm/freescale/imx/imx6_machdep.c 323404 2017-09-10 23:48:20Z ian $"); 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/bus.h> 35#include <sys/reboot.h> 36#include <sys/devmap.h> 37 38#include <vm/vm.h> 39 40#include <machine/bus.h> 41#include <machine/intr.h> 42#include <machine/machdep.h> 43#include <machine/platformvar.h> 44 45#include <arm/arm/mpcore_timervar.h> 46#include <arm/freescale/imx/imx6_anatopreg.h> 47#include <arm/freescale/imx/imx6_anatopvar.h> 48#include <arm/freescale/imx/imx_machdep.h> 49 50#include <dev/fdt/fdt_common.h> 51#include <dev/ofw/openfirm.h> 52 53#include "platform_if.h" 54 55/* 56 * Fix FDT data related to interrupts. 57 * 58 * Driven by the needs of linux and its drivers (as always), the published FDT 59 * data for imx6 now sets the interrupt parent for most devices to the GPC 60 * interrupt controller, which is for use when the chip is in deep-sleep mode. 61 * We don't support deep sleep or have a GPC-PIC driver; we need all interrupts 62 * to be handled by the GIC. 63 * 64 * Luckily, the change to the FDT data was to assign the GPC as the interrupt 65 * parent for the soc node and letting that get inherited by all other devices 66 * (except a few that directly name GIC as their interrupt parent). So we can 67 * set the world right by just changing the interrupt-parent property of the soc 68 * node to refer to GIC instead of GPC. This will get us by until we write our 69 * own GPC driver (or until linux changes its mind and the FDT data again). 70 * 71 * We validate that we have data that looks like we expect before changing it: 72 * - SOC node exists and has GPC as its interrupt parent. 73 * - GPC node exists and has GIC as its interrupt parent. 74 * - GIC node exists and is its own interrupt parent or has no parent. 75 * 76 * This applies to all models of imx6. Luckily all of them have the devices 77 * involved at the same addresses on the same busses, so we don't need any 78 * per-soc logic. We handle this at platform attach time rather than via the 79 * fdt_fixup_table, because the latter requires matching on the FDT "model" 80 * property, and this applies to all boards including those not yet invented. 81 */ 82static void 83fix_fdt_interrupt_data(void) 84{ 85 phandle_t gicipar, gicnode, gicxref; 86 phandle_t gpcipar, gpcnode, gpcxref; 87 phandle_t socipar, socnode; 88 int result; 89 90 socnode = OF_finddevice("/soc"); 91 if (socnode == -1) 92 return; 93 result = OF_getencprop(socnode, "interrupt-parent", &socipar, 94 sizeof(socipar)); 95 if (result <= 0) 96 return; 97 98 /* GIC node may be child of soc node, or appear directly at root. */ 99 gicnode = OF_finddevice("/soc/interrupt-controller@00a01000"); 100 if (gicnode == -1) { 101 gicnode = OF_finddevice("/interrupt-controller@00a01000"); 102 if (gicnode == -1) 103 return; 104 } 105 gicxref = OF_xref_from_node(gicnode); 106 107 /* If gic node has no parent, pretend it is its own parent. */ 108 result = OF_getencprop(gicnode, "interrupt-parent", &gicipar, 109 sizeof(gicipar)); 110 if (result <= 0) 111 gicipar = gicxref; 112 113 gpcnode = OF_finddevice("/soc/aips-bus@02000000/gpc@020dc000"); 114 if (gpcnode == -1) 115 return; 116 result = OF_getencprop(gpcnode, "interrupt-parent", &gpcipar, 117 sizeof(gpcipar)); 118 if (result <= 0) 119 return; 120 gpcxref = OF_xref_from_node(gpcnode); 121 122 if (socipar != gpcxref || gpcipar != gicxref || gicipar != gicxref) 123 return; 124 125 gicxref = cpu_to_fdt32(gicxref); 126 OF_setprop(socnode, "interrupt-parent", &gicxref, sizeof(gicxref)); 127} 128 129static vm_offset_t 130imx6_lastaddr(platform_t plat) 131{ 132 133 return (devmap_lastaddr()); 134} 135 136static int 137imx6_attach(platform_t plat) 138{ 139 140 /* Fix soc interrupt-parent property. */ 141 fix_fdt_interrupt_data(); 142 143 /* Inform the MPCore timer driver that its clock is variable. */ 144 arm_tmr_change_frequency(ARM_TMR_FREQUENCY_VARIES); 145 146 return (0); 147} 148 149static void 150imx6_late_init(platform_t plat) 151{ 152 const uint32_t IMX6_WDOG_SR_PHYS = 0x020bc004; 153 154 imx_wdog_init_last_reset(IMX6_WDOG_SR_PHYS); 155} 156 157/* 158 * Set up static device mappings. 159 * 160 * This attempts to cover the most-used devices with 1MB section mappings, which 161 * is good for performance (uses fewer TLB entries for device access). 162 * 163 * ARMMP covers the interrupt controller, MPCore timers, global timer, and the 164 * L2 cache controller. Most of the 1MB range is unused reserved space. 165 * 166 * AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc. 167 * 168 * Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in 169 * the memory map. When we get support for graphics it might make sense to 170 * static map some of that area. Be careful with other things in that area such 171 * as OCRAM that probably shouldn't be mapped as VM_MEMATTR_DEVICE memory. 172 */ 173static int 174imx6_devmap_init(platform_t plat) 175{ 176 const uint32_t IMX6_ARMMP_PHYS = 0x00a00000; 177 const uint32_t IMX6_ARMMP_SIZE = 0x00100000; 178 const uint32_t IMX6_AIPS1_PHYS = 0x02000000; 179 const uint32_t IMX6_AIPS1_SIZE = 0x00100000; 180 const uint32_t IMX6_AIPS2_PHYS = 0x02100000; 181 const uint32_t IMX6_AIPS2_SIZE = 0x00100000; 182 183 devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE); 184 devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE); 185 devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE); 186 187 return (0); 188} 189 190void 191cpu_reset(void) 192{ 193 const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000; 194 195 imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS); 196} 197 198/* 199 * Determine what flavor of imx6 we're running on. 200 * 201 * This code is based on the way u-boot does it. Information found on the web 202 * indicates that Freescale themselves were the original source of this logic, 203 * including the strange check for number of CPUs in the SCU configuration 204 * register, which is apparently needed on some revisions of the SOLO. 205 * 206 * According to the documentation, there is such a thing as an i.MX6 Dual 207 * (non-lite flavor). However, Freescale doesn't seem to have assigned it a 208 * number or provided any logic to handle it in their detection code. 209 * 210 * Note that the ANALOG_DIGPROG and SCU configuration registers are not 211 * documented in the chip reference manual. (SCU configuration is mentioned, 212 * but not mapped out in detail.) I think the bottom two bits of the scu config 213 * register may be ncpu-1. 214 * 215 * This hasn't been tested yet on a dual[-lite]. 216 * 217 * On a solo: 218 * digprog = 0x00610001 219 * hwsoc = 0x00000062 220 * scu config = 0x00000500 221 * On a quad: 222 * digprog = 0x00630002 223 * hwsoc = 0x00000063 224 * scu config = 0x00005503 225 */ 226u_int imx_soc_type() 227{ 228 uint32_t digprog, hwsoc; 229 uint32_t *pcr; 230 static u_int soctype; 231 const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; 232#define HWSOC_MX6SL 0x60 233#define HWSOC_MX6DL 0x61 234#define HWSOC_MX6SOLO 0x62 235#define HWSOC_MX6Q 0x63 236 237 if (soctype != 0) 238 return (soctype); 239 240 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); 241 hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & 242 IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; 243 244 if (hwsoc != HWSOC_MX6SL) { 245 digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG); 246 hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >> 247 IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT; 248 /*printf("digprog = 0x%08x\n", digprog);*/ 249 if (hwsoc == HWSOC_MX6DL) { 250 pcr = devmap_ptov(SCU_CONFIG_PHYSADDR, 4); 251 if (pcr != NULL) { 252 /*printf("scu config = 0x%08x\n", *pcr);*/ 253 if ((*pcr & 0x03) == 0) { 254 hwsoc = HWSOC_MX6SOLO; 255 } 256 } 257 } 258 } 259 /* printf("hwsoc 0x%08x\n", hwsoc); */ 260 261 switch (hwsoc) { 262 case HWSOC_MX6SL: 263 soctype = IMXSOC_6SL; 264 break; 265 case HWSOC_MX6SOLO: 266 soctype = IMXSOC_6S; 267 break; 268 case HWSOC_MX6DL: 269 soctype = IMXSOC_6DL; 270 break; 271 case HWSOC_MX6Q : 272 soctype = IMXSOC_6Q; 273 break; 274 default: 275 printf("imx_soc_type: Don't understand hwsoc 0x%02x, " 276 "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); 277 soctype = IMXSOC_6Q; 278 break; 279 } 280 281 return (soctype); 282} 283 284/* 285 * Early putc routine for EARLY_PRINTF support. To use, add to kernel config: 286 * option SOCDEV_PA=0x02000000 287 * option SOCDEV_VA=0x02000000 288 * option EARLY_PRINTF 289 * Resist the temptation to change the #if 0 to #ifdef EARLY_PRINTF here. It 290 * makes sense now, but if multiple SOCs do that it will make early_putc another 291 * duplicate symbol to be eliminated on the path to a generic kernel. 292 */ 293#if 0 294static void 295imx6_early_putc(int c) 296{ 297 volatile uint32_t * UART_STAT_REG = (uint32_t *)0x02020098; 298 volatile uint32_t * UART_TX_REG = (uint32_t *)0x02020040; 299 const uint32_t UART_TXRDY = (1 << 3); 300 301 while ((*UART_STAT_REG & UART_TXRDY) == 0) 302 continue; 303 *UART_TX_REG = c; 304} 305early_putc_t *early_putc = imx6_early_putc; 306#endif 307 308static platform_method_t imx6_methods[] = { 309 PLATFORMMETHOD(platform_attach, imx6_attach), 310 PLATFORMMETHOD(platform_lastaddr, imx6_lastaddr), 311 PLATFORMMETHOD(platform_devmap_init, imx6_devmap_init), 312 PLATFORMMETHOD(platform_late_init, imx6_late_init), 313 314 PLATFORMMETHOD_END, 315}; 316 317FDT_PLATFORM_DEF2(imx6, imx6s, "i.MX6 Solo", 0, "fsl,imx6s", 0); 318FDT_PLATFORM_DEF2(imx6, imx6d, "i.MX6 Dual", 0, "fsl,imx6dl", 0); 319FDT_PLATFORM_DEF2(imx6, imx6q, "i.MX6 Quad", 0, "fsl,imx6q", 0); 320