at91sam9g20.c revision 330897
1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2005 Olivier Houchard. All rights reserved. 5 * Copyright (c) 2010 Greg Ansley. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include <sys/cdefs.h> 30__FBSDID("$FreeBSD: stable/11/sys/arm/at91/at91sam9g20.c 330897 2018-03-14 03:19:51Z eadler $"); 31 32#include <sys/param.h> 33#include <sys/systm.h> 34#include <sys/bus.h> 35#include <sys/kernel.h> 36#include <sys/malloc.h> 37#include <sys/module.h> 38 39#define _ARM32_BUS_DMA_PRIVATE 40#include <machine/bus.h> 41 42#include <arm/at91/at91var.h> 43#include <arm/at91/at91reg.h> 44#include <arm/at91/at91soc.h> 45#include <arm/at91/at91_aicreg.h> 46#include <arm/at91/at91sam9g20reg.h> 47#include <arm/at91/at91_pitreg.h> 48#include <arm/at91/at91_pmcreg.h> 49#include <arm/at91/at91_pmcvar.h> 50#include <arm/at91/at91_rstreg.h> 51 52/* 53 * Standard priority levels for the system. 0 is lowest and 7 is highest. 54 * These values are the ones Atmel uses for its Linux port 55 */ 56static const int at91_irq_prio[32] = 57{ 58 7, /* Advanced Interrupt Controller */ 59 7, /* System Peripherals */ 60 1, /* Parallel IO Controller A */ 61 1, /* Parallel IO Controller B */ 62 1, /* Parallel IO Controller C */ 63 0, /* Analog-to-Digital Converter */ 64 5, /* USART 0 */ 65 5, /* USART 1 */ 66 5, /* USART 2 */ 67 0, /* Multimedia Card Interface */ 68 2, /* USB Device Port */ 69 6, /* Two-Wire Interface */ 70 5, /* Serial Peripheral Interface 0 */ 71 5, /* Serial Peripheral Interface 1 */ 72 5, /* Serial Synchronous Controller */ 73 0, /* (reserved) */ 74 0, /* (reserved) */ 75 0, /* Timer Counter 0 */ 76 0, /* Timer Counter 1 */ 77 0, /* Timer Counter 2 */ 78 2, /* USB Host port */ 79 3, /* Ethernet */ 80 0, /* Image Sensor Interface */ 81 5, /* USART 3 */ 82 5, /* USART 4 */ 83 5, /* USART 5 */ 84 0, /* Timer Counter 3 */ 85 0, /* Timer Counter 4 */ 86 0, /* Timer Counter 5 */ 87 0, /* Advanced Interrupt Controller IRQ0 */ 88 0, /* Advanced Interrupt Controller IRQ1 */ 89 0, /* Advanced Interrupt Controller IRQ2 */ 90}; 91 92static const uint32_t at91_pio_base[] = { 93 AT91SAM9G20_PIOA_BASE, 94 AT91SAM9G20_PIOB_BASE, 95 AT91SAM9G20_PIOC_BASE, 96}; 97 98#define DEVICE(_name, _id, _unit) \ 99 { \ 100 _name, _unit, \ 101 AT91SAM9G20_ ## _id ##_BASE, \ 102 AT91SAM9G20_ ## _id ## _SIZE, \ 103 AT91SAM9G20_IRQ_ ## _id \ 104 } 105 106static const struct cpu_devs at91_devs[] = 107{ 108 DEVICE("at91_aic", AIC, 0), 109 DEVICE("at91_pmc", PMC, 0), 110 DEVICE("at91_wdt", WDT, 0), 111 DEVICE("at91_rst", RSTC, 0), 112 DEVICE("at91_pit", PIT, 0), 113 DEVICE("at91_pio", PIOA, 0), 114 DEVICE("at91_pio", PIOB, 1), 115 DEVICE("at91_pio", PIOC, 2), 116 DEVICE("at91_twi", TWI, 0), 117 DEVICE("at91_mci", MCI, 0), 118 DEVICE("uart", DBGU, 0), 119 DEVICE("uart", USART0, 1), 120 DEVICE("uart", USART1, 2), 121 DEVICE("uart", USART2, 3), 122 DEVICE("uart", USART3, 4), 123 DEVICE("uart", USART4, 5), 124 DEVICE("uart", USART5, 6), 125 DEVICE("spi", SPI0, 0), 126 DEVICE("spi", SPI1, 1), 127 DEVICE("ate", EMAC, 0), 128 DEVICE("macb", EMAC, 0), 129 DEVICE("nand", NAND, 0), 130 DEVICE("ohci", OHCI, 0), 131 { 0, 0, 0, 0, 0 } 132}; 133 134static void 135at91_clock_init(void) 136{ 137 struct at91_pmc_clock *clk; 138 139 /* Update USB device port clock info */ 140 clk = at91_pmc_clock_ref("udpck"); 141 clk->pmc_mask = PMC_SCER_UDP_SAM9; 142 at91_pmc_clock_deref(clk); 143 144 /* Update USB host port clock info */ 145 clk = at91_pmc_clock_ref("uhpck"); 146 clk->pmc_mask = PMC_SCER_UHP_SAM9; 147 at91_pmc_clock_deref(clk); 148 149 /* Each SOC has different PLL contraints */ 150 clk = at91_pmc_clock_ref("plla"); 151 clk->pll_min_in = SAM9G20_PLL_A_MIN_IN_FREQ; /* 2 MHz */ 152 clk->pll_max_in = SAM9G20_PLL_A_MAX_IN_FREQ; /* 32 MHz */ 153 clk->pll_min_out = SAM9G20_PLL_A_MIN_OUT_FREQ; /* 400 MHz */ 154 clk->pll_max_out = SAM9G20_PLL_A_MAX_OUT_FREQ; /* 800 MHz */ 155 clk->pll_mul_shift = SAM9G20_PLL_A_MUL_SHIFT; 156 clk->pll_mul_mask = SAM9G20_PLL_A_MUL_MASK; 157 clk->pll_div_shift = SAM9G20_PLL_A_DIV_SHIFT; 158 clk->pll_div_mask = SAM9G20_PLL_A_DIV_MASK; 159 clk->set_outb = at91_pmc_800mhz_plla_outb; 160 at91_pmc_clock_deref(clk); 161 162 clk = at91_pmc_clock_ref("pllb"); 163 clk->pll_min_in = SAM9G20_PLL_B_MIN_IN_FREQ; /* 2 MHz */ 164 clk->pll_max_in = SAM9G20_PLL_B_MAX_IN_FREQ; /* 32 MHz */ 165 clk->pll_min_out = SAM9G20_PLL_B_MIN_OUT_FREQ; /* 30 MHz */ 166 clk->pll_max_out = SAM9G20_PLL_B_MAX_OUT_FREQ; /* 100 MHz */ 167 clk->pll_mul_shift = SAM9G20_PLL_B_MUL_SHIFT; 168 clk->pll_mul_mask = SAM9G20_PLL_B_MUL_MASK; 169 clk->pll_div_shift = SAM9G20_PLL_B_DIV_SHIFT; 170 clk->pll_div_mask = SAM9G20_PLL_B_DIV_MASK; 171 clk->set_outb = at91_pmc_800mhz_pllb_outb; 172 at91_pmc_clock_deref(clk); 173} 174 175static struct at91_soc_data soc_data = { 176 .soc_delay = at91_pit_delay, 177 .soc_reset = at91_rst_cpu_reset, 178 .soc_clock_init = at91_clock_init, 179 .soc_irq_prio = at91_irq_prio, 180 .soc_children = at91_devs, 181 .soc_pio_base = at91_pio_base, 182 .soc_pio_count = nitems(at91_pio_base), 183}; 184 185AT91_SOC(AT91_T_SAM9G20, &soc_data); 186