at91_pio_sam9g45.h revision 330897
1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 *  ----------------------------------------------------------------------------
5 *          ATMEL Microcontroller Software Support  -  ROUSSET  -
6 *  ----------------------------------------------------------------------------
7 *  Copyright (c) 2009, Atmel Corporation
8 *
9 *  All rights reserved.
10 *
11 *  Redistribution and use in source and binary forms, with or without
12 *  modification, are permitted provided that the following conditions are met:
13 *
14 *  - Redistributions of source code must retain the above copyright notice,
15 *  this list of conditions and the disclaimer below.
16 *
17 *  Atmel's name may not be used to endorse or promote products derived from
18 *  this software without specific prior written permission.
19 *
20 *  DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
21 *  IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 *  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
23 *  DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
24 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
25 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
26 *  OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
27 *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
28 *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 *  EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 *  ----------------------------------------------------------------------------
31 *
32 * From AT91LIB version 1.9 boards/at91sam9g45-ek/at91sam9g45/AT91SAM9G45.h
33 */
34
35/* $FreeBSD: stable/11/sys/arm/at91/at91_pio_sam9g45.h 330897 2018-03-14 03:19:51Z eadler $ */
36
37#ifndef  ARM_AT91_AT91_PIO_SAM9G45_H
38#define  ARM_AT91_AT91_PIO_SAM9G45_H
39
40#include <arm/at91/at91_pioreg.h>
41
42// *****************************************************************************
43//               PIO DEFINITIONS FOR AT91SAM9G45
44// *****************************************************************************
45#define AT91C_PA0_MCI0_CK  (AT91C_PIO_PA0) //
46#define AT91C_PA0_TCLK3    (AT91C_PIO_PA0) //
47#define AT91C_PA1_MCI0_CDA (AT91C_PIO_PA1) //
48#define AT91C_PA1_TIOA3    (AT91C_PIO_PA1) //
49#define AT91C_PA10_ETX0     (AT91C_PIO_PA10) //  Ethernet MAC Transmit Data 0
50#define AT91C_PA11_ETX1     (AT91C_PIO_PA11) //  Ethernet MAC Transmit Data 1
51#define AT91C_PA12_ERX0     (AT91C_PIO_PA12) //  Ethernet MAC Receive Data 0
52#define AT91C_PA13_ERX1     (AT91C_PIO_PA13) //  Ethernet MAC Receive Data 1
53#define AT91C_PA14_ETXEN    (AT91C_PIO_PA14) //  Ethernet MAC Transmit Enable
54#define AT91C_PA15_ERXDV    (AT91C_PIO_PA15) //  Ethernet MAC Receive Data Valid
55#define AT91C_PA16_ERXER    (AT91C_PIO_PA16) //  Ethernet MAC Receive Error
56#define AT91C_PA17_ETXCK_EREFCK (AT91C_PIO_PA17) //  Ethernet MAC Transmit Clock/Reference Clock
57#define AT91C_PA18_EMDC     (AT91C_PIO_PA18) //  Ethernet MAC Management Data Clock
58#define AT91C_PA19_EMDIO    (AT91C_PIO_PA19) //  Ethernet MAC Management Data Input/Output
59#define AT91C_PA2_MCI0_DA0 (AT91C_PIO_PA2) //
60#define AT91C_PA2_TIOB3    (AT91C_PIO_PA2) //
61#define AT91C_PA20_TWD0     (AT91C_PIO_PA20) //  TWI Two-wire Serial Data
62#define AT91C_PA21_TWCK0    (AT91C_PIO_PA21) //  TWI Two-wire Serial Clock
63#define AT91C_PA22_MCI1_CDA (AT91C_PIO_PA22) //
64#define AT91C_PA22_SCK3     (AT91C_PIO_PA22) //
65#define AT91C_PA23_MCI1_DA0 (AT91C_PIO_PA23) //
66#define AT91C_PA23_RTS3     (AT91C_PIO_PA23) //
67#define AT91C_PA24_MCI1_DA1 (AT91C_PIO_PA24) //
68#define AT91C_PA24_CTS3     (AT91C_PIO_PA24) //
69#define AT91C_PA25_MCI1_DA2 (AT91C_PIO_PA25) //
70#define AT91C_PA25_PWM3     (AT91C_PIO_PA25) //
71#define AT91C_PA26_MCI1_DA3 (AT91C_PIO_PA26) //
72#define AT91C_PA26_TIOB2    (AT91C_PIO_PA26) //
73#define AT91C_PA27_MCI1_DA4 (AT91C_PIO_PA27) //
74#define AT91C_PA27_ETXER    (AT91C_PIO_PA27) //  Ethernet MAC Transmikt Coding Error
75#define AT91C_PA28_MCI1_DA5 (AT91C_PIO_PA28) //
76#define AT91C_PA28_ERXCK    (AT91C_PIO_PA28) //  Ethernet MAC Receive Clock
77#define AT91C_PA29_MCI1_DA6 (AT91C_PIO_PA29) //
78#define AT91C_PA29_ECRS     (AT91C_PIO_PA29) //  Ethernet MAC Carrier Sense/Carrier Sense and Data Valid
79#define AT91C_PA3_MCI0_DA1 (AT91C_PIO_PA3) //
80#define AT91C_PA3_TCLK4    (AT91C_PIO_PA3) //
81#define AT91C_PA30_MCI1_DA7 (AT91C_PIO_PA30) //
82#define AT91C_PA30_ECOL     (AT91C_PIO_PA30) //  Ethernet MAC Collision Detected
83#define AT91C_PA31_MCI1_CK  (AT91C_PIO_PA31) //
84#define AT91C_PA31_PCK0     (AT91C_PIO_PA31) //
85#define AT91C_PA4_MCI0_DA2 (AT91C_PIO_PA4) //
86#define AT91C_PA4_TIOA4    (AT91C_PIO_PA4) //
87#define AT91C_PA5_MCI0_DA3 (AT91C_PIO_PA5) //
88#define AT91C_PA5_TIOB4    (AT91C_PIO_PA5) //
89#define AT91C_PA6_MCI0_DA4 (AT91C_PIO_PA6) //
90#define AT91C_PA6_ETX2     (AT91C_PIO_PA6) //  Ethernet MAC Transmit Data 2
91#define AT91C_PA7_MCI0_DA5 (AT91C_PIO_PA7) //
92#define AT91C_PA7_ETX3     (AT91C_PIO_PA7) //  Ethernet MAC Transmit Data 3
93#define AT91C_PA8_MCI0_DA6 (AT91C_PIO_PA8) //
94#define AT91C_PA8_ERX2     (AT91C_PIO_PA8) //  Ethernet MAC Receive Data 2
95#define AT91C_PA9_MCI0_DA7 (AT91C_PIO_PA9) //
96#define AT91C_PA9_ERX3     (AT91C_PIO_PA9) //  Ethernet MAC Receive Data 3
97#define AT91C_PB0_SPI0_MISO (AT91C_PIO_PB0) //  SPI 0 Master In Slave
98#define AT91C_PB1_SPI0_MOSI (AT91C_PIO_PB1) //  SPI 0 Master Out Slave
99#define AT91C_PB10_TWD1     (AT91C_PIO_PB10) //
100#define AT91C_PB10_ISI_D10  (AT91C_PIO_PB10) //
101#define AT91C_PB11_TWCK1    (AT91C_PIO_PB11) //
102#define AT91C_PB11_ISI_D11  (AT91C_PIO_PB11) //
103#define AT91C_PB12_DRXD     (AT91C_PIO_PB12) //
104#define AT91C_PB13_DTXD     (AT91C_PIO_PB13) //
105#define AT91C_PB14_SPI1_MISO (AT91C_PIO_PB14) //
106#define AT91C_PB15_SPI1_MOSI (AT91C_PIO_PB15) //
107#define AT91C_PB15_CTS0     (AT91C_PIO_PB15) //
108#define AT91C_PB16_SPI1_SPCK (AT91C_PIO_PB16) //
109#define AT91C_PB16_SCK0     (AT91C_PIO_PB16) //
110#define AT91C_PB17_SPI1_NPCS0 (AT91C_PIO_PB17) //
111#define AT91C_PB17_RTS0     (AT91C_PIO_PB17) //
112#define AT91C_PB18_RXD0     (AT91C_PIO_PB18) //
113#define AT91C_PB18_SPI0_NPCS1 (AT91C_PIO_PB18) //
114#define AT91C_PB19_TXD0     (AT91C_PIO_PB19) //
115#define AT91C_PB19_SPI0_NPCS2 (AT91C_PIO_PB19) //
116#define AT91C_PB2_SPI0_SPCK (AT91C_PIO_PB2) //  SPI 0 Serial Clock
117#define AT91C_PB20_ISI_D0   (AT91C_PIO_PB20) //
118#define AT91C_PB21_ISI_D1   (AT91C_PIO_PB21) //
119#define AT91C_PB22_ISI_D2   (AT91C_PIO_PB22) //
120#define AT91C_PB23_ISI_D3   (AT91C_PIO_PB23) //
121#define AT91C_PB24_ISI_D4   (AT91C_PIO_PB24) //
122#define AT91C_PB25_ISI_D5   (AT91C_PIO_PB25) //
123#define AT91C_PB26_ISI_D6   (AT91C_PIO_PB26) //
124#define AT91C_PB27_ISI_D7   (AT91C_PIO_PB27) //
125#define AT91C_PB28_ISI_PCK  (AT91C_PIO_PB28) //
126#define AT91C_PB29_ISI_VSYNC (AT91C_PIO_PB29) //
127#define AT91C_PB3_SPI0_NPCS0 (AT91C_PIO_PB3) //  SPI 0 Peripheral Chip Select 0
128#define AT91C_PB30_ISI_HSYNC (AT91C_PIO_PB30) //
129#define AT91C_PB31_         (AT91C_PIO_PB31) //
130#define AT91C_PB31_PCK1     (AT91C_PIO_PB31) //
131#define AT91C_PB4_TXD1     (AT91C_PIO_PB4) //  USART 1 Transmit Data
132#define AT91C_PB5_RXD1     (AT91C_PIO_PB5) //  USART 1 Receive Data
133#define AT91C_PB6_TXD2     (AT91C_PIO_PB6) //  USART 2 Transmit Data
134#define AT91C_PB7_RXD2     (AT91C_PIO_PB7) //  USART 2 Receive Data
135#define AT91C_PB8_TXD3     (AT91C_PIO_PB8) //  USART 3 Transmit Data
136#define AT91C_PB8_ISI_D8   (AT91C_PIO_PB8) //
137#define AT91C_PB9_RXD3     (AT91C_PIO_PB9) //  USART 3 Receive Data
138#define AT91C_PB9_ISI_D9   (AT91C_PIO_PB9) //
139#define AT91C_PC0_DQM2     (AT91C_PIO_PC0) //  DQM2
140#define AT91C_PC1_DQM3     (AT91C_PIO_PC1) //  DQM3
141#define AT91C_PC10_NCS4_CFCS0 (AT91C_PIO_PC10) //
142#define AT91C_PC10_TCLK2    (AT91C_PIO_PC10) //
143#define AT91C_PC11_NCS5_CFCS1 (AT91C_PIO_PC11) //
144#define AT91C_PC11_CTS2     (AT91C_PIO_PC11) //
145#define AT91C_PC12_A25_CFRNW (AT91C_PIO_PC12) //
146#define AT91C_PC13_NCS2     (AT91C_PIO_PC13) //
147#define AT91C_PC14_NCS3_NANDCS (AT91C_PIO_PC14) //
148#define AT91C_PC15_NWAIT    (AT91C_PIO_PC15) //
149#define AT91C_PC16_D16      (AT91C_PIO_PC16) //
150#define AT91C_PC17_D17      (AT91C_PIO_PC17) //
151#define AT91C_PC18_D18      (AT91C_PIO_PC18) //
152#define AT91C_PC19_D19      (AT91C_PIO_PC19) //
153#define AT91C_PC2_A19      (AT91C_PIO_PC2) //
154#define AT91C_PC20_D20      (AT91C_PIO_PC20) //
155#define AT91C_PC21_D21      (AT91C_PIO_PC21) //
156#define AT91C_PC22_D22      (AT91C_PIO_PC22) //
157#define AT91C_PC23_D23      (AT91C_PIO_PC23) //
158#define AT91C_PC24_D24      (AT91C_PIO_PC24) //
159#define AT91C_PC25_D25      (AT91C_PIO_PC25) //
160#define AT91C_PC26_D26      (AT91C_PIO_PC26) //
161#define AT91C_PC27_D27      (AT91C_PIO_PC27) //
162#define AT91C_PC28_D28      (AT91C_PIO_PC28) //
163#define AT91C_PC29_D29      (AT91C_PIO_PC29) //
164#define AT91C_PC3_A20      (AT91C_PIO_PC3) //
165#define AT91C_PC30_D30      (AT91C_PIO_PC30) //
166#define AT91C_PC31_D31      (AT91C_PIO_PC31) //
167#define AT91C_PC4_A21_NANDALE (AT91C_PIO_PC4) //
168#define AT91C_PC5_A22_NANDCLE (AT91C_PIO_PC5) //
169#define AT91C_PC6_A23      (AT91C_PIO_PC6) //
170#define AT91C_PC7_A24      (AT91C_PIO_PC7) //
171#define AT91C_PC8_CFCE1    (AT91C_PIO_PC8) //
172#define AT91C_PC9_CFCE2    (AT91C_PIO_PC9) //
173#define AT91C_PC9_RTS2     (AT91C_PIO_PC9) //
174#define AT91C_PD0_TK0      (AT91C_PIO_PD0) //
175#define AT91C_PD0_PWM3     (AT91C_PIO_PD0) //
176#define AT91C_PD1_TF0      (AT91C_PIO_PD1) //
177#define AT91C_PD10_TD1      (AT91C_PIO_PD10) //
178#define AT91C_PD11_RD1      (AT91C_PIO_PD11) //
179#define AT91C_PD12_TK1      (AT91C_PIO_PD12) //
180#define AT91C_PD12_PCK0     (AT91C_PIO_PD12) //
181#define AT91C_PD13_RK1      (AT91C_PIO_PD13) //
182#define AT91C_PD14_TF1      (AT91C_PIO_PD14) //
183#define AT91C_PD15_RF1      (AT91C_PIO_PD15) //
184#define AT91C_PD16_RTS1     (AT91C_PIO_PD16) //
185#define AT91C_PD17_CTS1     (AT91C_PIO_PD17) //
186#define AT91C_PD18_SPI1_NPCS2 (AT91C_PIO_PD18) //
187#define AT91C_PD18_IRQ      (AT91C_PIO_PD18) //
188#define AT91C_PD19_SPI1_NPCS3 (AT91C_PIO_PD19) //
189#define AT91C_PD19_FIQ      (AT91C_PIO_PD19) //
190#define AT91C_PD2_TD0      (AT91C_PIO_PD2) //
191#define AT91C_PD20_TIOA0    (AT91C_PIO_PD20) //
192#define AT91C_PD21_TIOA1    (AT91C_PIO_PD21) //
193#define AT91C_PD22_TIOA2    (AT91C_PIO_PD22) //
194#define AT91C_PD23_TCLK0    (AT91C_PIO_PD23) //
195#define AT91C_PD24_SPI0_NPCS1 (AT91C_PIO_PD24) //
196#define AT91C_PD24_PWM0     (AT91C_PIO_PD24) //
197#define AT91C_PD25_SPI0_NPCS2 (AT91C_PIO_PD25) //
198#define AT91C_PD25_PWM1     (AT91C_PIO_PD25) //
199#define AT91C_PD26_PCK0     (AT91C_PIO_PD26) //
200#define AT91C_PD26_PWM2     (AT91C_PIO_PD26) //
201#define AT91C_PD27_PCK1     (AT91C_PIO_PD27) //
202#define AT91C_PD27_SPI0_NPCS3 (AT91C_PIO_PD27) //
203#define AT91C_PD28_TSADTRG  (AT91C_PIO_PD28) //
204#define AT91C_PD28_SPI1_NPCS1 (AT91C_PIO_PD28) //
205#define AT91C_PD29_TCLK1    (AT91C_PIO_PD29) //
206#define AT91C_PD29_SCK1     (AT91C_PIO_PD29) //
207#define AT91C_PD3_RD0      (AT91C_PIO_PD3) //
208#define AT91C_PD30_TIOB0    (AT91C_PIO_PD30) //
209#define AT91C_PD30_SCK2     (AT91C_PIO_PD30) //
210#define AT91C_PD31_TIOB1    (AT91C_PIO_PD31) //
211#define AT91C_PD31_PWM1     (AT91C_PIO_PD31) //
212#define AT91C_PD4_RK0      (AT91C_PIO_PD4) //
213#define AT91C_PD5_RF0      (AT91C_PIO_PD5) //
214#define AT91C_PD6_AC97RX   (AT91C_PIO_PD6) //
215#define AT91C_PD7_AC97TX   (AT91C_PIO_PD7) //
216#define AT91C_PD7_TIOA5    (AT91C_PIO_PD7) //
217#define AT91C_PD8_AC97FS   (AT91C_PIO_PD8) //
218#define AT91C_PD8_TIOB5    (AT91C_PIO_PD8) //
219#define AT91C_PD9_AC97CK   (AT91C_PIO_PD9) //
220#define AT91C_PD9_TCLK5    (AT91C_PIO_PD9) //
221#define AT91C_PE0_LCDPWR   (AT91C_PIO_PE0) //
222#define AT91C_PE0_PCK0     (AT91C_PIO_PE0) //
223#define AT91C_PE1_LCDMOD   (AT91C_PIO_PE1) //
224#define AT91C_PE10_LCDD3    (AT91C_PIO_PE10) //
225#define AT91C_PE10_LCDD5    (AT91C_PIO_PE10) //
226#define AT91C_PE11_LCDD4    (AT91C_PIO_PE11) //
227#define AT91C_PE11_LCDD6    (AT91C_PIO_PE11) //
228#define AT91C_PE12_LCDD5    (AT91C_PIO_PE12) //
229#define AT91C_PE12_LCDD7    (AT91C_PIO_PE12) //
230#define AT91C_PE13_LCDD6    (AT91C_PIO_PE13) //
231#define AT91C_PE13_LCDD10   (AT91C_PIO_PE13) //
232#define AT91C_PE14_LCDD7    (AT91C_PIO_PE14) //
233#define AT91C_PE14_LCDD11   (AT91C_PIO_PE14) //
234#define AT91C_PE15_LCDD8    (AT91C_PIO_PE15) //
235#define AT91C_PE15_LCDD12   (AT91C_PIO_PE15) //
236#define AT91C_PE16_LCDD9    (AT91C_PIO_PE16) //
237#define AT91C_PE16_LCDD13   (AT91C_PIO_PE16) //
238#define AT91C_PE17_LCDD10   (AT91C_PIO_PE17) //
239#define AT91C_PE17_LCDD14   (AT91C_PIO_PE17) //
240#define AT91C_PE18_LCDD11   (AT91C_PIO_PE18) //
241#define AT91C_PE18_LCDD15   (AT91C_PIO_PE18) //
242#define AT91C_PE19_LCDD12   (AT91C_PIO_PE19) //
243#define AT91C_PE19_LCDD18   (AT91C_PIO_PE19) //
244#define AT91C_PE2_LCDCC    (AT91C_PIO_PE2) //
245#define AT91C_PE20_LCDD13   (AT91C_PIO_PE20) //
246#define AT91C_PE20_LCDD19   (AT91C_PIO_PE20) //
247#define AT91C_PE21_LCDD14   (AT91C_PIO_PE21) //
248#define AT91C_PE21_LCDD20   (AT91C_PIO_PE21) //
249#define AT91C_PE22_LCDD15   (AT91C_PIO_PE22) //
250#define AT91C_PE22_LCDD21   (AT91C_PIO_PE22) //
251#define AT91C_PE23_LCDD16   (AT91C_PIO_PE23) //
252#define AT91C_PE23_LCDD22   (AT91C_PIO_PE23) //
253#define AT91C_PE24_LCDD17   (AT91C_PIO_PE24) //
254#define AT91C_PE24_LCDD23   (AT91C_PIO_PE24) //
255#define AT91C_PE25_LCDD18   (AT91C_PIO_PE25) //
256#define AT91C_PE26_LCDD19   (AT91C_PIO_PE26) //
257#define AT91C_PE27_LCDD20   (AT91C_PIO_PE27) //
258#define AT91C_PE28_LCDD21   (AT91C_PIO_PE28) //
259#define AT91C_PE29_LCDD22   (AT91C_PIO_PE29) //
260#define AT91C_PE3_LCDVSYNC (AT91C_PIO_PE3) //
261#define AT91C_PE30_LCDD23   (AT91C_PIO_PE30) //
262#define AT91C_PE31_PWM2     (AT91C_PIO_PE31) //
263#define AT91C_PE31_PCK1     (AT91C_PIO_PE31) //
264#define AT91C_PE4_LCDHSYNC (AT91C_PIO_PE4) //
265#define AT91C_PE5_LCDDOTCK (AT91C_PIO_PE5) //
266#define AT91C_PE6_LCDDEN   (AT91C_PIO_PE6) //
267#define AT91C_PE7_LCDD0    (AT91C_PIO_PE7) //
268#define AT91C_PE7_LCDD2    (AT91C_PIO_PE7) //
269#define AT91C_PE8_LCDD1    (AT91C_PIO_PE8) //
270#define AT91C_PE8_LCDD3    (AT91C_PIO_PE8) //
271#define AT91C_PE9_LCDD2    (AT91C_PIO_PE9) //
272#define AT91C_PE9_LCDD4    (AT91C_PIO_PE9) //
273
274#endif /* ARM_AT91_AT91_PIO_SAM9G45_H */
275