sys_machdep.c revision 307136 
1/*-
2 * Copyright (c) 1990 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the University nor the names of its contributors
14 *    may be used to endorse or promote products derived from this software
15 *    without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 *	from: @(#)sys_machdep.c	5.5 (Berkeley) 1/19/91
30 */
31
32#include <sys/cdefs.h>
33__FBSDID("$FreeBSD: stable/11/sys/arm/arm/sys_machdep.c 307136 2016-10-12 09:17:41Z ed $");
34
35#include "opt_capsicum.h"
36
37#include <sys/param.h>
38#include <sys/systm.h>
39#include <sys/capsicum.h>
40#include <sys/proc.h>
41#include <sys/sysproto.h>
42#include <sys/syscall.h>
43#include <sys/sysent.h>
44#include <vm/vm.h>
45#include <vm/vm_extern.h>
46
47#include <machine/cpu.h>
48#include <machine/sysarch.h>
49#include <machine/vmparam.h>
50
51#ifndef _SYS_SYSPROTO_H_
52struct sysarch_args {
53	int op;
54	char *parms;
55};
56#endif
57
58/* Prototypes */
59static int arm32_sync_icache (struct thread *, void *);
60static int arm32_drain_writebuf(struct thread *, void *);
61
62#if __ARM_ARCH >= 6
63static int
64sync_icache(uintptr_t addr, size_t len)
65{
66	size_t size;
67	vm_offset_t rv;
68
69	/*
70	 * Align starting address to even number because value of "1"
71	 * is used as return value for success.
72	 */
73	len += addr & 1;
74	addr &= ~1;
75
76	/* Break whole range to pages. */
77	do {
78		size = PAGE_SIZE - (addr & PAGE_MASK);
79		size = min(size, len);
80		rv = dcache_wb_pou_checked(addr, size);
81		if (rv == 1) /* see dcache_wb_pou_checked() */
82			rv = icache_inv_pou_checked(addr, size);
83		if (rv != 1) {
84			if (!useracc((void *)addr, size, VM_PROT_READ)) {
85				/* Invalid access */
86				return (rv);
87			}
88			/* Valid but unmapped page - skip it. */
89		}
90		len -= size;
91		addr += size;
92	} while (len > 0);
93
94	/* Invalidate branch predictor buffer. */
95	bpb_inv_all();
96	return (1);
97}
98#endif
99
100static int
101arm32_sync_icache(struct thread *td, void *args)
102{
103	struct arm_sync_icache_args ua;
104	int error;
105	ksiginfo_t ksi;
106#if __ARM_ARCH >= 6
107	vm_offset_t rv;
108#endif
109
110	if ((error = copyin(args, &ua, sizeof(ua))) != 0)
111		return (error);
112
113	if  (ua.len == 0) {
114		td->td_retval[0] = 0;
115		return (0);
116	}
117
118	/*
119	 * Validate arguments. Address and length are unsigned,
120	 * so we can use wrapped overflow check.
121	 */
122	if (((ua.addr + ua.len) < ua.addr) ||
123	    ((ua.addr + ua.len) > VM_MAXUSER_ADDRESS)) {
124		ksiginfo_init_trap(&ksi);
125		ksi.ksi_signo = SIGSEGV;
126		ksi.ksi_code = SEGV_ACCERR;
127		ksi.ksi_addr = (void *)max(ua.addr, VM_MAXUSER_ADDRESS);
128		trapsignal(td, &ksi);
129		return (EINVAL);
130	}
131
132#if __ARM_ARCH >= 6
133	rv = sync_icache(ua.addr, ua.len);
134	if (rv != 1) {
135		ksiginfo_init_trap(&ksi);
136		ksi.ksi_signo = SIGSEGV;
137		ksi.ksi_code = SEGV_MAPERR;
138		ksi.ksi_addr = (void *)rv;
139		trapsignal(td, &ksi);
140		return (EINVAL);
141	}
142#else
143	cpu_icache_sync_range(ua.addr, ua.len);
144#endif
145
146	td->td_retval[0] = 0;
147	return (0);
148}
149
150static int
151arm32_drain_writebuf(struct thread *td, void *args)
152{
153	/* No args. */
154
155#if __ARM_ARCH < 6
156	cpu_drain_writebuf();
157#else
158	dsb();
159	cpu_l2cache_drain_writebuf();
160#endif
161	td->td_retval[0] = 0;
162	return (0);
163}
164
165static int
166arm32_set_tp(struct thread *td, void *args)
167{
168
169#if __ARM_ARCH >= 6
170	set_tls(args);
171#else
172	td->td_md.md_tp = (register_t)args;
173	*(register_t *)ARM_TP_ADDRESS = (register_t)args;
174#endif
175	return (0);
176}
177
178static int
179arm32_get_tp(struct thread *td, void *args)
180{
181
182#if __ARM_ARCH >= 6
183	td->td_retval[0] = (register_t)get_tls();
184#else
185	td->td_retval[0] = *(register_t *)ARM_TP_ADDRESS;
186#endif
187	return (0);
188}
189
190int
191sysarch(td, uap)
192	struct thread *td;
193	register struct sysarch_args *uap;
194{
195	int error;
196
197#ifdef CAPABILITY_MODE
198	/*
199	 * When adding new operations, add a new case statement here to
200	 * explicitly indicate whether or not the operation is safe to
201	 * perform in capability mode.
202	 */
203	if (IN_CAPABILITY_MODE(td)) {
204		switch (uap->op) {
205		case ARM_SYNC_ICACHE:
206		case ARM_DRAIN_WRITEBUF:
207		case ARM_SET_TP:
208		case ARM_GET_TP:
209			break;
210
211		default:
212#ifdef KTRACE
213			if (KTRPOINT(td, KTR_CAPFAIL))
214				ktrcapfail(CAPFAIL_SYSCALL, NULL, NULL);
215#endif
216			return (ECAPMODE);
217		}
218	}
219#endif
220
221	switch (uap->op) {
222	case ARM_SYNC_ICACHE:
223		error = arm32_sync_icache(td, uap->parms);
224		break;
225	case ARM_DRAIN_WRITEBUF:
226		error = arm32_drain_writebuf(td, uap->parms);
227		break;
228	case ARM_SET_TP:
229		error = arm32_set_tp(td, uap->parms);
230		break;
231	case ARM_GET_TP:
232		error = arm32_get_tp(td, uap->parms);
233		break;
234	default:
235		error = EINVAL;
236		break;
237	}
238	return (error);
239}
240