machdep.c revision 325307
1/* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */ 2 3/*- 4 * Copyright (c) 2004 Olivier Houchard 5 * Copyright (c) 1994-1998 Mark Brinicombe. 6 * Copyright (c) 1994 Brini. 7 * All rights reserved. 8 * 9 * This code is derived from software written for Brini by Mark Brinicombe 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Mark Brinicombe 22 * for the NetBSD Project. 23 * 4. The name of the company nor the name of the author may be used to 24 * endorse or promote products derived from this software without specific 25 * prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * Machine dependent functions for kernel setup 40 * 41 * Created : 17/09/94 42 * Updated : 18/04/01 updated for new wscons 43 */ 44 45#include "opt_compat.h" 46#include "opt_ddb.h" 47#include "opt_kstack_pages.h" 48#include "opt_platform.h" 49#include "opt_sched.h" 50#include "opt_timer.h" 51 52#include <sys/cdefs.h> 53__FBSDID("$FreeBSD: stable/11/sys/arm/arm/machdep.c 325307 2017-11-02 07:08:13Z mmel $"); 54 55#include <sys/param.h> 56#include <sys/buf.h> 57#include <sys/bus.h> 58#include <sys/cons.h> 59#include <sys/cpu.h> 60#include <sys/devmap.h> 61#include <sys/efi.h> 62#include <sys/imgact.h> 63#include <sys/kdb.h> 64#include <sys/kernel.h> 65#include <sys/linker.h> 66#include <sys/msgbuf.h> 67#include <sys/rwlock.h> 68#include <sys/sched.h> 69#include <sys/syscallsubr.h> 70#include <sys/sysent.h> 71#include <sys/sysproto.h> 72 73#include <vm/vm_object.h> 74#include <vm/vm_page.h> 75#include <vm/vm_pager.h> 76 77#include <machine/debug_monitor.h> 78#include <machine/machdep.h> 79#include <machine/metadata.h> 80#include <machine/pcb.h> 81#include <machine/physmem.h> 82#include <machine/platform.h> 83#include <machine/sysarch.h> 84#include <machine/undefined.h> 85#include <machine/vfp.h> 86#include <machine/vmparam.h> 87 88#ifdef FDT 89#include <dev/fdt/fdt_common.h> 90#include <machine/ofw_machdep.h> 91#endif 92 93#ifdef DEBUG 94#define debugf(fmt, args...) printf(fmt, ##args) 95#else 96#define debugf(fmt, args...) 97#endif 98 99#if defined(COMPAT_FREEBSD4) || defined(COMPAT_FREEBSD5) || \ 100 defined(COMPAT_FREEBSD6) || defined(COMPAT_FREEBSD7) || \ 101 defined(COMPAT_FREEBSD9) 102#error FreeBSD/arm doesn't provide compatibility with releases prior to 10 103#endif 104 105struct pcpu __pcpu[MAXCPU]; 106struct pcpu *pcpup = &__pcpu[0]; 107 108static struct trapframe proc0_tf; 109uint32_t cpu_reset_address = 0; 110int cold = 1; 111vm_offset_t vector_page; 112 113int (*_arm_memcpy)(void *, void *, int, int) = NULL; 114int (*_arm_bzero)(void *, int, int) = NULL; 115int _min_memcpy_size = 0; 116int _min_bzero_size = 0; 117 118extern int *end; 119 120#ifdef FDT 121vm_paddr_t pmap_pa; 122#if __ARM_ARCH >= 6 123vm_offset_t systempage; 124vm_offset_t irqstack; 125vm_offset_t undstack; 126vm_offset_t abtstack; 127#else 128/* 129 * This is the number of L2 page tables required for covering max 130 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf, 131 * stacks etc.), uprounded to be divisible by 4. 132 */ 133#define KERNEL_PT_MAX 78 134static struct pv_addr kernel_pt_table[KERNEL_PT_MAX]; 135struct pv_addr systempage; 136static struct pv_addr msgbufpv; 137struct pv_addr irqstack; 138struct pv_addr undstack; 139struct pv_addr abtstack; 140static struct pv_addr kernelstack; 141#endif /* __ARM_ARCH >= 6 */ 142#endif /* FDT */ 143 144#ifdef MULTIDELAY 145static delay_func *delay_impl; 146static void *delay_arg; 147#endif 148 149struct kva_md_info kmi; 150 151/* 152 * arm32_vector_init: 153 * 154 * Initialize the vector page, and select whether or not to 155 * relocate the vectors. 156 * 157 * NOTE: We expect the vector page to be mapped at its expected 158 * destination. 159 */ 160 161extern unsigned int page0[], page0_data[]; 162void 163arm_vector_init(vm_offset_t va, int which) 164{ 165 unsigned int *vectors = (int *) va; 166 unsigned int *vectors_data = vectors + (page0_data - page0); 167 int vec; 168 169 /* 170 * Loop through the vectors we're taking over, and copy the 171 * vector's insn and data word. 172 */ 173 for (vec = 0; vec < ARM_NVEC; vec++) { 174 if ((which & (1 << vec)) == 0) { 175 /* Don't want to take over this vector. */ 176 continue; 177 } 178 vectors[vec] = page0[vec]; 179 vectors_data[vec] = page0_data[vec]; 180 } 181 182 /* Now sync the vectors. */ 183 icache_sync(va, (ARM_NVEC * 2) * sizeof(u_int)); 184 185 vector_page = va; 186#if __ARM_ARCH < 6 187 if (va == ARM_VECTORS_HIGH) { 188 /* 189 * Enable high vectors in the system control reg (SCTLR). 190 * 191 * Assume the MD caller knows what it's doing here, and really 192 * does want the vector page relocated. 193 * 194 * Note: This has to be done here (and not just in 195 * cpu_setup()) because the vector page needs to be 196 * accessible *before* cpu_startup() is called. 197 * Think ddb(9) ... 198 */ 199 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 200 } 201#endif 202} 203 204static void 205cpu_startup(void *dummy) 206{ 207 struct pcb *pcb = thread0.td_pcb; 208 const unsigned int mbyte = 1024 * 1024; 209#if __ARM_ARCH < 6 && !defined(ARM_CACHE_LOCK_ENABLE) 210 vm_page_t m; 211#endif 212 213 identify_arm_cpu(); 214 215 vm_ksubmap_init(&kmi); 216 217 /* 218 * Display the RAM layout. 219 */ 220 printf("real memory = %ju (%ju MB)\n", 221 (uintmax_t)arm32_ptob(realmem), 222 (uintmax_t)arm32_ptob(realmem) / mbyte); 223 printf("avail memory = %ju (%ju MB)\n", 224 (uintmax_t)arm32_ptob(vm_cnt.v_free_count), 225 (uintmax_t)arm32_ptob(vm_cnt.v_free_count) / mbyte); 226 if (bootverbose) { 227 arm_physmem_print_tables(); 228 devmap_print_table(); 229 } 230 231 bufinit(); 232 vm_pager_bufferinit(); 233 pcb->pcb_regs.sf_sp = (u_int)thread0.td_kstack + 234 USPACE_SVC_STACK_TOP; 235 pmap_set_pcb_pagedir(kernel_pmap, pcb); 236#if __ARM_ARCH < 6 237 vector_page_setprot(VM_PROT_READ); 238 pmap_postinit(); 239#ifdef ARM_CACHE_LOCK_ENABLE 240 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS); 241 arm_lock_cache_line(ARM_TP_ADDRESS); 242#else 243 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO); 244 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m)); 245#endif 246 *(uint32_t *)ARM_RAS_START = 0; 247 *(uint32_t *)ARM_RAS_END = 0xffffffff; 248#endif 249} 250 251SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL); 252 253/* 254 * Flush the D-cache for non-DMA I/O so that the I-cache can 255 * be made coherent later. 256 */ 257void 258cpu_flush_dcache(void *ptr, size_t len) 259{ 260 261 dcache_wb_poc((vm_offset_t)ptr, (vm_paddr_t)vtophys(ptr), len); 262} 263 264/* Get current clock frequency for the given cpu id. */ 265int 266cpu_est_clockrate(int cpu_id, uint64_t *rate) 267{ 268 269 return (ENXIO); 270} 271 272void 273cpu_idle(int busy) 274{ 275 276 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d", busy, curcpu); 277 spinlock_enter(); 278#ifndef NO_EVENTTIMERS 279 if (!busy) 280 cpu_idleclock(); 281#endif 282 if (!sched_runnable()) 283 cpu_sleep(0); 284#ifndef NO_EVENTTIMERS 285 if (!busy) 286 cpu_activeclock(); 287#endif 288 spinlock_exit(); 289 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done", busy, curcpu); 290} 291 292int 293cpu_idle_wakeup(int cpu) 294{ 295 296 return (0); 297} 298 299/* 300 * Most ARM platforms don't need to do anything special to init their clocks 301 * (they get intialized during normal device attachment), and by not defining a 302 * cpu_initclocks() function they get this generic one. Any platform that needs 303 * to do something special can just provide their own implementation, which will 304 * override this one due to the weak linkage. 305 */ 306void 307arm_generic_initclocks(void) 308{ 309 310#ifndef NO_EVENTTIMERS 311#ifdef SMP 312 if (PCPU_GET(cpuid) == 0) 313 cpu_initclocks_bsp(); 314 else 315 cpu_initclocks_ap(); 316#else 317 cpu_initclocks_bsp(); 318#endif 319#endif 320} 321__weak_reference(arm_generic_initclocks, cpu_initclocks); 322 323#ifdef MULTIDELAY 324void 325arm_set_delay(delay_func *impl, void *arg) 326{ 327 328 KASSERT(impl != NULL, ("No DELAY implementation")); 329 delay_impl = impl; 330 delay_arg = arg; 331} 332 333void 334DELAY(int usec) 335{ 336 337 delay_impl(usec, delay_arg); 338} 339#endif 340 341void 342cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size) 343{ 344} 345 346void 347spinlock_enter(void) 348{ 349 struct thread *td; 350 register_t cspr; 351 352 td = curthread; 353 if (td->td_md.md_spinlock_count == 0) { 354 cspr = disable_interrupts(PSR_I | PSR_F); 355 td->td_md.md_spinlock_count = 1; 356 td->td_md.md_saved_cspr = cspr; 357 } else 358 td->td_md.md_spinlock_count++; 359 critical_enter(); 360} 361 362void 363spinlock_exit(void) 364{ 365 struct thread *td; 366 register_t cspr; 367 368 td = curthread; 369 critical_exit(); 370 cspr = td->td_md.md_saved_cspr; 371 td->td_md.md_spinlock_count--; 372 if (td->td_md.md_spinlock_count == 0) 373 restore_interrupts(cspr); 374} 375 376/* 377 * Clear registers on exec 378 */ 379void 380exec_setregs(struct thread *td, struct image_params *imgp, u_long stack) 381{ 382 struct trapframe *tf = td->td_frame; 383 384 memset(tf, 0, sizeof(*tf)); 385 tf->tf_usr_sp = stack; 386 tf->tf_usr_lr = imgp->entry_addr; 387 tf->tf_svc_lr = 0x77777777; 388 tf->tf_pc = imgp->entry_addr; 389 tf->tf_spsr = PSR_USR32_MODE; 390} 391 392 393#ifdef VFP 394/* 395 * Get machine VFP context. 396 */ 397static void 398get_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 399{ 400 struct pcb *curpcb; 401 402 curpcb = curthread->td_pcb; 403 critical_enter(); 404 405 vfp_store(&curpcb->pcb_vfpstate, false); 406 memcpy(vfp->mcv_reg, curpcb->pcb_vfpstate.reg, 407 sizeof(vfp->mcv_reg)); 408 vfp->mcv_fpscr = curpcb->pcb_vfpstate.fpscr; 409 410 critical_exit(); 411} 412 413/* 414 * Set machine VFP context. 415 */ 416static void 417set_vfpcontext(struct thread *td, mcontext_vfp_t *vfp) 418{ 419 struct pcb *curpcb; 420 421 curpcb = curthread->td_pcb; 422 critical_enter(); 423 424 vfp_discard(td); 425 memcpy(curpcb->pcb_vfpstate.reg, vfp->mcv_reg, 426 sizeof(curpcb->pcb_vfpstate.reg)); 427 curpcb->pcb_vfpstate.fpscr = vfp->mcv_fpscr; 428 429 critical_exit(); 430} 431#endif 432 433int 434arm_get_vfpstate(struct thread *td, void *args) 435{ 436 int rv; 437 struct arm_get_vfpstate_args ua; 438 mcontext_vfp_t mcontext_vfp; 439 440 rv = copyin(args, &ua, sizeof(ua)); 441 if (rv != 0) 442 return (rv); 443 if (ua.mc_vfp_size != sizeof(mcontext_vfp_t)) 444 return (EINVAL); 445#ifdef VFP 446 get_vfpcontext(td, &mcontext_vfp); 447#else 448 bzero(&mcontext_vfp, sizeof(mcontext_vfp)); 449#endif 450 451 rv = copyout(&mcontext_vfp, ua.mc_vfp, sizeof(mcontext_vfp)); 452 if (rv != 0) 453 return (rv); 454 return (0); 455} 456 457/* 458 * Get machine context. 459 */ 460int 461get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) 462{ 463 struct trapframe *tf = td->td_frame; 464 __greg_t *gr = mcp->__gregs; 465 466 if (clear_ret & GET_MC_CLEAR_RET) { 467 gr[_REG_R0] = 0; 468 gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C; 469 } else { 470 gr[_REG_R0] = tf->tf_r0; 471 gr[_REG_CPSR] = tf->tf_spsr; 472 } 473 gr[_REG_R1] = tf->tf_r1; 474 gr[_REG_R2] = tf->tf_r2; 475 gr[_REG_R3] = tf->tf_r3; 476 gr[_REG_R4] = tf->tf_r4; 477 gr[_REG_R5] = tf->tf_r5; 478 gr[_REG_R6] = tf->tf_r6; 479 gr[_REG_R7] = tf->tf_r7; 480 gr[_REG_R8] = tf->tf_r8; 481 gr[_REG_R9] = tf->tf_r9; 482 gr[_REG_R10] = tf->tf_r10; 483 gr[_REG_R11] = tf->tf_r11; 484 gr[_REG_R12] = tf->tf_r12; 485 gr[_REG_SP] = tf->tf_usr_sp; 486 gr[_REG_LR] = tf->tf_usr_lr; 487 gr[_REG_PC] = tf->tf_pc; 488 489 mcp->mc_vfp_size = 0; 490 mcp->mc_vfp_ptr = NULL; 491 memset(&mcp->mc_spare, 0, sizeof(mcp->mc_spare)); 492 493 return (0); 494} 495 496/* 497 * Set machine context. 498 * 499 * However, we don't set any but the user modifiable flags, and we won't 500 * touch the cs selector. 501 */ 502int 503set_mcontext(struct thread *td, mcontext_t *mcp) 504{ 505 mcontext_vfp_t mc_vfp, *vfp; 506 struct trapframe *tf = td->td_frame; 507 const __greg_t *gr = mcp->__gregs; 508 509#ifdef WITNESS 510 if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(mc_vfp)) { 511 printf("%s: %s: Malformed mc_vfp_size: %d (0x%08X)\n", 512 td->td_proc->p_comm, __func__, 513 mcp->mc_vfp_size, mcp->mc_vfp_size); 514 } else if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr == NULL) { 515 printf("%s: %s: c_vfp_size != 0 but mc_vfp_ptr == NULL\n", 516 td->td_proc->p_comm, __func__); 517 } 518#endif 519 520 if (mcp->mc_vfp_size == sizeof(mc_vfp) && mcp->mc_vfp_ptr != NULL) { 521 if (copyin(mcp->mc_vfp_ptr, &mc_vfp, sizeof(mc_vfp)) != 0) 522 return (EFAULT); 523 vfp = &mc_vfp; 524 } else { 525 vfp = NULL; 526 } 527 528 tf->tf_r0 = gr[_REG_R0]; 529 tf->tf_r1 = gr[_REG_R1]; 530 tf->tf_r2 = gr[_REG_R2]; 531 tf->tf_r3 = gr[_REG_R3]; 532 tf->tf_r4 = gr[_REG_R4]; 533 tf->tf_r5 = gr[_REG_R5]; 534 tf->tf_r6 = gr[_REG_R6]; 535 tf->tf_r7 = gr[_REG_R7]; 536 tf->tf_r8 = gr[_REG_R8]; 537 tf->tf_r9 = gr[_REG_R9]; 538 tf->tf_r10 = gr[_REG_R10]; 539 tf->tf_r11 = gr[_REG_R11]; 540 tf->tf_r12 = gr[_REG_R12]; 541 tf->tf_usr_sp = gr[_REG_SP]; 542 tf->tf_usr_lr = gr[_REG_LR]; 543 tf->tf_pc = gr[_REG_PC]; 544 tf->tf_spsr = gr[_REG_CPSR]; 545#ifdef VFP 546 if (vfp != NULL) 547 set_vfpcontext(td, vfp); 548#endif 549 return (0); 550} 551 552void 553sendsig(catcher, ksi, mask) 554 sig_t catcher; 555 ksiginfo_t *ksi; 556 sigset_t *mask; 557{ 558 struct thread *td; 559 struct proc *p; 560 struct trapframe *tf; 561 struct sigframe *fp, frame; 562 struct sigacts *psp; 563 struct sysentvec *sysent; 564 int onstack; 565 int sig; 566 int code; 567 568 td = curthread; 569 p = td->td_proc; 570 PROC_LOCK_ASSERT(p, MA_OWNED); 571 sig = ksi->ksi_signo; 572 code = ksi->ksi_code; 573 psp = p->p_sigacts; 574 mtx_assert(&psp->ps_mtx, MA_OWNED); 575 tf = td->td_frame; 576 onstack = sigonstack(tf->tf_usr_sp); 577 578 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm, 579 catcher, sig); 580 581 /* Allocate and validate space for the signal handler context. */ 582 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) && 583 SIGISMEMBER(psp->ps_sigonstack, sig)) { 584 fp = (struct sigframe *)((uintptr_t)td->td_sigstk.ss_sp + 585 td->td_sigstk.ss_size); 586#if defined(COMPAT_43) 587 td->td_sigstk.ss_flags |= SS_ONSTACK; 588#endif 589 } else 590 fp = (struct sigframe *)td->td_frame->tf_usr_sp; 591 592 /* make room on the stack */ 593 fp--; 594 595 /* make the stack aligned */ 596 fp = (struct sigframe *)STACKALIGN(fp); 597 /* Populate the siginfo frame. */ 598 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0); 599#ifdef VFP 600 get_vfpcontext(td, &frame.sf_vfp); 601 frame.sf_uc.uc_mcontext.mc_vfp_size = sizeof(fp->sf_vfp); 602 frame.sf_uc.uc_mcontext.mc_vfp_ptr = &fp->sf_vfp; 603#else 604 frame.sf_uc.uc_mcontext.mc_vfp_size = 0; 605 frame.sf_uc.uc_mcontext.mc_vfp_ptr = NULL; 606#endif 607 frame.sf_si = ksi->ksi_info; 608 frame.sf_uc.uc_sigmask = *mask; 609 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK ) 610 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE; 611 frame.sf_uc.uc_stack = td->td_sigstk; 612 mtx_unlock(&psp->ps_mtx); 613 PROC_UNLOCK(td->td_proc); 614 615 /* Copy the sigframe out to the user's stack. */ 616 if (copyout(&frame, fp, sizeof(*fp)) != 0) { 617 /* Process has trashed its stack. Kill it. */ 618 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp); 619 PROC_LOCK(p); 620 sigexit(td, SIGILL); 621 } 622 623 /* 624 * Build context to run handler in. We invoke the handler 625 * directly, only returning via the trampoline. Note the 626 * trampoline version numbers are coordinated with machine- 627 * dependent code in libc. 628 */ 629 630 tf->tf_r0 = sig; 631 tf->tf_r1 = (register_t)&fp->sf_si; 632 tf->tf_r2 = (register_t)&fp->sf_uc; 633 634 /* the trampoline uses r5 as the uc address */ 635 tf->tf_r5 = (register_t)&fp->sf_uc; 636 tf->tf_pc = (register_t)catcher; 637 tf->tf_usr_sp = (register_t)fp; 638 sysent = p->p_sysent; 639 if (sysent->sv_sigcode_base != 0) 640 tf->tf_usr_lr = (register_t)sysent->sv_sigcode_base; 641 else 642 tf->tf_usr_lr = (register_t)(sysent->sv_psstrings - 643 *(sysent->sv_szsigcode)); 644 /* Set the mode to enter in the signal handler */ 645#if __ARM_ARCH >= 7 646 if ((register_t)catcher & 1) 647 tf->tf_spsr |= PSR_T; 648 else 649 tf->tf_spsr &= ~PSR_T; 650#endif 651 652 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr, 653 tf->tf_usr_sp); 654 655 PROC_LOCK(p); 656 mtx_lock(&psp->ps_mtx); 657} 658 659int 660sys_sigreturn(td, uap) 661 struct thread *td; 662 struct sigreturn_args /* { 663 const struct __ucontext *sigcntxp; 664 } */ *uap; 665{ 666 ucontext_t uc; 667 int spsr; 668 669 if (uap == NULL) 670 return (EFAULT); 671 if (copyin(uap->sigcntxp, &uc, sizeof(uc))) 672 return (EFAULT); 673 /* 674 * Make sure the processor mode has not been tampered with and 675 * interrupts have not been disabled. 676 */ 677 spsr = uc.uc_mcontext.__gregs[_REG_CPSR]; 678 if ((spsr & PSR_MODE) != PSR_USR32_MODE || 679 (spsr & (PSR_I | PSR_F)) != 0) 680 return (EINVAL); 681 /* Restore register context. */ 682 set_mcontext(td, &uc.uc_mcontext); 683 684 /* Restore signal mask. */ 685 kern_sigprocmask(td, SIG_SETMASK, &uc.uc_sigmask, NULL, 0); 686 687 return (EJUSTRETURN); 688} 689 690/* 691 * Construct a PCB from a trapframe. This is called from kdb_trap() where 692 * we want to start a backtrace from the function that caused us to enter 693 * the debugger. We have the context in the trapframe, but base the trace 694 * on the PCB. The PCB doesn't have to be perfect, as long as it contains 695 * enough for a backtrace. 696 */ 697void 698makectx(struct trapframe *tf, struct pcb *pcb) 699{ 700 pcb->pcb_regs.sf_r4 = tf->tf_r4; 701 pcb->pcb_regs.sf_r5 = tf->tf_r5; 702 pcb->pcb_regs.sf_r6 = tf->tf_r6; 703 pcb->pcb_regs.sf_r7 = tf->tf_r7; 704 pcb->pcb_regs.sf_r8 = tf->tf_r8; 705 pcb->pcb_regs.sf_r9 = tf->tf_r9; 706 pcb->pcb_regs.sf_r10 = tf->tf_r10; 707 pcb->pcb_regs.sf_r11 = tf->tf_r11; 708 pcb->pcb_regs.sf_r12 = tf->tf_r12; 709 pcb->pcb_regs.sf_pc = tf->tf_pc; 710 pcb->pcb_regs.sf_lr = tf->tf_usr_lr; 711 pcb->pcb_regs.sf_sp = tf->tf_usr_sp; 712} 713 714void 715pcpu0_init(void) 716{ 717#if __ARM_ARCH >= 6 718 set_curthread(&thread0); 719#endif 720 pcpu_init(pcpup, 0, sizeof(struct pcpu)); 721 PCPU_SET(curthread, &thread0); 722} 723 724/* 725 * Initialize proc0 726 */ 727void 728init_proc0(vm_offset_t kstack) 729{ 730 proc_linkup0(&proc0, &thread0); 731 thread0.td_kstack = kstack; 732 thread0.td_pcb = (struct pcb *) 733 (thread0.td_kstack + kstack_pages * PAGE_SIZE) - 1; 734 thread0.td_pcb->pcb_flags = 0; 735 thread0.td_pcb->pcb_vfpcpu = -1; 736 thread0.td_pcb->pcb_vfpstate.fpscr = VFPSCR_DN; 737 thread0.td_frame = &proc0_tf; 738 pcpup->pc_curpcb = thread0.td_pcb; 739} 740 741#if __ARM_ARCH >= 6 742void 743set_stackptrs(int cpu) 744{ 745 746 set_stackptr(PSR_IRQ32_MODE, 747 irqstack + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 748 set_stackptr(PSR_ABT32_MODE, 749 abtstack + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 750 set_stackptr(PSR_UND32_MODE, 751 undstack + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 752} 753#else 754void 755set_stackptrs(int cpu) 756{ 757 758 set_stackptr(PSR_IRQ32_MODE, 759 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 760 set_stackptr(PSR_ABT32_MODE, 761 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 762 set_stackptr(PSR_UND32_MODE, 763 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1))); 764} 765#endif 766 767 768#ifdef FDT 769#if __ARM_ARCH < 6 770void * 771initarm(struct arm_boot_params *abp) 772{ 773 struct mem_region mem_regions[FDT_MEM_REGIONS]; 774 struct pv_addr kernel_l1pt; 775 struct pv_addr dpcpu; 776 vm_offset_t dtbp, freemempos, l2_start, lastaddr; 777 uint64_t memsize; 778 uint32_t l2size; 779 char *env; 780 void *kmdp; 781 u_int l1pagetable; 782 int i, j, err_devmap, mem_regions_sz; 783 784 lastaddr = parse_boot_param(abp); 785 arm_physmem_kernaddr = abp->abp_physaddr; 786 787 memsize = 0; 788 789 cpuinfo_init(); 790 set_cpufuncs(); 791 792 /* 793 * Find the dtb passed in by the boot loader. 794 */ 795 kmdp = preload_search_by_type("elf kernel"); 796 if (kmdp != NULL) 797 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 798 else 799 dtbp = (vm_offset_t)NULL; 800 801#if defined(FDT_DTB_STATIC) 802 /* 803 * In case the device tree blob was not retrieved (from metadata) try 804 * to use the statically embedded one. 805 */ 806 if (dtbp == (vm_offset_t)NULL) 807 dtbp = (vm_offset_t)&fdt_static_dtb; 808#endif 809 810 if (OF_install(OFW_FDT, 0) == FALSE) 811 panic("Cannot install FDT"); 812 813 if (OF_init((void *)dtbp) != 0) 814 panic("OF_init failed with the found device tree"); 815 816 /* Grab physical memory regions information from device tree. */ 817 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz, &memsize) != 0) 818 panic("Cannot get physical memory regions"); 819 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 820 821 /* Grab reserved memory regions information from device tree. */ 822 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 823 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 824 EXFLAG_NODUMP | EXFLAG_NOALLOC); 825 826 /* Platform-specific initialisation */ 827 platform_probe_and_attach(); 828 829 pcpu0_init(); 830 831 /* Do basic tuning, hz etc */ 832 init_param1(); 833 834 /* Calculate number of L2 tables needed for mapping vm_page_array */ 835 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page); 836 l2size = (l2size >> L1_S_SHIFT) + 1; 837 838 /* 839 * Add one table for end of kernel map, one for stacks, msgbuf and 840 * L1 and L2 tables map and one for vectors map. 841 */ 842 l2size += 3; 843 844 /* Make it divisible by 4 */ 845 l2size = (l2size + 3) & ~3; 846 847 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK; 848 849 /* Define a macro to simplify memory allocation */ 850#define valloc_pages(var, np) \ 851 alloc_pages((var).pv_va, (np)); \ 852 (var).pv_pa = (var).pv_va + (abp->abp_physaddr - KERNVIRTADDR); 853 854#define alloc_pages(var, np) \ 855 (var) = freemempos; \ 856 freemempos += (np * PAGE_SIZE); \ 857 memset((char *)(var), 0, ((np) * PAGE_SIZE)); 858 859 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0) 860 freemempos += PAGE_SIZE; 861 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE); 862 863 for (i = 0, j = 0; i < l2size; ++i) { 864 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) { 865 valloc_pages(kernel_pt_table[i], 866 L2_TABLE_SIZE / PAGE_SIZE); 867 j = i; 868 } else { 869 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va + 870 L2_TABLE_SIZE_REAL * (i - j); 871 kernel_pt_table[i].pv_pa = 872 kernel_pt_table[i].pv_va - KERNVIRTADDR + 873 abp->abp_physaddr; 874 875 } 876 } 877 /* 878 * Allocate a page for the system page mapped to 0x00000000 879 * or 0xffff0000. This page will just contain the system vectors 880 * and can be shared by all processes. 881 */ 882 valloc_pages(systempage, 1); 883 884 /* Allocate dynamic per-cpu area. */ 885 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE); 886 dpcpu_init((void *)dpcpu.pv_va, 0); 887 888 /* Allocate stacks for all modes */ 889 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU); 890 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU); 891 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU); 892 valloc_pages(kernelstack, kstack_pages * MAXCPU); 893 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE); 894 895 /* 896 * Now we start construction of the L1 page table 897 * We start by mapping the L2 page tables into the L1. 898 * This means that we can replace L1 mappings later on if necessary 899 */ 900 l1pagetable = kernel_l1pt.pv_va; 901 902 /* 903 * Try to map as much as possible of kernel text and data using 904 * 1MB section mapping and for the rest of initial kernel address 905 * space use L2 coarse tables. 906 * 907 * Link L2 tables for mapping remainder of kernel (modulo 1MB) 908 * and kernel structures 909 */ 910 l2_start = lastaddr & ~(L1_S_OFFSET); 911 for (i = 0 ; i < l2size - 1; i++) 912 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE, 913 &kernel_pt_table[i]); 914 915 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE; 916 917 /* Map kernel code and data */ 918 pmap_map_chunk(l1pagetable, KERNVIRTADDR, abp->abp_physaddr, 919 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK, 920 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 921 922 /* Map L1 directory and allocated L2 page tables */ 923 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa, 924 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 925 926 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va, 927 kernel_pt_table[0].pv_pa, 928 L2_TABLE_SIZE_REAL * l2size, 929 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE); 930 931 /* Map allocated DPCPU, stacks and msgbuf */ 932 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa, 933 freemempos - dpcpu.pv_va, 934 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE); 935 936 /* Link and map the vector page */ 937 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH, 938 &kernel_pt_table[l2size - 1]); 939 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa, 940 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE); 941 942 /* Establish static device mappings. */ 943 err_devmap = platform_devmap_init(); 944 devmap_bootstrap(l1pagetable, NULL); 945 vm_max_kernel_address = platform_lastaddr(); 946 947 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT); 948 pmap_pa = kernel_l1pt.pv_pa; 949 cpu_setttb(kernel_l1pt.pv_pa); 950 cpu_tlb_flushID(); 951 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)); 952 953 /* 954 * Now that proper page tables are installed, call cpu_setup() to enable 955 * instruction and data caches and other chip-specific features. 956 */ 957 cpu_setup(); 958 959 /* 960 * Only after the SOC registers block is mapped we can perform device 961 * tree fixups, as they may attempt to read parameters from hardware. 962 */ 963 OF_interpret("perform-fixup", 0); 964 965 platform_gpio_init(); 966 967 cninit(); 968 969 debugf("initarm: console initialized\n"); 970 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 971 debugf(" boothowto = 0x%08x\n", boothowto); 972 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 973 arm_print_kenv(); 974 975 env = kern_getenv("kernelname"); 976 if (env != NULL) { 977 strlcpy(kernelname, env, sizeof(kernelname)); 978 freeenv(env); 979 } 980 981 if (err_devmap != 0) 982 printf("WARNING: could not fully configure devmap, error=%d\n", 983 err_devmap); 984 985 platform_late_init(); 986 987 /* 988 * Pages were allocated during the secondary bootstrap for the 989 * stacks for different CPU modes. 990 * We must now set the r13 registers in the different CPU modes to 991 * point to these stacks. 992 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 993 * of the stack memory. 994 */ 995 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE); 996 997 set_stackptrs(0); 998 999 /* 1000 * We must now clean the cache again.... 1001 * Cleaning may be done by reading new data to displace any 1002 * dirty data in the cache. This will have happened in cpu_setttb() 1003 * but since we are boot strapping the addresses used for the read 1004 * may have just been remapped and thus the cache could be out 1005 * of sync. A re-clean after the switch will cure this. 1006 * After booting there are no gross relocations of the kernel thus 1007 * this problem will not occur after initarm(). 1008 */ 1009 cpu_idcache_wbinv_all(); 1010 1011 undefined_init(); 1012 1013 init_proc0(kernelstack.pv_va); 1014 1015 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1016 pmap_bootstrap(freemempos, &kernel_l1pt); 1017 msgbufp = (void *)msgbufpv.pv_va; 1018 msgbufinit(msgbufp, msgbufsize); 1019 mutex_init(); 1020 1021 /* 1022 * Exclude the kernel (and all the things we allocated which immediately 1023 * follow the kernel) from the VM allocation pool but not from crash 1024 * dumps. virtual_avail is a global variable which tracks the kva we've 1025 * "allocated" while setting up pmaps. 1026 * 1027 * Prepare the list of physical memory available to the vm subsystem. 1028 */ 1029 arm_physmem_exclude_region(abp->abp_physaddr, 1030 (virtual_avail - KERNVIRTADDR), EXFLAG_NOALLOC); 1031 arm_physmem_init_kernel_globals(); 1032 1033 init_param2(physmem); 1034 dbg_monitor_init(); 1035 kdb_init(); 1036 1037 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP - 1038 sizeof(struct pcb))); 1039} 1040#else /* __ARM_ARCH < 6 */ 1041void * 1042initarm(struct arm_boot_params *abp) 1043{ 1044 struct mem_region mem_regions[FDT_MEM_REGIONS]; 1045 vm_paddr_t lastaddr; 1046 vm_offset_t dtbp, kernelstack, dpcpu; 1047 char *env; 1048 void *kmdp; 1049 int err_devmap, mem_regions_sz; 1050#ifdef EFI 1051 struct efi_map_header *efihdr; 1052#endif 1053 1054 /* get last allocated physical address */ 1055 arm_physmem_kernaddr = abp->abp_physaddr; 1056 lastaddr = parse_boot_param(abp) - KERNVIRTADDR + arm_physmem_kernaddr; 1057 1058 set_cpufuncs(); 1059 cpuinfo_init(); 1060 1061 /* 1062 * Find the dtb passed in by the boot loader. 1063 */ 1064 kmdp = preload_search_by_type("elf kernel"); 1065 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t); 1066#if defined(FDT_DTB_STATIC) 1067 /* 1068 * In case the device tree blob was not retrieved (from metadata) try 1069 * to use the statically embedded one. 1070 */ 1071 if (dtbp == (vm_offset_t)NULL) 1072 dtbp = (vm_offset_t)&fdt_static_dtb; 1073#endif 1074 1075 if (OF_install(OFW_FDT, 0) == FALSE) 1076 panic("Cannot install FDT"); 1077 1078 if (OF_init((void *)dtbp) != 0) 1079 panic("OF_init failed with the found device tree"); 1080 1081#if defined(LINUX_BOOT_ABI) 1082 arm_parse_fdt_bootargs(); 1083#endif 1084 1085#ifdef EFI 1086 efihdr = (struct efi_map_header *)preload_search_info(kmdp, 1087 MODINFO_METADATA | MODINFOMD_EFI_MAP); 1088 if (efihdr != NULL) { 1089 arm_add_efi_map_entries(efihdr, mem_regions, &mem_regions_sz); 1090 } else 1091#endif 1092 { 1093 /* Grab physical memory regions information from device tree. */ 1094 if (fdt_get_mem_regions(mem_regions, &mem_regions_sz,NULL) != 0) 1095 panic("Cannot get physical memory regions"); 1096 } 1097 arm_physmem_hardware_regions(mem_regions, mem_regions_sz); 1098 1099 /* Grab reserved memory regions information from device tree. */ 1100 if (fdt_get_reserved_regions(mem_regions, &mem_regions_sz) == 0) 1101 arm_physmem_exclude_regions(mem_regions, mem_regions_sz, 1102 EXFLAG_NODUMP | EXFLAG_NOALLOC); 1103 1104 /* 1105 * Set TEX remapping registers. 1106 * Setup kernel page tables and switch to kernel L1 page table. 1107 */ 1108 pmap_set_tex(); 1109 pmap_bootstrap_prepare(lastaddr); 1110 1111 /* 1112 * Now that proper page tables are installed, call cpu_setup() to enable 1113 * instruction and data caches and other chip-specific features. 1114 */ 1115 cpu_setup(); 1116 1117 /* Platform-specific initialisation */ 1118 platform_probe_and_attach(); 1119 pcpu0_init(); 1120 1121 /* Do basic tuning, hz etc */ 1122 init_param1(); 1123 1124 /* 1125 * Allocate a page for the system page mapped to 0xffff0000 1126 * This page will just contain the system vectors and can be 1127 * shared by all processes. 1128 */ 1129 systempage = pmap_preboot_get_pages(1); 1130 1131 /* Map the vector page. */ 1132 pmap_preboot_map_pages(systempage, ARM_VECTORS_HIGH, 1); 1133 if (virtual_end >= ARM_VECTORS_HIGH) 1134 virtual_end = ARM_VECTORS_HIGH - 1; 1135 1136 /* Allocate dynamic per-cpu area. */ 1137 dpcpu = pmap_preboot_get_vpages(DPCPU_SIZE / PAGE_SIZE); 1138 dpcpu_init((void *)dpcpu, 0); 1139 1140 /* Allocate stacks for all modes */ 1141 irqstack = pmap_preboot_get_vpages(IRQ_STACK_SIZE * MAXCPU); 1142 abtstack = pmap_preboot_get_vpages(ABT_STACK_SIZE * MAXCPU); 1143 undstack = pmap_preboot_get_vpages(UND_STACK_SIZE * MAXCPU ); 1144 kernelstack = pmap_preboot_get_vpages(kstack_pages * MAXCPU); 1145 1146 /* Allocate message buffer. */ 1147 msgbufp = (void *)pmap_preboot_get_vpages( 1148 round_page(msgbufsize) / PAGE_SIZE); 1149 1150 /* 1151 * Pages were allocated during the secondary bootstrap for the 1152 * stacks for different CPU modes. 1153 * We must now set the r13 registers in the different CPU modes to 1154 * point to these stacks. 1155 * Since the ARM stacks use STMFD etc. we must set r13 to the top end 1156 * of the stack memory. 1157 */ 1158 set_stackptrs(0); 1159 mutex_init(); 1160 1161 /* Establish static device mappings. */ 1162 err_devmap = platform_devmap_init(); 1163 devmap_bootstrap(0, NULL); 1164 vm_max_kernel_address = platform_lastaddr(); 1165 1166 /* 1167 * Only after the SOC registers block is mapped we can perform device 1168 * tree fixups, as they may attempt to read parameters from hardware. 1169 */ 1170 OF_interpret("perform-fixup", 0); 1171 platform_gpio_init(); 1172 cninit(); 1173 1174 debugf("initarm: console initialized\n"); 1175 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp); 1176 debugf(" boothowto = 0x%08x\n", boothowto); 1177 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp); 1178 debugf(" lastaddr1: 0x%08x\n", lastaddr); 1179 arm_print_kenv(); 1180 1181 env = kern_getenv("kernelname"); 1182 if (env != NULL) 1183 strlcpy(kernelname, env, sizeof(kernelname)); 1184 1185 if (err_devmap != 0) 1186 printf("WARNING: could not fully configure devmap, error=%d\n", 1187 err_devmap); 1188 1189 platform_late_init(); 1190 1191 /* 1192 * We must now clean the cache again.... 1193 * Cleaning may be done by reading new data to displace any 1194 * dirty data in the cache. This will have happened in cpu_setttb() 1195 * but since we are boot strapping the addresses used for the read 1196 * may have just been remapped and thus the cache could be out 1197 * of sync. A re-clean after the switch will cure this. 1198 * After booting there are no gross relocations of the kernel thus 1199 * this problem will not occur after initarm(). 1200 */ 1201 /* Set stack for exception handlers */ 1202 undefined_init(); 1203 init_proc0(kernelstack); 1204 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL); 1205 enable_interrupts(PSR_A); 1206 pmap_bootstrap(0); 1207 1208 /* Exclude the kernel (and all the things we allocated which immediately 1209 * follow the kernel) from the VM allocation pool but not from crash 1210 * dumps. virtual_avail is a global variable which tracks the kva we've 1211 * "allocated" while setting up pmaps. 1212 * 1213 * Prepare the list of physical memory available to the vm subsystem. 1214 */ 1215 arm_physmem_exclude_region(abp->abp_physaddr, 1216 pmap_preboot_get_pages(0) - abp->abp_physaddr, EXFLAG_NOALLOC); 1217 arm_physmem_init_kernel_globals(); 1218 1219 init_param2(physmem); 1220 /* Init message buffer. */ 1221 msgbufinit(msgbufp, msgbufsize); 1222 dbg_monitor_init(); 1223 kdb_init(); 1224 return ((void *)STACKALIGN(thread0.td_pcb)); 1225 1226} 1227 1228#endif /* __ARM_ARCH < 6 */ 1229#endif /* FDT */ 1230