a10_ehci.c revision 304562 
1/*-
2 * Copyright (c) 2012 Ganbold Tsagaankhuu <ganbold@freebsd.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27/*
28 * Allwinner A10 attachment driver for the USB Enhanced Host Controller.
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD: stable/11/sys/arm/allwinner/a10_ehci.c 304562 2016-08-21 15:45:12Z manu $");
33
34#include "opt_bus.h"
35
36#include <sys/param.h>
37#include <sys/systm.h>
38#include <sys/bus.h>
39#include <sys/rman.h>
40#include <sys/condvar.h>
41#include <sys/kernel.h>
42#include <sys/module.h>
43
44#include <machine/bus.h>
45#include <dev/ofw/ofw_bus.h>
46#include <dev/ofw/ofw_bus_subr.h>
47
48#include <dev/usb/usb.h>
49#include <dev/usb/usbdi.h>
50
51#include <dev/usb/usb_core.h>
52#include <dev/usb/usb_busdma.h>
53#include <dev/usb/usb_process.h>
54#include <dev/usb/usb_util.h>
55
56#include <dev/usb/usb_controller.h>
57#include <dev/usb/usb_bus.h>
58#include <dev/usb/controller/ehci.h>
59#include <dev/usb/controller/ehcireg.h>
60
61#include <arm/allwinner/allwinner_machdep.h>
62#include <dev/extres/clk/clk.h>
63#include <dev/extres/hwreset/hwreset.h>
64#include <dev/extres/phy/phy.h>
65
66#define EHCI_HC_DEVSTR			"Allwinner Integrated USB 2.0 controller"
67
68#define SW_USB_PMU_IRQ_ENABLE		0x800
69
70#define SW_SDRAM_REG_HPCR_USB1		(0x250 + ((1 << 2) * 4))
71#define SW_SDRAM_REG_HPCR_USB2		(0x250 + ((1 << 2) * 5))
72#define SW_SDRAM_BP_HPCR_ACCESS		(1 << 0)
73
74#define SW_ULPI_BYPASS			(1 << 0)
75#define SW_AHB_INCRX_ALIGN		(1 << 8)
76#define SW_AHB_INCR4			(1 << 9)
77#define SW_AHB_INCR8			(1 << 10)
78
79#define	USB_CONF(d)			\
80	(void *)ofw_bus_search_compatible((d), compat_data)->ocd_data
81
82#define A10_READ_4(sc, reg)		\
83	bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
84
85#define A10_WRITE_4(sc, reg, data)	\
86	bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
87
88static device_attach_t a10_ehci_attach;
89static device_detach_t a10_ehci_detach;
90
91bs_r_1_proto(reversed);
92bs_w_1_proto(reversed);
93
94struct aw_ehci_softc {
95	ehci_softc_t	sc;
96	clk_t		clk;
97	hwreset_t	rst;
98	phy_t		phy;
99};
100
101struct aw_ehci_conf {
102	bool		sdram_init;
103};
104
105static const struct aw_ehci_conf a10_ehci_conf = {
106	.sdram_init = true,
107};
108
109static const struct aw_ehci_conf a31_ehci_conf = {
110	.sdram_init = false,
111};
112
113static struct ofw_compat_data compat_data[] = {
114	{ "allwinner,sun4i-a10-ehci",	(uintptr_t)&a10_ehci_conf },
115	{ "allwinner,sun6i-a31-ehci",	(uintptr_t)&a31_ehci_conf },
116	{ "allwinner,sun7i-a20-ehci",	(uintptr_t)&a10_ehci_conf },
117	{ "allwinner,sun8i-a83t-ehci",	(uintptr_t)&a31_ehci_conf },
118	{ "allwinner,sun8i-h3-ehci",	(uintptr_t)&a31_ehci_conf },
119	{ NULL,				(uintptr_t)NULL }
120};
121
122static int
123a10_ehci_probe(device_t self)
124{
125
126	if (!ofw_bus_status_okay(self))
127		return (ENXIO);
128
129	if (ofw_bus_search_compatible(self, compat_data)->ocd_data == 0)
130		return (ENXIO);
131
132	device_set_desc(self, EHCI_HC_DEVSTR);
133
134	return (BUS_PROBE_DEFAULT);
135}
136
137static int
138a10_ehci_attach(device_t self)
139{
140	struct aw_ehci_softc *aw_sc = device_get_softc(self);
141	ehci_softc_t *sc = &aw_sc->sc;
142	const struct aw_ehci_conf *conf;
143	bus_space_handle_t bsh;
144	int err;
145	int rid;
146	uint32_t reg_value = 0;
147
148	conf = USB_CONF(self);
149
150	/* initialise some bus fields */
151	sc->sc_bus.parent = self;
152	sc->sc_bus.devices = sc->sc_devices;
153	sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
154	sc->sc_bus.dma_bits = 32;
155
156	/* get all DMA memory */
157	if (usb_bus_mem_alloc_all(&sc->sc_bus,
158	    USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
159		return (ENOMEM);
160	}
161
162	sc->sc_bus.usbrev = USB_REV_2_0;
163
164	rid = 0;
165	sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
166	if (!sc->sc_io_res) {
167		device_printf(self, "Could not map memory\n");
168		goto error;
169	}
170
171	sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
172	sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
173	bsh = rman_get_bushandle(sc->sc_io_res);
174
175	sc->sc_io_size = rman_get_size(sc->sc_io_res);
176
177	if (bus_space_subregion(sc->sc_io_tag, bsh, 0x00,
178	    sc->sc_io_size, &sc->sc_io_hdl) != 0)
179		panic("%s: unable to subregion USB host registers",
180		    device_get_name(self));
181
182	rid = 0;
183	sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
184	    RF_SHAREABLE | RF_ACTIVE);
185	if (sc->sc_irq_res == NULL) {
186		device_printf(self, "Could not allocate irq\n");
187		goto error;
188	}
189	sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
190	if (!sc->sc_bus.bdev) {
191		device_printf(self, "Could not add USB device\n");
192		goto error;
193	}
194	device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
195	device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
196
197	sprintf(sc->sc_vendor, "Allwinner");
198
199	err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
200	    NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
201	if (err) {
202		device_printf(self, "Could not setup irq, %d\n", err);
203		sc->sc_intr_hdl = NULL;
204		goto error;
205	}
206
207	sc->sc_flags |= EHCI_SCFLG_DONTRESET;
208
209	/* De-assert reset */
210	if (hwreset_get_by_ofw_idx(self, 0, &aw_sc->rst) == 0) {
211		err = hwreset_deassert(aw_sc->rst);
212		if (err != 0) {
213			device_printf(self, "Could not de-assert reset\n");
214			goto error;
215		}
216	}
217
218	/* Enable clock for USB */
219	err = clk_get_by_ofw_index(self, 0, &aw_sc->clk);
220	if (err != 0) {
221		device_printf(self, "Could not get clock\n");
222		goto error;
223	}
224	err = clk_enable(aw_sc->clk);
225	if (err != 0) {
226		device_printf(self, "Could not enable clock\n");
227		goto error;
228	}
229
230	/* Enable USB PHY */
231	err = phy_get_by_ofw_name(self, "usb", &aw_sc->phy);
232	if (err != 0) {
233		device_printf(self, "Could not get phy\n");
234		goto error;
235	}
236	err = phy_enable(self, aw_sc->phy);
237	if (err != 0) {
238		device_printf(self, "Could not enable phy\n");
239		goto error;
240	}
241
242	/* Enable passby */
243	reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
244	reg_value |= SW_AHB_INCR8; /* AHB INCR8 enable */
245	reg_value |= SW_AHB_INCR4; /* AHB burst type INCR4 enable */
246	reg_value |= SW_AHB_INCRX_ALIGN; /* AHB INCRX align enable */
247	reg_value |= SW_ULPI_BYPASS; /* ULPI bypass enable */
248	A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
249
250	/* Configure port */
251	if (conf->sdram_init) {
252		reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
253		reg_value |= SW_SDRAM_BP_HPCR_ACCESS;
254		A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
255	}
256
257	err = ehci_init(sc);
258	if (!err) {
259		err = device_probe_and_attach(sc->sc_bus.bdev);
260	}
261	if (err) {
262		device_printf(self, "USB init failed err=%d\n", err);
263		goto error;
264	}
265	return (0);
266
267error:
268	if (aw_sc->clk)
269		clk_release(aw_sc->clk);
270	a10_ehci_detach(self);
271	return (ENXIO);
272}
273
274static int
275a10_ehci_detach(device_t self)
276{
277	struct aw_ehci_softc *aw_sc = device_get_softc(self);
278	ehci_softc_t *sc = &aw_sc->sc;
279	const struct aw_ehci_conf *conf;
280	device_t bdev;
281	int err;
282	uint32_t reg_value = 0;
283
284	conf = USB_CONF(self);
285
286	if (sc->sc_bus.bdev) {
287		bdev = sc->sc_bus.bdev;
288		device_detach(bdev);
289		device_delete_child(self, bdev);
290	}
291	/* during module unload there are lots of children leftover */
292	device_delete_children(self);
293
294	if (sc->sc_irq_res && sc->sc_intr_hdl) {
295		/*
296		 * only call ehci_detach() after ehci_init()
297		 */
298		ehci_detach(sc);
299
300		err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
301
302		if (err)
303			/* XXX or should we panic? */
304			device_printf(self, "Could not tear down irq, %d\n",
305			    err);
306		sc->sc_intr_hdl = NULL;
307	}
308
309	if (sc->sc_irq_res) {
310		bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
311		sc->sc_irq_res = NULL;
312	}
313	if (sc->sc_io_res) {
314		bus_release_resource(self, SYS_RES_MEMORY, 0,
315		    sc->sc_io_res);
316		sc->sc_io_res = NULL;
317	}
318	usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
319
320	/* Disable configure port */
321	if (conf->sdram_init) {
322		reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
323		reg_value &= ~SW_SDRAM_BP_HPCR_ACCESS;
324		A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
325	}
326
327	/* Disable passby */
328	reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
329	reg_value &= ~SW_AHB_INCR8; /* AHB INCR8 disable */
330	reg_value &= ~SW_AHB_INCR4; /* AHB burst type INCR4 disable */
331	reg_value &= ~SW_AHB_INCRX_ALIGN; /* AHB INCRX align disable */
332	reg_value &= ~SW_ULPI_BYPASS; /* ULPI bypass disable */
333	A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
334
335	/* Disable clock for USB */
336	clk_disable(aw_sc->clk);
337	clk_release(aw_sc->clk);
338
339	/* Assert reset */
340	if (aw_sc->rst != NULL) {
341		hwreset_assert(aw_sc->rst);
342		hwreset_release(aw_sc->rst);
343	}
344
345	return (0);
346}
347
348static device_method_t ehci_methods[] = {
349	/* Device interface */
350	DEVMETHOD(device_probe, a10_ehci_probe),
351	DEVMETHOD(device_attach, a10_ehci_attach),
352	DEVMETHOD(device_detach, a10_ehci_detach),
353	DEVMETHOD(device_suspend, bus_generic_suspend),
354	DEVMETHOD(device_resume, bus_generic_resume),
355	DEVMETHOD(device_shutdown, bus_generic_shutdown),
356
357	DEVMETHOD_END
358};
359
360static driver_t ehci_driver = {
361	.name = "ehci",
362	.methods = ehci_methods,
363	.size = sizeof(struct aw_ehci_softc),
364};
365
366static devclass_t ehci_devclass;
367
368DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
369MODULE_DEPEND(ehci, usb, 1, 1, 1);
370