LiveStacks.h revision 360784 
1//===- LiveStacks.h - Live Stack Slot Analysis ------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file implements the live stack slot analysis pass. It is analogous to
10// live interval analysis except it's analyzing liveness of stack slots rather
11// than registers.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_CODEGEN_LIVESTACKS_H
16#define LLVM_CODEGEN_LIVESTACKS_H
17
18#include "llvm/CodeGen/LiveInterval.h"
19#include "llvm/CodeGen/MachineFunctionPass.h"
20#include "llvm/InitializePasses.h"
21#include "llvm/Pass.h"
22#include <cassert>
23#include <map>
24#include <unordered_map>
25
26namespace llvm {
27
28class TargetRegisterClass;
29class TargetRegisterInfo;
30
31class LiveStacks : public MachineFunctionPass {
32  const TargetRegisterInfo *TRI;
33
34  /// Special pool allocator for VNInfo's (LiveInterval val#).
35  ///
36  VNInfo::Allocator VNInfoAllocator;
37
38  /// S2IMap - Stack slot indices to live interval mapping.
39  using SS2IntervalMap = std::unordered_map<int, LiveInterval>;
40  SS2IntervalMap S2IMap;
41
42  /// S2RCMap - Stack slot indices to register class mapping.
43  std::map<int, const TargetRegisterClass *> S2RCMap;
44
45public:
46  static char ID; // Pass identification, replacement for typeid
47
48  LiveStacks() : MachineFunctionPass(ID) {
49    initializeLiveStacksPass(*PassRegistry::getPassRegistry());
50  }
51
52  using iterator = SS2IntervalMap::iterator;
53  using const_iterator = SS2IntervalMap::const_iterator;
54
55  const_iterator begin() const { return S2IMap.begin(); }
56  const_iterator end() const { return S2IMap.end(); }
57  iterator begin() { return S2IMap.begin(); }
58  iterator end() { return S2IMap.end(); }
59
60  unsigned getNumIntervals() const { return (unsigned)S2IMap.size(); }
61
62  LiveInterval &getOrCreateInterval(int Slot, const TargetRegisterClass *RC);
63
64  LiveInterval &getInterval(int Slot) {
65    assert(Slot >= 0 && "Spill slot indice must be >= 0");
66    SS2IntervalMap::iterator I = S2IMap.find(Slot);
67    assert(I != S2IMap.end() && "Interval does not exist for stack slot");
68    return I->second;
69  }
70
71  const LiveInterval &getInterval(int Slot) const {
72    assert(Slot >= 0 && "Spill slot indice must be >= 0");
73    SS2IntervalMap::const_iterator I = S2IMap.find(Slot);
74    assert(I != S2IMap.end() && "Interval does not exist for stack slot");
75    return I->second;
76  }
77
78  bool hasInterval(int Slot) const { return S2IMap.count(Slot); }
79
80  const TargetRegisterClass *getIntervalRegClass(int Slot) const {
81    assert(Slot >= 0 && "Spill slot indice must be >= 0");
82    std::map<int, const TargetRegisterClass *>::const_iterator I =
83        S2RCMap.find(Slot);
84    assert(I != S2RCMap.end() &&
85           "Register class info does not exist for stack slot");
86    return I->second;
87  }
88
89  VNInfo::Allocator &getVNInfoAllocator() { return VNInfoAllocator; }
90
91  void getAnalysisUsage(AnalysisUsage &AU) const override;
92  void releaseMemory() override;
93
94  /// runOnMachineFunction - pass entry point
95  bool runOnMachineFunction(MachineFunction &) override;
96
97  /// print - Implement the dump method.
98  void print(raw_ostream &O, const Module * = nullptr) const override;
99};
100
101} // end namespace llvm
102
103#endif
104