RegisterInfos_x86_64.h revision 360784
1//===-- RegisterInfos_x86_64.h ----------------------------------*- C++ -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8 9// This file is meant to be textually included. Do not #include modular 10// headers here. 11 12// Computes the offset of the given GPR in the user data area. 13#define GPR_OFFSET(regname) (LLVM_EXTENSION offsetof(GPR, regname)) 14 15// Computes the offset of the given FPR in the extended data area. 16#define FPR_OFFSET(regname) \ 17 (LLVM_EXTENSION offsetof(UserArea, fpr) + \ 18 LLVM_EXTENSION offsetof(FPR, fxsave) + \ 19 LLVM_EXTENSION offsetof(FXSAVE, regname)) 20 21// Computes the offset of the YMM register assembled from register halves. 22// Based on DNBArchImplX86_64.cpp from debugserver 23#define YMM_OFFSET(reg_index) \ 24 (LLVM_EXTENSION offsetof(UserArea, fpr) + \ 25 LLVM_EXTENSION offsetof(FPR, xsave) + \ 26 LLVM_EXTENSION offsetof(XSAVE, ymmh[0]) + (32 * reg_index)) 27 28// Guarantees BNDR/BNDC offsets do not overlap with YMM offsets. 29#define GDB_REMOTE_OFFSET 128 30 31#define BNDR_OFFSET(reg_index) \ 32 (LLVM_EXTENSION offsetof(UserArea, fpr) + \ 33 LLVM_EXTENSION offsetof(FPR, xsave) + \ 34 LLVM_EXTENSION offsetof(XSAVE, mpxr[reg_index]) + GDB_REMOTE_OFFSET) 35 36#define BNDC_OFFSET(reg_index) \ 37 (LLVM_EXTENSION offsetof(UserArea, fpr) + \ 38 LLVM_EXTENSION offsetof(FPR, xsave) + \ 39 LLVM_EXTENSION offsetof(XSAVE, mpxc[reg_index]) + GDB_REMOTE_OFFSET) 40 41#ifdef DECLARE_REGISTER_INFOS_X86_64_STRUCT 42 43// Number of bytes needed to represent a FPR. 44#define FPR_SIZE(reg) sizeof(((FXSAVE *)nullptr)->reg) 45 46// Number of bytes needed to represent the i'th FP register. 47#define FP_SIZE sizeof(((MMSReg *)nullptr)->bytes) 48 49// Number of bytes needed to represent an XMM register. 50#define XMM_SIZE sizeof(XMMReg) 51 52// Number of bytes needed to represent a YMM register. 53#define YMM_SIZE sizeof(YMMReg) 54 55// Number of bytes needed to represent MPX registers. 56#define BNDR_SIZE sizeof(MPXReg) 57#define BNDC_SIZE sizeof(MPXCsr) 58 59#define DR_SIZE sizeof(((DBG *)nullptr)->dr[0]) 60 61// RegisterKind: EHFrame, DWARF, Generic, Process Plugin, LLDB 62 63// Note that the size and offset will be updated by platform-specific classes. 64#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \ 65 { \ 66 #reg, alt, sizeof(((GPR *)nullptr)->reg), \ 67 GPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 68 {kind1, kind2, kind3, kind4, \ 69 lldb_##reg##_x86_64 }, \ 70 nullptr, nullptr, nullptr, 0 \ 71 } 72 73#define DEFINE_FPR(name, reg, kind1, kind2, kind3, kind4) \ 74 { \ 75 #name, nullptr, FPR_SIZE(reg), FPR_OFFSET(reg), eEncodingUint, eFormatHex, \ 76 {kind1, kind2, kind3, kind4, \ 77 lldb_##name##_x86_64 }, \ 78 nullptr, nullptr, nullptr, 0 \ 79 } 80 81#define DEFINE_FP_ST(reg, i) \ 82 { \ 83 #reg #i, nullptr, FP_SIZE, \ 84 LLVM_EXTENSION FPR_OFFSET( \ 85 stmm[i]), eEncodingVector, eFormatVectorOfUInt8, \ 86 {dwarf_st##i##_x86_64, dwarf_st##i##_x86_64, LLDB_INVALID_REGNUM, \ 87 LLDB_INVALID_REGNUM, lldb_st##i##_x86_64 }, \ 88 nullptr, nullptr, nullptr, 0 \ 89 } 90 91#define DEFINE_FP_MM(reg, i) \ 92 { \ 93 #reg #i, nullptr, sizeof(uint64_t), \ 94 LLVM_EXTENSION FPR_OFFSET( \ 95 stmm[i]), eEncodingUint, eFormatHex, \ 96 {dwarf_mm##i##_x86_64, dwarf_mm##i##_x86_64, \ 97 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 98 lldb_mm##i##_x86_64 }, \ 99 nullptr, nullptr, nullptr, 0 \ 100 } 101 102#define DEFINE_XMM(reg, i) \ 103 { \ 104 #reg #i, nullptr, XMM_SIZE, \ 105 LLVM_EXTENSION FPR_OFFSET( \ 106 reg[i]), eEncodingVector, eFormatVectorOfUInt8, \ 107 {dwarf_##reg##i##_x86_64, dwarf_##reg##i##_x86_64, \ 108 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 109 lldb_##reg##i##_x86_64 }, \ 110 nullptr, nullptr, nullptr, 0 \ 111 } 112 113#define DEFINE_YMM(reg, i) \ 114 { \ 115 #reg #i, nullptr, YMM_SIZE, \ 116 LLVM_EXTENSION YMM_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \ 117 {dwarf_##reg##i##h_x86_64, \ 118 dwarf_##reg##i##h_x86_64, \ 119 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 120 lldb_##reg##i##_x86_64 }, \ 121 nullptr, nullptr, nullptr, 0 \ 122 } 123 124#define DEFINE_BNDR(reg, i) \ 125 { \ 126 #reg #i, nullptr, BNDR_SIZE, \ 127 LLVM_EXTENSION BNDR_OFFSET(i), eEncodingVector, eFormatVectorOfUInt64, \ 128 {dwarf_##reg##i##_x86_64, \ 129 dwarf_##reg##i##_x86_64, \ 130 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 131 lldb_##reg##i##_x86_64 }, \ 132 nullptr, nullptr, nullptr, 0 \ 133 } 134 135#define DEFINE_BNDC(name, i) \ 136 { \ 137 #name, nullptr, BNDC_SIZE, \ 138 LLVM_EXTENSION BNDC_OFFSET(i), eEncodingVector, eFormatVectorOfUInt8, \ 139 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 140 LLDB_INVALID_REGNUM, lldb_##name##_x86_64 }, \ 141 nullptr, nullptr, nullptr, 0 \ 142 } 143 144#define DEFINE_DR(reg, i) \ 145 { \ 146 #reg #i, nullptr, DR_SIZE, \ 147 DR_OFFSET(i), eEncodingUint, eFormatHex, \ 148 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 149 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 150 lldb_##reg##i##_x86_64 }, \ 151 nullptr, nullptr, nullptr, 0 \ 152 } 153 154#define DEFINE_GPR_PSEUDO_32(reg32, reg64) \ 155 { \ 156 #reg32, nullptr, 4, \ 157 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \ 158 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 159 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 160 lldb_##reg32##_x86_64 }, \ 161 RegisterContextPOSIX_x86::g_contained_##reg64, \ 162 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \ 163 } 164 165#define DEFINE_GPR_PSEUDO_16(reg16, reg64) \ 166 { \ 167 #reg16, nullptr, 2, \ 168 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \ 169 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 170 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 171 lldb_##reg16##_x86_64 }, \ 172 RegisterContextPOSIX_x86::g_contained_##reg64, \ 173 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \ 174 } 175 176#define DEFINE_GPR_PSEUDO_8H(reg8, reg64) \ 177 { \ 178 #reg8, nullptr, 1, \ 179 GPR_OFFSET(reg64) + 1, eEncodingUint, eFormatHex, \ 180 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 181 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 182 lldb_##reg8##_x86_64 }, \ 183 RegisterContextPOSIX_x86::g_contained_##reg64, \ 184 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \ 185 } 186 187#define DEFINE_GPR_PSEUDO_8L(reg8, reg64) \ 188 { \ 189 #reg8, nullptr, 1, \ 190 GPR_OFFSET(reg64), eEncodingUint, eFormatHex, \ 191 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 192 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 193 lldb_##reg8##_x86_64 }, \ 194 RegisterContextPOSIX_x86::g_contained_##reg64, \ 195 RegisterContextPOSIX_x86::g_invalidate_##reg64, nullptr, 0 \ 196 } 197 198// clang-format off 199static RegisterInfo g_register_infos_x86_64[] = { 200// General purpose registers EH_Frame DWARF Generic Process Plugin 201// =========================== ================== ================ ========================= ==================== 202 DEFINE_GPR(rax, nullptr, dwarf_rax_x86_64, dwarf_rax_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 203 DEFINE_GPR(rbx, nullptr, dwarf_rbx_x86_64, dwarf_rbx_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 204 DEFINE_GPR(rcx, "arg4", dwarf_rcx_x86_64, dwarf_rcx_x86_64, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM), 205 DEFINE_GPR(rdx, "arg3", dwarf_rdx_x86_64, dwarf_rdx_x86_64, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM), 206 DEFINE_GPR(rdi, "arg1", dwarf_rdi_x86_64, dwarf_rdi_x86_64, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM), 207 DEFINE_GPR(rsi, "arg2", dwarf_rsi_x86_64, dwarf_rsi_x86_64, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM), 208 DEFINE_GPR(rbp, "fp", dwarf_rbp_x86_64, dwarf_rbp_x86_64, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM), 209 DEFINE_GPR(rsp, "sp", dwarf_rsp_x86_64, dwarf_rsp_x86_64, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM), 210 DEFINE_GPR(r8, "arg5", dwarf_r8_x86_64, dwarf_r8_x86_64, LLDB_REGNUM_GENERIC_ARG5, LLDB_INVALID_REGNUM), 211 DEFINE_GPR(r9, "arg6", dwarf_r9_x86_64, dwarf_r9_x86_64, LLDB_REGNUM_GENERIC_ARG6, LLDB_INVALID_REGNUM), 212 DEFINE_GPR(r10, nullptr, dwarf_r10_x86_64, dwarf_r10_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 213 DEFINE_GPR(r11, nullptr, dwarf_r11_x86_64, dwarf_r11_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 214 DEFINE_GPR(r12, nullptr, dwarf_r12_x86_64, dwarf_r12_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 215 DEFINE_GPR(r13, nullptr, dwarf_r13_x86_64, dwarf_r13_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 216 DEFINE_GPR(r14, nullptr, dwarf_r14_x86_64, dwarf_r14_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 217 DEFINE_GPR(r15, nullptr, dwarf_r15_x86_64, dwarf_r15_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 218 DEFINE_GPR(rip, "pc", dwarf_rip_x86_64, dwarf_rip_x86_64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM), 219 DEFINE_GPR(rflags, "flags", dwarf_rflags_x86_64, dwarf_rflags_x86_64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM), 220 DEFINE_GPR(cs, nullptr, dwarf_cs_x86_64, dwarf_cs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 221 DEFINE_GPR(fs, nullptr, dwarf_fs_x86_64, dwarf_fs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 222 DEFINE_GPR(gs, nullptr, dwarf_gs_x86_64, dwarf_gs_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 223 DEFINE_GPR(ss, nullptr, dwarf_ss_x86_64, dwarf_ss_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 224 DEFINE_GPR(ds, nullptr, dwarf_ds_x86_64, dwarf_ds_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 225 DEFINE_GPR(es, nullptr, dwarf_es_x86_64, dwarf_es_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 226 227 DEFINE_GPR_PSEUDO_32(eax, rax), DEFINE_GPR_PSEUDO_32(ebx, rbx), 228 DEFINE_GPR_PSEUDO_32(ecx, rcx), DEFINE_GPR_PSEUDO_32(edx, rdx), 229 DEFINE_GPR_PSEUDO_32(edi, rdi), DEFINE_GPR_PSEUDO_32(esi, rsi), 230 DEFINE_GPR_PSEUDO_32(ebp, rbp), DEFINE_GPR_PSEUDO_32(esp, rsp), 231 DEFINE_GPR_PSEUDO_32(r8d, r8), DEFINE_GPR_PSEUDO_32(r9d, r9), 232 DEFINE_GPR_PSEUDO_32(r10d, r10), DEFINE_GPR_PSEUDO_32(r11d, r11), 233 DEFINE_GPR_PSEUDO_32(r12d, r12), DEFINE_GPR_PSEUDO_32(r13d, r13), 234 DEFINE_GPR_PSEUDO_32(r14d, r14), DEFINE_GPR_PSEUDO_32(r15d, r15), 235 DEFINE_GPR_PSEUDO_16(ax, rax), DEFINE_GPR_PSEUDO_16(bx, rbx), 236 DEFINE_GPR_PSEUDO_16(cx, rcx), DEFINE_GPR_PSEUDO_16(dx, rdx), 237 DEFINE_GPR_PSEUDO_16(di, rdi), DEFINE_GPR_PSEUDO_16(si, rsi), 238 DEFINE_GPR_PSEUDO_16(bp, rbp), DEFINE_GPR_PSEUDO_16(sp, rsp), 239 DEFINE_GPR_PSEUDO_16(r8w, r8), DEFINE_GPR_PSEUDO_16(r9w, r9), 240 DEFINE_GPR_PSEUDO_16(r10w, r10), DEFINE_GPR_PSEUDO_16(r11w, r11), 241 DEFINE_GPR_PSEUDO_16(r12w, r12), DEFINE_GPR_PSEUDO_16(r13w, r13), 242 DEFINE_GPR_PSEUDO_16(r14w, r14), DEFINE_GPR_PSEUDO_16(r15w, r15), 243 DEFINE_GPR_PSEUDO_8H(ah, rax), DEFINE_GPR_PSEUDO_8H(bh, rbx), 244 DEFINE_GPR_PSEUDO_8H(ch, rcx), DEFINE_GPR_PSEUDO_8H(dh, rdx), 245 DEFINE_GPR_PSEUDO_8L(al, rax), DEFINE_GPR_PSEUDO_8L(bl, rbx), 246 DEFINE_GPR_PSEUDO_8L(cl, rcx), DEFINE_GPR_PSEUDO_8L(dl, rdx), 247 DEFINE_GPR_PSEUDO_8L(dil, rdi), DEFINE_GPR_PSEUDO_8L(sil, rsi), 248 DEFINE_GPR_PSEUDO_8L(bpl, rbp), DEFINE_GPR_PSEUDO_8L(spl, rsp), 249 DEFINE_GPR_PSEUDO_8L(r8l, r8), DEFINE_GPR_PSEUDO_8L(r9l, r9), 250 DEFINE_GPR_PSEUDO_8L(r10l, r10), DEFINE_GPR_PSEUDO_8L(r11l, r11), 251 DEFINE_GPR_PSEUDO_8L(r12l, r12), DEFINE_GPR_PSEUDO_8L(r13l, r13), 252 DEFINE_GPR_PSEUDO_8L(r14l, r14), DEFINE_GPR_PSEUDO_8L(r15l, r15), 253 254// i387 Floating point registers. EH_frame DWARF Generic Process Plugin 255// ====================================== =============== ================== =================== ==================== 256 DEFINE_FPR(fctrl, fctrl, dwarf_fctrl_x86_64, dwarf_fctrl_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 257 DEFINE_FPR(fstat, fstat, dwarf_fstat_x86_64, dwarf_fstat_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 258 DEFINE_FPR(ftag, ftag, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 259 DEFINE_FPR(fop, fop, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 260 DEFINE_FPR(fiseg, ptr.i386_.fiseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 261 DEFINE_FPR(fioff, ptr.i386_.fioff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 262 DEFINE_FPR(foseg, ptr.i386_.foseg, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 263 DEFINE_FPR(fooff, ptr.i386_.fooff, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 264 DEFINE_FPR(mxcsr, mxcsr, dwarf_mxcsr_x86_64, dwarf_mxcsr_x86_64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 265 DEFINE_FPR(mxcsrmask, mxcsrmask, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM), 266 267 // FP registers. 268 DEFINE_FP_ST(st, 0), DEFINE_FP_ST(st, 1), DEFINE_FP_ST(st, 2), 269 DEFINE_FP_ST(st, 3), DEFINE_FP_ST(st, 4), DEFINE_FP_ST(st, 5), 270 DEFINE_FP_ST(st, 6), DEFINE_FP_ST(st, 7), DEFINE_FP_MM(mm, 0), 271 DEFINE_FP_MM(mm, 1), DEFINE_FP_MM(mm, 2), DEFINE_FP_MM(mm, 3), 272 DEFINE_FP_MM(mm, 4), DEFINE_FP_MM(mm, 5), DEFINE_FP_MM(mm, 6), 273 DEFINE_FP_MM(mm, 7), 274 275 // XMM registers 276 DEFINE_XMM(xmm, 0), DEFINE_XMM(xmm, 1), DEFINE_XMM(xmm, 2), 277 DEFINE_XMM(xmm, 3), DEFINE_XMM(xmm, 4), DEFINE_XMM(xmm, 5), 278 DEFINE_XMM(xmm, 6), DEFINE_XMM(xmm, 7), DEFINE_XMM(xmm, 8), 279 DEFINE_XMM(xmm, 9), DEFINE_XMM(xmm, 10), DEFINE_XMM(xmm, 11), 280 DEFINE_XMM(xmm, 12), DEFINE_XMM(xmm, 13), DEFINE_XMM(xmm, 14), 281 DEFINE_XMM(xmm, 15), 282 283 // Copy of YMM registers assembled from xmm and ymmh 284 DEFINE_YMM(ymm, 0), DEFINE_YMM(ymm, 1), DEFINE_YMM(ymm, 2), 285 DEFINE_YMM(ymm, 3), DEFINE_YMM(ymm, 4), DEFINE_YMM(ymm, 5), 286 DEFINE_YMM(ymm, 6), DEFINE_YMM(ymm, 7), DEFINE_YMM(ymm, 8), 287 DEFINE_YMM(ymm, 9), DEFINE_YMM(ymm, 10), DEFINE_YMM(ymm, 11), 288 DEFINE_YMM(ymm, 12), DEFINE_YMM(ymm, 13), DEFINE_YMM(ymm, 14), 289 DEFINE_YMM(ymm, 15), 290 291 // MPX registers 292 DEFINE_BNDR(bnd, 0), 293 DEFINE_BNDR(bnd, 1), 294 DEFINE_BNDR(bnd, 2), 295 DEFINE_BNDR(bnd, 3), 296 297 DEFINE_BNDC(bndcfgu, 0), 298 DEFINE_BNDC(bndstatus, 1), 299 300 // Debug registers for lldb internal use 301 DEFINE_DR(dr, 0), DEFINE_DR(dr, 1), DEFINE_DR(dr, 2), DEFINE_DR(dr, 3), 302 DEFINE_DR(dr, 4), DEFINE_DR(dr, 5), DEFINE_DR(dr, 6), DEFINE_DR(dr, 7)}; 303 304// clang-format on 305 306static_assert((sizeof(g_register_infos_x86_64) / 307 sizeof(g_register_infos_x86_64[0])) == k_num_registers_x86_64, 308 "g_register_infos_x86_64 has wrong number of register infos"); 309 310#undef FPR_SIZE 311#undef FP_SIZE 312#undef XMM_SIZE 313#undef YMM_SIZE 314#undef DEFINE_GPR 315#undef DEFINE_FPR 316#undef DEFINE_FP 317#undef DEFINE_XMM 318#undef DEFINE_YMM 319#undef DEFINE_BNDR 320#undef DEFINE_BNDC 321#undef DEFINE_DR 322#undef DEFINE_GPR_PSEUDO_32 323#undef DEFINE_GPR_PSEUDO_16 324#undef DEFINE_GPR_PSEUDO_8H 325#undef DEFINE_GPR_PSEUDO_8L 326 327#endif // DECLARE_REGISTER_INFOS_X86_64_STRUCT 328 329#ifdef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS 330 331#define UPDATE_GPR_INFO(reg, reg64) \ 332 do { \ 333 g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64); \ 334 } while (false); 335 336#define UPDATE_GPR_INFO_8H(reg, reg64) \ 337 do { \ 338 g_register_infos[lldb_##reg##_i386].byte_offset = GPR_OFFSET(reg64) + 1; \ 339 } while (false); 340 341#define UPDATE_FPR_INFO(reg, reg64) \ 342 do { \ 343 g_register_infos[lldb_##reg##_i386].byte_offset = FPR_OFFSET(reg64); \ 344 } while (false); 345 346#define UPDATE_FP_INFO(reg, i) \ 347 do { \ 348 g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(stmm[i]); \ 349 } while (false); 350 351#define UPDATE_XMM_INFO(reg, i) \ 352 do { \ 353 g_register_infos[lldb_##reg##i##_i386].byte_offset = FPR_OFFSET(reg[i]); \ 354 } while (false); 355 356#define UPDATE_YMM_INFO(reg, i) \ 357 do { \ 358 g_register_infos[lldb_##reg##i##_i386].byte_offset = YMM_OFFSET(i); \ 359 } while (false); 360 361#define UPDATE_DR_INFO(reg_index) \ 362 do { \ 363 g_register_infos[lldb_dr##reg_index##_i386].byte_offset = \ 364 DR_OFFSET(reg_index); \ 365 } while (false); 366 367// Update the register offsets 368UPDATE_GPR_INFO(eax, rax); 369UPDATE_GPR_INFO(ebx, rbx); 370UPDATE_GPR_INFO(ecx, rcx); 371UPDATE_GPR_INFO(edx, rdx); 372UPDATE_GPR_INFO(edi, rdi); 373UPDATE_GPR_INFO(esi, rsi); 374UPDATE_GPR_INFO(ebp, rbp); 375UPDATE_GPR_INFO(esp, rsp); 376UPDATE_GPR_INFO(eip, rip); 377UPDATE_GPR_INFO(eflags, rflags); 378UPDATE_GPR_INFO(cs, cs); 379UPDATE_GPR_INFO(fs, fs); 380UPDATE_GPR_INFO(gs, gs); 381UPDATE_GPR_INFO(ss, ss); 382UPDATE_GPR_INFO(ds, ds); 383UPDATE_GPR_INFO(es, es); 384 385UPDATE_GPR_INFO(ax, rax); 386UPDATE_GPR_INFO(bx, rbx); 387UPDATE_GPR_INFO(cx, rcx); 388UPDATE_GPR_INFO(dx, rdx); 389UPDATE_GPR_INFO(di, rdi); 390UPDATE_GPR_INFO(si, rsi); 391UPDATE_GPR_INFO(bp, rbp); 392UPDATE_GPR_INFO(sp, rsp); 393UPDATE_GPR_INFO_8H(ah, rax); 394UPDATE_GPR_INFO_8H(bh, rbx); 395UPDATE_GPR_INFO_8H(ch, rcx); 396UPDATE_GPR_INFO_8H(dh, rdx); 397UPDATE_GPR_INFO(al, rax); 398UPDATE_GPR_INFO(bl, rbx); 399UPDATE_GPR_INFO(cl, rcx); 400UPDATE_GPR_INFO(dl, rdx); 401 402UPDATE_FPR_INFO(fctrl, fctrl); 403UPDATE_FPR_INFO(fstat, fstat); 404UPDATE_FPR_INFO(ftag, ftag); 405UPDATE_FPR_INFO(fop, fop); 406UPDATE_FPR_INFO(fiseg, ptr.i386_.fiseg); 407UPDATE_FPR_INFO(fioff, ptr.i386_.fioff); 408UPDATE_FPR_INFO(fooff, ptr.i386_.fooff); 409UPDATE_FPR_INFO(foseg, ptr.i386_.foseg); 410UPDATE_FPR_INFO(mxcsr, mxcsr); 411UPDATE_FPR_INFO(mxcsrmask, mxcsrmask); 412 413UPDATE_FP_INFO(st, 0); 414UPDATE_FP_INFO(st, 1); 415UPDATE_FP_INFO(st, 2); 416UPDATE_FP_INFO(st, 3); 417UPDATE_FP_INFO(st, 4); 418UPDATE_FP_INFO(st, 5); 419UPDATE_FP_INFO(st, 6); 420UPDATE_FP_INFO(st, 7); 421UPDATE_FP_INFO(mm, 0); 422UPDATE_FP_INFO(mm, 1); 423UPDATE_FP_INFO(mm, 2); 424UPDATE_FP_INFO(mm, 3); 425UPDATE_FP_INFO(mm, 4); 426UPDATE_FP_INFO(mm, 5); 427UPDATE_FP_INFO(mm, 6); 428UPDATE_FP_INFO(mm, 7); 429 430UPDATE_XMM_INFO(xmm, 0); 431UPDATE_XMM_INFO(xmm, 1); 432UPDATE_XMM_INFO(xmm, 2); 433UPDATE_XMM_INFO(xmm, 3); 434UPDATE_XMM_INFO(xmm, 4); 435UPDATE_XMM_INFO(xmm, 5); 436UPDATE_XMM_INFO(xmm, 6); 437UPDATE_XMM_INFO(xmm, 7); 438 439UPDATE_YMM_INFO(ymm, 0); 440UPDATE_YMM_INFO(ymm, 1); 441UPDATE_YMM_INFO(ymm, 2); 442UPDATE_YMM_INFO(ymm, 3); 443UPDATE_YMM_INFO(ymm, 4); 444UPDATE_YMM_INFO(ymm, 5); 445UPDATE_YMM_INFO(ymm, 6); 446UPDATE_YMM_INFO(ymm, 7); 447 448UPDATE_DR_INFO(0); 449UPDATE_DR_INFO(1); 450UPDATE_DR_INFO(2); 451UPDATE_DR_INFO(3); 452UPDATE_DR_INFO(4); 453UPDATE_DR_INFO(5); 454UPDATE_DR_INFO(6); 455UPDATE_DR_INFO(7); 456 457#undef UPDATE_GPR_INFO 458#undef UPDATE_GPR_INFO_8H 459#undef UPDATE_FPR_INFO 460#undef UPDATE_FP_INFO 461#undef UPDATE_XMM_INFO 462#undef UPDATE_YMM_INFO 463#undef UPDATE_DR_INFO 464 465#endif // UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS 466 467#undef GPR_OFFSET 468#undef FPR_OFFSET 469#undef YMM_OFFSET 470